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PI6C49004A/PI6 C49003A
PI6C49004A/PI6C49003A Demo Board User Manual
by Shengjiang Pan
Table of Contents
1
Introduction ...............................................................................................................................2
2
Overview ...................................................................................................................................2
3
Quick Start ................................................................................................................................6
4
Detail Description......................................................................................................................7
5
Appendix A: PI6C49004A Demo Board Schematic ..................................................................9
6
Appendix B: PI6C49003A Demo Board Schematic ................................................................10
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1
Introduction
PI6C49004A and PI6C49003A are spread spectrum clock generators intended for PCIe Gen2 networking application
with SMBUS interface. These two demo board is designed to demonstrate the performance and key features of
PI6C49004A and PI6C49003A. This user manual describes how to use these demo boards. It will be divided into
following sections:

Overview

Quick Start

Detail Description

Test Results
2
Overview
Figure 1 is the block diagram of PI6C49004A demo board and figure 2 is the top view of Demo board. There are 12
pairs of 100MHz HCSL outputs, two 50MHz CMOS, one 32.256MHz CMOS and one selectable frequency output with
33/66/133MHz.Two +3.3V power should be connected to JP35 for SMBUS and to JP28 for VDD. Working modes of
PI6C49004A can be configured through SMBUS interface (JP22/23).
Likewise for PI6C49003A demo board as shown in figure 3.
Power for SMBUS
Power for VDD
JP35
JP28
SMBUS
2 pairs
JP25/26
3’’
JP33
3’’
JP29
3’’
SCLK
SDATA
50M_OUT
JP22/23
PI6C49004A
32.256M_OUT
t
33/66/133M_OUT
10’’
12 pairs
100M_Q
HCSL
25MHz Crystal
Figure 1: Block Diagram of PI6C49004A Demo Board
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Figure 2: Top View of PI6C49004A Demo Board
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Power for SMBUS
Power for VDD
2 pairs
3’’
JP10/12
JP28
SMBUS
SCLK
SDATA
50M_OUT
JP5/6
PI6C49004A
3’’
32.256M_OUT
t
JP20
3’’
JP18
JP23
33/66/133M_OUT
10’’
5 pairs
100M_Q
HCSL
25MHz Crystal
Figure 3: Block Diagram of PI6C49003A Demo Board
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Figure 4: Top View of PI6C49003A Demo Board
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3
Quick Start
To start up the PI6C49004A demo board, complete the following steps:
1. Supply +3.3V to demo board at JP28 and JP35;
2. Set JP32 open: enable all clock outputs under hardware control mode.
3. Connect I2C Host Adaptor to JP22 (SCLK) and JP23 (SDATA) header.
To start up the PI6C49003A demo board, complete the following steps:
1. Supply +3.3V to demo board at JP28 and JP35;
2. Set JP21 open: enable all clock outputs under hardware control mode.
3. Connect I2C Host Adaptor to JP5 (SCLK) and JP6 (SDATA) header.
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4
Detail Description
Key circuits and SMBUS control registers are described in detail in this section.
4.1 Key Circuits Description
a. Source Termination and Shunt Resistor of HSCL
33Ω source termination and 50Ω shunt resistor should be placed more closed to IC within 0.2 inch to reduce
reflection.
Figure 5: Termination and Shunt Resistor at HCSL Clock Output
b. Termination Circuit at CMOS Clock Output
PI6C49004A or PI6C49003A has CMOS clock outputs, 33Ω source termination is suggested to place closed
to IC within 0.2 inch to reduce reflection.
Figure 5: Termination at CMOS Clock Output
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4.2 I2C Control for PI6C49004A/3A configuration
a. Clock output can be controlled byt0 bit[6:5] and /PD_RESET pin.
Byte
Name
Bit 6
Bit 5
Comment
Byte 0
0
x
Hardware controls outputs.
/PD_RESET: “H” enables all outputs
/PD_RESET: “L” disables all outputs
1
0
Software controls outputs.
Disable all output.
1
1
Software controls outputs.
enable all output
b. Spread spectrum of HCSL can be configured through byte0 bit[7].
Byte
Name
Bit 7
Comment
Byte 0
0
Spread off
1
-0.5% down spread
c.
Spread spectrum of 50MHz CMOS can be configured through byte0 bit[4:1].
Byte
Name
Bit 4
Bit 3
Bit 2
Bit 1
Comment
0
0
0
0
nominal
0
0
0
1
nominal+1%
0
0
1
0
nominal+2%
0
0
1
1
nominal+3%
0
1
0
0
nominal+4%
0
1
0
1
nominal+5%
0
1
1
0
nominal+6%
Byte 0
0
1
1
1
nominal+8%
1
0
0
0
nominal+10%
1
0
0
1
Nominal-1%
1
0
1
0
Nominal-2%
1
0
1
1
nominal-3%
1
1
0
0
Nominal-4%
1
1
0
1
Nominal-6%
1
1
1
0
Nominal-8%
1
1
1
1
Nominal-10%
d. Spread spectrum of 33/66/133MHz CMOS can be configured through byte2 bit[7:5].
Byte
Name
Bit 4
Bit 3
Bit 2
Bit 1
Comment
0
0
0
0
33.3333MHz
0
0
0
1
66.6666MHz+2%
0
0
1
0
66.6666MHz+1%
0
0
1
1
66.6666MHz
Byte 2
0
1
0
0
66.6666MHz-2%
0
1
0
1
66.6666MHz-4%
0
1
1
0
66.6666MHz-6%
0
1
1
1
133.3333MHz
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5
Appendix A: PI6C49004A Demo Board Schematic
PI6C49004A.pdf
For more clear on viewing the schematic diagram, please click on this icon to open the PDF file.
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6
Appendix B: PI6C49003A Demo Board Schematic
For more clear on viewing the schematic diagram, please click on this icon to open the PDF file.
PI6C49003A.pdf
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