JANUSZ A. STARZYK VITA February 5, 2003 ADDRESSES Electrical Engineering Ohio University Athens, OH 45701 (740)593-1580 html: http://www.ent.ohiou.edu/~starzyk/ Home: 352 Carroll Rd. Athens, OH 45701 (740)593-7675 email: starzyk@bobcat.ent.ohiou.edu EDUCATION M.Sc. in Applied Mathematics in Electrical Engineering, Warsaw University of Technology, Warsaw, Poland, 1971. Ph.D. in Electrical Engineering, Warsaw University of Technology, Warsaw, Poland, 1976. PROFESSIONAL EXPERIENCE OHIO UNIVERSITY - Department of Electrical and Computer Engineering 1983 – present: Professor of Electrical and Computer Engineering. Have supervised more than 40 MSc and 15 PhD students. Current research projects: Self Organizing Learning Array: Involves 5 PhD and 1 MS students. Described on the web page: http://www.ent.ohiou.edu/~webcad/Current_Projects/solar/index.html Dynamically Reconfigurable Architecture for Wireless Communication: Involves 1 PhD and 1 MS student (one PhD student recently graduated). Described on the web page: http://www.ent.ohiou.edu/~webcad/Current_Projects/draw/index.html Acquisition and Tracking of GPS Signals: Involves 2 PhD students (one PhD student recently graduated). Project conducted in collaboration with the Avionics Engineering Center at Ohio University. Described at: http://webeecs.ent.ohiou.edu/avn/index.html Mixed Signal Testing of VLSI Circuits: Involves 1PhD student. WARSAW UNIVERSITY OF TECHNOLOGY - Institute of Electronics 1977-1981: Assistant Professor Fundamentals Consultant for: MAGNOLIA BROADBAND, SARNOFF RESEARCH, WRIGHT LABORATORIES, REDSTONE ARSENAL, ATT BELL LABORATORIES, MAGNETEK, NATIONAL INSTITUTE FOR STANDARDS AND TECHNOLOGY, SVERDRUP TECHNOLOGIES Visiting Positions: UNIVERSITY OF FLORENCE, MCMASTER UNIVERSITY, NATIONAL INSTITUTE FOR STANDARDS AND TECHNOLOGY, ATT BELL LABORATORIES, WRIGHT LABORATORIES, SARNOFF RESEARCH TEACHING INTERESTS Courses in Digital Design, Analog and Digital VLSI, Computer Aided Analysis, Digital Test and Testable Design, VHDL Hardware Description Language with FPGA Design, General EE. RESEARCH INTERESTS Computational Intelligence, Self Organizing Learning Machines, Neural Networks, Automatic Target Recognition, VLSI and VHDL Systems Design, Dynamically Reconfigurable Design, Analog and Digital Testing. PATENTS Janusz A. Starzyk and Dale E. Nelson, "Object Identification System and Method", Ohio University, International Patent Application, PCT /US01/22852, Serial # 60/220,768, filed on July 21, 2000. Janusz A. Starzyk, Russell Mohn, Thomas Senko, "Algorithm for the Reduction of Systematic Errors in Current Steering DAC", Sarnoff Corp., US Patent Application, filled on Dec. 14, 2001. Janusz A. Starzyk, "Self-Organizing Data-Driven Learning Hardware with Local Interconnections", Ohio University, US Patent Application, Serial # 10/174,038, filed on June 18, 2002. PUBLICATIONS Over 130 Refereed Journal and Conference Papers Recent Journal Papers (last 3 years) D. Liu and J. A. Starzyk, " A generalized fault diagnosis in dynamic analog circuits" Int. Journal of Circuit Theory and Applications, vol. 30, pp. 487-510, 2002. D. E. Nelson, J. A. Starzyk, and D. D. Ensley, "Iterative Wavelet Transformation and Signal Discrimination for HRR Radar Target Recognition," Multidimensional Systems and Signal Processing, Vol. 14 No.2. 2002. J. Becker, A. Alsolaim, M. Glesner, and J. Starzyk, “A Parallel Dynamically Reconfigurable Architecture for Flexible Aplication-Tailored Hardware/Software Systems in Future Mobile Communication”, The Journal of Supercomputing, Erratum Vol. 23, 132, 2002, 19(1): 105-127 (2001). J. Pang and J. A. Starzyk, "Fault Diagnosis in Mixed-Signal Low Testability System" An International Journal of Analog Integrated Circuits and Signal Processing, vol. 28, no.2, August 2001, pp. 159-170. J. A. Starzyk and Y.-W. Jan, and F. Qiu, "A DC-DC Charge Pump Based on Voltage Doublers", IEEE Trans. Circuits and Systems, Part I, vol. 48, no. 3, March 2001, pp. 350-359. G. N. Stenbakken, D. Liu J. A. Starzyk, and B. C. Waltrip, "Nonrandom Quatization Errors in Timebases", IEEE Trans. on Instrumentation and Measurement, vol. 50, no. 4, Aug. 2001, pp.888-892. J. A. Starzyk, D. E. Nelson, and K. Sturtz, " A Mathematical Foundation for Improved Reduct Generation in Information Systems", Journal of Knowledge and Information Systems, v. 2 n. 2, March 2000 p.131-146. J. A. Starzyk, J. Pang, S. Manetti, G. Fedi, and C. Piccirilli, "Finding Ambiguity Groups in Low Testability Analog Circuits", IEEE Trans. Circuits and Systems, Part I, vol 47, no. 8, 2000, pp. 1125-1137. Recent Conference Papers (last 3 years) J. A. Starzyk and D. Liu, "A Decomposition Method for Analog Fault Location", IEEE Int. Symposium on Circuits and Systems, May 26-29, Scottsdale, Arizona, 2002. J. A. Starzyk and D. Liu, "Locating Stuck-at Faults in Analog Circuits", IEEE Int. Symposium on Circuits and Systems, May 26-29, Scottsdale, Arizona, 2002. J. Starzyk and Z. Zhu, "Software Simulation of a Self-Organizing Learning Array System", The 6th IASTED Int. Conf. Artificial Intelligence & Soft Comp.(ASC 2002), July 17-19, 2002, Banff, Alberta, Canada. J. Pang, J. A. Starzyk, "P-code Generator FPGA Design for Direct GPS P(Y)-Code Acquisition", 12th International Conference on Field Programmable Logic and Applications (FPLA), 2002. M. Ding, A. Alsolaim, and J. Starzyk, "Designing and Mapping of a Turbo Decoder for 3G Mobile Systems Using Dynamically Reconfigurable Architecture " Engineering of Reconfigurable Systems and Algorithms, ERSA'02, The Int. Multi Conference in Computer Science, June 24-27, Las Vegas, Nevada, 2002. J. A. Starzyk Y. Guo, "A Self Organized Classifier Based on Maximum Information Index and its Develpoment Using VHDL", 2002 IEEE Int. Symposium on Intelligent Signal Processing and Communication Systems, 21-24 November 2002, Kaohsiung, Taiwan, R.O.C. 2002. J.A. Starzyk and D. Liu, "A new approach to multiple fault diagnosis in linear analog circuits," Proceeding of the 7th IEEE International Mixed Signal Testing Workshop (IMSTW), Atlanta, GA, Jun. 2001. J. A. Starzyk* and D. Liu, "A Method for Multiple Fault Diagnosis in Analog Circuits" Proc. Southeastern Symposium on System Theory, (Athens, OH, 2001). J. A. Starzyk and L. Jing, "Analog Circuits for Self Organizing Neural Networks Based on Mutual Information" Proc. Southeastern Symposium on System Theory, (Athens, OH, 2001). Y. Zeng and J. A. Starzyk, "Statistical Approach for Clustering in Pattern Recognition" Proc. Southeastern Symposium on System Theory, (Athens, OH, 2001). A. Alaqeeli and J. A. Starzyk, "Hardware Implementation of Fast Convolution for GPS Signal Acquisition Using FPGA" Proc. Southeastern Symposium on System Theory, (Athens, OH, 2001). A.Alsolaim and J. A. Starzyk, "Dynamically Reconfigurable Solution in the Digital Baseband Processing for Future Mobile Radio Devices" Proc. Southeastern Symposium on System Theory, (Athens, OH, 2001). D. E. Nelson and J. A. Starzyk, "High Range Resolution Radar Signal Classification: A Partitioned Rough Set Approach" Proc. Southeastern Symposium on System Theory, (Athens, OH, 2001). J. A. Starzyk and Y. Guo, "An Entropy-based Learning Hardware Organization Using FPGA" Proc. Southeastern Symposium on System Theory, (Athens, OH, 2001). J. A. Starzyk and D. Liu, "Multiple Fault Diagnosis of Analog Circuits Based on Large Change Sensitivity Analysis" Proc. ECCTD, (Espoo, Finland, Aug. 2001). D. E. Nelson and J. A. Starzyk, "High Range Resolution Radar - Extensions to Rough Set Theory for Automatic Target Recognition", SPIE 15th Annual Int. Symp. on Aerospace/Defense Sensing Simulation and Controls, (Orlando FL, April 2001) Best Paper award. J. A. Starzyk and D. Liu, "Multiple Fault Diagnosis of Analog Circuits by Locating Ambiguity Groups in Test Equation", Proc. IEEE Int. Symp. Circuits and Systems (Sydney, Australia, 2001). J. A. Starzyk and Z. Zhu, "Averaging Correlation for C/A Code Acquisition and Tracking in Frequency Domain", Proc. Midwest Symp. on Circuits and Systems (Dayton, OH, Aug. 2001). J. A. Starzyk and Y. Guo, "Reconfigurable Self-Organizing NN Design Using Virtex FPGA", Proc. Int. Conf. on Engineering of Reconfigurable Systems and Algorithms (ERSA) (Las Vegas, NV, June 2001). X. S. Song and J. A. Starzyk, "Feature Selection using Mutual Information and Statistical Techniques", Proc. 2001 IEEE Military Communications Conf. (MILCOM’2001), Washington D.C, October 2001. A. Alsolaim, J. Becker, M. Glesner, and J. Starzyk, "A Dynamically Reconfigurable System-on-a chip Architecture for Future Mobile Digital Signal Processing", The European Signal Processing Conference EUSIPCO, (Sept. 5 - 8, 2000, Tampere, Finland). J. Becker, M. Glesner, A. Alsolaim, J. Starzyk, "Fast Communication Mechanisms in Coarse-grained Dynamically Reconfigurable Array Architectures", the 2000 Int. Conf. on Parallel and Distributed Processing Techniques and Apllications, (Las Vegas, NV, June 2000). A. Alsolaim, J. Becker, M. Glesner, J. Starzyk. "Dynamically Reconfigurable Array Architecture for Future Mobile Digital Baseband Processing." 2000 IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM 2000), April 16-19, 2000, Napa Valley, California. Y. Zeng and J. Starzyk, "Piecewise Linear Approach: a New Approach in Automatic Target Recognition," SPIE 14th Annual Int. Symp. on Aerospace/Defense Sensing Simulation and Controls, (Orlando FL, April 2000). J. Starzyk, J. Pang, "Fault Diagnosis in Analog and Mixed Mode Low Testability Systems", Proc. IEEE Int. Symp. Circuits and Systems (Geneva, Switzerland, 2000). D. E. Nelson and J. A. Starzyk "Fusing Marginal Reducts for HRR Target Identification" 4th World MultiConference on Systems, Cybernetics and Informatics (SCI2000), (Orlando, Florida, July 2000), pp. 452460 Best Paper award. G. N. Stenbakken, D. Liu J. Starzyk, and B. C. Waltrip, "Nonrandom Quatization Errors in Timebases", Proc. IEEE Instrumentation and Measurement Technology Conference (Baltimore, MD May 2000). J. Starzyk and J. Pang, "Evolvable Binary Artificial Neural Network for Data Classification", the 2000 Int. Conf. on Parallel and Distributed Processing Techniques and Apllications, (Las Vegas, NV, June 2000).