CHAPTER 14 14.1 (a) Common-collector Amplifier (Emitter-follower) 14.1 (b) Common-gate Amplifier 14.1 (c) Common-collector Amplifier (Emitter-follower) 14.1 (d) Not a useful circuit because the signal is injected into the drain of the transistor. 14.1 (e) Common-emitter Amplifier 14.1 (f) Common-source Amplifier 14.1 (g) Common-gate Amplifier 14.1 (h) Not a useful circuit since the signal is being taken out of the base terminal. 1 14.1 (i) Common-source Amplifier 14.1 (j) Common-source Amplifier 14.1 (k) Common-base Amplifier 14.1 (l) Not a useful circuit because the signal is injected into the drain of the transistor. Note that the resistor labels on RD and R1 were reversed in the first printing. 2 14.1 (m) Common-source Amplifier 14.1 (n) Common-emitter Amplifier 14.1 (o) Common-drain Amplifier (Source-follower) 14.2 3 14.3 14.4 14.5 g R a Neglecting R OUT : A Vth m L 1 gm R 5 0.005S2000 5.00 | R IN 1 0.005S200 R OUT r o 1 g m R 5 10k1 0.005S200 20.0 k 2k | A Ith b A Vth g m R L 0.005S2k 10k 8.33 | R IN | R OUT r o 10.0 k | A Ith 14.6 a g m 0.02S | r Neglecting R OUT : A Vth 75 3750 | R IN r o 1R 5 3750 76 200 19.0 k .02 o R L 75 12k 46. 3 R th r o 1R 5 500 3750 76200 75200 o R 5 R OUT r o 1 100k 1 437 k 12k R th r R 5 500 3750 200 A Ith o 75 7512k b A Vth 19.2 500 3750 76560 R IN r o 1R 5 3750 76 560 46.3 k | A Ith o 75 75560 o R 5 R OUT r o 1 100k 1 973 k R th r R 5 500 3750 560 14.7 a For large o : A V RL 8.2k 47k 6.91 | b Place a bypass capacitor in R5 330 680 parallel with the 330 resistor. Then AV 8. 2k 47k RL 10.3 | c Place a R5 680 8.2k 47k 21. 2 330 10 V CC 120. bypass capacitor in parallel with the 680 resistor. Then AV d Place a bypass capacitor from the emitter to ground. e A V 14.8 R IN r o 1R 5 500 k A Vth R th oR L 75R L 10 R L 66.7 k r o 1R 5 100 500k Assuming o 1R 5 r , R 5 500 k 500 k 6.58 k o 1 76 Note: The nearest5% values would be 68 k and 6. 8 k. 14.9 4 R IN r 500 k oR L 75R L A Vth 10 | R L 66.7 k R th r 100 500k r o V V 75 0. 025V o T | IC o T 3. 75 A gm IC r 500k 5 14.10 i x g m v gs g o g v m gs g o i x g o 0 g o g o v d | v gs v s g o G5 v s g m g o v d v g m g o G5 s = g oG5 | v d g m g o G5 R OUT ix g g o G5 m ix g oG5 g vd G r R 5 1 m 5 R 5 1 f o ix go g o R 5 R OUT r o 1 f R 5 r o f R 5 r o 1 g m R 5 14.11 i x g 'm v e g o g 'm v e g o g o v x i x g | o g o G5 G1 v e 0 g o = g o G 5 + G1 | v x R OUT g 'm g o G5 G1 g 'm v x g o G5 G1 v e g 'm g o g 'm g o G 5 + G1 ix ix g o G5 + G1 g ' vx G G1 ro ' R 5 R 1 1 m 5 R 5 R1 1 g r m o ix go go R 5 R1 R OUT R 5 R1 r o r o g m r R 5 R th r o R 5 R 5 R1 r o 1 R th r R th r R 5 R th r R 5 14.12 62k 9. 07V | R EQ 20k 62k 15.1k 20k 62k 12 0.7 9.07 V 7.16A | I 537 A | V 12 3900I 8200I 5. 47 V IB C EC E C 15.1k 75 13.9k V EQ 12 Forward active region is correct. | r 750.025 V 3.49k 537A 15.1k 0.938v s | R th 1k 15.1k 0.938k 1k 15.1k 75 7.58k R L r o 8. 2k 100k 8.2k 100k 7.58k | A Vth 128 0.938k 3.49k 15.1k A V 0.938 A Vth 120 | A I 75 60. 9 15.1k 3.49k R IN 15.1k 3.49k 2.83 k | R OUT r o 8.2k 8.2k vth v s v be 0. 938v s A V 10V CC 6 3.49k 5.00mV 0.739 vs | v s 6.76 mV 0. 938k 3.49k 0.739 1012 120. | Gain is identical to the rule - of - thumb estimate. V EQ 14.13 500k 18 4.74 V | R EQ 500k 1. 4M 368k 1.4M 500k 2I DS 27000I DS I DS 104A 250x10 6 18 IDS 75k 27k 7.39V | Saturation region is correct. 4.74 V GS 27000I DS 1 V DS g m = 2 250x10 6 104 x10 6 0. 228mS 368k 0.997 vs | R th 1k 368k 0.997k 1k 368k R L r o 75k 470k 75k 470k 64.7k | A Vth 0.228mS 64.7k 14.8 vth v s A V 0.997 A Vth 14.7 | A I 368k g m 75k 11.6 75k 470k R IN 368 k | R OUT r o 75k 75k vgs 0.997v s | VGS V TN = AV 2 104A 250A / V 2 = 0.912 V | vs 0.2 0.912V 0.183 V 0.997 V DD 18 V 19.7 | The rule- of - thumb estimate assumes VR L DD . VGS V TN 0. 912 2 We have VR L 104A75k 7.80 V 0.433V DD The estimate also doesn't account for the presence of R3 . 14.14 V EQ 18 2.2M 9.00 V | R EQ 2.2M 2.2M 1.10M 2.2M 2.2M 18 22000I SD V SG 9 | 9 = 22000I SD 1 2I SD I SD 307A 400x10 6 V SD 18 I SD 22k 18k 5. 72V | Saturation region is correct. gm = 2 400x10 6 307x10 6 0.496mS vth v s 1.1M 0.999v s | R th 1k 1.1M 0.999k 1k 1.1M R L r o 18k 470k 18k 470k 17.3k | A Vth 0.496mS 17. 3k 8.60 A V 0.999 A Vth 8.59 | R IN 1.10 M | R OUT r o 18k 18k AI A V R IN 1.1M 8.59 20.1 R3 470k vgs 0.999v s | V GS V TN = 2307A 400A / V 2 = 1.24 V | vs 0.2 1.24V 0. 248 V 0.999 14.15 V 2 V V GS 11kI DS 11k20mA 1 GS V GS 3.50V, I DS GS 318 A 4 11k V DS 20 I DS 11k 39k 4.10V | Saturation region is correct. 2 1M gm = 20mA 318A 1.26mS | v th v s 1. 00v s 4 0. 5k 1M 7 R th 0.5k 1M 0.500 k | R L 39k 500k 36. 2k A V A Vth A I R G 1.26mS 36.2k 3.07 | R IN 1.00 M | R OUT 39k 1 1. 26mS 11k gm 1. 26mS 106 84. 8 1 g mR 1 1 1.26mS 11k vth 1.00v s | V GS V P = 3.5 4 = 0.500 V | vs 0.20.51 1. 26mS 11k 1.49 V 14.16 V SG 0 I SD I DSS 5.00mA | V DS 16 1800I DS 7. 00V Saturation region is correct. | g m = 2 5 5mA 5mA 2.00mS 10M 10M 1. 00v s | A V = 2.00mS 1. 8k 36k = 3. 43 5k 10M 10M + 5k 1.8k R IN 10.0 M | R OUT 1.80 k | A I 10M 2.00mS 952 1.8k 36k 10M vgs v s 0.2 V SG V P v s 1 V 10M + 5k vth v s 14.17 10 0.7 V 12. 3A | I C 983 A | V CE = 20 9100I E = 11. 0 V | Forward 20k 80 19.1k 800.025 V 100 11. 0V 113k active region is correct. | r 2.04k | r IB 983A o 983A 20k 0.988 vs | R th 20k 250 247 20k 250 80 102k R L r o 1M 113k 1M 102k | A Vth 3570 247 2.04k 20k 113k A V 0.988 A Vth 3530 | A I 7.37 80 20k 2. 04k 113k 1M R IN 20k 2.04k 1. 85 k | R OUT 113 k vth v s v be 0. 988v s 2.04k 5.00mV 0.881vs | v s 5.67 mV 247 2. 04k 0.881 14.18 A Ith 81 | r 80 811k 200 | A Vth 0.632 0. 4S 47k 200 811k R IN 200 811k 81.2 k | R OUT 14.19 A Vth 8 0.988 47k 583 0. 4S 81 0.011k 1 0. 909 | A Ith | R IN | R OUT 100 1 0. 011k 10mS 14.20 Defining v1 as the source node: a 2k 100k 1.96k v s v1 3.54x10 3 v v1 s v1 1960 10 6 3.541x10 3 vs 4.051x10 3 v1 v1 0. 874v s | A V 0. 874 v vs R IN s 7.94 M i s 10 6 vs v1 Driving the output with current source ix : v v1 R OUT : i x 16 3.54x10 3 v1 2000 10 v1 R OUT 247 | b R IN ix 14.21 51k 6. 08V | R EQ 51k 100k 33.8k 51k 100k 6.08 0.7 18V 37. 3A | I 4.67 mA | V = 36 2000I 4700I = 4.54 V IB C CE C E 33.8k 126 4.7k V EQ 18 Forward - active region is correct. | r 125 0. 025V 50 4.54 V 669 | r o 11.7k 4.67mA 4.67mA 33. 8 0.985v s | R th 33.8k 500 493 500 33.8k 126 2.94k R L 24k 4.7k 11.7k 2.94k | A Vth 0.997 0. 493k 0.669k 126 2.94k vth v s A V 0.985 A Vth 0.982 | R IN 33. 8k 0. 669k 126 2.94k 31.0 k AI A V R S R IN 0.5k 31. 0k 493 669 0. 982 1.29 | R OUT 2.94k = 9.19 R3 24. 0k 126 v be 0. 982v s 0.669k 5. 00mV 0.00177 vs | v s 2. 83 V 0. 493k 0.669k 126 2.94k 0.00177 14.22 5 0.7V 96.8nA | IC 9.68A | V CE = 10 430000I E = 5. 80V | Forward 1M 100 1430k 1000.025 V 60 5.80 V 6.80M - neglected active region is correct. r 258k | r IB 9.68A o 9.68A In the ac model, R 1 appears in parallel with r . The circuit appears to have a transistor with r' 500k r 170k and 'o g m r ' 40 9.68A 170k 65.8 vth v s | R th 500 | R L 500k 430k 500k 158k AV 66.8158k 0. 984 | R IN 170k 66.8 158k 10.7 M 0.500k 170k 66.8158k 9 R S R IN 500 10.7M 0. 984 21.1 R3 500 k 500 170k R OUT 500k 430 k = 2.53 k 66.8 170k 5. 00mV v be v s 0.0159v s | v s 0.315 V 0.500k 170 k 66.8 158k 0.0159 AI A V 14.23 V GS 5 V | I DS 4x10 4 2 5 1 3.2mA | V DS 5 5 10 V - Saturation region 2 operation is correct. | g m 2 4x10 4 3.2mA 1 0.02 10 1.75mS 1 10 0.02 ro 18.8k Cannot neglect! | R L =18.8k 100k =15.8k 3. 2mA 106 1.75mS 15. 8k 1.75mS 15.8k 1 AV 0. 956 | A I 10 6 9.56 6 1 1.75mS 15.8k 105 10 10 4 1 1.75mS 15.8k 1 R IN R G 1 M | R OUT r 555 gm o 6 0.25 1 10 1 vgs v s 0.0346 vs | v s 23. 2 V But, 6 4 10 10 1 1.75mS 15.8k 0. 0346 v DS must exceed vGS V TN V GS V TN = 4 V for saturation. V DS 10 v o 10 0. 956v s 4 v s 6.28 V Limited by the Q - point voltages 14.24 o g m r 3.54mS 1M 3540 | R L = 2k 100k = 1.96k o 1R L r o 1R L R IN r o 1R L AV R OUT 14.25 3540 11.96k 0.874 1M 3540 11.96k 1M 3540 11. 96k 7. 94 M r 106 2k 2k 247 o 1 3541 vs 0. 0051 g m R L | R L R 4 R 7 R 4 I R vs 0. 0051 g m R L 0. 0051 g m R 4 = 0.005 1 C 4 V T I R I R vs 0. 0051 F E 4 0.005 1 E 4 V V T T V R V R VR 4 4 4 vs 0. 0051 0.005 1 0.005 V T 5 0. 025 10 14.26 a v be v s v o | 0. 005 5 v o A V b A V o 1R E r o 1R E 1 v o 4.995 0. 999 vs 5 1 1 1 1 r r o VT o 1 1 1 1 R g R I o E o 1 oR E m E ERE 1 VT 0. 025V 0. 999 0.001 I E R E 25. 0 V VT I R 0.001 E E 1 I ER E 14.27 vo 7.5 0. 005 0.999333 vs 7.5 500R E 1 500 | AV V 500 R E T 500 R E 1 IE R E 500 v be v s v o = 1 A V vs | 0. 005 1 A V 7.5 A V From Prob. 14.26, A V 1 | RL RE VT 1 IE R L 1 V T 500 R E 0.999333 6.67x104 V T 500 R E I E R E 500 1 I ER E 500 500I E R E 0.025V 37. 5V | V CC I ER E + 0.7 + 7.5 500 R E 6.67x104 Some design possibilities are listed in the table below. RE IE VCC VCC IE 100 450 mA 53 V 24 W 250 225 mA 64 V 16 W 360 179mA 73V 13 W 500 150 mA 83 V 12 W 750 125 mA 102 V 13 W 1000 113mA 120 V 14 W 2000 93.8 mA 196 V 18 W Using a result near the minimum power case in the table: RE = 510 E= 149mA and VCC = 85V. 149mA 2.92 mA | Set IR 1 5I B 14.6mA 15mA 51 149mA 510 0.7 5. 07k 5.1 k | I R 2 I R 1 I B 18mA 15mA Assumining F 50: I B R1 V E V BE I R1 R2 85 V BE V BE 8. 3V 462 470 IR 2 18mA It is very difficult to achieve the required level of linearity! 11 14.28 a A Vth 0.5mS 100k g mR L 1 1 48.8 | R IN 2.00 k 1 g m R th 1 0.5mS 50 g m 0. 5mS R OUT (since = 0) | A Ith 1 b A Vth 14.29 a r 0.5mS 100k 14. 3 | R IN 2.00 k | R OUT | A Ith 1 1 0.5mS 5k 100 0. 025V 200k | g m 40 12.5A 0.5mS 12.5A 0. 5mS 100k r gm R L 48.8 | R IN 1.98 k 1 g m R th 1 0.5mS 50 o 1 60V r o 1+ g m R th = 1 0.5mS50= 4.92 M | A Ith o 0. 990 12.5A A Vth R OUT 0.5mS 100k 23. 8 | R IN 1.98 k 1 0.5mS 2.2k 60V = 1 0.5mS2. 2k 10.1 M 12.5A b A Vth R OUT 14.30 AV ≈ 0 ; The signal is injected into the collector and taken out of the emitter. This is not a useful amplifier circuit. 14.31 3.3x10 2x10 V 4 V SG 12 33kI SD | V SG 12 2x10 V 4 2 1 2 SG SG 1 282A 2 24 I SD 33k 24k 7. 93 V - Saturation region operation is correct. V SG 2.68V & I SD V SD 4 2 g m 2 2x10 4 2. 82x10 4 3.36x10 4 S | v th 33k v s 0. 985v s 0.5k 33k R th 0.5k 33k 493 R L = 24k 100k 19.4k | A V 0.985 AI 4 3. 36x10 S 19.4k 5. 51 1 3. 36x10 4 S 493 24k 1 0.178 | R IN 33k 2.73k | R OUT R D 24k 1 24k 100k g m 33k gm vsg v s 33k R IN 2.73k 0.2 V SG 1 | v s 0.2 2.68 1 vs 0. 398 V R S R IN 0.5k 2.73k 14.32 Note: This problem should refer to Fig. P14.1(g). 12 5x10 V 3900 4 V GS 3900 IDS 5x10 V 2 4 I SD gm GS 2 | V GS 0.975 V GS 2 V GS 0. 9915V 2 2 2 2 254A | V DS 15 23. 9kI DS 8.92V - Saturated. 2 2254A 1 0.504mS | R IN 3.9k 1.32k | R OUT R D 20k 2 0.992 gm GS R L = 20k 51k 14.4k | A V 3.9k AI 1 3. 9k gm vsg v s 1 R IN 1.32k g R 0. 504mS14. 4k 4.11 R S R IN m L 1k 1. 32k 20k 0.187 20k 51k 1.32k 1. 32k 0.2V GS 2 | vs 0.2 0.992 2 vs 0. 354 V 1k 1.32k 1k 1.32k 14.33 IB 9 0.7 V 1.94A | I C 96. 9 A 100k 50 182k V CE =18 82000I E 39000I C = 6.12 V | Forward - active region is correct. g m = 40IC = 3.88mS | r vth v s o 50 6.12 V 579k - neglected 12.9k | r o gm 96.9A 82k = 0.994v s | R th 0.5k 82k = 497 | R L 39k 100k 28.1k 0.5k 82k A V 0.994 5028.1k r 36.5 | R IN 82k 253 12.9k 510. 497k o 1 AI A V R S R IN 500 253 36.5 0.275 | R OUT R C = 39.0 k R3 100k veb vs R IN 5.00mV | 0.336v s 5.00mV | vs 14. 9 mV R S R IN 14.34 9 0. 7V IB 194nA | IC 9.69 A 1000k 50 1820k V CE =18 820000 IE 390000 IC = 6.12 V | Forward - active region is correct. g m = 40IC = 0.388mS | r vth v s o 50 6.12V 5.79M - neglected 129k | r o gm 9.69A 820k = 0.994v s | R th 5k 820k = 4.97k | R L 390k 1M 281k 5k 820k A V 0.994 50281k r 36.5 | R IN 820k 2.52k 129k 514. 97k o 1 AI A V R S R IN 5k 2.52k 36.5 0.275 | R OUT R C = 390 k R3 1M veb vs R IN 5.00mV | 0.335v s 5.00mV | v s 14. 9 mV R S R IN 13 14.35 Note: VTP = -1 V. 2x10 V 4 I SD 2 15 V SG I SD 1 2 SG | 15 V SG 68k 10 4 V SG 12 V SG 2.363 V 186A | V SD 30 68k 43k I SD 9.35V | Saturation region 68k is correct . | g m 2186A 1 0.274mS | R IN 68k 3. 46k 2. 36 1 gm R OUT R D 43k | R L = 43k 200k 35. 4k AV AI vs R IN 3.46k gm R L 0.274 mS 35. 4k 9.05 R S R IN 0.250 k 3.46k 68k 1 68k gm 1 43k 3.46k 0.168 | v sg vs 0.2 V SG 1 43k 200k 0.250k 3. 46k 3.46k 0.22.36 1 v s 0.292 V 0.250k 3. 46k 14.36 For R th 1 , A Vth g m R L All of the input voltage appeas across the gate- source gm terminals of the transistor. For R th current, 14.37 R IN 1 R , A Vth L gm R th For large R th , all of the Thevenin equivalent source v th , goes into the transistor source terminal. R th r 1.5k 75 0.025V 1. 88k 1.5k | r 1.88k | R IN 44.5 o 1 1mA 76 14.38 gm 2 1 1mA 5mA 2.24mS | R IN 447 2 gm 14.39 g m 21.25mA 1mA 1.58mS | R IN 14.40 a R OUT r o 1 r oR E 15V 0. 7V 100A | For F 100, I C 99.0A | I E r R E 143k 100 0. 025V 50V 25.3k | r o 505k 99. 0A 99. 0A 100 143k R OUT 505k1 43. 4 M 25.3k 143k 14 1 633 gm b 0 V 15V 0.7V 1000.025 V 953A | For F 100, IC 944A | r 2.65k c I E 15k ro 944A 50V 10015k 53.0k | R OUT 53.0k 1 4.56 M | V CB 0 V 944A 15k 2.65k 14.41 R OUT o 1r o o 1 14.42 V A V CE 50 10.7 126 154 M IC 49. 6A 30 10 20 R IN 5M | A V 31.6 | Large R IN , moderate gain These requirements are easily met by a common- source amplifier. V DD 15 V For example, A V 30. V GS V TN 0.5V A common - emitter stage operating at a low collector current is a second possibility. 14.43 52 R IN 1M | A V 10 20 398 | Large R IN , large gain A common - emitter amplifier operating at a low current can achieve both a large gain and input resistance. A V 20V CC V CC 20V Achieving this gain with an FET is much more difficult: V DD V DD AV V DD 100V which is unreasonably large. V GS V TN 0.25V 14.44 An inverting amplifier with a gain of 40 dB is most easily achieved with a common - emitter stage: A V 10V CC V CC =10 V. The input resistance can be achieved by shunting the 100 0. 025V = 0.5 A and would 5 waste a large amount of power to achieve the required input resistance . input with a 5 resistor. Setting r = 5 would require IC 14.45 0 dB corresponds to a follower. For an emitter - follower, R IN o 1R L 10110k 1. 01M. So an BJT does not meet the input resistance requirement . A source follower provides a gain of approximately 1 and can easily achieve the required input resistance . 14.46 A gain of 0. 98 and an input resistance of 250k should be achievable with either a source- follower or emitter- follower. For the FET , A V requires g m R L 49: g mR S 0. 98 1 g mR S 2I DSR S 49 IDS R S 12.3V for a design with V GS V TN 0.5V. VGS V TN 15 The BJT can achieve the required gain with a much lower power supply and can still meet the RIN requirement: R IN o R L 100 5k = 500k. g mR E o 1R E o g R AV = 0. 98 | m E 49 IE R E 49 0. 025 1.23 V. g R r o 1R E 1 m E o o 14.47 A non - inverting amplifier with a gain of 10 and an input resistance of 2k should be readily achievable with either a common- base or common - gate amplifier with proper choice of operating point. The gain of 10 is easily achieved with either the V DD 1 FET or BJT design estimate: A V or A V 10 V CC . R IN 2k is within V GS V TN gm easy reach of either device. 14.48 80 A V 10 20 10, 000. This value of voltage gain excceds the amplification factor of even the best BJTs: A V f = 40V A = 40 150 V 6000. Such a large gain requirement cannot be met with a single- transistor amplifier. An FET typically has a much lower f and is at an even worse disadvantage. 14.49 R OUT R th r R th 250 1. 66 o 1 o 1 151 14.50 R IN r o 1R E r oR E r 1 g m R E | r ' r 1 g m R E g 'm r 'o ic o o o gm vs r o 1R E r o R E r 1 g m R E 1 g m R E ic vc vs 0 oR E oR E r o 1 r o 1 r o 1 g m R E for r R E r r R E g m g m ' ' ' 'o g 'm r ' r 1 g m R E o | f g m r o r o 1 g m R E f 1 g m R E 1 g m R E 14.51 *Problem 14.51 - Common-Emitter Amplifier 5mV VCC 6 0 DC 9 VEE 4 0 DC -9 VS 1 0 SIN(0 0.005 1K) C1 1 2 1U RB 2 0 10K RC 6 5 3.6K RE 3 4 2K C2 3 0 50U C3 5 7 1U R3 7 0 10K Q1 5 2 3 NBJT .OP 16 .TRAN 1U 5M .FOUR 1KHZ V(7) .MODEL NBJT NPN IS=1E-16 BF=100 VA=70 .PROBE V(7) .END *Problem 14.51 - Common-Emitter Amplifier 10mV VCC 6 0 DC 9 VEE 4 0 DC -9 VS 1 0 SIN(0 0.01 1K) C1 1 2 1U RB 2 0 10K RC 6 5 3.6K RE 3 4 2K C2 3 0 50U C3 5 7 1U R3 7 0 10K Q1 5 2 3 NBJT .OP .TRAN 1U 5M .FOUR 1KHZ V(7) .MODEL NBJT NPN IS=1E-16 BF=100 VA=70 .PROBE V(7) .END *Problem 14.51 - Common-Emitter Amplifier 15mV VCC 6 0 DC 9 VEE 4 0 DC -9 VS 1 0 SIN(0 0.015 1K) C1 1 2 1U RB 2 0 10K RC 6 5 3.6K RE 3 4 2K C2 3 0 50U C3 5 7 1U R3 7 0 10K Q1 5 2 3 NBJT .OP .TRAN 1U 5M .FOUR 1KHZ V(7) .MODEL NBJT NPN IS=1E-16 BF=100 VA=70 .PROBE V(7) .END Results: 5 mV 10 mV 15 mV 1 kHz 5.8 mV 12.4 mV 20.6 mV 2 kHz 0.335 mV (5.7%) 1.54 mV (12.5%) 4.32 mV (21%) 3 kHz 0.043 mV (0.74% 0.258 mV (2.1%) 1.18 mV (5.4%) THD 5.9% 12.8% 22% 14.52 *Problem 14.52 - Output Resistance VCC 2 0 DC 10 IB1 0 1 DC 10U Q1 2 1 0 NBJT IB2 0 3 DC 10U RE 4 0 10K Q2 2 3 4 NBJT .OP .DC VCC 10 20 .025 17 .MODEL NBJT NPN IS=1E-16 BF=60 VA=20 .PRINT DC IC(Q1) IC(Q2) .PROBE IC(Q1) IC(Q2) .END Results: A small value of Early voltage has been used deliberately to accentuate the results. Note that the transistors have significantly different values of F because of the collectoremitter voltage differences and low value of VA. NAME MODEL IB IC VBE VBC VCE BETADC GM RPI RO From SPICE : R OUT1 Q1 Q2 NBJT NBJT 1.00E-05 1.00E-05 8.77E-04 6.72E-04 7.61E-01 7.61E-01 -9.24E+00 -2.41E+00 1.00E+01 3.18E+00 8.77E+01 6.72E+01 3.39E-02 2.60E-02 2.59E+03 2.59E+03 3.33E+04 3.33E+04 20 10 V 20 10 V 43.5 k 34.1 k | R OUT2 1.17 0.877 mA 903 673 A For circuit 1: R OUT1 r o1 33. 3 k o R E For circuit 2: R OUT2 r o 2 1 + R th r R E (See Eq. 14.26) R r R th E But R th R OUT2 r o2 R E 33.3k 10k 43.3 k 14.53 vth G mR th 14.54 vth v s 14.55 vth v s R th gm r 1 g mR 5 v s f v s | R th r o 1 g mR 5 r o f R 5 1 g mR 5 o r 1 g mr o R r r 1 f vs | R th r o 1 RoR Sr RS r S S o 1r o R s r o 1r o 1 1 vs vs Rs r g mR s o 1 1 o 1r o o 1r o o 1 f o 1 f vs R s r R r ro s o 1 o 1 14.56 a y 21 y12 18 i1 v2 i2 v1 | i 2 g m v1 | y 21 g m v2 0 | i1 0 | y12 0 | v1 0 y12 0 y 21 b y 21 y12 i1 v2 i2 v1 | i 2 o 1i b o 1 v2 0 | i 1 i b v1 0 i2 v1 c y 21 y12 i1 v2 | i 2 g m g o v1 | y 21 g m g o | i1 g ov 2 | y 21 g o | v1 0 y12 y12 i1 v2 y12 i2 v1 v2 y 12 1 | y 12 g | o g o 1 r y 21 g m o o 1 v2 0 d y 21 e y 21 v1 1 o g m g | y 21 o m r o r o i1 v2 i2 v1 y 12 go 1 1 y 21 g m g o f 1 | i 2 g m v1 | y 21 g m v2 0 | i1 g ov 2 | y 21 g o | v1 0 | i2 v2 0 | i 1 i 2 v1 0 y 12 g o 1 1 y 21 g m f o o v | y 21 r o 1R 5 1 r o 1R 5 R5 v2 R5 R5 r R OUT R 5 r v2 R5 oR 5 R 5 r r o 1 R 5 r 1 for o 1R 5 >> r o 1r o r o 1R 5 y12 1 R5 R5 g R for o 1R 5 >> r | m 5 1 y 21 o or o or o o f o 1r o f y 21 y12 i1 v2 i2 v1 | i2 v2 0 gm gm v | y 21 1 gm R 5 1 1 gm R 5 | i1 0 | y12 0 | v1 0 y12 0 y 21 14.57 At the output node vo : g m v x g o G L vo g ov x | v o i x g m v x g o v x v o | g m go vx go G L g g o G g m ix g m g o 1 m g m g o L vx g o G L g o G L R 1 L GL g m ix gm go vx ro 1 1 R L g m g o | R IN G L 1 1 vx go G L ix g m 1 g m r o g o G L f 19 14.58 I C 100 5 0.7 10 4 101 103 3.87mA | g m 40IC 0.155S | r 100 645 gm R L 1k 20k = 952 | R E 1k 20k = 952 A V1 AV2 oR L 100 952 0.984 r o 1R E 645 101952 o 1R E r o 1R E 101952 645 101952 0.993 The small - signal requirement limits the output signal to: 0.005 v be = v s v o2 = v s 1 0.993 = 0. 007v s | v s = 0.714 V 0.007 v o1 0. 984 0.714 V 0. 703V We also need to check VCB : V C 5 3.87mA 1k 1.13V and V B = 10 4 IB 0.387 V. The total collector- base voltage of the transistor is therefore: V CB 1.52V 0.984 v s v s . We require VCB 0 for forward - active region operation. Therefore: v s 0.766 V. The small - signal limit is the most restrictive. 14.59 *Problem 14.59 - Common-Collector Amplifier 14.1(a) VCC 6 0 DC 18 VEE 7 0 DC -18 VS 1 0 AC 1 *For Output Resistance *VS 1 0 AC 0 *VO 8 0 AC 1 RS 1 2 500 C1 2 3 10UF R1 3 0 51K R2 6 3 100K RE 4 7 4.7K RC 6 5 2K C3 5 0 10UF C2 4 8 47UF R3 8 0 24K Q1 5 3 4 NBJT .OP .AC LIN 1 10KHZ 10KHZ .MODEL NBJT NPN IS=1E-16 BF=125 VA=50 .PRINT AC VM(8) VP(8) VM(3) VP(3) IM(VS) IP(VS) IM(C2) IP(C2) .END Results: Q-point: (4.67 mA, 4.57 V), AV = 0.982, RIN = 31.1 kROUT= 9.12 For hand calculations see Problem 14.21: AV = 0.982, RIN = 31.0 kROUT= 9.19 14.60 *Problem 14.60 - Common-Gate Amplifier - 14.1(b) VSS 5 0 DC 12 VDD 6 0 DC -12 VS 1 0 AC 1 *For Output Resistance *VS 1 0 AC 0 20 *VO 7 0 AC 1 RS 1 2 500 C1 2 3 10U R1 5 3 33K RD 6 4 24K C2 4 7 47U R3 7 0 100K M1 4 0 3 3 PFET .OP .AC LIN 1 50KHZ 50KHZ .MODEL PFET PMOS KP=200U VTO=-1 LAMBDA=0.02 .PRINT AC VM(7) VP(7) VM(3) VP(3) IM(VS) IP(VS) IM(C2) IP(C2) .END Results: Q-point: (286 A, 7.72V), AV = +5.50, RIN = 2.73 kROUT= 21.8 k For hand calculations see Problem 14.31: AV = +5.51, RIN = 2.73 k 50 7. 93 R OUT R CG 205k | R CG O RD | r o OUT r o 1 g m R th 282x10 6 4 R CG 493 239k | R OUT 239k 24k 21. 8 k OUT 205k 1 3. 36x10 14.61 *Problem 14.61 - Common-Collector Amplifier - 14.1(c) VCC 7 0 DC 5 VEE 8 0 DC -5 VS 1 0 AC 1 *For Output Resistance *VS 1 0 AC 0 *VO 6 0 AC 1 RS 1 2 500 C1 2 3 10UF R1 3 5 500K R2 5 0 500K RE 4 8 430K C2 4 5 47UF C3 4 6 10UF R3 6 0 500K Q1 7 3 4 NBJT .OP .AC LIN 1 10KHZ 10KHZ .MODEL NBJT NPN IS=1E-16 BF=100 VA=60 .PRINT AC VM(6) VP(6) VM(3) VP(3) IM(VS) IP(VS) IM(C3) IP(C3) .END Results: Q-point: (9.81 A, 5.74V), AV = 0.983, RIN = 11.0 MROUT= 2.58 k For hand calculations see Problem 14.22: AV = 0.984, RIN = 10.7 MROUT= 2.53 k 14.62 *Problem 14.62 - Common-Emitter Amplifier - 14.1(e) VCC 6 0 DC 12 VS 1 0 AC 1 *VS 1 0 AC 0 *VO 7 0 AC 1 RS 1 2 1K C1 2 3 2.2UF R1 6 3 20K R2 3 0 62K 21 RE 6 4 3.9K C2 6 4 47UF RC 5 0 8.2K C3 5 7 10UF R3 7 0 100K Q1 5 3 4 PBJT .OP .AC LIN 1 5KHZ 5KHZ .MODEL PBJT PNP IS=1E-16 BF=75 VA=60 .PRINT AC VM(7) VP(7) VM(3) VP(3) IM(VS) IP(VS) IM(C3) IP(C3) .END Results: Q-point: (525 A, 5.62V), AV = -110, RIN = 3.16kROUT= 7.69 k For hand calculations see Problem 14.12: Q-point: (537 A, 5.47V), RIN = 2.84 k 60 5. 47 122k | R L r o 8.2k 100k 122k 8.2k 100k 7.14k 537x10 6 75 7.14k A Vth 121 | A V 0. 938A Vth 113 | R OUT r o 8.2k 7.68k 0.938k 3. 49k ro 14.63 *Problem 14.63 - Common-Source Amplifier - 14.1(f) VDD 4 0 DC 18 VS 1 0 AC 1 *For output resistance *VS 1 0 AC 0 *VO 7 0 AC 1 RS 1 2 1K C1 2 3 2.2U R1 3 0 500K R2 4 3 1.4MEG R4 6 0 27K C2 6 0 47U RD 4 5 75K C3 5 7 10U R3 7 0 470K M1 5 3 6 6 NMOSFET .OP .AC LIN 1 5KHZ 5KHZ .MODEL NMOSFET NMOS VTO=1 KP=250U LAMBDA=0.02 .PRINT AC VM(3) VP(3) VM(7) VP(7) IM(VS) IP(VS) IM(C3) IP(C3) .END Results: Q-point: (106A, 7.14V), AV = -14.2, RIN = 369kROUT= 65.8 k For hand calculations see Problem 14.13: Q-point: (104 A, 7.39V), RIN = 368 k 50 7.39 552k | R L r o R D 470k 552k 75k 470k 57. 9k 104x10 6 368k R OUT r o 75k 66.0 k | v th v s 0.997 v s 1k 368k A V 0.997g m R L 0.997 0.228mS 57.9k 13.2 ro 14.64 22 *Problem 14.64 - Common-Gate Amplifier - 14.1(g) VDD 5 0 DC 15 VS 1 0 AC 1 *For output resistance *VS 1 0 AC 0 *VO 6 0 AC 1 RS 1 2 1K C1 2 3 2.2U R1 3 0 3.9K RD 4 5 20K C2 4 6 47U R3 6 0 51K M1 4 0 3 3 NMOSFET .OP .AC LIN 1 20KHZ 20KHZ .MODEL NMOSFET NMOS VTO=-2 KP=500U LAMBDA=0.02 .PRINT AC VM(3) VP(3) VM(6) VP(6) IM(VS) IP(VS) IM(C2) IP(C2) .END Results: Q-point: (268A, 8.60V), AV = 4.26, RIN = 1.27 kROUT= 18.8 k For hand calculations see Problem 14.32: Q-point: (254 A, 8.92V), RIN = 1.32 k 50 8.92 CG 6 232k | R OUT = r o 1 g m R th 232k 1 0.504mS 3.9k 1k 325k 254 x10 R L R D R 3 51k 20k 14.4k | R OUT R CG OUT 20k 18. 8 k ro 3.9k 0.796 v s 1k 3.9k g mR L 0.504mS 14. 4k 0.796 0.796 4.12 1 g m R th 1 0.504mS 3.9k 1k v th v s AV 14.65 *Problem 14.65 - Common-Source Amplifier 14.1(i) VDD 6 0 DC 18 VS 1 0 AC 1 *For output resistance *VS 1 0 AC 0 *VO 7 0 AC 1 RS 1 2 1K C1 2 3 2.2UF R2 6 3 2.2MEG R1 3 0 2.2MEG R4 6 4 22K C2 6 4 47UF RD 5 0 18K C3 5 7 10UF R3 7 0 470K M1 5 3 4 4 PFET .OP .AC LIN 1 7.5KHZ 7.5KHZ .MODEL PFET PMOS KP=400U VTO=-1 LAMBDA=0.02 .PRINT AC VM(3) VP(3) VM(7) VP(7) IM(VS) IP(VS) IM(C3) IP(C3) .END Results: Q-point: (268A, 8.60V), AV = -8.29, RIN = 1.10kROUT= 16.4 k For hand calculations see Problem 14.32: Q-point: (307 A, 5.72V), RIN = 1.10 k 23 50 5. 72 182k | R L r o R D 470k 182k 18k 470k 15. 8k 307x10 6 1.1M R OUT r o 18k 16.4 k | v th v s 0.999v s 1k 1.1k A V 0.999g m R L 0.999 0. 496mS 15.8k 7.82 ro 14.66 *Problem 14.66 - Common-Source Amplifier - 14.1(j) VDD 6 0 DC 20 VS 1 0 AC 1 *For output resistance *VS 1 0 AC 0 *VO 7 0 AC 1 RS 1 2 500 C1 2 3 2.2UF RG 3 0 1MEG R4 4 0 11K C2 5 7 47UF RD 6 5 39K R3 7 0 500K J1 5 3 4 NJFET .OP .AC LIN 1 4KHZ 4KHZ .MODEL NJFET NJF BETA=1.25M VTO=-4 LAMBDA=0.02 .PRINT AC VM(3) VP(3) VM(7) VP(7) IM(VS) IP(VS) IM(C2) IP(C2) .END Results: Q-point: (319 A, 4.03V), AV = -3.02, RIN = 1.00 MROUT= 38.4 k For hand calculations see Problem 14.15: Q-point: (318 A, 4.10V), RIN = 1.00 M ro 50 4.10 170k | R CS OUT = r o 1 g m R 1 =170k 1 1.26mS 11k 253k 318x10 6 CS R L R CS OUT R D R 3 253k 39k 500k 31.7k | R OUT R OUT 39k 33.8 k v th v s 14.67 24 1M v s | A V g m R L 1.26mS 31. 7k 3.99 0.5k 1M *Problem 14.67 - Common-Base Amplifier - 14.1(k VCC 7 0 DC -9 VEE 4 0 DC 9 VS 1 0 AC 1 *For output resistance *VS 1 0 AC 0 *VO 8 0 AC 1 RS 1 2 500 C2 2 3 47UF RB 5 0 100K RE 3 4 82K C1 5 0 4.7UF RC 7 6 39K C3 6 8 10UF R3 8 0 100K Q1 6 5 3 PBJT .OP .AC LIN 1 12KHZ 12KHZ .MODEL PBJT PNP IS=1E-16 BF=50 VA=50 .PRINT AC VM(3) VP(3) VM(8) VP(8) IM(VS) IP(VS) IM(C3) IP(C3) .END Results: Q-point: (97.2 A, 6.10V), AV = 35.5, RIN = 273 ROUT= 38.1 k For hand calculations see Problem 14.33: Q-point: (96.9 A, 6.12V), RIN = 253 ro 50 6.12 o R th 50 497 CB 579k1 12.9k 497 1. 65M 6 579k | R OUT = r o 1 r R 96. 9x10 th CB R L R CB OUT R D R 3 1.65M 39k 100k 26. 6k | R OUT R OUT 39k 38.1 k 82k 0. 994v s 0.5k 82k 3.88mS 26.6k g mR L 0.994 0. 994 34. 9 1 g m R th 1 3.88mS 0.497k v th v s AV 14.68 *Problem 14.68 - JFET Common-Source Amplifier - 14.1(m) VDD 5 0 DC -16 VS 1 0 AC 1 *For output resistance *VS 1 0 AC 0 *VO 6 0 AC 1 RS 1 2 5K C1 2 3 2.2U R1 3 0 10MEG RD 4 5 1.8K C2 4 6 10U R3 6 0 36K J1 4 3 0 PJFET .OP .AC LIN 1 3KHZ 3KHZ .MODEL PJFET PJF BETA=200U VTO=-5 LAMBDA=0.02 .PRINT AC VM(3) VP(3) VM(6) VP(6) IM(VS) IP(VS) IM(C2) IP(C2) .END Results: Q-point: (5.59 A, 5.93 V), AV = -3.27, RIN = 10.0 MROUT= 1.53 k For hand calculations see Problem 14.16: Q-point: (5.00 mA, 7.00V), RIN = 10.0 M 50 7.00 11.4k | R L r o R D R 3 11.4k 1.8k 36k 1. 48k 5x103 R OUT r o R D 11. 4k 1.8k 1.56k ro v th v s 14.69 10M v s | A V g m R L 2. 00mS 1.48k 2.96 5k 10M *Problem 14.69 - Common-Emitter Amplifier - 14.1(n) VCC 7 0 DC 10 VEE 6 0 DC -10 VS 1 0 AC 1 *For output resistance *VS 1 0 AC 0 *VO 8 0 AC 1 RS 1 2 250 25 C1 2 3 4.7UF RB 3 0 20K R4 4 6 9.1K C2 4 0 100UF L 7 5 1H C3 5 8 1UF R3 8 0 1MEG Q1 5 3 4 NBJT .OP .AC LIN 1 500KHZ 500KHZ .MODEL NBJT NPN IS=1E-16 BF=80 VA=100 .PRINT AC VM(3) VP(3) VM(8) VP(8) IM(VS) IP(VS) IM(C3) IP(C3) .END Note: L needs to be 1H to reach midband performance at 500kHz. Results: Q-point: (979 A, 11.0 V), AV = -3420, RIN = 2.09 kROUT= 113 k For hand calculations see Problem 14.17: Q-point: (983 A, 11.0V), RIN = 1.85 k 100 11.0 113k | R L r o R 3 113k 1M 102k | R OUT r o 113k 983x10 6 oR L 80 102k 20k vs 0. 988v s | A V 0.988 0.988 3530 250 20k R th r 247 2. 04k ro v th 14.70 *Problem 14.70 - Source Follower - 14.1(o) VDD 5 0 DC 5 VSS 6 0 DC -5 VS 1 0 AC 1 *For output resistance *VS 1 0 AC 0 *VO 7 0 AC 1 RS 1 2 10K C1 2 3 2.2U R1 3 0 1MEG L 4 6 100mH C3 4 7 4.7U R3 7 0 100K M1 5 3 4 4 NMOSFET .OP .AC LIN 1 100KHZ 100KHZ .MODEL NMOSFET NMOS VTO=1 KP=400U LAMBDA=0.02 .PRINT AC VM(3) VP(3) VM(7) VP(7) IM(VS) IP(VS) IM(C3) IP(C3) .END Results: Q-point: (3.84 mA, 10.0 V), AV = 0.953, RIN = 1.00 MROUT= 504 For hand calculations see Problem 14.23: Q-point: (3.20 mA, 10.0V), AV = 0.956, RIN = 1.00 MROUT= 555 14.71 AV g mR L 0.95 g m R L 19 | g m 2K n I DS | V GS V TN 1 gm RL I DS 0.5 0.03 3.75mA | R L 2 26 2 19 2 0. 030.00375 1.27k 2I DS 0. 5V Kn R L R S 3k R S 2.19k | V SS V GS 3.75mA R S | Possible designs: 2.4k, 11. 5V ; 2.7k, 12.6V ; 3.0k, 13.75V - Making a choice which uses a nearly minimum value of supply voltage gives: V SS 12 V, R S 2. 4 k. 14.72 R IN r o V T 1000.025 V | IC 33. 3 mA IC 75 14.73 The base voltage should remain half way between the positive and negative power supply voltages. If VEE = +10V and VCC = 0V, then VB should = 5 V which can be obtained using a resistive voltage divider from the +10V supply. We now have the standard four-resistor bias circuit. The base curent is 327 A/80 = 4 A. Setting the current in R1 to 10IB 40A, R1 current in R 2 11I B 44A, and R 2 5V 125k 120k. The 40A 5V 114k 110 k. 44A Note that the base terminal must now be bypassed with a capacitor. 14.74 1 0. 01 0.01 g m 2K n IDS 0.1S | I DS | a I DS 1 A gm 2K n 20.005 0.01 b I DS 10.0 mA | The second FET achieves the desired input resistance 20.5 R IN at much lower current and hence much lower power for a given supply voltage. 14.75 This analysis assumes that the source and load resistors are fixed , and that only the amplifier parameters are changing. A Vth RL 1 R th gm o | o 80 0. 988 | R th R E 75 81 max Since RE 75, R th 75 is essentially constant. To achieve Amax ,g m g max Vth , R L R L m which requires IC Imax 0.988 C 5.25 0.7 V 364A | R max 8.2k1.05 100k 7. 93k L 13k0. 95 27 A max Vth 7. 93k min min 54. 8 | To achieve Amin Vth , R L R L , g m g m which requires 1 75 40364A 0.988 IC I min 0.988 C A min Vth 4. 75 0.7 V 293A | R min 8.2k0. 95 100k 7.23k L 13k 1.05 7.23k 44.8 | 44.8 A V 54.8 | The range is only slightly larger 1 75 40 293A 0. 988 than that observed in the Monte Carlo analysis in Table14.16. 14.76 *Problem 14.76 - Common-Base Amplifier - Monte Carlo Analysis *Generate Voltage Sources with 5% Tolerances IEE 0 8 DC 5 REE 8 0 RTOL 1 EEE 6 0 8 0 1 * ICC 0 9 DC 5 RCC 9 0 RTOL 1 ECC 7 0 9 0 -1 * VS 1 0 AC 1 RS 1 2 75 C1 2 3 47U RE 3 6 RTOL 13K Q1 4 0 3 PBJT RC 4 7 RTOL 8.2K C2 4 5 4.7U R3 5 0 100K .OP .AC LIN 1 10KHZ 10KHZ .PRINT AC VM(5) VP(5) .MODEL PBJT PNP (BF=80 DEV 25%) (VA = 60 DEV 33.33%) .MODEL RTOL RES (R=1 DEV 5%) .MC 1000 AC VM(5) YMAX .END Results: Mean value AV = 47.5; 3 limits: 42.5 ≤ AV ≤ 52.5. However, the worst-case values min observed in the analysis are A V 43.2 and A max 51.9. The mean is 5% lower than the V design value. The width of the distribution is approximately the same as that in Table 14.16. 14.77 (a) This analysis assumes that the source and load resistors are fixed , and that only the amplifier parameters are changing. A Vth RL 1 R th gm o | o 80 0. 988 | R th R E 75 81 max Since RE 75, R th 75 is essentially constant. To achieve Amax ,g m g max Vth , R L R L m which requires IC Imax 0.988 C 28 5.10 0.7V 330A | R max 8. 25k1.01 100k 7.69k L 13. 3k0.99 A max Vth 7. 69k min min 50.7 | To achieve Amin Vth , R L R L ,g m g m which requires 1 75 40330A 0.988 IC I min 0.988 C A min Vth 4. 90 0.7V 309A | R min 8.25k0.99 100k 7.55k L 13.3k1. 01 7.55k 48.2 | 48.2 A V 50.7 1 75 40 309A 0. 988 Using a Spreadsheet similar to Table 14.16: Mean value AV = 49.6; 3 limits: 48.2 ≤ AV ≤ min 50.9. The worst-case values observed in the analysis are A V 14.78 48. 4 and A max 50.8. V *Problem 14.76 - Common-Base Amplifier - Monte Carlo Analysis *Generate Voltage Sources with 2% Tolerances IEE 0 8 DC 5 REE 8 0 RTOL 1 EEE 6 0 8 0 1 * ICC 0 9 DC 5 RCC 9 0 RTOL 1 ECC 7 0 9 0 -1 * VS 1 0 AC 1 RS 1 2 75 C1 2 3 100U RE 3 6 RR 13.3K Q1 4 0 3 PBJT RC 4 7 RR 8.25K C2 4 5 1U R3 5 0 100K .OP .AC LIN 1 10KHZ 10KHZ .PRINT AC VM(5) VP(5) IM(VS) IP(VS) .MODEL PBJT PNP (BF=80 DEV 25%) (VA = 60 DEV 33.33%) .MODEL RTOL RES (R=1 DEV 2%) .MODEL RR RES (R=1 DEV 1%) .MC 1000 AC VM(5) YMAX *.MC 1000 AC IM(VS) YMAX .END Results: Mean value: AV = 47.2; 3 limits: 45.7 ≤ AV ≤ 48.5 Mean value: RIN = 83.4 ; 3 limits: 79.5 ≤ AV ≤ 87.6 29 14.79 1 RE RE RE RE 80 g m 1 g m R E 1 40I CR E 1 40 1 39.5I E R E I R 81 E E RE I E R E 2.5 0.7 1.8V | 75 R E 5.41k 1 39. 51. 8 80 1.8V IC = = 329A | R th 75 5.41k 74.0 | g m 40 329A 13.2mS 81 5. 41k 5410 R v th v s 0.986 v s | A V 0. 986 1 LR R L 7.64k 75 5410 th gm o R IN R E 7.64k R C 100k R C 8. 27k | V C 2. 5V I CR C 0.221V | Oops! We are violating our definition of the forward- active region. If we use the nearest 5% values, R E 5.6k and R C 8.2k, IC = 318A and V C = +0.108V. The transistor is entering saturation. 14.80 Using a Spreadsheet similar to Table 14.16: Mean value: AV = 0.960; 3 limits: 0.942 ≤ AV ≤ 0.979 Mean value: IDS = 4.91 mA; 3 limits: 4.27 mA ≤ IDS ≤ 5.55 mA Mean value: VDS = 7.03 V; 3 limits: 4.52 V ≤ VDS ≤ 9.54 V *Problem 14.80 - Common-Drain Amplifier - fig. 14.40 *Generate Voltage Sources with 5% Tolerances IDD 0 7 DC 5 RDD 7 0 RTOL 1 EDD 5 0 7 0 1 * ISS 0 8 DC 20 RSS 8 0 RTOL 1 ESS 6 0 8 0 -1 * VGG 1 0 DC 0 AC 1 C1 1 2 4.7U RG 2 0 RTOL 22MEG RS 3 6 RTOL 3.6K C2 3 4 68U R3 4 0 3K M1 5 2 3 3 NMOSFET .OP .AC LIN 1 10KHZ 10KHZ .DC VGG 0 0 1 .MODEL NMOSFET NMOS (VTO=1.5 DEV 33.33%) (KP=20M DEV 50%) LAMBDA=0.02 .MODEL RTOL RES (R=1 DEV 5%) .PRINT AC VM(4) VP(4) IM(VGG) IP(VGG) .MC 1000 DC ID(M1) YMAX *.MC 1000 DC VDS(M1) YMAX *.MC 1000 AC IM(VGG) YMAX *.MC 1000 AC VM(4) YMAX .END Results: 30 Mean value: IDS = 4.97 mA; 3 limits: 4.32 mA ≤ IDS ≤ 5.62 mA Mean value: VDS = 7.19 V; 3 limits: 6.18 V ≤ VDS ≤ 8.20 V Mean value: RIN = 22.0 M; 3 limits: 20.3 ≤ RIN ≤ 24.0 Mean value: AV = 0.956; 3 limits: 0.936 ≤ AV ≤ 0.976 14.81 a A Vth R OUT g mR L 0.01S 1k 0.625 | R IN 1 g m 1 R L 1 0.01S 1 0.5 1k 1 1 66.7 | A Ith g m 1 0.01S 1 0.5 b A Vth is worse; R OUT is improved. 14.82 a A Vth 0.01S 2k g mR L 4. 44 | R IN 1 g m 1 R 5 1 0.01S1 0.75 200 R OUT r o 1 g m 1 R 5 10k1 0.01S1. 75200 45.0 k | A Ith b A Vth is reduced; R OUT is increased. 14.83 a A Vth R IN g m 1 R L 0.5mS 1 1100k 95.2 1 g m 1 R th 1 0.5mS 1 150 1 1 1000 g m 1 0.5mS 1 1 R OUT r o 1 g m 1 R th r o 1 0.5mS 1 150 1.05r o ( for = 0) b A V is larger; R IN is smaller. 31