1.
The uncertainty in the SR flip-flop for S=1, R=1 can be eliminated by converting it into
(1)
a) D flip-flop
b) T flip-flop
c) JK flip-flop
d) (a), (b), and (c)
2.
What is the output ‘Q’ for the following circuit of JK flip-flop after the application of clock pulse at the
inputs of the NAND gates?
(2)
U1A
U3A
K=0
7400N
U2B
Q1
7402N
U4B
J=1
Q2
7400N
7402N
a) logic 1
b)logic 0
c)complement to that of previous state
d) same as that of previous state
3.
What is the truth table for the following circuit?
(2)
a)
A
B
Q
0
0
0
0
1
1
1
0
0
1
1
1
A
B
Q
0
0
0
0
1
0
1
0
1
1
1
1
A
B
Q
0
0
forbidden
0
1
0
1
0
1
b)
c)
1
1
Qn
A
B
Q
0
0
Qn
0
1
0
1
0
1
1
1
forbidden
d)
4.
For writing ‘n’ bit word into a register in serial form, how many clock pulses are required?
(1)
a) n
b)1
c) 2n
d)2n
5.
Johnson counter is a ______counter.
(1)
a) divide-by-N
b) divide by 2N
c) divide by 2N
d) divide by 2N – 1
6.
To generate the sequence …1101011….using shift registers how many flip-flops are required?
(2)
a) 3
b) 4
c) 5
d) 6
7.
How many states are present in N-stage Moebius counter?
a) 2N
b) 2N
c) N
d) 2N -1
(1)
8.
The serial-in serial-out shift register with ‘N’ stages and ‘f’ as the clock frequency will introduce a delay of
___ for the input.
(1)
a) N/f
b)Nf
c)N/2f
d)f/N
9.
The output of a mod-2 counter given as clock input to a mod-5 counter gives a
(2)
a)mod-5 counter
b)mod-25 counter
c)mod-10 counter
d)mod-25 counter
10.
If you wish to obtain a 10 KHz square wave from a 1MHz clock, which divide by k counter will you use?
(2)
a)divide by 10 counter
b)divide by 1000 counter
c)divide by 100 counter
d)divide by 1 counter
11.
If J-K flip-flop is operated in toggle mode, with the input frequency of 20KHz, what will be the frequency
of the output?
(2)
a)20KHz
b)5 KHz
c)10KHz
d)40KHz
12.
In a ripple counter with clock frequency as ‘f’, the frequency at the output of most significant flip-flop will
be
(1)
a)f/2
b)f/4
c)f/8
d)f/16
13.
How much is the time taken to shift 8 bit number in a shift register if the clock frequency is 10MHz?
(2)
a)400ns
b)800ns
c)100ns
d)1600ns
14.
Which of the following code is a reflected code?
a) Excess-3
b) Gray
c) 2421 code
d) Natural BCD
(1)
15.
What is the gray code for 1000?
a) 1011
b) 1110
c) 0110
d) 1110
What are the minterms for the expression (A+B̅+C). (A̅ + B+C̅) ?
a) 2, 5
b) 1, 3, 7
c) 0, 1, 3, 4, 6, 7
d) 4, 6, 7
(2)
17.
The negative numbers in a binary system can be represented by
a) Sign magnitude
b) 1s complement
c) 2s complement
d) All of the above
(1)
18.
What is the excess-3 code of decimal number 396?
a) 011011001001
b) 110001100
c) 001110010110
d) 001110011001
(2)
19.
If decimal 396 is represented in binary code, BCD code, excess-3 code, octal code and hex code, which
code will require most number of bits for its representation?
(2)
a) Binary code
b) Hex code
c) Cant say
d) None of these
20.
Parity checker circuit can detect
a) Even number of errors
b) Odd number of errors
c) Any number of errors
d) None of these
21.
In the K map shown (with variables A, B, C, D – with A as MSB) what is the minimized expression?
(2)
1
1
1
1
a)
1
1
1
1
1
b)
A
1
1
1
1
c)
0
1
1
1
1
16.
(2)
(1)
d) A̅
22.
Bubbled AND gate is equivalent to __
a) NAND gate
b) AND gate
c) OR gate
d) NOR gate
23.
In a 4 variable K map, how many possible groupings are there of 4 variables involving any cell?
(1)
(2)
a)
b)
c)
d)
6
4
8
12
24.
Which cells will have a ‘0’ for the expression (A + B + C̅ + D̅). (A̅ + C + D̅). (A̅ + B + C̅ + D̅). (B̅ + C). (B̅
+ C̅ ). (A + B̅). (B̅ + D̅)?
(2)
a) 3, 4, 5, 6, 7, 9, 11, 12, 13, 14, 15
b) 4, 5, 6, 7, 12, 13, 14, 15
c) 3, 9, 11
d) 0, 1, 2, 8, 10
25.
The radix for hexadecimal number system is
a) 16
b) 8
c) 2
d) None of these
26.
If 4 adjacent ones are grouped, the number of literals get reduced by ___ as compared to original number of
literals.
(1)
a) 1
b) 2
c) 3
d) 4
(1)