# cse 2441 (5440) laboratory assignment 8

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```Name: ________________________________ ID# ______________________
Date Submitted: __________________ Lab Section # ____________________
CSE 2441 – Introduction to Digital Logic
Spring Semester 2013
Lab Number 4 -- A Simple Arithmetic Unit
(Due by 5:00 PM on February 22, 2013)
CSE 2441
LABORATORY SESSION 4
SPRING 2013
A SIMPLE ARITHMETIC UNIT
(100 POINTS)
PURPOSE/OUTCOMES: To design, implement, and test a simple two-function
arithmetic unit. By successfully completing this laboratory, you will have demonstrated
an ability to design combinational logic circuits and an understanding of 2’s-complement
numbers and arithmetic.
BACKGROUND: In Lab Session 3, you constructed a four-bit adder and a four-bit
subtractor using an SN7483 IC as the basic component. In this lab, you will use the
knowledge gained in that exercise to design, verify, construct, and test a four-bit
arithmetic unit (AU) that can add or subtract and detect overflow conditions. The block
diagram for the AU is shown below.
A4 A3 A2 A1
B4 B3 B2 B1
OVR
Arithmetic Unit
(AU)
AddSub (Add=0, Sub=1)
Cout
R4
R3
R2
R1
If AddSub = 0, then R = A + B. If AddSub = 1, then R = A – B.
Cout = the carry-out produced by either the + or – operation.
OVR = 1 will indicate that an overflow condition resulted from the + or – operation.
OVR = 0 when there was no overflow.
Negative numbers are to be represented by 2’s complement.
PRELAB (25 points):
1. Design an adder/subtractor for the AU that meets the above specifications. Use one
SN7483 as the basic component of the design. Use XOR2 gates to perform the bitwise complement of input B as needed for addition or subtraction. Capture and
verify your design using QuartusII/Qsim. Refer to section 4.8 of Nelson, Nagle,
Carroll, and Irwin for more information.
2. Design a combinational logic circuit for detecting arithmetic overflow in the above
AU. Capture and verify your design using QuartusII/Qsim.
LAB WORK (Have the lab instructor check your work after each part.)
Part 1 (50 Points):
Construct the 4-bit adder-subtractor section of your ALU. Test the adder/subtractor with
the following additions and subtractions. Record your results. Then examine and explain
each result.
3+4=?
6+6=?
7-5=?
7–1=?
7+1=?
5 - (-4) = ?
(-2) + (-4) = ?
(-2) - (-4) = ?
(-4) - (-2) = ?
(-5) - 6 = ?
(-5) - (-5) = ?
5–5=?
Part 2 (25 Points):
Construct and integrate your overflow detector circuit with the adder-subtractor that you
built above. Test the overflow circuit with the same input patterns given in part 1 and
record your results.
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