5. Common Beam Instrumentation
5.1
Beam Loss Measurement
The existing beam loss monitoring (BLM) systems in the PS Booster and PS use outdated electronics
based on old Aluminium Cathode Emission Monitors (ACEM). This type of detector has a limited
dynamic range, requires frequent calibration and was not designed with reliability in mind. Most
important, these are commercial products no longer manufactured and only a very limited number of
spares are available. The LIU project goal of providing high intensity, low emittance beams from these
LHC injectors requires a full upgrade of their BLM systems in order to correctly identify loss
locations and implement machine protection. The LIU baseline is to upgrade the PSB and PS with
systems similar to what is currently being developed for Linac4, with their transfer lines equipped
with the same system as part of the BE-BI consolidation requests. The SPS being consolidated at a
later stage with a different type of electronics more suited to its large ring architecture.
The main design goals for the new injector BLM system are to cover a high dynamic loss range
and to provide high reliability and availability, all based on a generic, modular and highly configurable
architecture. With this in mind the acquisition electronics will be compatible with several detector
types. In the majority of the cases the detectors will be ionisation chambers similar to those used in the
LHC. Nevertheless, several other types, e.g. secondary emission monitors, diamond detectors and
Cherenkov detectors, may be used to cover particular needs at specific locations. Double-shielded
coaxial cables will be used to transport the signal between the detector and the front-end electronics, to
minimise the amount of EMC noise introduced. The digitisation will be based on a new design
concept that allows the measurement of currents from 10 pA to 200 mA, equivalent to a dynamic
range in the order of 1010. The processing part of the system will keep track of several integrated loss
windows, ranging from 2 μs to 1.2 s, for each detector. As well as providing this data on-line to the
control room and storing it in databases for subsequent analysis, the calculated loss values for each
channel will also be continuously checked against predefined threshold values both at the hardware
and software level. When these thresholds are exceeded the BLM system, through its direct
connection to the beam interlock system (BIS), will have the ability to block future beam injections.
The processing is provided by a Field Programmable Gate Array (FPGA), providing the flexibility to
implement the specific requirements of each accelerator, while still maximising reliability. A block
diagram of the architecture of the system can be seen in Figure 5.1.
Fig. 5.1: Overview of the BLM system under development for the CERN Injector Complex.
5.1.1
Acquisition electronics
The analogue acquisition electronics will be controlled by an FPGA and will have the ability to
automatically switch between two acquisition methods depending on the current seen on the input. For
an input current in the range between 10 pA and 30 mA a fully differential current to frequency
1
converter (FDFC) will be used, assisted by an ADC for fine interval sampling (see Figure 5.2).
Currents above 20.3 μA will be measured via direct sampling by a second ADC.
Fig. 5.2: Fully Differential Current to Frequency Converter.
The principle of operation of the FDFC is the following. The input current is directed by
analogue switches to the positive or negative branch of the differential integrator. This charges the
capacitor of the connected branch while at the same time discharging the capacitor of the opposite
branch. Both branches are connected to analogue comparators which create a negative pulse as soon as
the voltage reaches the threshold Vthr. The pulses from both comparators are combined by a NAND
gate, which toggles a flip-flop, forcing a change of connection for the input current to the two
branches [2]. By counting the number of times the input is switched the amount of input charge
received within a given time can be calculated. The collected number of switches is read-out in regular
intervals and the ADC is then used to provide the fractional part of the charge still remaining on the
capacitor. Laboratory tests have shown that this system is capable of measuring over 10 orders of
magnitude [3].
The acquisition crate will be able to host up to eight BLEDP modules with each module
digitising the current from eight input channels in parallel. An FPGA device located on each BLEDP
module is responsible for controlling the analogue circuitry, collecting the input data and transmitting
them to the processing electronics through a point-to-point multi-gigabit optical link.
5.1.2
Processing electronics
The processing modules are hosted in VME crates together with the front-end computer and timing
receiver modules. These processing modules are the standard BE-BI carrier board, the DAB64x, fitted
with an active mezzanine containing an FPGA device. The mezzanine also provides two SFP
connectors that can be used to provide a bi-directional multi-gigabit optical link or gigabit Ethernet.
The data received from the acquisition modules will be processed using FPGAs to provide an
update of the losses measured for each of the channels every 2s. These values will then be used to
create a summary for each channel for the permanent logging and for operational displays. For
assisting in more detailed analysis of loss mechanisms, the system will store shorter integrals in
memory to allow the evolution of the losses over the cycle to be displayed.
The processing modules will also continuously update the losses observed in several integration
windows for each channel. These will be checked against interlock threshold values for each window
and provide an over-threshold signal when the threshold is exceeded. The over-threshold signals from
all 8 processing modules residing in one crate will propagate through backplane daisy-chain lines to
the combiner module, which has a direct connection to the Beam Interlock System.
5.1.3
Installation and planning
A total of 32 BLM detectors have been installed and connected in the L2 straight section of each PSB
period during LS1, and will be commissioned during 2015. A further 18 channels are foreseen for the
new PSB injection region and will be ready for installation at Linac4 connection. The remaining part
of the system, which includes 32 channels in the L3 straight section of each period and 28 channels in
the ejection region, will be installed during LS2. A new type of detector, the Flat Ionisation Chamber
(FIC), is currently being produced in collaboration with IHEP (Protvino, Russia) to address the space
constraints of the L3 position. All other ionisation chamber detectors are expected to be of the LHC
design.
For the PS ring it is proposed to replace the existing system with 100 new channels based on
LHC ionisation monitors using the same electronics as described above.
It is also planned to consolidate the transfer line BLM systems between the PSB and PS as well
as those from the PS to the SPS with the same detectors and acquisition chain. For this a request for
the necessary funding has been made to the consolidation project.
The SPS beam loss system is not expected to be upgraded before LS3 due to manpower
constraints and will therefore not form part of the LIU project.
5.2
Beam loss observation system
The request for observation systems to allow bunch-by-bunch, turn-by-turn loss evaluation will be
fulfilled using diamond detectors. These detectors have a large dynamic range, a response time of a
few ns, and have demonstrated the possibility of measuring bunch-by-bunch losses on a turn-by-turn
basis in the LHC. It is foreseen to install 8 such detectors in the PSB injection region, up to 16 at
various locations in the PS ring and 2 diamond detectors in the SPS extraction regions. The PSB and
PS systems will provide analogue signals to OASIS to allow fast loss observations to be correlated
with other machine events. Initial acquisition of the SPS monitors will be based on fast sampling
oscilloscopes, with the aim of moving to an in-house solution by LS2.
5.3
New wire scanner system
To cope with increasing requirements in terms of accuracy and system reliability, and to deal with the
much brighter beams foreseen after the LIU completion, a new beam wire-scanner is under design for
the CERN accelerator complex. The ease of operation of these devices should also be improved to
avoid the need of manually shifting the dynamic range for different beam parameters. To overcome
the limitations of the existing wire scanner systems [4] the design is based on a new concept;
eliminating the need for moving bellows by placing all moveable parts of the rotational scanner in the
beam vacuum, and replacing the current shower acquisition detector, consisting of a scintillator
attached to a photomultiplier, with a diamond based sensor connected to a high dynamic range
acquisition electronics. The main system requirements are a wire speed of 20 ms-1, a beam-width
determination accuracy of 2 μm and a common design base for all fast wire-scanners at CERN.
5.3.1
System design
The selected solution uses a permanent magnet rotor placed in the vacuum chamber and coupled to the
stator through a wall of low magnetic permeability material. With this design, the use of bellows is no
longer required, removing the related constraints for maximum acceleration and the cycle lifetime.
The rotor is fitted on a shaft supported by roller bearings coated with a vacuum compatible solid
lubricant. In addition to the rotor, the shaft holds all the other moving parts located in the vacuum: the
absolute angular position sensor for the feedback control loop of the motor, the forks holding the thin
wire and the disk of the optical incremental encoder used for accurate angular position determination
(see Figure 5.3).
Fig. 5.3: Elements of the wire-scanner located in the beam vacuum.
5.3.2
Incremental Optical Angular Sensor
The high precision determination of angular position [5] is achieved using a principle similar to that of
the readout of a compact disk. A glass disk with m patterns of photo-lithographed chrome is placed
inside the vacuum chamber and fixed on the scanner shaft. An optical single mode fibre with
associated feedthrough routes a laser beam onto a lens, which focuses the light on the disc surface.
The laser is coupled back into the same fibre using the reflective property of the chrome, meaning that
only one fibre is required per measurement head. To increase the reliability of the system a second
measurement head samples the disk at a location 180° from the first. As the disk spins with the shaft
the m pattern on the chrome is detected, allowing an accurate measurement of the angular position.
The laser emitters, splitters and receivers will be located in the surface building and only the optical
fibre will make the link to the scanner system in the accelerator tunnel.
The reproducibility was determined by comparing the two angular position measurement
systems after correction for the eccentricity of the optical disk pattern. Figure 5.4 shows the error
(difference between the two sensors) as function of the angular position and its distribution. For a
typical wire-scanner fork length of 10 cm this translates into a position reproducibility error of
1.07 m. The absolute accuracy is given by the photo-lithographic process and is of the same order as
the reproducibility uncertainty.
Fig. 5.4: Reproducibility measurements of the optical disk based incremental angular position sensor.
Top: Difference between two sensors versus the disk pattern count for one full rotation.
Bottom: Distribution of the reproducibility error.
5.3.3
Control and Acquisition electronics
The main guideline for the topology concept of the system is defined by the design rules for high
reliability systems:
 Minimization of complexity. Achieved by limiting the electrical connections and number of
sub-systems, while avoiding channel multiplexing to have a continuous connection between
the drive and scanner.
 Separation of critical and non-critical functions. Accomplished by integrating the safety
functions directly inside the hardware of every instrument with the higher level software only
taking care of setting-up, triggering, analysing and recording measurements.
 Integration of early failure detection. These features are integrated inside the intelligent drive
of the system, constantly monitoring the condition of the hardware.
Figure 5.5 shows the global architecture of the new beam wire-scanner illustrating how the
electronics is separated into two distinct parts comprised of the Intelligent Drive, and the Acquisition
and Supervision.
Fig. 5.5: Topology of the new beam wire-scanner system.
The intelligent drive electronics contains all the functions critical for maintaining instrument
integrity. It will be constructed as a fully custom box that connects directly the different parts of the
scanner such as the resolver and optical encoder, the motor, the wire as well as the early failure
detection and safety systems [6]. Active electronics in the tunnel areas is avoided for the intelligent
drive in order to ease design, increase reliability, and simplify preventive and corrective maintenance.
Copper cables, some up to 250 m in length, will therefore be required, with the effect of any
electromagnetic interference under study.
The acquisition and supervision electronics is responsible for receiving information from
various external systems, triggering measurements, taking data and making this data available to
external clients for visualization and long term storage.
The existing secondary shower detection system, based on a scintillator connected to a
photomultiplier, covers the large dynamic range required by a combination of optical filter and
photomultiplier gain settings. However, for a given setting, the available range is very small, often
making it difficult to operate. It is therefore proposed to replace this system with a detection system
based on diamond detectors. In order to make use of the inherent high dynamic range of the diamond
detector a new, radiation hard front-end electronics capable of bunch-by-bunch measurements at
40MHz needs to be developed. It is currently foreseen to base this on one of two ASICs being tested
for the LHC experimental upgrade; the QIE10 chip (a 17-bit dynamic range charge integrator and
encoder developed by the CMS collaboration) or the ICECAL chip (a low noise analogue gated
integrator with 12-bit dynamic range developed by the LHCb collaboration). This electronics would
be located in the tunnel near the detector. It would transmit its data to the acquisition and supervision
electronics on the surface via a radiation hard optical link, using a high speed serialiser and
deserialiser chip (GBT) and the versatile link transmitter/receiver (VTRx), both under development for
the upgrade of the LHC experiments. In this way it is hoped to cover a much larger dynamic range
with a given front-end setting, making the system easier to operate while also eliminating the need for
long signal cables.
5.3.4
Planning
The new wire-scanner project has three main subtasks, namely the design and production of the
mechanical system, the control electronics and the acquisition electronics.
The mechanical design for a prototype system is nearly complete, with the tank to house the
mechanism installed in the SPS during LS1. A laboratory mechanism is already available and will be
used to qualify the design using laboratory electronics before the end of 2014. A second mechanism
will be built for installation in the SPS during the 2014 end of year technical stop.
The main system control algorithms will be tested on the prototype mechanism by end of 2014.
It is then aimed to have a prototype intelligent drive ready for installation and beam testing in the SPS
during 2015.
The acquisition electronics for the diamond detector will be prototyped in the SPS in 2014, with
a final design foreseen to be started from 2015 onwards.
It should be possible to achieve a fully common design for the SPS and PS systems, while
modifications will be required in order to fit such a system into the tight space constraints given by the
PS Booster. The initial integration study for the PS Booster will start in 2014.
The current baseline, provided sufficient resources are made available, is to install all the new
scanners in the injectors during LS2. This comprises one horizontal and vertical scanner per ring in the
PS Booster, 2 horizontal and vertical scanners in the PS and 2 horizontal and vertical scanners in the
SPS. The main outstanding issue is the effect of the wire and mechanism on the beam in terms of
impedance and vice-versa, the effect of RF heating due to the beam on the wire. Several possibilities
for impedance reduction are currently under study.
5.4
DC Beam Current Transformers (BCT)
The ring DC BCT systems (PSB, LEIR and PS) will be upgraded with new electronics derived from
the LHC DCCT system. The analogue part will be installed in the technical stop of week 51, 2014 to
replace the original electronics which was installed in 1993. The front-end electronics has been
standardized across the 3 accelerators, while the digital acquisition has been upgraded from the
obsolete 12 bit MPV908 to the 16 bit VD80, with the associated new front-end software, in time for
the 2014 start-up with beam. Modification of the  normalization (2 GeV + new “B train”) is under
study. Once this upgrade is complete the new system is expected to fully comply with the
specifications defined in: https://edms.cern.ch/file/1233006/1.0/LIU-Intensity-Specs-V1.0.docx
References
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1st International Beam Instrumentation conference, IBIC2012, Tsukuba, Japan, Oct 1-4, 2012.
[2] W. Vigano, B. Dehning, E. Effinger, G. Venturini, C. Zamantzas, “Comparison of Three
Different Concepts of High Dynamic Range and Dependability Optimised Current
Measurement Digitisers for Beam Loss Systems”, 1st International Beam Instrumentation
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accelerators”, Master thesis, UMH, Elche, Alicante, Spain, 2012.
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