Guide to Operating Systems 4th edition
Palmer & Walters
Chapter 3
Operating System Hardware Components
Overview
This chapter teaches students about various CPU designs and details some popular CPU types
across different brands. It will also explain typical hardware specifications with processors that
affect OS choice and performance.
Objectives

Explain operating system hardware components, which will include design type, speed,
cache, address bus, data bus, control bus, and CPU scheduling

Describe the basic features and system architecture of popular PC processors

Understand how hardware components interact with operating systems
Key Terms
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address bus An internal communications pathway inside a computer that specifies the source and target
address for memory reads and writes. The address bus is measured by the number of bits of information it
can carry. The wider the address bus (the more bits it moves at a time), the more memory available to the
computer that uses it.
backward compatibility A significant number of features from an older chip can function on a newer
chip.
bus A path or channel between a computer’s CPU and the devices it manages, such as memory and disk
storage.
cache controller Internal computer hardware that manages the data going into and loaded from the
computer’s cache memory.
cache memory Special computer memory that temporarily stores data used by the CPU. Cache memory
is physically close to the CPU, and is faster than standard system memory, enabling faster retrieval and
processing time.
Complex Instruction Set Computing (CISC) A computer CPU architecture in which processor
components are reconfigured to conduct different operations as required. Such computer designs require
any instructions and more complex instructions than other designs. Compare to Reduced Instruction Set
Computing (RISC).
control bus An internal communications pathway that keeps the CPU informed of the status of particular
computer resources and devices, such as memory and disk drives.
core The part of a processor used to read and execute instructions.
data bus An internal communications pathway that allows computer components, such as the CPU,
display adapter, and main memory, to share information. Early personal computers used an 8-bit data bus.
More modern computers use 32- or 64-bit data buses.
 execution-based cache First-level cache in a XEON CPU that stores decoded
instructions and delivers them to the processor at high speed.
 Explicitly Parallel Instruction Computing (EPIC) A computer CPU architecture that
grew out of the RISC-based architecture, and enables the processor to work faster by
performing several operations at once, predicting and speculating about operations that
Guide to Operating Systems 4th edition
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Palmer & Walters
will come next (so that they are even completed before requested). EPIC uses larger and
more work area registers than CISC or traditional RISC-based CPU architectures. See
Complex Instruction Set Computing (CISC) and Reduced Instruction Set Computing
(RISC).
external clock speed The speed at which the processor communicates with the memory
and other devices in the computer; usually one-fourth to one-half the internal clock
speed.
hyper-threading (HT) An Intel multithreading technology that enables a single
processor to appear to the operating system as two separate processors, in which
multiple threads of software applications are run simultaneously on one processor.
instruction set In a computer CPU, the group of commands (instructions) the processor
recognizes. These instructions are used to conduct the operations required of the CPU
by the operating system and application software.
internal clock speed The speed at which the CPU executes internal commands,
measured in megahertz (millions of clock ticks per second) or gigahertz (billions of
clock ticks per second). Internal clock speeds can be as low as 1 MHz and as high as
more than 3 GHz.
interrupt request (IRQ) A request to the processor so that a currently operating
process, such as a read from a disk drive, can be interrupted by another process, such as
a write into memory.
level 1 (L1) cache Cache memory that is part of the CPU hardware. See cache memory.
level 2 (L2) cache Cache memory that, in most computer CPU designs, is located on
hardware separate from, but close to, the CPU.
level 3 (L3) cache Cache memory that is located on a chip, which is separate from, but
close to the CPU, when L1 and L2 cache are both already built into the CPU.
math coprocessor A module optimized to perform complex math calculations. Early
system architectures have a processor and an optional slot for a math coprocessor.
Modern system architectures have a CPU with one or more built-in math=coprocessors.
Multimedia Extension (MMX) A CPU design that permits the processor to manage
certain multimedia operations—graphics, for example—faster and more directly. MMX
technology improves computer performance when running software that requires
multimedia operations.
multiprocessor computer A computer that uses more than one CPU.
multithreading Running several program processes or parts (threads) at the same time.
pipelining A CPU design that permits the processor to operate on one instruction at the
same time it is fetching one or more subsequent instructions from the operating system
or application.
Reduced Instruction Set Computing (RISC) A computer CPU design that dedicates
processor hardware components to certain functions. This design reduces the number
and complexity of required instructions and, in many cases, results in faster
performance than CISC CPUs. Compare to Complex Instruction Set Computing
(CISC).
single-processor computer A computer capable of supporting only a single CPU.
Streaming SIMD Extensions Single-instruction, multiple-data stream processing for
enhanced multimedia.
system architecture The computer hardware design that includes the processor (CPU),
and communication routes between the CPU and the hardware it manages, such as
memory and disk storage.
Guide to Operating Systems 4th edition
Palmer & Walters
 word Used to hold data or programming code in a computer. The size of a word varies
among computers. 16-bit computers have a word of 16 bits and a 64-bit computer has a
word of 64 bits.