Intermediate Electronic Circuits Laboratory Experiment #3 Junction diode reverse bias characteristics vers 3.2 OBJECTIVE: Assess and evaluate the reverse characteristic of the junction diode. Commentary: In reverse bias the diode is nearly non-conductive due to the (reverse-bias) E-field at the junction that blocks charge flow across the junction. The junction is therefore characterized primarily by a separation of charges at the junction boundary. This space-charge layer is on the order of microns in thickness and forms a fairly high capacitance per area. Increase of the reverse bias uncovers more charges and increases the thickness of this space-charge layer, which then reduces the effective capacitance. In this respect the pn junction forms a voltage-variable capacitance CJ of the form: C J C J 0 1 VRe v 0 MJ (3-1) Equation (3-1) shows that junction capacitance is defined by three parameters CJ0 , MJ, and 0. The parameter CJ0 is called the zero-bias junction capacitance and for which CJ = CJ0 when VR = 0. The parameter 0 is called the built-in potential and is due to the difference in work-function between the ptype material and the n-type material. The parameter MJ is called the grading coefficient, and is a consequence of the transition profile from p to n-type material PROCEDURE: A-1. Measurement of junction capacitance: In order to evaluate CJ it is necessary to emplace a set of pn junction diodes in a circuit for which they can be put in reverse bias without compromising the circuit. The circuit should also be one for which its characteristics are defined by RC time constants. The circuit elected for this task is shown by figure 3A-1, and is called the Delyannis-Friend biquad. It is a bandpass circuit with a resonance peak at f0. For all capacitances equal and choosing R1 = R3, nodal analysis of this circuit gives f0 Q 1 1 2 2 C R1R2 R2 2R1 (3-2a) (3-2b) For the 1N4148 switching diodes the expected value for CJO is about 4.0pF. Diodes in parallel are used in order that (1) there be sufficient capacitance so that the characteristic frequency of the DF biquad circuit can be realized for f0 < 100kHz and (2) so that additional diodes can be added. The frequency must be kept below 100kHz since the performance characteristics of the uA741C (general purpose) opamp rolloff at higher frequencies and would interfere with the measurement. A-2. Construct the circuit of figure 3A-1 on your protoboard. It is important that the circuit layout be symmetric and for that reason the placement and routing suggestions are as important as the symmetry of the circuit. Suggestions are shown by figure 3A-2. Parasitic capacitances Cp (due to the protoboard) on the order of 5pF are in parallel with the diodes being tested (as well as elsewhere in the circuit) and their contribution must be acknowledged. The parasitic capacitances are shown in the DF biquad test platform, which is the circuit of figure 3A-1. Figure 3A-1 DF biquadratic RC topology set up for evaluation of reverse-biased diodes. The applied voltage Vbias is the same as VRev of equation (3-1). Figure 3A-2. Suggestions for placement and wiring of the test topology of figure 3A-1. The topology of figure 3A-1 has a resonance peak at f0 1 1 2 2 C R1 R2 (3-3) where C = Cp + CJ , Cp = parasitic capacitance and CJ = (N x CJ0) at maximum, for which N = number of parallel diodes (N = 2 for figure 3A2). Reverse bias will decrease CJ and the resonance frequency f0 will increase. For a pair of diodes and circuit resistances used by figure 3A-1 a simulation (figure 3A-3) shows that the predicted resonances will fall between 30kHz and 50kHz with quality factor Q between 4.0 and 8 Figure 3A-3. Frequency response simulation of figure 3A-1. (The simulation includes 5pF parasitic capacitance in parallel with the diodes). A resonance peak at 38.55kHz for Vbias = 2.0V. Resonances also react to an impulse with a ring-down oscillation, as shown by figure 3A-4. Figure 3A-4. The cursors mark the first two peaks of the Vbias =2.0V of the ring-down amplitude and show a time separation of 26.087us. The reciprocal of this time difference is 38.33 kHz. So the resonance frequency and ring-down frequency are synonymous. And the measurement of the ringdown frequency will identify and extract the value of capacitance via to equation (3-3). The task is to measure the ring-down frequency f0 as a function of Vbias and make an assessment of the parameters CJO, 0 and MJ by curve-fitting measurement data to equation (3-1). A-4. Once the circuit is emplaced on the protoboard and wired to the instrument cluster, turn on the power supplies and set Vbias to 2.0V. Apply a 1kHz, 100mVp-p square wave to the input. The square wave step will invoke a ring-down response much like that of figure 3A-4, except with more noise, as is shown by figure 3A-5. Figure 3A-5. O-scope screen shot of the ring-down measurement method, for which the trace shown is analogous to the simulation trace of figure 3A-4. If your circuit is functioning properly a change in the ring-down) frequency as a function of Vbias should be evident. Frequency measurement is accomplished by use of the Oscope cursors and interval time between peaks, as shown by figure 3A-5. If a lesser quality signal is realized then measure of t between the first maximum and the first minimum instead of between peaks will also suffice. Depending on the quality of the ring-down resonance it may be of benefit to set the square wave signal to a higher frequency, i.e. 2kHz or 5kHz. It is of considerable advantage to include the square wave input on CH2, invoke the Trigger menu (one of the button on the far right of the panel) and set the Oscope to trigger on CH2. CH2 can then serve as a position control to the ring-down signal, as shown by figure 3A-5. In this figure the ring-down signal is on CH1. Take a look at the screen settings shown by figure 3A-5. You will need to invoke the O-scope cursor control (button on the second row of the upper rank of buttons) and then select cursor options and exercise control of the two cursors by the selection column to the right of the screen. (Select Type = Time.) Time and time interval measurements are taken from the cursor positions (as shown). The cursor is shifted via the control knob to the center top of the panel. It also has a ‘ready’ light that will light up when the cursors are activated. A-5. Step Vbias, through the sequence 2.0V, 4.0V, 6.0V, 8.0V and 10V, repeating the adjustment process of part A-4. *The reverse bias VRev across the diodes will be = 0.5Vbias due to the voltage divider formed by resistances R7 and R8 (the two 33k resistances). Record cursor settings in s and use these (via spreadsheet) to identify f0 vs Vbias in your database. Via equation (3-3) this set of frequencies should indicate that a CJ vs V effect exists although it will be partially smothered by noise and by parasitic capacitance Cp, also on the order of 5 -10 pF. Expect ringdown frequencies f0 to vary between 10kHz and 40kHz and to increase with increase of Vbia B-1. Repeat part A with a 3-diode + 3-diode resonance pair. Note that the symmetrical placement and wiring and the use of short stub wires as shown by figure 3A-2 makes the addition of extra diodes relatively simple, as well as continuing the symmetry requirement. C-1. Repeat part A with a 4-diode + 4-diode resonance pair. Expect resonant frequencies on the order of 20kHz to 35kHz. With this quantity of data your results should give you a reasonable extraction of the capacitance features of the diode even if the quality of the measurements are poor. REPORT and ANALYSIS: A. By means of curve-fitting applied to the database and to the formulae (i.e. use equations (3-1) and (3-2) extract (1) the parasitic capacitance CP and (2) diode parameters CJ0 , MJ, and 0. Since you have diode counts of 2, 3, and 4, and the parasitic capacitance remains constant, it should be possible and practical to make use of the measurement facts for which C(data set 1) = CP + 2CJ(V) C(data set 2) = CP + 3CJ(V C(data set 3) = CP + 4CJ(V)) The values of the capacitances are extracted by means of equation (3.3) for which measurements are identifying peak f0 (or as a resonance frequency). Example Excel spreadsheet usage for extraction of parameters by curve fitting is shown by figure A-1b Parameters are extracted by overlaying the equation against the measurements (or simulation) and varying the unknown parameters until the two plots match. Figure A-1b: Spreadsheet extraction of parameters by curve-fitting List your results in a results table, along with estimated errors as determined during measurement. B. Execute the test setup in pSPICE using the device model for the 1N4148 diode. Enter the same data points in the data table at the same test levels as your measurements. Show comparisons by means of the X-Y plot function available in Excel. Look up the parameters for the 1N4148 part via Edit >Model>Edit Instance Model (Text) menu of the appropriate SPICE parts library and include these in your results table for comparison and comment. C. Compare results and comment on the comparisons, accuracies, and error analysis APPENDIX A-1: Pinout for 741C opamp APPENDIX A-2: Extra diode and capacitance parts. You should have a sufficient number in your parts kit, but if not some extras may be located in the parts box in the parts/wires drawer of your workstation.