Fast Sign Detection Algorithm for the RNS Moduli Set { − 1, , }

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Fast Sign Detection Algorithm for the RNS Moduli Set
{𝟐𝒏+𝟏 − 1, 𝟐𝒏 − 𝟏 , 𝟐𝒏 }
Abstract
This brief presents a fast sign detection algorithm for the residue number system moduli
set {𝟐𝒏+𝟏 – 1, 𝟐𝒏 − 𝟏 , 𝟐𝒏 }. First, a sign detection algorithm for the restricted moduli set is
described. The new algorithm allows for parallel implementation and consists exclusively of
modulo 2n additions. Then, a sign detection unit for the moduli set {𝟐𝒏+𝟏 – 1, 𝟐𝒏 − 𝟏 , 𝟐𝒏 } is
proposed based on the new sign detection algorithm. The unit can be implemented using one
carry save adder, one comparator and one prefix adder. The experimental results demonstrate
that the proposed circuit unit offers 63.8%, 44.9%, and 67.6% savings on average in area, delay
and power, respectively, compared with a unit based on one of the best sign detection algorithms.
Index Terms—Computer arithmetic, residue number system (RNS), restricted moduli set,
sign detection.
Existing Method:
Sign detection plays an essential role in branching operations, magnitude comparisons,
and overflow detection. Because the sign information is concealed in each residue digit in a
residue number system (RNS), sign detection in an RNS is more difficult than that in the
weighted number system, in which the sign is the most significant bit (MSB). Furthermore, sign
detection in an RNS is not as efficient as modular operations, such as addition, subtraction, and
multiplication, because of its complexity. The sign detection problem has been investigated by
many researchers. A general theorem is derived by establishing the necessary conditions for sign
Further Details Contact: A Vinay 9030333433, 08772261612
Email: takeoffstudentprojects@gmail.com | www.takeoffprojects.com
detection . The sign detection for a selected class of RNS is carried out as a sum modulo 2 of
digits in the associated mixed radix system (MRS). In , a sign detection technique based on
fractional representation is proposed to reduce the sum modulo M in the conversion formula to a
sum modulo 2. In [4], a sign detection algorithm based on the new Chinese remainder theorem
(CRT) II is presented. The modulo operations in the sign detection algorithm are bounded by size
√𝑀. In [5], a sign detection algorithm uses the nth mixed radix digit in mixed-radix conversion
(MRC) to detect the sign function. To date, [6] is the only brief to use the combinational logic to
implement a sign detection algorithm based on {𝟐𝒏+𝟏 − 1, 𝟐𝒏 − 𝟏 , 𝟐𝒏 }. However, the method
cannot be extended to other moduli sets.
Proposed Method:
The proposed sign detection algorithm requires only the addition of the modulo 2n. Then,
a new sign detection unit is developed for the moduli set{ 𝟐𝒏+𝟏 − 1, 𝟐𝒏 − 𝟏 , 𝟐𝒏 } based on the
proposed sign detection algorithm. This unit only consists of a carry save adder (CSA), a
comparator, and a carry generation unit. The proposed algorithm is the first proposed for the
moduli set {2n+1 − 1, 2n − 1, 2n }. The achieved efficiency is better than that of other methods,
such as algorithms based on ROM technology.
System Configuration:In the hardware part a normal computer where Xilinx ISE 14.3 software can be easily
operated is required, i.e., with a minimum system configuration
HARDWARE REQUIREMENT
Further Details Contact: A Vinay 9030333433, 08772261612
Email: takeoffstudentprojects@gmail.com | www.takeoffprojects.com
Processor
Pentium –III
-
Speed
- 1.1 GHz
RAM
- 1 GB (min)
Hard Disk
-
40 GB
Floppy Drive
-
1.44 MB
Key Board
- Standard Windows Keyboard
Mouse
- Two or Three Button Mouse
Monitor
- SVGA
SOFTWARE REQUIREMENTS
 Operating System
:Windows95/98/2000/XP/Windows7
 Front End
: Modelsim 6.3 for Debugging and Xilinx 14.3 for
Synthesis and Hard Ware Implementation
 This software’s where Verilog source code can be used for design
implementation.
Further Details Contact: A Vinay 9030333433, 08772261612
Email: takeoffstudentprojects@gmail.com | www.takeoffprojects.com
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