JOSEPH S. SHOR, Ph.D
RESEARCH INTERESTS
-
Analog circuits operating in harsh digital environments
-
Low voltage and low power analog circuits for processors
-
Methodologies and building blocks for analog circuits in pure digital processes
-
Area-scaling of analog circuits
-
Digital calibration and BIST (Built in self-test) of analog circuits
-
Circuits for Power management
-
Security Circuits
-
Thermal Sensors
-
Microsensors – Material Physics, Devices and Applications
EDUCATION
Columbia University, School of Arts and Sciences, NY, NY:
Ph.D, M.Phil, and M.S in Electrical Engineering, 5/93 and 1/88
Queens College of CUNY, Queens, NY: B.A. in Physics
PROFESSIONAL HISTORY
2015-present Associate Professor, Bar Ilan University, Faculty of Engineering
2013-2015
Adjunct Associate Professor, Bar Ilan University
2003-2015 Intel Corporation, Yakum, Israel
2010-2015 Principal Engineer - Analog
2004-2010 Senior Analog Engineer

Manager and Lead analog designer– Led a team of 4 analog engineers

Developed many novel analog circuits used across Intel worldwide

Developed new thermal sensors for measuring on-die hot spots

Developed filtered power supplies for analog and digital PLL's

Developed analog circuits for power management and voltage regulation

Developed techniques and methodologies for implementing analog circuits in pure
digital processes. This included process-independent analog.

Developed architecture and circuit techniques to scale analog circuits. This
resulted in a thermal sensor which was 10x smaller than the previous generation
and a BGREF which was 3X smaller. This type of scaling is very unusual in
analog.
Saifun Semiconductor, Netanya, Israel
2003-2004 Staff Engineer
1999-2003 Principal Engineer

Lead analog designer and manager.

Developed analog circuits for the NROM memory- 2 physically separated
bits/cell

Ramped up the analog field in Saifun nearly from scratch

Developed power supply circuits, voltage regulators, on-die charge pump, sense
amplifiers, filters, bandgap circuits, Class AB drivers, etc.

Mentored many young engineers and trained them in analog design. This
included teaching circuit/analog courses.

Member of the Saifun Corporate Staff.
1994-1999 Motorola Semiconductor Israel, Herzlia, Israel
Principal and Senior Circuit Design Engineer

Designed analog and digital circuits for DSP applications

Circuits included amplifiers, gm/C filters, off-chip drivers, process independent
analog circuits, etc.

Designed high-speed digital IO buffers and memory circuits
1992-1994 Kulite Semiconductor Products, Inc., Leonia, NJ
Senior Research Scientist

In this 2.5 year period following my Ph.D., I worked on several governmentfunded research programs (see below). This included conceiving and writing
research proposals, leading their implementation, and publishing the results.

Led a team of 3 engineers and several technicians.

Conducted several collaborations with Universities (see below) and government
agencies.

Research work included:
-
Semiconductor Pressure sensors for high temperature environments
-
Materials characterization
-
Semiconductor processing
-
Optoelectronic materials processing and characterization
-
Silicon-on-insulator structures for microsensors.
1988-1992 Research Scientist
Conducted Research in microsensors while concurrently doing my Ph.D at Columbia
University.
1/2-1993
Technion, Israel Institute of Technology, Haifa, Israel
Department of Materials Engineering
Visiting Scientist
1987-1992 Columbia University, New York, NY Microelectronics Sciences Laboratories
Graduate Research Assistant
1987-1988 IBM, T.J. Watson Research Center, Eastview, NY
Research Assistant
SPECIAL RECOGNITIONS

Two of the IC thermal sensors I developed and published at Intel were listed as "State of the
Art" smallest sensors by Prof. Kofi Makinwa of TU Delft (a top leader in thermal sensors
and high performance analog), in K.A.A. Makinwa, "Temperature Sensor Performance
Survey," [Online]. Available: http://ei.ewi.tudelft.nl/docs/TSensor_survey.xls - 2012.

EE Times Article "Dispelling the myth about analog scaling", based on my ISSCC 2012
paper, Feb 2012.

EE Times Article "Intel details Sandy Bridge at ISSCC", based on an ISSCC 2011 Paper
on which I was a co-author, Feb, 2011.

SBIR Program" 6H-SiC Pressure Sensors for High Temperature Applications" which I
initiated was listed as an "SBIR Success Story"- 1996.

NASA Certificate of Recognition for "Making SiC Semiconductor Devices Containing
Porous Regions"- included in NASA Tech Briefs, 1996, based on SBIR Program I led.

Trade Journal Note - "Porous SiC Expected to Yield Innovative Devices" in Technology
Newsletter - "Electronic Design", Oct 24, 1996 based on SBIR Program I initiated.

Trade Journal Note – "6H SiC Pressure Sensors aim for High Temperature Operation at up
to 600C" in Technology Breakthrough Section, "Electronic Design", Jan 6, 1997, based on
SBIR Program I initiated.

EE Times Article "Single chip answers base-station needs" – highlight from ICSPAT '96,
Oct 17, 1996, which I was a co-author.

Recipient of Kulite Scholarship – 1990 –Columbia University and Kulite Semiconductor

Paul Klapper Physics Prize – Queens College of CUNY, 1986
Papers:
Journal Papers
1
Takao Oshita, Joseph Shor, David E Duarte, Avner Kornfeld, Dror Zilberman, "Compact
BJT-Based Thermal Sensor for Processor Applications in a 14 nm tri-Gate CMOS Process",
in IEEE Journal of Solid-State Circuits, vol 50,3, pp. 799-807 (2015)
2
Joseph Shor and Kosta Luria, " Miniaturized BJT-Based Thermal Sensor for
Microprocessors in 32-and 22-nm Technologies", in IEEE Journal of Solid State Circuits,
Nov 2013, pp 2860-2867 (2013)
3
Marcelo Yuffe, Moty Mehalel, Ernest Knoll, Joseph Shor, Tsvika Kurts, Eran Altshuler,
Eyal Fayneh, Kosta Luria, and Michael Zelikson "A Fully Integrated Multi-CPU, Processor
Graphics, and Memory Controller 32-nm Processor" - IEEE Journal of Solid State Circuits,
JSSC Jan 2012 pp. 194-206 - ISSCC Special Issue invited (2012)
4
J.S. Shor, A.D. Kurtz, I. Grimberg, B.Z. Weiss, and R.M. Osgood, "Dopant Selective Etch
Stops in 6H and 3C SiC", Journal of Applied Physics 81,3 (1997).
5
J.S. Shor, L. Bemis, A.D. Kurtz, I. Grimberg, B.Z. Weiss, M.F. Macmillan and W.J.
Choyke, “Characterization of Nanocrystallites in Porous P-type 6H-SiC”, Journal of Applied
Physics 76, 4045 (1994).
6
J. L. Davidson, J.S. Shor, D. Wur and A.D. Kurtz,“Diamond Resistors Fabricated
Monolithically on Diamond Film Substrate”, J. Electrochem. Soc. 141, 3522 (1994)
7
J.S. Shor, L. Bemis and A.D. Kurtz, "Characterization of Monolithic n-type 6H-SiC
Piezoresistive Sensing Elements", IEEE Trans. Electron Devices, 41 , 661 (1994).
8
J. S. Shor, R. A. Weber, L. G. Provost, D. Goldstein and A. D. Kurtz, "High Temperature
Ohmic Contact Metallizations for n-type 3C-SiC", Journal of the Electrochemical Society
141, 579 (1994).
9
J. S. Shor and A. D. Kurtz, "Photoelectrochemical Etching of 6H-SiC,Journal of the
Electrochemical Society 141, 778 (1994).
10
J.S. Shor, D. Goldstein and A.D. Kurtz, "Characterization of n-type beta-SiC as a
Piezoresistor", IEEE Transactions on Electron Devices 40, 1093 (1993).
11
J.S. Shor, I. Grimberg, B.Z. Weiss, and A.D. Kurtz, "Direct Observation of Porous SiC
Formed by Anodization in HF", Applied Physics Letters 62, 2836 (1993).
12
J.S. Shor and R.M. Osgood Jr., "Broad Area Photoelectrochemical Etching of SiC", Journal
of Electrochemical Society 140, L123 (1993).
13
J.S. Shor, X.G. Zhang and R.M. Osgood, "Laser Assisted Photoelectrochemical Etching of
n-type beta-SiC", Journal of the Electrochemical Society, 139, 1213 (May 22, 1992).
14
J.S. Shor, R.M. Osgood and A.D. Kurtz, "Photoelectrochemical Conductivity Selective Etch
Stops in SiC", Applied Physics Letters 60, 1001 (1992).
Papers in Top International Conferences
1
Kosta Luria, Joseph Shor, Michael Zelikson, Alex Lyakhov, "Dual-use low-drop-out
regulator/power gate with linear and on-off conduction modes for microprocessor on-die
supply voltages in 14nm", IEEE International Solid- State Circuits Conference, Digest of
Technical Papers, ISSCC 2015
2
J. Shor, K. Luria and D. Zilberman, Ratiometric BJT-based Thermal Sensor in 32nm and
22nm Technologies, - International Solid State Circuits Conference- ISSCC , 2012 - Digest
of Technical Papers, pp.210.
3
Marcelo Yuffe, Moty Mehalel, Ernest Knoll, Joseph Shor, Tsvika Kurts, "A Fully
Integrated Multi-CPU, GPU and Memory Controller 32nm Processor",- International Solid
State Circuits Conference- ISSCC 2011 - Digest of Technical Papers
4
E. Maayan, R. Dvir, J.S. Shor, Y. Polansky, Y. Sofer, I. Bloom, D. Avni, B. Eitan, Z.
Cohen, M. Meyassed, Y. Alpern, H. Palm, E. Stein, P. Halibach, D. Caspary, S. Reidel, and
R. Knofler, “A 512Mb NROM Flash Data Storage Memory with 8MB/s Data rate”, in
International Solid State Circuits Conference - ISSCC 2002 Digest of Technical Papers,
Publisher: Univ. of Toronto, Toronto, Canada, Feb. 2002.
5
J.S. Shor, Y. Afek and E. Engel, "IO Buffer for High Performance, Low Power
Applications", Proceeding of the 1997 Custom Integrated Circuits Conference- CICC
(IEEE Press, 1997).
Papers Presented and Published in Refereed International Conferences
1
Joseph Shor and Kosta Luria, Evolution of Thermal Sensors in Intel Processors from 90nm
to 22nm,2012 IEEE 27-th Convention of Electrical and
Electronics Engineers in Israel, Nov. 2012.
2
J. S. Shor, "Low Noise Linear Voltage Regulator for Use as an on-chip PLL Supply in
Microprocessors", in IEEE International Symposium on Circuits and Systems, Paris France,
May, 2010.
3
Kosta Luria and Joseph Shor, "Miniaturized CMOS Thermal Sensor Array for Temperature
Gradient Measurement in Microprocessors", IEEE International Symposium on Circuits and
Systems, Paris France, May, 2010.
4
Joseph Shor, "Voltage Regulator Circuits for Low-Jitter PLL’s with High PSSR (>40dB) in
a Purely Digital 65nm Process", in IEEE COMCAS, Tel Aviv, Israel, 2008
5
Shor, J.S.; Polansky, Y.; Sofer, Y.; Maayan, E. "Self-regulated four-phased charge pump
with boosted wells", ISCAS '03. Proceedings of the 2003 International Symposium on
Circuits and System.
6
J. S. Shor, Y. Sofer, Y. Polansky, and E. Maayan, “ Low Power Voltage Regulator For
EPROM Applications” ISCAS 2002: International Symposium on Circuits and Systems, May
26-29, 2002, Phoenix Arizona.
7
V. Koifman, Y. Afek and J.S. Shor; “Circuit Methods for the Integration of Low Voltage
(1.1-1.8V) Analog Functions on System-on-a-Chip IC’s in a Single Poly CMOS Process”
Proceedings of ISLPED 99: International Symposium on Low Power Electronics and Design,
Aug 16-19, 1999.
8
J.S. Shor, V. Koifman and Y. Afek, "Novel Method to Compensate for Resistor NonLinearities and its Application to the Integration of Analog Functions on System-on-a-Chip
IC's" ISCAS 1999: IEEE Circuits and Systems Conference, May 30 – June 2, 1999.
9
Y. Salant, O. Norman, U. Dayan, N. Sivan, B. Perlman, N. Benayahu,, Y. Tsayeg, E. Zmora,
J.S. Shor, E. Salamon, “A Dual Core Engine for Embedded Applications” in The
Proceedings of the Ninth International Conference on Signal Processing Applications and
Technology, Sept 13-16, 1998.
10
E. Engel, M. Tarrab, Y. Amon, L. Belotserkovsky, E. Borowitz, D. Kuzmin, D. Moshe, E.
Pisek and J.S. Shor, “ DSP56305 – Motorola New Optimized Single-Chip DSP for GSM
Basestation Applications”;, in The Proceedings of the International Conference on Signal
Processing Applications and Technology, 1996.
11
J.S. Shor, I. Grimberg, B.Z. Weiss, and A.D. Kurtz, "Photoelectrochemical Etching of 6HSiC", Second International Symposium on Electrochemical Applications in Electronics,
183rd Electrochemical Society Conference, Honolulu, Hawaii, May 16-21, 1993.
12
J.L. Davidson, J.S. Shor, D. Wur and A.D. Kurtz, "Diamond Resistors Fabricated
Monolithically on Diamond Film Substrates",Third International Symposium on Diamond
Materials, 183rd Electrochemical Society Conference, Honolulu, Hawaii, May 16-21, 1993.
13
J. S. Shor, L. Bemis, A. D. Kurtz, M. F. Macmillan, W. J. Choyke, I. Grimberg and B. Z.
Weiss, "Characterization of the Microstructural and Optical Properties of Porous SiC",
Proceedings of the Fifth International Conference on SiC and Related Materials,
Washington, DC, Nov. 1-3 1993.
14
L. Bemis, J. S. Shor and A. D. Kurtz, "Monolithic Piezoresistive Stress Sensing Elements in
6H-SiC", Proceedings of the Fifth International Conference on SiC and Related Materials,
Washington, DC, Nov. 1-3 1993.
15
J. S. Shor, R. S. Okojie, and A. D. Kurtz, "Photoelectrochemical Etching and Etch-Stops in
6H-SiC", Proceedings of the Fifth International Conference on SiC and Related Materials,
Washington, DC, Nov. 1-3 1993.
16
J.S. Shor, D. Goldstein, A.D. Kurtz and R.M. Osgood, Jr. , "SiC Device Development for
High Temperature Sensor Applications", 1992 NASA High Temperature Measurement
Conference Proceedings, NASA Langley, Hampton, Va, April 12-13 1992, published in
conference proceedings.
17
J.S. Shor, R.A. Weber, L.G. Provost, D. Goldstein, A.D. Kurtz, "High Temperature Ohmic
Contact Metallizations for n-type 3C-SiC Sensors" in Wide Band-Gap Semiconductors
proceedings of the Fall, 1991 Materials Research Society Conference, Dec. 2-6, 1991,
Boston, Mass. (Mat. Res. Soc. Press, Boston, Mass., 1992).
18
J.S. Shor, X.G. Zhang, R.M. Osgood, and A.D. Kurtz; "Photoelectrochemical Etching and
Dopant Selective Etch Stops in SiC", in Amorphous and Crystalline SiC IV ed. by C. Y.
Yang, M. M. Rahman and G. L. Harris (Springer-Verlag, Berlin Heidelberg, 1992) p. 356.
19
J.S. Shor, D. Goldstein and A.D. Kurtz, "Sensor Properties of n-type 3C-SiC", in
Amorphous and Crystalline SiC III, Ed. by G. L. Harris, M. G. Spencer and C. Y. Yang
(Springer Verlag, Berlin Heidelberg, 1992) p. 111.
20
J.S. Shor, X.G. Zhang, M.N. Ruberto and R.M. Osgood, "Surface Micromachining of betaSiC Using Laser-Assisted Photoelectrochemical Etching", in Amorphous and Crystalline SiC
III, Ed. by G. L. Harris, M. G. Spencer and C. Y. Yang (Springer Verlag, Berlin Heidelberg,
1992) p. 191.
21
J.S. Shor, D. Goldstein and A.D. Kurtz, "Evaluation of beta-SiC for Sensors", in
Proceedings of the 1991 International Conference on Solid State Sensors and Actuators June
22-26, 1991, p. 912-915.
22
J.S. Shor, X.G. Zhang and R.M. Osgood, "Photoelectrochemical Etching of beta-SiC",
Electrochemical Soc. Extended Abstracts 91-1, May 1991.
23
X.G. Zhang, J.S. Shor, M.N. Ruberto, M.T. Schmidt, and R.M. Osgood, "Laser
Electrochemical Etching of SiC", in The 1990 Proceedings of the State of the Art Program
on Compound Semiconductors, (Electrochemical Society Press, 1990).
24
J.S. Shor, D. Goldstein and A.D. Kurtz,"Characterization of the Gauge Factor of n-type
beta-SiC", Electrochem. Soc. Extended Abstracts 90-1, May 1990.
25
D. Goldstein, J.S. Shor and A.D. Kurtz,"TCR of n-type and n+ beta-SiC", Electrochemical
Soc. Extended Abstracts 90-1, May 1990.
DTTC (Design and Test Technology Conference) and ICTC (Intel Circuit Technology
Conference) - (Refereed International Intel Conferences - acceptance rate < 25%)
1
Kosta Luria and Joseph Shor, "Frequency-based Digital Thermal Sensor", presented at
DTTC 2010 (Design and Test Technology Conference)
2
Joseph Shor, "Analog DFT and DFM Circuits in Sandy Bridge", presented at DTTC 2010
3
Joseph Shor, "SFR Voltage Regulator for Low Noise PLL’s with High Power Supply
Rejection Ratio", presented at DTTC 2007
4
Kosta Luria and Joseph Shor, "Miniaturized CMOS Thermal Sensor Array for Measuring
Hot Spots in Microprocessors", presented at DTTC 2007
5
Joseph Shor, "Low Noise Voltage Regulator Circuits for Low-Jitter PLL’s", presented at
ICTC 2008 (International Circuit Technology Conference)
6
Joseph Shor, "Learnings and advances of the SFR circuits for 1264 and 1266 processes",
presented at ICTC 2006
7
J. Shor, "Flicker Noise Effects on Analog Circuits in Intel Microprocessors", published at
DTTC 2007
8
J. Shor, "Voltage Regulator Architecture for Yonah PLL Power Supply", published at DTTC
2004
Invited Publications and Presentations:
1
J.S. Shor, "Application of Wide Bandgap Semiconductors in High Temperature
Microsensors" presented at the National Academy of Sciences, Washington, DC, for the
National Research Council, Committee on Materials for High Temperature Semiconductor
Devices, Sept. 29, 1993 - results published in a report to determine funding policy.
2
Book Chapter: J.S. Shor- "Electrochemical Etching of SiC", in "Properties of SiC" ed. by
G.L. Harris (IEE Press, EMIS Materials Science Series, 1995).
3
"Making SiC Semiconductor Devices Containing Porous Regions" , published in NASA Tech
Briefs, Aug 1996, p. 88.
4
M.N. Ruberto, R. Scarmazzino, J.S. Shor and R.M. Osgood; "Microphotoelectrochemical
Etching", Presented at the Electrochemical Microfabrication Symposium, Electrochemical
Soc. Conference, Phoenix AZ, Oct. 13-18, 1991 and published in the conference proceedings.
5
J. Shor "Compact Thermal Sensors in Intel Processors from 90nm to 22nm", Columbia
University Integrated Systems Labs, Special Seminar, Feb 2014.
6
J. S. Shor, "Micromachining Methods for and Characterization of 6H-SiC Piezoresistive
Sensing Elements", given at Technion, IIT, Dept. of Mats. Eng., Jan 31, 1993.
ISSUED US Patents:
US Patent
Patent Title
#
1 8,136,987 Ratio meter for temperature sensor
2 7,973,518 Low noise voltage regulator
3 7,728,688 Power supply circuit for a phase-locked loop
4 7,564,299 Voltage regulator
5 7,549,795 Analog thermal sensor array
6 7,400,186 Bidirectional body bias regulation
7 7,336,133 Buffered cascode current mirror
8 7,256,438 MOS capacitor with reduced parasitic capacitance
9 7,190,212 Power-up and BGREF circuitry
10 7,148,739 Charge pump element with body effect
cancellation for early charge pump stages
11 6,922,099 Class AB voltage regulator
12 6,906,966 Fast discharge for program and verification
13 6,885,244 Operational amplifier with fast rise time
Inventors
Award
Date
K. Luria and J. Shor
20-Mar12
J, Shor, A. Zaidel, N.
Familia
J. Shor
J. Shor and E. Fayneh
K. Luria and J. Shor
J. Tschanz,V. Zia, V.
De , J. Shor
J. Shor
J. Shor, E. Maayan and
Y. Betser
J. Shor, Y Betser and Y.
Sofer
J. Shor and E. Maayan
J. Shor and Y. Betser
J. Shor and Y. Polansky
J. Shor
14 6,864,739 Charge pump stage with body effect minimization
J. Shor, E. Maayan and
Y.Polansky
15 6,842,383 Method and circuit for operating a memory cell
using a single charge pump
J. Shor, A. Harush and
S. Eisen
16 6,791,396 Stack element circuit
17 6,677,805 Charge pump stage with body effect minimization
18 6,577,514 Charge pump with constant boosted output
voltage
19 6,448,750 Voltage regulator for non-volatile memory with
large power supply rejection ration and minimal
current drain
20 6,166,578 Circuit arrangement to compensate non-linearities
in a resistor, and method
5-Jul-11
1-Jun-10
21-Jul09
23-Jun09
15-Jul08
26-Feb08
14-Aug07
13-Mar07
12-Dec06
26-Jul05
14-Jun05
26-Apr05
8-Mar05
J. Shor, Y. Sofer and E.
Maayan
11-Jan05
14-Sep04
13-Jan04
10-Jun03
J. Shor, Y. Sofer and E.
Maayan
10-Sep02
J. Shor, V. Koifman
and Y. Afek
26-Dec00
J. Shor and E. Maayan
J. Shor and E. Maayan
21 6,034,001 Method for etching of silicon carbide
semiconductor using selective etching of different
conductivity types
22 5,963,076 Circuit with hot-electron protection and method
23 5,952,875 Circuit with hot electron protection and method
24 5,751,178 Apparatus and method for shifting signal levels
25 5,597,738 Method for forming isolated CMOS structures on
SOI structures
26 5,569,932 Porous silicon carbide (SIC) semiconductor device
27 5,461,001 Method for making semiconductor structures
having environmentally isolated elements
28 5,454,915 Method of fabricating porous silicon carbide (SiC)
29 5,386,142 Semiconductor structures having environmentally
isolated elements and method for making the
same
30 5,376,241 Fabricating porous silicon carbide
31 5,303,594 Pressure transducer utilizing diamond
piezoresistive sensors and silicon carbide force
collector
32 5,298,767 Porous silicon carbide (SiC) semiconductor device
33 5,165,283 High temperature transducers and methods of
fabricating the same employing silicon carbide
J. Shor, A.D. Kurtz and
D. Goldstein
J. Shor, M. Yosefin and
D. Bruck
M. Yosefin, Y. Afek
and J. Shor
J. Shor, E. Engel and N.
Baron
A.D. Kurtz, J. Shor and
A. Ned
7-Mar00
5-Oct-99
A.D. Kurtz, J. Shor and
A. Ned
J. Shor and A.D. Kurtz
14-Sep99
12-May98
28-Jan97
29-Oct96
24-Oct95
3-Oct-95
A.D. Kurtz, J. Shor and
A. Ned
31-Jan95
J. Shor and A.D. Kurtz
27-Dec94
A.D.Kurtz and J. Shor
19-Apr94
J. Shor and A.D. Kurtz
J. Shor and A.D. Kurtz
A.D. Kurtz, D.
Goldstein and J. Shor
29-Mar94
24-Nov92
PUBLISHED PENDING PATENTS
1
Paillet; Fabrice, Shor; Joseph, Geannopoulos; George L, Tan; Hong Yun, "LINEAR
VOLTAGE REGULATOR BASED ON-DIE GRID", US Patent Application 20140070876.
(2014)
2
Shor; Joseph, "APPARATUS AND METHOD FOR MANAGING POWER IN A
COMPUTING SYSTEM", US Patent Application 20130283082. (2014)
RESEARCH GRANTS AWARDED.
I initiated, wrote proposals and received the following research grants under the US Small Business
Innovation Research Program - SBIR (1991-1994). I conceived of most of the ideas behind these
programs, set up a research plan and led a group of engineers in their implementation. I completed
all of the Phase 1 programs including writing the final reports. I led the Phase 2 programs until my
aliya (Oct 94), at which point the programs were taken over by engineers who I trained.
Agency
Principal
Investigator
Year
Silicon Carbide Microsensor with Piezoresistive
Diamond Sensing Elements - Phase 1
DOD
A. D. Kurtz
1993
$
Silicon Carbide Microsensor with Piezoresistive
Diamond Sensing Elements - Phase 2
DOD
A. D. Kurtz
1994
$ 500,000
Silicon-Carbide Ultraviolet and Near Ultraviolet
Optoelectronics - Phase 1
NASA
JS Shor
1993
$
Silicon-Carbide Ultraviolet and Near Ultraviolet
Optoelectronics - Phase 2
NASA
JS Shor
1994
$ 499,973
6H-SiC Pressure Sensors for High Temp Applications Phase 1
NASA
A. D. Kurtz
1992
$
6H-SiC Pressure Sensors for High Temp Applications Phase 2
NASA
A. D. Kurtz
1993
$ 499,183
Program
Award
49,660
50,000
49,929
I also assisted in conceiving and writing several other research proposals which were awarded to
Kulite.
INTERNATIONAL AND NATIONAL COLLABORATIONS
[1] Collaborated with many Intel groups in Portland and Folsom on the development of analog
circuits for microprocessors. 2004-present.
[2] NASA Lewis Research Center (now NASA Glenn) – Collaborated on the use of SiC for
sensor and optoelectronic applications. This led to funding from them as well (see above).
1989-1994.
[3] Technion IIT, Dept. of Mats. Eng. – Collaborated with Prof. B.Z. Weiss (now deceased) –
TEM characterization of the microstructure of Monocrystalline and Porous SiC. 1989-1994.
[4] University of Pittsburg, Physics Dept. – Collaborated with Prof W.J. Choyke on the
Luminescence properties of Porous SiC. 1992-1994.
[5] Vanderbilt University, Dept. of Elec. Eng. – Collaborated with Prof. J. L. Davidson on the
use of semiconducting diamond for sensors. 1992-94.
AFFILIATIONS AND INTERNATIONAL ACTIVITIES
Member ISSCC International Technical Program Committee (ITPC) – International Solid
State Circuits Conference, 2013-2016

Member of ISSCC 2014-2016 IMMD Subcommittee

Member of ISSCC 2014-2016 European Regional Committee

Member of ISSCC 2015 Demo Committee

(ISSCC is the world's foremost Circuit/Analog International Conference)
Senior Member IEEE
Member IEEE Solid State Circuits Society
Member of American Institute of Physics
Member – American Physical Society
Reviewer for IEEE Journal of Solid State Circuits
Reviewer for IEEE Transactions on Circuits and Systems 1
Reviewer for IEEE Transactions of VLSI Systems
Reviewer for IEEE VLSI Circuits Symposium
Reviewer for Applied Physics Letters
Reviewer for Materials Research Society
Reviewer for ISCAS (International Conference of Circuits and Systems)
Reviewer for Sensors Journal
Reviewer for IEEE Access
Reviewer for Microelectronics Journal
Guest Editor in the 2014 Sensors Special Issue of the Journal of Low Power Electronics and
Applications.
IEEE FTFC 2014– Member of the Technical Program Committee.
Member of Intel's International Circuit IP Patent Committee 2004-2015.
Reviewer for the Intel International Design and Test Technology Conference 2013-2015
Member of US Karate Team to Maccabia Games, 1985, 1981
Member of Israel Traditional Karate Team, 2011, 2009.
Certified Sports Coach and Instructor according to the Israel Sports Law