WET CLEANING AS AN IMPROVED FINAL QUALITY CONTROL OF DRIEPRODUCED FEATURES Meng Guo1, Donald Pfettscher1, Kimberly Pollard1, Richard Peters1, Travis Acra1 Dynaloy LLC, a subsidiary of Eastman Chemical Company 1 Indianapolis, IN,USA tacra@eastman.com; kpollard@eastman.com Thierry Lazerand2, Kenneth D. Mackenzie2, Marco Notarianni2 2 Plasma-Therm LLC, St. Petersburg, FL, USA thierry.lazerand@plasmatherm.com ABSTRACT The deep reactive ion etch (DRIE) process also known as the “Bosch process” was aimed originally at creating high aspect ratio features specifically for silicon-based MEMS devices. With time and improvements in both dry etch equipment and process capability, this processing technique has become a stepping stone for a multitude of devices such as capacitors, through-silicon vias (TSVs), and also nanotechnology where deep trench features with high aspect ratio are required. The DRIE process consists of a fast alternation of etch and polymer deposition steps in order to create deep trenches in the silicon wafer. The polymer deposition step protects the sidewalls during the next anisotropic etch loop. The final result produces a sidewall with specific features called scallops whose size depends upon the process conditions selected for the polymer deposition and etch steps. The polymer removal from the sidewalls at the end of the process is critical in order to assure good adhesion of the materials that could be deposited in the cavities such as metals and oxides. Although this can be realized by controlling the amount of polymer being deposited during the DRIE process and proceeding with an in-situ plasma cleaning after completion of the trench features, the cost sensitivity of any modern device can benefit from a separate wet cleaning on single wafer or batch systems. This paper will present the results of a collaborative effort between Dynaloy and Plasma-Therm LLC related to the final quality control of DRIE produced trenches on wafers. Specifically, Dynastrip DL9150 solvent has been employed in order to remove any residual polymer contaminants and show a perspective of expanding this application to post plasma dicing where the wafers are mounted on a tape frame. In that particular case, one of the main challenges is to find a suitable solvent for polymer removal and to ensure the chemistry is compatibility with the dicing tape in order to avoid any die removal during this operation. Key words: Wet clean, DRIE, photoresist, removal, residue, plasma dicing. INTRODUCTION The deep reactive ion etch (DRIE) process also known as the “Bosch process”i was aimed originally at creating high aspect ratio features specifically for silicon-based MEMS devices. With time and improvements in both dry etch equipment and process capability, this processing technique has become a stepping stone for a multitude of devices. Today feature dimensions may include thicknesses in the hundreds of micrometers and aspect ratios on the order of ~20:1. Nowadays, there are many applications on the market that implement the DRIE process. All devices where deep trench features with high aspect ratios are required such as silicon power devices, actuators for read/write heads, capacitors, cantilevers, micro mechanical rotors, and through-silicon vias for 2.5D and 3D advanced packaging, are typical examples of how this process technique is widely adopted by the industry. Some of these of these DRIE-created structures are shown in Figure 1. The highly directional etch characteristic results in features with vertical sidewalls. The vertical profile is created commonly by alternating (1) etch steps using SF6 and (2) passivation (deposition) ones using C4F8. Residuals of the polymer that is deposited in the passivation step remain at the end of the etch process especially on the sidewall of the trench.ii The deposition steps create a highly fluorinated polymerized residue that is relatively inert, hydrophobic, difficult-to-remove and even more difficult-to-dissolve in standard strip solutions. The polymer on the sidewalls could be removed with an ash process based on an O2 plasma treatment at the end of the etching process. This step is not as efficient as wet strip and offsets valuable productive time of the plasma etching process chambers. In particular, it is hard for the O2 plasma to penetrate efficiently into the trenches in order to remove the polymer especially for high aspect ratio trenches. For this reason a wet clean solution may be preferred in order to efficiently remove polymer from the sidewalls, and as a result increase throughput and decrease maintenance time of the etching process modules. All of these factors are key in order to decrease the cost of ownership (CoO). A robust strip formulation based on bath life time and loading capacity is required in order to understand how it could impact the removal of the polymer content in the context of integration. Further opportunities exist in studying new materials with a smaller environmental, health, and safety (EHS) footprint to reduce risks for operators and the environment due to an accidental exposure. Optimization of individual components may provide for a recyclable solution, where additional value can be gained for the customer by re-sale of post process solution. In this case, the waste solution may be further purified by a 3rd party and re-sold into less demanding applications. Careful consideration and understanding of all aspects of formulation development allow tailoring of a product to meet the specific needs of specific processes. technique, called Auger electron spectroscopy (AES) is used to study the detailed level of cleanliness, shown in Figure 4.iii With the increased use of DRIE in a more diverse application space, there is the opportunity to diversify the use of current best methods and processes of record (PORs) to obtain optimum clean results and improve final quality control of a wide array of DRIE-produced features. One such new opportunity is the use of plasma dicing to singulate chips.v This method uses DRIE in a damage-free process with very high throughput and with a decreased requirement for street sizes, thus returning significant silicon area for additional devices. The purpose of this paper is to show the results of using a wet clean solution to remove post-Bosch process fluorinated residue in a plasma dicing process. One of the critical aspects of die packaging, especially when using plasma dicing with fluorine-based gases is to ensure no fluorine traces on the bond pads and limiting the amount of polymer left on the die sidewalls. Figure 2. SEM images of vias (diameter = 5 μm, pitch = 10 μm) before removal of Bosch etch residue: (A0) 3500x magnification, (A1-A3) 12kx magnification. (B1-B3) EDS spectra of via bottom, middle and top showing presence of F-containing residue on via sidewall. Figure 1. Commercial applications for DRIE: (a) and (b) micro actuators for a read/write heads; (c) and (d) test structures for evaluating cantilevers and or capacitance driven actuators; (e) membrane like structure; (f) microelectro-mechanical rotor structure. We have previously shown that post-Bosch process residue can be removed from TSVs for advanced packaging applications.iii,iv The definition of clean in a TSV application includes removal of the polymer-based residue, including all fluorine and compatibility with the underlying silicon surface. Commonly, initial studies of the silicon surface, before and after cleaning (Figures 2 and 3), are done using (SEM) in conjunction with energy dispersive xray analysis (EDX).iii In the case of TSVs, the detection limit for fluorine using EDX is too high to ensure absolute cleaning. As a result, a second more surface sensitive Figure 3. SEM images of vias (diameter = 5 μm, pitch = 10 μm) after removal of Bosch etch residue using the Dynastrip DL9150 at 70 ˚C for 5 min: (E0) 3500x magnification, (E1E3) 12kx magnification. (F1-F3) EDS spectra of the via sidewall at the bottom, middle and top, with no detected fluorine signal. A B Figure 4. Auger electron spectroscopy of via sidewall (diameter = 5 μm, pitch = 10 μm) after removal of Bosch etch residue using Dynastrip DL9150 at 70 ˚C for 10 min. Fluorine was not detected on the via sidewall through the depth of the via. The criticality of fluorine removal on bond pads is related to the well-known influence of fluorine contamination on aluminum microchip bond pads.vi Results from these studies indicate that aluminum bond pads exposed to fluorine-based plasmas and stored in an ambient microclimate will continue to oxidize due to co-adsorption of fluorine-containing compounds during storage. The coadsorption leads to additional build-up of oxyfluoride in the oxide layer and may reduce reliability for connections made at that bond pad. The cleaning of bond pads is successfully done with in-situ plasma cleaning during the plasma dicing sequence as demonstrated in previous work.VII This paper focuses on wet cleaning solutions. One of the motivations of this paper is to look at compatibility of the TSV sidewall removal solution to an on-tape process which can help in the overall productivity and cost of ownership by offloading the cleaning process from the utilization of the plasma dicing process chamber. Since plasma dicing is a die singulation technique, the wafer is adhered to a dicing frame and dicing tape for easy handling. A wet cleans solution also must be compatible with the adhesive used to adhere the die after singulation. In many instances, the materials used as adhesives are of a similar chemical composition to standard polymers used in resists. To deal with the chemical similarities between the passivation and the polymers used for adhesives and create a robust cleaning process, an understanding of the integrated process, including the prior and subsequent process steps, the singulated die size, the tool used, the process needed, the time/temperature profile, the rinse process, etc. is critical as all these variables contribute to the success or failure of the overall process. Additional challenges related to cleaning using a wet solution include compatibility with device materials, including Al, Cu, or alloys of the two, as well as inorganic and organic encapsulating materials such silicon nitrides, oxides, oxynitrides, polyimides (PIs), and polybenzoxazoles (PBOs). EXPERIMENTAL Four full thickness 200mm test wafers with 15µm unified streets and 1mm2 square die were employed in this work. They all had a photoresist (PR) mask approximately 6µm in thickness. The wafers were etched with different conditions in order to understand the effect of the solvent on the polymer removal. The process employed was always a typical Bosch process with only variations of the polymer passivation step time. All the wafers were partially etched to a depth of ~ 300µm. Post etch, in situ O2 plasma treatment was performed on some of the wafers in order to remove the PR mask and to evaluate polymer removal after O2 plasma clean. Table 1 summarizes the process conditions. The wafers were cleaved into smaller samples and immersed in a beaker-type test bath using Dynastrip DL9150 with low agitation at 70˚C for varying times. Several characteristics of this solution were measured to ensure its general use in cleaning tools with a variety of designs and to understand maximum safe operating temperatures. A summary of the solvent characteristics are shown in Table 2. Wafer number #1 Etch Process Conditions Standard processing conditions; PR mask left intact on wafer #2 Enhanced passivation step; PR mask left intact on wafer #3 Standard processing conditions; PR mask stripped by in situ O2 plasma treatment #4 Enhanced passivation step; PR mask stripped by in situ O2 plasma treatment Table 1. Test wafer description Flash Specific Viscosity Viscosity point Gravity @25°C, @38°C, (°C) (g/mL) (cP) (cP) 90 1.085 3.4 2.6 Table 2. Characteristics of Dynastrip DL9150 Surface tension (mN/m) 38.9 After the DL9150 cleaning step, the samples were rinsed sequentially using DI water spray and IPA and then dried in a stream of N2 at room temperature. Inspection of the samples was completed using SEM and EDX. EDX analysis was performed at the top, middle, and bottom of the sidewalls, as shown in Figure 5, to provide some indication of polymer uniformity before and after solvent cleaning step. The fluorine content, which is a component of the passivation layer formed during the DRIE process using C4F8, was measured by EDX in order to quantify the efficiency of the solvent for polymer removal. Carbon levels have not been used as an indicator of polymer residue removal because of the presence of adventitious carbon in the SEM vacuum chamber, which cannot be removed and complicates measurements. As a result, only the fluorine content has been measured from the EDX spectra in order to understand if the samples were cleaned or not after immersion in the Dynastrip DL9150 formulation. Figure 5. Approximate EDX analysis locations. In order to understand the baseline fluorine content in the SEM vacuum chamber, an as-received, unprocessed Si substrate was analyzed by EDX. A content of 2 wt% was detected indicating the presence of a fluorine background signal due to residual contaminants in the chamber (Figure 6). This value was subtracted from the actual signal obtained from the processed samples in order to effectively estimate the amount of fluorine content after polymer removal with the Dynastrip DL9150 solvent. Figure 6. SEM image of pristine cleaved Si surface used for collecting background EDX spectrum that exhibits 2 wt.% F. RESULTS Figure 7 (a) shows a typical SEM cross-sectional image of Test Sample #1. Three EDX spectra have been taken as described before, in order to quantify the fluorine content before cleaning with Dynastrip DL9150, Figure 7(b). The fluorine content measured in this case is 40 wt%, 34 wt%, and 21 wt% at the top, middle and bottom, respectively. Figure 7. Test Sample #1. (a) cross-sectional SEM image before clean, (e) EDX data from top, middle and bottom of sidewall showing initial fluorine concentration, (f) crosssectional SEM image after clean, (g) EDX data from top, middle and bottom of sidewall indicating fluorine removal after clean. After cleaning at 70˚C for 60 min in Dynastrip DL9150 , the fluorine content was dramatically reduced to the non-detect level when chamber baseline levels of 2 wt% are factored in (Figure 7 (c) and (d)). The side wall passivation deposited during etch was effectively removed by the solvent formulation in the top, middle and bottom of the trench. Figure 8 shows a cross-sectional image of Test Sample #2. The purpose of this test sample was to generate a test vehicle with large amounts of passivation layer after etch and study the effect on the cleaning process. Again in this test case, the photoresist mask was not removed in a subsequent ash process. As the EDX results summarized in Table 3 confirm, this sample has the greatest amount of passivation residue on it after etching, and with the residue thickly coated across the sidewall. After cleaning, the passivation deposited during etch was removed. Figure 8(a) shows the SEM cross-section of an etched sidewall prior to cleaning and the EDX analysis showing the presence of fluorine-containing residue at the top (39% F), middle (42% F) and bottom (37% F) of the sidewall is shown in Figure 8(b). Figure 8. Test Sample #2. (a) Cross-sectional SEM image before clean, (b) EDX data from top, middle and bottom of sidewall showing initial fluorine concentration, (c) crosssectional SEM image after clean, (d) EDX data from top, middle and bottom of sidewall indicating fluorine removal after clean. Figure 9. Test Sample #3. (a) Cross-sectional SEM image after etch and plasma ash, before clean, (b) EDX data from top, middle and bottom of sidewall showing initial fluorine concentration, (c) Cross-sectional SEM image after clean, (d) EDX data from top, middle and bottom of sidewall indicating complete fluorine removal after clean. Analogous analyses were completed after cleaning and are shown in Figure 8(c) and 8(d). In these images, the polymeric passivation residue has been completely removed. The impact of increased passivation residue was to increase the cleaning process immersion time required to completely remove the residue. Figure 9 shows a cross-sectional image of Test Sample #3. This test sample was generated using a test vehicle with standard amounts of passivation layer after etch but also including an additional ash step to remove the photoresist mask and some of the passivation residue. The effect on the cleaning process was studied. As the EDX results summarized in Table 3 confirm, this sample has lower concentration of passivation residue on it after etching and ashing, as measured by the fluorine concentration. After wet cleaning, all residues were removed. Further detail of the cleaning can be found in Figure 9. Figure 9(a) shows the SEM cross-section of an etched sidewall prior to cleaning and the EDX analysis showing the presence of fluorine-containing residue at the top, middle and bottom of the sidewall is shown in Figure 9(b). Analogous analyses were completed after cleaning and are shown in Figure 9(c) and 9(d). In these images, the polymeric passivation residue has been completely removed. This sample had the lowest initial amount of fluorine (via top, 6%; via middle, 3%; via bottom, 2%) and required the shortest cleaning process immersion time (10 minutes) to completely remove the residue. Figure 10 shows a cross-sectional image of Test Sample #4. The purpose of this test sample was to generate a test vehicle with large amounts of passivation layer after etch but remove the photoresist mask and some of the residue using a post-etch ash process. The samples provide an opportunity to study the effect of higher concentrations of passivation residue and with a subsequent ash process, on the wet cleans process. As the EDX results summarized in Table 3 confirm, this sample has its greatest amount of passivation residue (22wt%, 10wt%, 3wt%) at the top of the sidewall. After cleaning, all passivation on the sidewall was removed. Further detail of the cleaning can be found in Figure 10. Figure 10(a) shows a cross-sectional SEM image of an etched sidewall prior to cleaning and the EDX analysis showing the presence of fluorine-containing residue at the top, middle and bottom of the sidewall is shown in Figure 10(b). Analogous analyses were completed after cleaning and are shown in Figure 10(c) and 10(d). In these images, the polymeric passivation residue has been completely removed. This sample had similar initial amount of fluorine to Test Sample #1 and required commensurate cleaning process immersion time to completely remove the residue. In applications where a photoresist mask is needed to define the etch feature, the residual photoresist must be removed. In non-Bosch etch processes, the standard method is to employ a gas-based resist ashing step, followed by a wet chemical clean step to remove all post-etch residue, since photoresists and post etch residues may be chemically dissimilar and difficult to remove using a single solution. This study offered an opportunity to determine if the photoresist mask residue after etch could be removed in a single step process along with the post-Bosch sidewall polymer. As described in Table 1, Test Samples #1 and #2 had a PR etch mask intact after etch. Test Samples #3 and #4 had the PR resist mask removed by ashing and the surface was observed for defects after wet strip using postBosch process sidewall removal. Figure 11 shows analyses of the clean sample surface after cleaning in Dynastrip DL9150 to remove the sidewall polymer. Simultaneous removal of the photoresist mask and the fluorinated sidewall residue was observed, opening up the possibility of a onestep resist and etch residue removal process and further enhancing CoO improvements. Figure 10. Test Sample #4. (a) Cross-sectional SEM image after etch and plasma ash, before clean, (d) EDX data from top, middle and bottom of sidewall showing initial fluorine concentration, (e) Cross-sectional SEM image after clean, (f) EDX data from top, middle and bottom of sidewall indicating complete fluorine removal after clean. Figure 11. (a) Test Sample #1. Top down SEM image of wafer surface after cleaning using Dynastrip DL9150 and EDS analysis showing removal of PR; (b) Test Sample #2. Top down SEM image of wafer surface after cleaning using Dynastrip DL9150 and EDS analysis showing removal of PR; (c) Test Sample #3. Top down image of wafer surface after cleaning using Dynastrip DL9150 using SEM and EDS analysis showing removal of PR; (d) Test Sample #4. Top down SEM image of wafer surface after cleaning using Dynastrip DL9150 and EDS analysis showing removal of PR. Table 3 summarizes the results from these experimental studies. For the standard plasma dicing process (Test Sample #1), the Dynastrip DL9150 has a comparable performance to the O2 post etch plasma clean (Test Sample #3) indicating that a wet solution is a viable alternative to a time consuming O2 plasma clean that could increase the cost of ownership. Increased passivation step times, have shown an increase in the fluorine content (Test Sample #2) and Test Sample #1 #2 #3 #4 Process (Temp (°C)/time (min) 70/60 70/120 70/10 70/60 Sidewall Condition, Pre-Clean (F wt%, measured using EDX*) top 40 39 6 22 middle 34 42 3 10 Sidewall Condition, Post-Clean (F wt%, measured EDX*) bottom 21 37 2 3 top ND ND ND ND middle ND ND ND ND Result using bottom ND ND ND ND Clean Clean Clean Clean * Fluorine baseline content of 2 wt% removed from these measurements. ND = not detected Table 3. Summary of Cleaning Results even after O2 plasma clean (Test Sample #4), the fluorine content has not been efficiently removed. The Dynastrip DL9150 has shown also in this case a complete fluorine removal on both Test Samples #2 and #4. The clear benefit of this solvent cleaning solution is made apparent in the applications where significant polymer passivation exists on the sidewalls. As expected, when more passivation was present at the end of the etch process, additional time of the sample immersed in the solution was needed to remove the residues. SUMMARY AND CONCLUSIONS As plasma dicing applications are amalgamated into wafer processing schemes, cleaning solutions with good throughput and reasonable CoO are needed. One such solution is a wet clean process in which Dynastrip DL9150 is used to remove the highly fluorinated passivation left after etch. Options exist to have the process remove the photoresist mask as well as the etch residue in one step, or to match the wet process with a simplified ash process to generate a clean, fluorine residue-free wafer. This work has shown good feasibility for wet cleans. Work is on-going. with the next focus on process optimization and dicing tape compatibility to yield a robust integratable and high yield die singulation process. i US5501893; US6531068; US6284148 C.B. Labelle, V.M. Donnelly, G.R. Bogart, R.L. Opila, A. Kornblit, “Investigation of fluorocarbon plasma deposition from C4F8 for use as passivation during deep silicon etching”, J. Vac. Sci. Tech A, V(22), p2500, 2004. iii K. Pollard, R. Peters, M. Phenis, Y. Cao, T. Acra, D. Pfettscher, and M. Guo, “TSV resist and etch residue removal for 3DIC,” Proceedings from IWLPC, San Jose, CA, November 2013; K. Pollard, L. Mauer, M. Guo, R. Peters, M. Phenis, J. Taddei, R. Youssef, J. Clark, “Efficient TSV Resist and Residue Removal in 3DIC,” IMAPS Device Packaging Conference, Phoenix, AZ, March 2014 iv R. Peters, Y. Cao, K. Pollard, D. Pfettscher, M. Phenis, “Formulation Development for Bosch Etch Residue Removal: Effect of Solvent on Removal Efficiency,” Proceedings from IMAPS, Advanced Packaging & the ii Internet of Things: The Future of Our Industry, Orlando, FL, October 2015. v D. Lishan, T. Lazarand, K. Mackenzie, D. Pays-Volard, L. Martinez, G. Grivna, J. Doub, T. Tessier, G. Burgess, “Wafer Dicing using Dry Etching on Standard Tapes and Frames,” Proceedings from IMAPS, San Diego CA, October 13-16, 2014. vi L.-H. Ernst, D. Grman, R. Hauert, Surface and Interface Analysis, “Fluorine-induced Corrosion of Aluminium Microchip Bond Pads: an XPS and AES Analysis”, V.21, pp691-696, 1994. vii K. D. Mackenzie, D. Pays-Volard, L. Martinez, C. Johnson, T. Lazerand, and R. Westerman, “Plasma-based Die Singulation Processing Technology”, IEEE Proc. 64th Electronic Components and Technology Conference (ECTC), pp. 1577-1583 (2014).