MCQ (UNIT –I)
SUBJECT: COMPUTER ORGANIZATION
Q.1 Baggage difference engine can perform _______operation only.
a) multiplication b) addition c) addition and subtraction d) all of the above
Q.2 In 2nd generation separate _______were developed that could operate in parallel with
central processor that could operate in parallel with central processor that executed program.
a) I/O processor
b) DSP processors
c) ARM processors d) microprocessor
Q.3 Baggage analytical engine used_______airthmatic.
a) decimal
b) binary
c) hexadecimal
d) none of the above
Q.4 _______was major computer manufacture during 2nd generation.
a) IBM
b) INTEL
c) National semiconductor
d) Philips
Q.5 Which machine is considered as first general purpose programmable computer designed?
a) Difference engine
b) Mark I c) Analytical engine d) Z3
Q.6 The ability to fabricate many transistors on a single silicon chip is called
_______technology.
a) Integrated
b) vacuums-tube
c) Harvard
d) Von Neumann
Q.7 In analytical engine Baggage used______to control the operation of machine.
a) magnetic tape
b) magnetic card
c) mechanical switches
d) punch cards
Q.8 Integrated technology enabled ______and______ processor.
a) High cost, faster
b) high cost, slow
c) low cost, faster
d) low cost, slow
Q.9 First widely known general purpose electronics computer was_____.
a) difference engine by Baggale
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b) mark I c) ENIAC
UNIT I
d) EDVAC
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Q.10 In 2nd generation _________ replaced magnetic core memories.
a) Magnetic drum
b) magnetic tape
c) vacuum tube
d)integrated circuit
Q.11 First generation computer are based on______
a) transistors
b) vaccum tubes
c) mechanical switches
d) none of the above
Q.12 Third generation computer used_______
a) Transistor b) integrated circuit
c) VLSI
d) none of these
Q.13 The idea behind stored program concept is_______
a) storing programs and their data in same high speed memory
b) storing programs and their data on different memory
c) storing programs and their data on punch cards
d) none of the above
Q.14 Integrated circuit was the feature of ________generation.
a) First b) second
c) third
d) fourth
Q.15 The EDVAC stored and processed number in_______
a) decimal form
b) hexadecimal form c) BCD form d) binary form
Q.16 In third generation, magnetic core memories were replaced by ________memories.
a) Optical
b) magnetic tape
c) IC d) magnetic disk
Q.17 _____designed the first mechanical computer that can perform multistep Operation
automatically.
a) Von Neumann
b) Blaise Baggage
c) Charles Baggale d) None of the above
Q.18 3rd generation computer were from _______to_______
a) 1960 to 1965
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b) 1940 to 1960
UNIT I
c)1960 to 1980
d)1965 to 1975
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Q.19 Accessing disks and tapes involve the______movement of read/write device with
respect to magnetic storage surface.
a) electromechanical b) electromagnetic c) physical d) electrochemical
Q.20 Introduction of microprogramming, parallelism and pipelining was in
_________generation.
a) 1st
b) 2nd c)3rd
d)4th
Q.21 Workstation that are distributes=d throughout a building and connected to a large
computer by communication lines provide______
a) compact computing
b) complex computing
c) distributed computing d) distinct computing
Q.22 _______and _____memories were developed in 3rd generation.
a) Cache, virtual
b) cache, main
c) virtual, main
d) cache, RAM
Q.23 1st electronic computer was designed at _________
a) University of Californisa b) University of new Zealand
c) University of pune
d) University of Pennyvania
Q.24 VLSI means_______
a) Very large scale Integration
b) very low Scale Integration
c) Very Large Set Integration
d) Very low set Integration
Q.25 1st computer was based on _____technology.
a) vacuum tube
b)integrated circuit c) VLSI d) fabrication
Q.26 ______Technology allowed a complete processor to be fabricated on a single chip.
a) vacuum tube
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b) cathode ray tube
UNIT I
c) VLSI
d)Integrated circuit
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Q.27 _____were used to perform logic operation and to store data in the 1st electronic
computer.
a) cache memory b) main memory c) vacuum tubes
d) ALUs
Q.28 Integrated circuit technology led to _______fold increase in speed)
a) 10 ns
b) 100 ns
c) 1000 ns
d) 10000 ns
Q.29 The 1st grneration computer were designed in the year_______
a)1940 to 1945
b)1945 to 1955
c)1940 to 1950
d)1945 to 1990
Q.30 Fourth Generation computer used_________
a) Transistor b) IC’s
c) VLSI
D) none of these
Q.31 ______generation computer were designed in the year 1955 to 1965.
a) 1st
b) 2nd
c) 3rd
d) 4th
Q.32 first planned family of computer product was__
a) IBM system/360
b) PDP-9
c) PDP-8
d) IBM system/340
Q33 Blaise pascal invented an influential_____calculator earlier.
a) electrical
b) mechanical
c) electronic
d) alphanumeric
Q.34 Fourth generation introduced concept of __generation.
a) LSI
b) MSI
c) VLSI
d) parallel computing
Q.35 calculator invented by Pascal could do ___operation on decimal numbers.
a) multiply and add
b) subtract and multiply c) add and subtract d) compare and add
Q.36 in IAS machine, program control unit fetches __instructions simultaneously from
memory
a) One
b) two
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c) three
d) four
UNIT I
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Q.37 The first electronic computer was________
a) EDVAC B) ENIAC C) IAS
D) none of the above
Q.38 IN ferrite core a bit of information stored in___
a) Electric form
b) digital form
c) electromagnetic form
d) magnetic form
Q.39 ENIAC means_______
a) Electronic Numerical Integrator and computation
b) Electrical Numerical integrator and computing
c) Electronic Numerical Integration and computing.
d) Electronic Numerical Integrator and computer
Q.40 Machine language programs are very __to write for users.
a) Simple
b) difficult
c) lengthy
d) all of above
Q.41 ENIAC was able to perform______addition/subtraction per second)
a)500
b)5000
c)50000
d)5500
Q.42 A technique designed to enable a single CPU to process a set of independent user
programs concurrently called__
a) Sequential programming
c) Multiprogramming
b) serial programming
d) none of above
Q.43ENIAC WAS A______machine.
a) binary
b) decimal
c)hexadecimal
d) octal
Q.44 Batch processing requires the use of supervisory program which called__
a) Batch supervisor
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b) batch monitor
UNIT I
c) batch processor
d) all of above
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Q.45 ENIAC was consuming_______power.
a)150 kw
b)100 kw
c)130 kw
d)140 kw
Q.46 Batch monitor program is permanently stored in ___
a) Main memory
b) stack memory c) secondary memory d) temporary memory
Q.47 ________was implemented with stored program concept.
a) EDVAC
b) ENIAC
c) IAS d) none of the above
Q.48 If all models of computer in particular series shared a common instruction set then they
are called__
a) Hardware compatible
b) interconnected c) software compatible
d) none of above
Q.49 EDVAC means_____
a) Electronics Discrete Variable and Computer
b) Electronic Discrete Variable and computing
c) Electronic Discrete Variable Automatic Computer
d) Electronic Discrete Variable Computation
Q.50 In software compatible systems, programs written for one model in particular series
could be run __on any other model in that series
a) Without modification b) with modification c) with hardware changes d) none of
above
Q.51 IN EDVAC,programs and their data ewre located in the_____memory
a)external
b) separate
c) additional
d) same
Q.52 For computer owners it is easier to upgrade their systems without large alterations in
software only if systems are__
a) Hardware compatible
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b) interconnected c) software compatible d) none of above
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Q.53 Accumulator of ENIAC was able to store____digit decimal number.
a)4
b)8
c)10
d)12
Q.54 In third generation computers various manufacturers designed extremely powerful
scientific computers which loosely termed as ___
a) Microcomputers
b) supercomputers
c) minicomputers
d .none of above
Q.55 EBCDIC uses______bits to denote a character.
a)7
b)8
c)16
d)32
Q.56 A computer with more than one CPU and allows instructions from different programs to
be executed simultaneously is called as__
a) Microprocessor
b) miniprocessor
c) super processor
d) multiprocessor
Q.57 Second generation had remarkable features of use of____
a) vaccum tubes
b) transistor
c) stored programs d) compiler
Q.58 Program counter PC always points the address of __instruction to be fetched)
a) Current
b) previous
c) next
d) last
Q.59 Integrated circuit were the feature of______generation.
a) first
b) second
c) third
d) fourth
Q.60 IAS computer is designed by __
a) Von Neumann
b) Babbage
c) Konard Zuse
d) Aiken
Q.61 In third generation,magnetic core memories were replaced by______memories.
a)optical
b)magnetic tape
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c)IC
d)magnetic disk
UNIT I
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Q.62 IAS machine are designed to process all bits of binary numbers__
a) Randomly b) simultaneously
c) serially
d) none of above
Q.63 First planned family of computer products was______
a) IBM system/360
b)PDP-8
C)PDP-6
D)IBM SYSTEM/340
Q.64 In CPU of IAS computer who issues control signals to data processing unit, memory
and other circuits for execution of instruction?
a) program counter PC
b) program control unit CPU
c) Accumulator AC
d) Instruction Register IR
Q.65 ___was introduction of first minicomputer.
a) IBM system/360
b)PDP-8
c)PDP-6
d) IBM SYSTEM/340
Q.66 Artificial Intelligence is an example of _generation.
a) Third
b) fourth
c) beyond fourth
d) none of these
Q.67 Word length range for microcomputer is_________
a) 8 bits to 32 bit b) 8 bits to 16 bits
c) 16 bits to 32 bits d)16 bits to 64 bits
Q.68 In IAS group of instructions which determines the sequence in which the instructions
are executed are called__
a) Data transfer instructions b) data processing instructions
c) Branch or program control instructions
d) none of above
Q.69 Word length range for mainframes is_______
a) 64 bits or greater b) 32 bits c) 8 bits to 64 bits d) 8 bits to 32 bits
Q.70 The term VLSI means____
a) Very large size integration
b) Very low size integration
c) Very large scale integration
d) Very low scale integration
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UNIT I
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Q.71 _______was introduction of first minicomputer.
a) IBM system/360 b) PDP-8
c) PDP-6
d) IBM SYSTEM/340
Q.72 The basic building block for computers of third and subsequent generation is___
a) IC b) mechanical switch c) transistor
d) Vacuum tube
Q.73 PDP-8 introduced_______
a) microprogramming
b) pipelining c) bus structure d) separated I/O control
Q.74 A package containing several IC chips attached to substrate is called__
a) Layered module
b) multichip module c) multilayered module d) all of above
Q.75 Fourth generation introduced concept of________
a) LSI
b)MSI
c)VLSI
d)PARALLEL COMPUTING
Q.76 In multichip module __provides mechanical support and electrical connection between
various chips attached.
a) Leads
b) package
c) substrate
d) pins
Q.77 Artificial Intelligence is an example of______generation.
a) third
b) fourth
c) beyond fourth
d) nine of the above
Q.78 The Numbers of transistors contained in chip is described by the term__
a) IC volume b) IC density c) IC storage d) all of above
Q.79 In IAS computer_____fetches and interprets the instruction in memory and causes
them to be executed
a)ALU
b) control unit
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c) accumulator
d) program counter
UNIT I
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Q.80 The first microprocessor Intel’s 4004 can process ___word)
a) 2 bit
b) 16 bit
c)8 bit d) 4 bit
Q.81 In original Von Neumann machine,memory unit consist of____storage location
of___bits each.
a)2048,16
b)4096,20
c)4096,60
d)4096,40
Q.82 The combination of CPU memory and IO circuits in one IC is called___
a) Microcomputer
b .minicomputer
c) supercomputer d) none of the above
Q.83 In original IAS machine storage location was referred to as_____
a) byte
b) word
c) digit
d) number
Q.84 Both positive and negative charge carries are used in____
a) MOS circuit
b) bipolar circuit
c) Bidirectional circuit
d) none of the above
.
Q.85 In IAS machine,data and code have______memory.
a) same b) separate
c) distinct
d) more
Q.86 In SOC all components of computer or other electronic system into a ______chip.
a) Multiple
b) single
c) large
d) none of the above
Q.87 In Von Neumann machine______features was responsible for performance bottleneck.
a) stored program
b) separate memory for data & code c) I/O access d) none of these
Q.88 The term mainframe was applied for______ computer system.
a) Small
b) medium
c) large
d) none of the above
Q.89 CPU means________
a) control processing unit
b) control programming unit c) central processing unit
d)central programming unit.
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UNIT I
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Q.90 In large organizations such as university or bank which type of computer systems are
used?
a) Mainframe
b) Minicomputer systems
c) Microcomputer system
d) none of the above
Q.91 key concept of stored program was introduced by_________
a) Safwat G.Zaky
b) John Von Nevmann
c) J.Hays
d) Stalling William
Q.92 The minicomputer was ____ version of mainframe.
a) Smaller
b) slower
c) cheaper
d) all of the above
Q.93 Which of the following operation are involved in an instruction cycle?
a) opcode decoding b) Instruction execution c) Instruction fetching d) All of these
Q.94 A computer system with one CPU or microprocessor is generally referred to________.
a) Mainframe b) microcomputer
c) large computer
d) none of the above
Q.95 _______stores address of next instruction to be executed.
a)AR
b)AC
c) PC
d)IR
Q.96 powerful desktop computer intended for scientific computing are referred as___.
a) personal stations
b) computer station
c) workstation d) none of the above
Q.97______keeps track of execution of a program.
a) program counter
b) Instruction execution
c) Instruction Fetching d) All of these
Q.98 A typical PC has ___ organization.
a) Babbage’s b) von Neumann
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c) Zuse’s
UNIT I
d) none of the above
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Q.99________contain the data to be written into or read out of addressed location.
a)MAR
b)PC
c)MDR
d)IR
Q.100 The first most successful personal computer family was the___.
a) Motorola
b) Apple Computers Macintosh
c) MITS
d) IBM PC
Q.101 In IAS actual word transfer takes place between memory and________
a)AC
b)AR
c)DR
d)IR
Q.102 IBM made its design specifications available for other manufacturers of computer
hardware and software what came to be called____.
a) open architecture
b) shared architecture
c) layered architecture
d) none of the above
Q.103 Data register of IAS is______wide.
a)16-bit
b)20-bit
c)40-bit
d)48-bit
Q.104 IBM PC series began with____
a) Pentium microprocessor
b) 6800 microprocessor
c) 8086 microprocessor
d) none of the above
Q.105 AR in IAS is______wide.
a)12-bit
b)14-bit
c)16-bit
d)18-bit
Q.106 MS/DOS operating system is used by____
a) Apple Computer’s Macintosh series
b) IBMPC series
c) Motorola series
D) none of the above
Q.107 Program control unit of IAS fetches______instruction simultaneously.
a)two
b)three
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c)four
d)six
UNIT I
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Q.108 Apple computer’s Macintosh built a computer series around ____ microprocessor
a) Intel 8086 b) Pentium
c) Motorola 680X0
d) Intel 80386
Q.109 In IAS machine,IBR stores______instruction.
a)immediately executable
b)later executable
c)currently executing
d)aborted type
Q.110 Macintosh CPU was changed to new microprocessor know as___.
a) power PC
b) Macintosh PC
c) IBM PC
d) none of the above
Q.111 In IAS machine,IR stores______instruction.
a)immediately executable
b)later executable
c)currently executing
d)aborted type
Q.112 Performance of computer is ___ proportional to the execution time.
a) directly
b) additively C) inversely
D) none of the above
Q.113_______architecture shows separate memory banks for data and program.
a)princeton
b)Harvard
c)Von Neumann
d)ROCKwell
Q.114 A less is execution time _____ is performance of a computer.
A) better
B) less
C) lower
D) none of the above
Q.115 Usually ROM is used as______memory.
a)program
b)data
c)both (a) and(b)
d)none of these
Q.116 8086 is designed to process ____ of information.
a) 8 bit
b) 16 bit
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c) 32 bit
d) 64 bit
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Q.117______architecture shows separate memory banks for data and program.
a)princeton
b)Harvard
c)Von Neumann
d)ROCKwell
Q.118 CPU takes ___ time to obtained word from memory then one of its internal register.
a) same
b) longer
c) lesser
d) zero
Q.119 Harvard architecture shows feature of executing instruction in_______instruction
cycle than von Neumann
a)more
b)double
c)reduced
d)exactly half
Q.120 RISC computer uses ____ to reduced impact of Neumann bottleneck.
a) open architecture
b) layered architecture
c) complex architecture
d) load-store architecture
Q.121 _______architecture uses both RISC and CISC architecture.
a)Von Neumann
b)Harvard
c)Baggage
d)None of these
Q.122 In load-store architecture to reduce the impact of Neumann bottleneck total number
of memory accesses made by CPU are______
a) cancelled
b) increased
c) reduced
d) none of the above
Q.123 Microcontroller is the example of________architecture.
a)Princeton
b)Von Neumann
c)ROCKwell
d)Harvard
Q.124 performance of system and execution time of system are ____ proportional to each
other
a) directly
b) inversely
c) equally
d) none of the above
Q.125 Microprocessor is the example of________architecture.
a)Princeton
b)Von Neumann
c)ROCKwell
d)Harvard
Q.126 the time between start and completion of particular program is known as___
a) program time
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b) clock time c) execution time
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d) wait time
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Q.127______bus is unidirectional.
a)data
b)Address
c)control
d)None of these
Q.128 program length or number of actual instructions in particular program (N) has to be
____ for better performance.
a) increased
b) reduced
c) removed
d) none of the above
Q.129 use of_______isolates CPU from frequent accesses to main memory.
a) local I/O controller b)expansion bus interface c)cache structure d)system bus
Q.130 In execution of particular instruction time required for reference needed is ___ than
time required by processor cycles for instruction decode and execute.
a) double
b) half
c) less
d)more
Q.131______buffer data transfer between system bus and I/O controller on expansion bus.
a)Local I/O controller
b)Expansion bus interface
c)Cache structure
d)None of these
Q.132. Collection of data, address and control bus is usually referred as---------.
a) Processor bus
b) system bus c) local bus
d) complete bus
Q.133 ________timing involves a clock line.
a)Synchronous
b)Asynchronous
c)Asymmetric d)None of these
Q134. CPU can read data from memory and IO and write data to memory and IO with------data bus.
a) Multidirectional
b) Unidirectional
c) Bidirectional d) none of the above
Q 135_______timing takes advantage of mixture of slow and fast devices.sharing the same
bus.
a) Synchronous
b) Asynchronous
c) Asymmetric
d)None of these
Q136. Performance of computer system with signal bus structure -------- if large number of
devices is connected to common system bus.
a) Decreases b) Increases
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c) Remain same
UNIT I
d) none of the above
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Q.137 In 1st generation______language was used to prepare programs.
a) machine
b)assembly
c)high-level programming
d)pseudo code
Q138. If the bus width is wider then performance is ----------.
a) Remain same
b) lower
c) better
d) none of these
Q.139 The first generation computer was a_______machine.
a)decimal
b)binary
c)octal
d)hexadecimal
Q140. LSB means --------.
a) low sequence bit
b) low sequence byte c) least significant bit d) least sequence
byte
Q.141 Vacuum tube technology used in 1st generation provided a______fold increase in
speed relative to earlier mechanical and relay based electro mechanical technology.
a)10 to 100
b)1000 to 1050
c)100 to 1000
d)100 to 900
Q142. 1’s complement representation is nothing but bit-by-bit -------- operation.
a) OR
b) AND
c) EX-OR
d) NOT
Q.143 ______memory was used in 1st generation computer.
a)Cache
b)Main
c)External
d)Mercury delay-line
Q144. 1’s complement + --------=2’s complement.
a) 1
b) 2
c) 3
d)-1
Q.145 The transistor was invented at______laboratories.
a)AT & T
b)AT & Y
c)AM & T
d)AT & M
Q.146. In 1’s complement subtraction when carry is generated it is--------.
a) Ignored
b) added to a final result
c) subtract from final result
d) Ignored and 1’s complement of final result is done
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UNIT I
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Q.147 _______and________storage devices were more widely used in the 2nd generation.
a) Magnetic core memories,magnetic drum
b) Magnetic tapes,magnetic drum
c) Magnetic cores,magnetic disk
d) Magnetic tapes,magnetic disk
Q.148. In 2’s complement subtraction when carry is generated it is---------.
a) Ignored
b) added to a final result
c) Subtract from final result d) Ignored and 1’s complement of final is done
Q.149. Replace of tubes by transistor led to______fold increases in speed)
a)10us
b)100us
c)1000us
d)10000us
Q.150. Booths algorithm generates --------- bit product.
a) n
b) 2n
c) 3n
d) 4n
Q.151 Second generation computer can handle________operation.
a)fixed-point
b)floating-point
c)both (a) and (b)
d)none of these
Q.152. The -----bit in the binary number represent signed of the number.
a) Leftmost
b) rightmost
c) both a and b
d) none of these
Q.153 Second generation had remarkable feature of use of________
a)vacumm tubes
b)transistor
c)stored programs
d)compiler
Q.154. For unsigned 8-bit binary number the decimal range is-------.
a) 0 to 127
b) 255 to 127
c) 0 to 255
d) none of these
Q.155 _________language was used in 2nd generation for preparing application program
easy.
a)Assembly
b)Machine
c)High-level d)Pseudo code
Q.156. 2’s complement of (11000100)2 is --------.
a) (00111)2
b) (00110)2
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c) (11000)2
UNIT I
d) All the above
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Q.157 In 1st generation_________language was translated into________language for
execution.
a)assembly,machine
b)machine,assembly
c)assembly,high-level
d)machine,high-level
Q.158. 2’s complement of (11000100) is --------.
a) 00111100
b) 00111011
c) 11001100
d) 10111011
Q.159 In 2nd generation_______language was first translated into_________language and
then into____language by computer for execution.
a)high-level.assembly,machine
b)high-level,machine,assembly
c)assembly,high-level,machine
d)assembly,machine,high-level
Q.160. 1’s complement of (01011011)2 is --------.
a) 10100100
b) 00111000 c) 10111011
d) none of these
Q.161. Which is the recoded multiplier of 101100 for Booth’s multiplication?
a) -1 +1 0 -1 0 0
b) +1 0 -1 0 +1 -1
c) Both a and b
Q.162. single-precision representation occupies a -------a) 16-bit
b) 32-bit
d) none of these
word)
c) 64-bit
d) 8-bit
Q.163. The 32-bit floating point system, bias value is--------.
a) 126
b) 1023
c) 127
d) none of these
Q.164. Is The 32-bit floating point system, bias value is--------.
a)127
b) 1024
c) 1023
d) none of these
Q.165. The time between start and completion of particular program is known as___
a) Program time
b) clock time
c) Execution time
d) wait time
Q.166. In 2’s complement subtraction of binary number if carry is generated then the result
is--------.
a)positive
b) negative
c) zero
d) none of these
Q.167. In 2’s complement subtraction of binary number if carry is not generated then the
result is--------.
a) positive
b) negative
c) zero
d) none of these
Q.168. In single precision format -------bit is/are for sign, -------- is/are for signed exponent
and --------- for mantissa.
a) 1,8,23
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b) 23, 8, 1
c) 8,23,1
UNIT I
d)none of these
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Q.169. IEEE 754 standard for a single-precision representation include --------- bits.
a) 16
b) 32
c) 48
d) 64
Q.170. IEEE 754 standard for a Double-precision representation include --------- bits.
a) 16
b) 32
c) 48
d) 64
Q.171. ------- bits are reserved for signed exponent in IEEE 754 standard for Single-precision
representation of floating point number.
a) 8
b) 16
c) 48
d) 64
Q.172. ------- bits are reserved for signed exponent in IEEE 754 standard for a Doubleprecision representation of floating point number.
a) 8
b) 16
c) 12
d) 18
Q.173. ------- bits are reserved for mantissa in IEEE 754 standard for a Single-precision
representation of floating point number.
a) 16
b) 20
c) 23
d) 32
Q.174. ------- bit are reserved for mantissa in IEEE 754 standard for a Double-precision
representation of floating point number.
a) 16
b) 32
c) 52
d) 64
Q.175. in integer number, radix point is assumed to be to the -------- of the right most digit.
a) Right
b) left
c) a or b
d) none of these above
Q.176. Floating point number system allows the representation of number having --------.
a) Integer part
b) fractional part
c) Integer and fractional part
d) Integer or fractional part
Q.177. Techniques to represent signed integer number is/are ---------.
a) sign-magnitude representation
b) 1’s complement
c) 2’s complement
d) all of these
Q.178. In sign-magnitude representation of the number, if MSB is 0, number is --------.
a) Positive
b) negative
c) Integer
d) fraction
Q.179. In sign-magnitude representation of the number, if MSB is 0, number is --------.
a) Positive
b) negative
c) Integer
d) fraction
Q.180. Maximum positive number for sign magnitude 8-bit format is --------.
a) +127
b) +128
c) +255
d) +256
Q.181. Maximum negative number for sign magnitude 8-bit format is --------.
a) -255
b) -127
Computer Organization MCQ
c) -256
d) -128
UNIT I
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Q.182. The decimal equivalent of binary number 0.0111 is --------.
a) 4.375
b) 0.4375
c) 0.5375
d) -0.4375
Q.183. (1000)2=( )10
a) 1000
b) 8
c) 1
d) 16
Q.184. (13.54)8 = ( )2
a) 1011.1011
b) 1101.1110 c) 1001.1110
d) 1011.1001
Q.185. Higher level program is processed line by line or statement by statement with--------.
a) Interpreter
b) compiler
c) Editor
d) None of this
Q.186. The editor source program in higher level language is translated into machine
language at a time with--------.
a) Interpreter
b) Compiler
c)Editor
d) All of the above
Q.187. Interrupt signals are send by --------to the processor.
a) IO module b) memory module
c) CPU module
d) All of the above
Q.188. A computer with more than one CPU and allows instructions from different programs
to be executed simultaneously is called as__
a) Microprocessor
b) Miniprocessor
c) super processor
d) multiprocessor
Q.189. The term VLSI means____
a) Very large size integration
b) Very low size integration
c) Very large scale integration d) Very low scale integration
Q.190. IAS computer is designed by __
a) Von Neumann
b) Babbage
c) Konard Zused
d) Aiken
Q.191. In load-store architecture to reduce the impact of Neumann bottleneck total number
of memory accesses made by CPU are______
a) Cancelled
b) increased
Computer Organization MCQ
c) Reduced
UNIT I
d) none of the above
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