Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) VLSI Design
(6 Semesters / 3 Years)
COURSE CURRICULUM
[Effective from the admitted batch 2010-11]
Semester # 1 – FIRST Year
THEORY
LABORATORIES
VL 101:
VL 102:
VL 103:
VL 104:
VL 105:
VL 106:
Applied Mathematics – I
Advanced Digital System Design and Computer Architecture
Programming Concepts and ‘C’ Language
Device Modeling
Programming in ‘C’ Language Laboratory
Programming in MATLAB Laboratory
Semester # 2 – FIRST Year
THEORY
LABORATORIES
VL 201:
VL 202:
VL 203:
VL 204:

VL 205:
VL 206:
Applied Mathematics – II
Digital Signal Processing
System Modeling
Network Analysis and Synthesis
Non-Core Paper (under Choice-Based Credit System)
VHDL / Verilog Laboratory
Engineering Drawing Laboratory
Semester # 3 – SECOND Year
THEORY
LABORATORIES
VL 301:
VL 302:
VL 303:
VL 304:

VL 305:
VL 306:
VLSI Technology
VLSI Signal Processing
VLSI Design
VLSI Design Tools
Non-Core Paper (under Choice-Based Credit System)
Cadence Front-End Design Laboratory
Cadence Layout Design Laboratory
Semester # 4 – SECOND Year
THEORY
MINI-PROJECT
VL 401:
VL 402:
VL 403:
VL 404:
VL 405:
Design and Analysis of ICs
EMI and EMC in Design
VLSI Physical Design
VLSI Testing and Verification
Mini-Project Work Dissertation
Semester # 5 – THIRD Year
THEORY
MINI-PROJECT
VL 501:
VL 502:
VL 503:
VL 504:
VL 505:
FPGA Design
ASIC Design
Low-Power VLSI Design
Mixed Signal Design
Mini-Project Work Dissertation
Semester # 6 – THIRD Year
PROJECT
VL 601:
Project Work Dissertation
Department of Systems Design, Andhra University, Visakhapatnam – 530003
Non-Core Paper (Under Choice-Based Credit System) – Semester # 2

Paper code
AM 205
BC 205
BO 205
BT 205
ES 205
GG 205
GL 205
GL 206
GP 205
HG 205
ML 205
MM 205
MO 205
MO 206
MB 205
PY 205
NP 205
CH 205
ST 205
ZO 205
FN 205
Title of the paper
Methods of Applied Mathematics
Bio-molecules and Biochemical Techniques
Ethno-botany and Medicinal Plants
Foundations of Biotechnology
Regional and Global Environmental Issues
Applied Geography
Energy Resources
Coastal Zone Management
Solid Earth Geophysics
Fundamentals of Human Genetics
Marine Bio-resources
Discrete Mathematics and Coding Theory
Elements of General Meteorology
Elements of Physical Oceanography
Principles of Microbiology
Introductory Atmosphere and Space Physics
Introductory Nuclear and Neutron Physics
Chemical and Analytical Aspects of Drugs and Nano Materials
Statistical Methods
Bio-systematic and Taxonomy
Food Science and Nutrition
Non-Core Paper (Under Choice-Based Credit System) – Semester # 3

Paper code
AM 305
BC 305
BO 305
BT 305
ES 305
GG 305
GL 305
GL 306
GP 305
HG 305
ML 305
MM 305
MO 305
MO 306
MB 305
PY 305
NP 305
CH 305
ST 305
ZO 305
FN 305
Title of the paper
Numerical Methods
Metabolism and Enzymology
Principles of Genetic Analysis
Biotechnology for Human Welfare
Environmental Pollution
Tools and Techniques of Geography
Mineral Economics
Marine Geology
Seismology
Advanced Human Genetics
Coastal Aquaculture
Linear Algebra and Number Theory
Global Warming and Climate Change
Coastal Zone Management
Applied Microbiology
Analytical Techniques
Experimental Techniques and Applied Nuclear Physics
Chemistry of Life Processes and Related Molecules
Elements of Statistical Inference
Principles of Zoology
Diet Management
Department of Systems Design, Andhra University, Visakhapatnam – 530003
CREDIT SYSTEM – SCHEME OF INSTRUCTION AND EXAMINATION
M.Sc.(Tech.) VLSI Design
(3 years – 6 semesters)
Semester # 1 – FIRST YEAR
Code
VL 101
VL 102
VL 103
VL 104
VL 105
VL 106
Title of the paper
Applied Mathematics – I
Advanced Digital System Design and Computer Architecture
Programming Concepts and ‘C’ Language
Device Modeling
Programming in C Language Laboratory
Programming in MATLAB Laboratory
Comprehensive Viva-Voce
Per / Week
L
4
4
4
4
T
1
1
1
1
P
Examination marks
SemExm
Mid
Total
PasMin
85
85
85
85
15
15
15
15
100
100
100
100
100
100
100
700
40
40
40
40
50
50
50
3
3
Total
Credits
4
4
4
4
4
4
4
28
Semester # 2 – FIRST YEAR
Code
VL 201
VL 202
VL 203
VL 204

VL 205
VL 206
Title of the paper
Applied Mathematics – II
Digital Signal Processing
System Modeling
Network Analysis & Synthesis
Non-Core Paper (Under Choice-Based Credit System)
VHDL / Verilog Laboratory
Engineering Drawing Laboratory
Comprehensive Viva-Voce
Per / Week
L
4
4
4
4
4
T
1
1
1
1
P
Examination marks
SemExm
Mid
Total
PasMin
85
85
85
85
85
15
15
15
15
15
100
100
100
100
100
100
100
100
800
40
40
40
40
40
50
50
50
3
3
Total
Credits
4
4
4
4
4
4
4
4
32
Semester # 3 – SECOND YEAR
Code
Title of the paper
VL 301
VL 302
VL 303
VL 304
VLSI Technology

VL 305
VL 306
VLSI Signal Processing
VLSI Design
VLSI Design Tools
Non-Core Paper (Under Choice-Based Credit System)
Cadence Front-End Design Laboratory
Cadence Layout Design Laboratory
Comprehensive Viva-Voce
Per / Week
L
4
4
4
4
4
T
1
1
1
1
P
Examination marks
SemExm
Mid
Total
PasMin
85
85
85
85
85
15
15
15
15
15
100
100
100
100
100
100
100
100
800
40
40
40
40
40
50
50
50
3
3
Total
Credits
4
4
4
4
4
4
4
4
32
Semester # 4 – SECOND YEAR
Code
VL 401
VL 402
VL 403
VL 404
VL 405
Title of the paper
Design and Analysis of ICs
EMI and EMC in Design
VLSI Physical Design
VLSI Testing and Verification
Mini-Project Work Dissertation
Comprehensive Viva-Voce
Per / Week
L
4
4
4
4
T
1
1
1
1
P
Examination marks
SemExm
Mid
Total
PasMin
85
85
85
85
15
15
15
15
100
100
100
100
200
100
700
40
40
40
40
100
50
Total
Credits
4
4
4
4
8
4
28
Department of Systems Design, Andhra University, Visakhapatnam – 530003
Semester # 5 – THIRD YEAR
Code
VL 501
VL 502
VL 503
VL 504
VL 505
Title of the paper
FPGA Design
ASIC Design
Low-Power VLSI Design
Mixed Signal Design
Mini-Project Work Dissertation
Comprehensive Viva-Voce
Per / Week
L
4
4
4
4
T
1
1
1
1
P
Examination marks
SemExm
Mid
Total
PasMin
85
85
85
85
15
15
15
15
100
100
100
100
200
100
700
40
40
40
40
100
50
Total
Credits
4
4
4
4
8
4
28
Semester # 6 – THIRD YEAR
Code
VL 601
Title of the paper
Per / Week
L
T
P
Examination marks
SemExm
Mid
Total
PasMin
300
300
150
Total
Project Work Dissertation
Credits
12
12
Department of Systems Design, Andhra University, Visakhapatnam – 530003
GRADING SYSTEM
(With effect from the admitted batch 2008-2009)
1. Assessment of grades 10 point scale based on marks awarded
Award of grades
S.No.
Range of Marks
Grade
Grade Points
1.
› 85 %
O
10.0
2.
75 % - 85 %
A
9.0
3.
67 % - 74 %
B
8.0
4.
58 % - 66 %
C
7.0
5.
50 % - 57 %
D
6.0
6.
40 % - 49 %
E
5.0
7.
≤ 39 %
F (Fail)
0.0
8.
Incomplete (subsequently to be changed into pass or E to
O or F grade on subsequent appearance of the
examination)
I
0.0
2. Evaluation of SGPA (Semester Grade Point Average)
(a) For example, if a student gets grades in first year first semester as A, B, A, B, A, A, O
having credits as 4, 4, 4, 4, 4, 2, 2 respectively, then SGPA is calculated as follows:
𝑆𝐺𝑃𝐴 =
(9 × 4) + (8 × 4) + (9 × 4) + (8 × 4) + (9 × 4) + (9 × 2) + (10 × 2) 210
=
= 8.75
4+4+4+4+4+2+2
24
(b) For example, if a student gets grades in first year second semester as A, A, B, B, A, B, B
having credits as 4, 4, 4, 4, 4, 2, 2 respectively, then SGPA is calculated as follows:
𝑆𝐺𝑃𝐴 =
(9 × 4) + (9 × 4) + (8 × 4) + (8 × 4) + (9 × 4) + (8 × 2) + (8 × 2) 204
=
= 8.5
4+4+4+4+4+2+2
24
3. Evaluation of CGPA (Cumulative Grade Point Average)
The CGPA of the above two semesters is calculated as follows:
𝐶𝐺𝑃𝐴 =
210 + 204
= 8.625
24 + 24
* A Student securing ‘F’ grade there by securing 0.0 grade points has to appear and secure at
least ‘E’ grade at the subsequent examination(s) in that subject.
4. It is resolved that a candidate has to secure a minimum of 5.0 SGPA for a pass in each
semester in case of B.E /B.Tech./B.Arch./B.Pharm./5 Year Integrated Courses and PG
Diploma/PG in Arts & Commerce courses, whereas for PG in Engineering, Sciences,
Pharmacy/PG Diploma in Sciences 5.5 SGPA is the minimum for a pass in each semester.
Further, a candidate will be permitted to choose any paper for improvement in case the candidate
fails to secure the minimum prescribed SGPA / CGPA to enable the candidate to pass at the end
of any semester examination.
Department of Systems Design, Andhra University, Visakhapatnam – 530003
5. Resolved not to indicate pass/fail in the marks statement against each individual paper.
6. It is further resolved that a candidate will be declared to have passed in a course if the
candidate secures 5.0 CGPA for B.E /B.Tech./B.Arch./B.Pharm./5 Year Integrated Courses and
PG Diploma /PG in Arts & Commerce courses, while for PG in Engineering, Sciences,
Pharmacy/PG Diploma in Sciences 5.5 SGPA has to be secured for a pass in a course.
7. Further classification of successful candidates is based on CGPA as follows.
SCIENCE,ENGINEERING, PHARMACY(PG)/PG DIPLOMAS:
Distinction
-
CGPA 8.0 or more
I Class
-
CGPA 6.5 or more but less than 8.0
II Class/Pass
-
CGPA 5.5 or more bur less than 6.5
8. Existing facility of grace or grafting enabling a candidate to obtain class/pass in the examination
is withdrawn. Further, resolved that improving CGPA for improvement of class will be continued
as per the existing rules.
9. CGPA will be calculated from II semester onwards up to the final semester.
10. CGPA multiplied by “10” gives aggregate percentage of marks obtained by a candidate.
Department of Systems Design, Andhra University, Visakhapatnam – 530003
RULES AND REGULATIONS
1.1. A candidate shall be declared to have passed in any subject (theory), if he/she secures not
less than E Grade in theory and not less than D grade in practical/project, provided that the
result otherwise is withheld.
1.2. A candidate shall be deemed to have satisfied the minimum requirement for the award of
the Degree
a) if he/she is declared to have passed all the subjects (theory 40 % passing minimum in
each subject and 50 % passing minimum in practical and project work ) included in the
scheme of examination
b) If he/she secures  5.0 CGPA by the end of the final year.
c) E Grade cannot be treated as pass until SGPA is 5 or above.
d) Practical : 5 grades O to D
Theory
: 6 grades O to E
e) 100 marks (Theory or Project or Practical or Viva etc) 4 credits.
1.3. There shall be no provision for the improvement of internal assessment marks in any theory
or practical subject in any year/semester of study.
1.4. The CGPA can be converted into percentage by multiplying CGPA with 10.0, in case of
requirement by any other university or for any other purpose.
1.5. Whenever there is a change of regulations, scheme and syllabi, a candidate who fails in any
subject, will be permitted to appear for the University examinations conducted during the
subsequent 3 years only, under the previous regulations, scheme and syllabi.
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
DSP & ESD
First Semester
VL 101 / DS 101 – Applied Mathematics – I
(Effective from the admitted batch of 2010-2011)
Unit-1: Partial Differential Equations
Formation – Solutions of standard types of first order equations – Lagrange’s Linear equation – Linear
Partial differential equations of second and higher order with constant coefficients.
Fourier Series
Dirichlet’s conditions – General Fourier series – Half-range Sine & Cosign series – Parseval’s identity
– Harmonic analysis.
Unit-2: Boundary Value Problems
Classification of second order linear partial differential equation – Solutions of one-dimensional wave
equation, One-dimensional heat equation – Steady state solution of two-dimensional heat equation.
Unit-3: Laplace Transforms
Transforms of Simple Functions – Basic operational properties – Transforms of derivatives and
integrals – Inverse transforms – Convolution theorem – Periodic functions – Applications of Laplace
transforms for solving linear ordinary differential equations up to second order with constant
coefficients and simultaneous equations of first order with constant coefficients.
Unit-4: Fourier Transforms
Statement of Fourier integral theorem – Fourier transform pairs – Fourier Sine & Cosine transforms –
Properties – Transform of simple functions – Convolution theorems – Parseval’s identity.
Text Books
1. Advanced Engineering Mathematics – Kreyszig, E.
2. Higher Engineering Mathematics – Grewal, B.S.
3. Engineering Mathematics (Vol. II & III) – Kandasamy P., Thilagavathy, K., & Gunavathy, K.
4. Advanced Mathematics for Engineering Students (Volume II & III) – Narayanan S.,
Manicavachagom Pillay, T.K., T.K. Ramanaiah, G., S Viswanathan.
5. Engineering Mathematics (Volume III – A&B) – Venkataraman M.K.
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
DSP & ESD
First Semester
VL 101 / DS 101 – Applied Mathematics – I
(Effective from the admitted batch of 2010 – 2011)
Department of Systems Design, Andhra University, Visakhapatnam – 530003
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
DSP & ESD
First Semester
VL 102 / DS 102 – Advanced Digital System Design & Computer Architecture
(Effective from the admitted batch of 2010-2011)
Unit -1: Combinational Logic Circuits
Review of Boolean and De Morgan’s laws – Shannon’s expansion theorem – Consensus theorem –
Encoders – Decoders – Multiplexers – Demultiplexers – Adders and subtractors – SOP and POS
Forms and minimization – Synthesis of multiple output combinational logic circuits by product map
method – Design of static hazard free and dynamic hazard free logic circuits.
Unit-2: Threshold Logic
Threshold gate – Realization of conventional gates – Linear separability – Unateness – Reduced
functions – Various theorems in threshold logic – Synthesis of single gate and multigate threshold
Network
Programmable Logic Devices
Basic concepts – Programmable logic Element (PLE) – Programmable logic array (PLA) –
Programmable array logic (PAL) – Structure of standard PLDs – Design of combinational circuits
using PLDs.
Unit-3: Sequential Logic Circuits
Introduction to flip-flops and latches – RS, D, JK and Master-Slave JK – Timing analysis – Set-up time
& Hold time – Excitation tables – FF conversions – Mealy machine – Moore machine – State
diagrams – State table minimization – State assignments – Design of synchronous and asynchronous
sequential logic circuits.
Unit-4: Computer Architecture
Basic CPU organization – Instruction set classification – Addressing modes – CISC and RISC system
features – Pipelining issues
Memory Design
Memory hierarchy – Associative memory – Cache memory – Mapping functions – Virtual memory.
I/O Design
Asynchronous data transfer – Strobe – Hand-shaking – Programmed I/O – Interrupt – I/O – Parallel
interface – Serial I/O – Serial interface – DMA transfer – DMA interface.
Text Books
1. An Engineering Approach to Digital Design – William I Fletcher
2. Logic Design Theory – Biswas
3. Computer System Architecture – Mano.
4. Computer Systems Design and Architecture – Heuring and Jordan
5. Computer Organization and Architecture: Designing for Performance – Stallings
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
DSP & ESD
First Semester
VL 102 / DS 102 – Advanced Digital System Design and Computer Architecture
(Effective from the admitted batch of 2010 – 2011)
Department of Systems Design, Andhra University, Visakhapatnam – 530003
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
DSP & ESD
First Semester
VL 103 / DS 103 – Programming Concepts and C Language
(Effective from the admitted batch of 2010-2011)
Unit-1: Introduction to Programming
Concept of algorithms – Flow charts – Data flow diagrams etc. – Introduction to the editing tools such
as vi and MS-VC editors, Concepts of the finite storage - bits bytes – kilo - mega and gigabytes.
Concepts of character representation - Number Systems & Binary Arithmetic.
Unit-2: Programming in C
Concept of variables - Program statements and function calls from the library (Printf for example) - C
data types - int, char - Float etc. - C expressions - Arithmetic operation - Relational and logic
operations - C assignment statements - Extension of assignment of the operations - C primitive input
output using getchar and putchar - Exposure to the scanf and printf functions, C Statements Conditional executing using if, else - Optionally switch and break statement.
Unit-3: Iterations and Subprograms
Concept of loops - Example of loops in C using for, while, do-while and continue - One dimensional
arrays and example of iterative programs using arrays - 2-D arrays use in matrix computations Concept of sub-programming - Functions - Example of functions. Argument passing for simple
variables.
Pointers and Strings
Pointers - Relationship between arrays and pointers - Argument passing using pointers - Array of
pointers - Passing arrays as arguments - Strings and C string library - Structure and Unions - Defining
C structures - Passing strings as arguments - Programming examples.
Unit-4: Object Oriented Programming
Object oriented terminology - C++ classes - I/O M C++ - The cost team class list combining C & C++
code - Designing Unique manipulators - Object oriented stack and linked list in C++ - C and C++
programming - Differences between C and C++ - Adding an user interface to C and C++ program Standard C and C++ data types - Storage classes – Operators - Standard C and C++ libraries Writing & using functions - Arrays pointer - I/O in C - Structure unions – Macro’s advanced
preprocessor statements - Dynamic memory allocation.
Text Books
1. Let us C – Yashwant Kanetkar
2. C:The complete reference – Herbert Schildt, Osbourne
3. Object Oriented programming with C++ - Balaguruswamy E
4. Computer Programming in C – Raja Raman
5. C Programming Language – Kernighan & Ritchie, The (ANSI C Version)
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
DSP & ESD
First Semester
VL 103 / DS 103 – Programming Concepts & ‘C’ Language
(Effective from the admitted batch of 2010 – 2011)
Department of Systems Design, Andhra University, Visakhapatnam – 530003
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
First Semester
VL 104 – Device Modeling
(Effective from the admitted batch of 2010-2011)
Unit-1: Integrated Passive Devices
Types and structures of resistors and capacitors in monolithic technology dependence of model
parameters on structure.
Integrated Diodes
Junction and Schottky diodes in monolithic technologies – Static and dynamic behavior – Small and
large signal model – SPICE models.
Unit-2: Integrated Bipolar Transistor
Types and structures in monolithic technologies- Basic model EberMoll - Cunmel – Poon model Dynamic model - Parasitic effects – SPICE model – Parameter extraction.
Unit-3: Integrated MOS Transistor
nMOS and pMOS Transistor – Threshold voltage - Threshold voltage equation - MOS device
equations – Basic DC equation - Second order effects - MOS models - Small signal AC characteristics
– MOSFET SPICE model level 1,2,3,and 4 – CV-Plots – Shrinking and scaling CV-Plot equations.
Unit-4: MOS IC Processors
MOS IC Processors – HMOS – VMOS – Bi-CMOS – Metal-gate PMOS – Processor enhancements
Metal-gate CMOS – Silicon-gate LOCOS NMOS Process.
Text Books
1. MOSFET Modeling with Spice – Daniel Foty
2. Principles of CMOS VLSI Design, A system Perspective – Neil Weste and Kamran Eshranghiann
3. Microelectronics – Jacob Millman & Arvin Millman
4. Introduction to Semiconductor Materials and Devices - Tyagi M.S.
5. Modern MOS Technology – DeWitt G Ong
6. MOS Device Modeling – Tsividis
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
First Semester
VL 104 – Device Modeling
(Effective from the admitted batch of 2010 – 2011)
Department of Systems Design, Andhra University, Visakhapatnam – 530003
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
DSP & ESD
First Semester
VL 105 / DS 105 – Programming in C Language Laboratory
(Effective from the admitted batch of 2010-2011)
1. Write a program to produce ASCII equivalent of given number
2. Write a program to find divisor or factorial of a given number.
3. Write a program to evaluate the following algebraic expressions after reading necessary values
from the user
(ax+b)/(ax-b)
2.5 log x-cos 30+|x^2-y^2|+sqrt (2xy)
(x^5+10x^4+8x^3+4x+2
4. Write a program to find sum of a geometric series
5. Write a program to cipher a string
6. Write a program to check whether a given string follows English capitalization rules
7. Write a program to find sum of the following series
1+ ½ + 1/3 +________+1/20
8. Write a program to search whether a given substring exist in an input string or not and then delete
this string from input string.
9. Write a recursive program for tower of Hanoi problem
10. The fibonacci sequence of numbers is 1,1,2,3,5,8……. Based on the recurrence relation
F(n)=F(n-1)+F(n-2)for n>2
Write a recursive program to print the first m Fibonacci number
11. Write a menu driven program for matrices to do the following operation depending on whether the
operation requires one or two matrices
a)
Addition of two matrices
b)
Subtraction of two matrices
c)
Finding upper and lower triangular matrices
d)
Trace of a matrix
e)
Transpose of a matrix
f)
Check of matrix symmetry
g)
Product of two matrices.
12. Write a program that takes two operands and one operator from the user perform the operation
and then print the answer
13. Write a program to print the following outputs:
1
1
2
2
2
2
3
3
3
3
3
3
4
4
4
4
4
4
4
4
5
5
5
5
5
5
5
5
5
5
14. Write functions to add, subtract, multiply and divide two complex numbers (x+iy) and (a+ib) Also
write the main program.
15. Write a menu driven program for searching an sorting with following options:a)
Searching
(1)
Linear searching (2)
Binary searching
b)
Sorting
(1)
Insersection sort (2)
Selection sorting
16. Write a program to copy one file to other, use command line arguments.
17. Write a program to mask some bit of a number (using bit operations)
18. An array of record contains information of managers and workers of a company. Print all the data
of managers and workers in separate files.
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
DSP & ESD
Electronics and Instrumentation
First Semester
VL 106 / DS 106 / EI 106 – Programming in MATLAB Laboratory
(Effective from the admitted batch of 2010-2011)
1. MATLAB fundamentals
2. Creating MATLAB file and process of debugging
3. Signal processing
4. Different types of sequences and plotting generation
5. Operations sequences
6. Real signal decomposition into even and odd parts
7. Linear convolution of two sequences
8. Circular convolution of two sequences
9. Effect of sampling on frequency domain
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
DSP & ESD
Second Semester
VL 201 / DS 201 – Applied Mathematics – II
(Effective from the admitted batch of 2010-2011)
Unit-1: Special Functions
Bessel’s equation – Bessel functions - Legendre’s equation - Legendre polynomials - Roadridue’s
formula - Recurrence relations – Generating functions & orthogonal property for Bessel’s function of
the first kind.
Unit-2: Functions, Relations and Graph Theory
Types of functions – Inverse functions and composition of functions – Relations and their properties.
Graph theory
Introduction and types of graphs – Basic terminology – Representation of graphs and graph
isomorphism – Connectivity – Paths – Indirect and undirected graphs and isomerism.
Unit-3: Calculus and Variations
Introduction – Functionals – Euler’s equations – Solutions of Euler’s equations – Isoperimetric
problems – Several dependent variables – Functional involving higher order derivatives –
Approximation solutions of boundary value problems – Rayleigh – Ritz Methods – Galerkin method.
Unit-4: Liner Integral Equations and Probability Theory
Different kinds of integral equations – Fredholm and Volterra integral equations – Conversion of a
linear differential equation to an integral equation and vice-versa – Green’s functions – Solutions of
Fredholm equations and Fredholm integral equations by the method of successive approximations.
Probability theory
Basic terminology – Concept of of probability – Additive law – Multiplicative law and bayers theorem
(without proof) – Random variables – Classification of random variables – Discrete and continuous
random variables – Distribution functions – Conditional distribution functions and their properties.
Text Books
1. Discrete Mathematics & its Applications - Kenneth. H. Rosem.
2. Probability Theory & Stochastic Process – P. Santhosbabu and D. Malathi Devi.
3. Higher Engineering Mathematics – B.S. Grewal.
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
DSP & ESD
Second Semester
VL 201 / DS 201 – Applied Mathematics – II
(Effective from the admitted batch of 2010 – 2011)
Department of Systems Design, Andhra University, Visakhapatnam – 530003
Department of Systems Design, Andhra University, Visakhapatnam – 530003
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
DSP & ESD
Second Semester
VL 202 / DS 202 – Digital Signal Processing
(Effective from the admitted batch of 2010-2011)
Unit-1: Time, Signals and Systems
Sampling of analog signals - Basic sequences and sequence operations - Aliasing – Standard
discrete time signals – Classification – Discrete time systems – Linear time invariant stable casual
discrete time systems – Classification methods – Linear and circular convolution – Difference
equation representation – DFS, DTFT, DFT – FFT computations using DIT and DIF algorithms - Ztransforms and its properties – Inverse Z- transforms - Time response and frequency response
analysis of discrete time systems to standard input signals.
Structures for Discrete-Time Systems
Signal flow graph representation of linear constant coefficient difference equations - Basic IIR
structures - Transposed forms - Basic structures for FIR systems - Overview of finite-precision
numerical effects.
Unit-2: Infinite Impulse Response Digital Filters
Review of design of analogue Butterworth and Chebyshev Filters - Frequency transformation in
analogue domain – Design of IIR digital filters using impulse invariance technique – Design of digital
filters using bilinear transform – Pre-warping – Frequency transformation in digital domain –
Realization using direct, cascade and parallel forms.
Unit-3: Finite Impulse Response Digital Filters
Symmetric and anti-symmetric FIR filters – Linear phase FIR filters – Design using Frequency
sampling technique – Window design using Hamming - Hanning and Blackmann Windows – Concept
of optimum equi-ripple approximation – Realization of FIR filters – Transversal, Linear phase and
Polyphase realization structures.
Unit-4: Finite Word Length Effects
Quantization noise – Derivation for quantization noise power – Fixed point and binary floating point
number representations – Comparison – Overflow error – Truncation error – Coefficient quantization
error – limit cycle oscillations - Signal scaling – Analytical model of sample and hold operations.
Special Topics in DSP
Discrete Random Signals - Mean, variance, co-variance and PSD – Periodogram computation –
Principle of multi-rate DSP – Decimation and interpolation by integer factors – Time and frequency
domain descriptions – Single, multi stage, polyphase structures – QMF filters – Sub band Coding.
Text Books
1. Digital Signal Processing - Algorithms and Applications – Proakis and Manolakis
2. Digital Signal Processing’, A Computer Based Approach - Sanjit K. Mitra
3. Digital Signal Processing – Oppenhein & Schater
4. Introduction to Digital Signal Processing - J. R. Johnson
5. Signal Processing – B.P. Lathi
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
DSP & ESD
Second Semester
VL 202 / DS 202 – Digital Signal Processing
(Effective from the admitted batch of 2010 – 2011)
Department of Systems Design, Andhra University, Visakhapatnam – 530003
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
DSP & ESD
Second Semester
VL 203 / DS 203 – System Modeling
(Effective from the admitted batch of 2010-2011)
Unit -1: Basics of VHDL and Language Fundamentals
Introduction to VHDL - Levels of abstraction - Design Flow – Basic code structure of VHDL - Lexical
elements of VHDL - Data objects - Data types - Operators – Attributes - Identifiers
Unit-2: Behavioral, Structural, and Data Flow Descriptions
Delay Model - Sequential Statements – Concurrent Statements
Modeling Combinational Logic Circuits using VHDL Package
Adders, Multiplexers, Decoders, Encoders, Priority encoders, Comparators, ALU
Unit-3: Modeling Sequential Logic Circuits using VHDL Package:
Latch - Flip-flops (R-S,JK,T,D) – Counters - 2-bit counter using JK flip-flop - 4-bit counter using JK flipflop - Counter with parallel load - Decade counter - Johnson counter - Ring counter - Ripple counter Up-down counter – Registers - 8-bit register with enable input - Shift registers - Serial-in serial-out Serial-in parallel-out - Parallel-in serial-out - Parallel-in parallel-out and multiplier
State Machines
101over lapping Mealy sequence detector - 101 over lapping Moore sequence detector - 101 nonover lapping Moore sequence detector - 101 non-over lapping Mealy sequence detector.
Unit-4: Introduction to Verilog
Design function using Verilog - Levels of synthesizing Verilog - Designing N/W using Verilog - Simple
design - Wires - Wire assignments
Test -Benches - Response capture - RTL Verilog, If - statement – synthesis
Text Books
1. The Designers Guide to VHDL – Ashenden
2. Analog VLSI Integrated Circuits - Mohammed Ismail
3. Analysis and Design of Analog Integrated Circuits - Grey, Hurst Luwis, Mayer
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
DSP & ESD
Second Semester
VL 203 / DS 203 – System Modeling
(Effective from the admitted batch of 2010 – 2011)
Department of Systems Design, Andhra University, Visakhapatnam – 530003
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
DSP & ESD
Second Semester
VL 204 / DS 204 – Network Analysis & Synthesis
(Effective from the admitted batch of 2010-2011)
Unit-1: Analysis of Networks in ‘S’ Domain
Network elements - Transient and sinusoidal steady state analysis using Laplace Transformation Network functions
Two port networks
Parameters and transfer function - Interconnection of two ports.
Unit-2: Methods for Computer Aided Network Analysis
State Variable Method - Analytic & numerical solutions - Graph theoretic analysis for large scale
networks - Formulation and solution of network graph of simple networks - State space representation
- Analysis using PSPICE.
Unit-3: Elements of Network Synthesis
Network realizability - Hurwitz Polynomials - Positive real functions - Properties of RC, RL & LC
networks - Foster & Cauer forms of realization - Transmission zeroes - Synthesis of transfer functions.
Unit-4: Passive and Active Filter Design
Butterworth and Chebyshev approximations - Normalized specifications - Frequency transformations Frequency and impedance de-normalization - Types of frequency selective filters - Linear phase filters
Active Filter Design
Controlled sources - Op-amp as a controlled source - Sallen & Key structure - Single amplifier LP, HP,
BP & BR Filters - Principle of design - Sensitivity.
Text Books
1. Circuit Analysis-with Computer Applications to Problem Solving – Gupta, Bayless and Peikari
2. Network Analysis & Synthesis - Louis Weinberg
3. Network Theory & Filter Design - Vasudev K. Aatre
4. Network Analysis & Synthesis - Franklin F. Kuo
5. Network Analysis - Van Valkenberg
6. Active and Passive Analog Filter Design - Lawrence P. Huelsman
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
DSP & ESD
Second Semester
VL 204 / DS 204 – Network Analysis & Synthesis
(Effective from the admitted batch of 2010 – 2011)
Department of Systems Design, Andhra University, Visakhapatnam – 530003
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
DSP & ESD
Second Semester
VL 205 / DS 205 – VHDL / Verilog Laboratory
(Effective from the admitted batch of 2010-2011)
Simulate & Synthesize the following modules ( Using Verilog and VHDL Design Tools)
1. Flip – Flops
2. Adders
(a) Half- Adder
(b) Full –Adder
(c) CLA
3. Multiplexer
4:1 Multiplexer
8:1 Multiplexer
4. Decoder
5. Encoder
6. ALU
7. Counters
4 bit binary up down counter
Mod –N counter
Counter with Parallel Load and clear facility
8. Shift Registers
Serial in Serial Out
Serial in Parallel Out
Parallel in Serial Out
Parallel in Parallel Out
9. Mealy & Moore machines
10. RAM & ROM
11. Sequence detector
1011
10101
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
DSP & ESD
Electronics and Instrumentation
Second Semester
VL 206 / DS 206 / EI 206 – Engineering Drawing Laboratory
(Effective from the admitted batch of 2010-2011)
1. A 3 centimeter long line represents a length of 4.5 meter. Extended this line to measure up to
30 m and show the length of 22 meters on this line?
2. Construct a plain scale of 1:5 to show decimeters and centimeters and to read up to 1 meter.
Show the length of 7.4 decimeter on it?
3. An area of 144 square centimeters on a map represents an area of 9 square kilometers on
the field. Find the R.F of the scale for this map and draw a diagonal scale to show kilometers,
hectameters, decameters and to measure up to 5 kilometers. Indicate on the scale a distance
of 3 kilometers, 5 hectameters, and 6 decameters?
4. Construct a diagonal scale of R.F = 32,00,000 (representative fraction) to show kilometers
and long enough to measure upto 400 kilometers. Show distance of 257 kilometers and 333
kilometers on the scale?
5. Construct an ellipse of eccentricity equal to 2/3 and with the distance between the directrix
and focus as 65 millimeters?
6. Construct an ellipse of major axis 100 millimeters and minor axis 60 millimeters using arcs of
circle method?
7. Construct an ellipse of major axis 100 millimeters and minor axis 60 millimeters using oblong
method?
8. Construct a n ellipse of major axis 100 millimeters and minor axis 60 millimeters using
concentric circle method?
9. Draw a parabola in a parallelogram of 100 millimeters and 80 millimeters with an angle of
75°?
10. The major axis of an ellipse is 120 millimeters long and the minor axis is 90 millimeters long.
Find the foci and draw the ellipse by arcs of the circle method?
11. Construct a diagonal scale of R.F (representative fraction) to show meters and long enough to
measure 500 meters. Indicate a length of 379 meters?
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
Third Semester
VL 301 – VLSI Technology
(Effective from the admitted batch of 2010-2011)
Unit-1: VLSI Design and CMOS Fabrication Process
Design flow representation for functionality and mask layout - Design hierarchy and concepts of
regularity, modularity & locality – VLSI Design styles
Fabrication Process – Photolithography – Process flow for the fabrication of MOS transistors – CMOS
n-well process – Advanced CMOS fabrication technologies.
CMOS Layout design rules- CMOS inverter Layout design – Layout design of CMOS NAND / NOR
gates – Complex CMOS logic gates.
Unit-2: Parasitic Extraction & Performance Estimation from Physical Structure
Introduction – Reality with interconnection – MOSFET capacitances - Interconnect capacitance
estimation – Interconnect resistance estimation.
Clock Signals & System Timing
Introduction – On chip clock generation & distribution using ring & pierce crystal oscillator - nonoverlapping clock signals and gate level implementation - H-tree clock distribution network - Clock
skew reduction techniques – Buffered clock distribution networks.
Unit-3: Arithmetic for Digital Systems
Introduction – Notation systems – Principle of carry generation and propagation – Implementation of
1-bit full adder – Enhancement techniques for adders – Ripple carry adder – Carry skip adder – Carry
select adder – Carry look-ahead adder – Brent and Kung adder.
Multi-operand adders – Booth algorithm, Wallace trees – OS trees – Serial-parallel multiplier – Braun
parallel multiplier – Baugh-Wooley multiplier – Dadda and logarithmic multipliers – Multiplication in
Galois Fields.
Unit-4: Testability of Integrated systems – VLSI for Fuzzy Logic Systems
Design constraints - Testing - The rule of ten – Terminology – Failures in CMOS – Combinational
logic testing – Sensitized path testing.
Practical Ad-hoc design for testability guidelines – Scan design techniques.
Fuzzy logic systems
System consideration and advantages – Fuzzy logic based control background – Integrated
implementation of fuzzy logic circuits (FLCs) – Digital implementation of FLCs - Analog
implementation of FLCs - Mixed digital / analog implementations of FLCs
CAD automation for FLC design – Neural networks implementing fuzzy systems.
Text Books
1. VLSI Technology – Cheng, Sze
2. Basic VLSI Design Systems and Circuits – Douglas A Pucknell and Kamran Eshraghian
3. The ASIC Handbook – Horspool, Gorman
4. VLSI Design Techniques for Analog and Digital Circuits – Randall L Geiger and P.E. Allen
5. Fuzzy Sets and Fuzzy Logic – Klir, Yan
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
Third Semester
VL 301 – VLSI Technology
(Effective from the admitted batch of 2010 – 2011)
Department of Systems Design, Andhra University, Visakhapatnam – 530003
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
Third Semester
VL 302 – VLSI Signal Processing
(Effective from the admitted batch of 2010-2011)
Unit-1: Pipelining and Parallel Processing
Introduction – Pipelining of FIR digital filters – Parallel processing - Pipelining and parallel processing
for low power.
Retiming
Introduction – Definitions and properties – Solving system of inequalities – Retiming techniques.
Unit-2: Systolic Architecture Design
Unfolding
Introduction – An algorithm for unfolding – Properties of unfolding – Critical path, unfolding and
retiming - Application of unfolding.
Introduction - Systolic array design methodology – FIR systolic arrays - Selection of scheduling vector
- Matrix multiplication and 2-D systolic array design – Systolic design for space representations
containing delays.
Unit-3: Fast Convolution
Introduction - Cook – Toom algorithm - Winogard algorithm – Iterated convolution – Cyclic convolution
– Design of fast convolution algorithm by inspection.
Unit-4: Scaling and Round-off Noise
Introduction – Scaling and round off noise - State variable description of digital filters - Scaling and
round off noise computation - Round-off noise in pipelined HR filter - Round-off noise computation
using state variance description – Slow down, retiming, and pipelining
Text Books
1. VLSI Digital Signal Processing Systems: Design and Implementations – Keshab K. Parhi
2. Analog VLSI Signal and Information Processing – Mohammed Ismail, Terri, Fiez
3. VLSI and Modern Signal Processing – Kung S.Y. H.J. White House, T.Kailath
4. Design of Analog-Digital VLSI Circuits for Telecommunications and Signal Processing – France,
Tsividis
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
Third Semester
VL 302 – VLSI Signal Processing
(Effective from the admitted batch of 2010 – 2011)
Department of Systems Design, Andhra University, Visakhapatnam – 530003
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
Third Semester
VL 303 – VLSI Design
(Effective from the admitted batch of 2010-2011)
Unit-1: MOS Transistor Theory
Gajski Chart in VLSI design domain - MOS structure - Biasing and operation of MOS - Scaling in MOS
Circuits - Small geometry effects - MOS capacitances - Mobility variations - Hot electron effect.
MOS Inverter Design and Optimization
Static and switching characteristics - Resistive load inverters - Inverter with n-type MOSFET load CMOS inverters - Introduction to switching characteristics - Inverter delay time definitions and
calculations - Delay constraints in inverter.
Unit-2: CMOS Combinational / Sequential Logic Design
Introduction - MOS logic circuits with depletion MOS load - CMOS NAND and NOR gates - Complex
gate design - Pass transistor logic - Transistor gate logic [3]
CMOS Sequential Logic Design
Bistable elements - SR latch circuit - Clocked latch and flip-flop circuits - CMOS D-latch edge
triggered flip-flop - CMOS SRAM design - CMOS DRAM design.
Unit-3: Dynamic Logic and Clocking Circuits
Dynamic pass transistor circuits - Dynamic transmission gate design - High performance dynamic
logic circuits (Dynamic CMOS logic, C2MOS logic, CMOS Domino logic, NP domino, Zipper CMOS
circuits) - Setup and hold time - Clock skew in CMOS circuits - PLL technique for clock
synchronization[2].
Unit-4: CMOS Chip Design Options and I/O Design
Programmable Logic, Programmable Logic Structures, Programmable Interconnect, Reprogrammable
Gate Arrays, Sea-of-Gate and Gate Array Design, Standard Cell Design[2], I/O Design-Introduction,
ESD Protection, Input Circuits, Output Circuits and L(di/dt) noise, Latch-Up prevention.
Text Books
1. CMOS VLSI Design – Sung Mo Kang, Yusuf Leblebici
2. Principles of CMOS VLSI Design: A System Perspective – Weste H.E., Kamran Eshrigian Neil
3. Digital Integrated Circuits – Jan M. Rabey
4. Digital Integrated Circuits: A Design Perspective – Rabaey, Chandrakasan, Nikolic
5. Principles of CMOS-VLSI Design: A Systems Perspective – Weste Eshraghian
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
Third Semester
VL 303 – VLSI Design
(Effective from the admitted batch of 2010 – 2011)
Department of Systems Design, Andhra University, Visakhapatnam – 530003
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
Third Semester
VL 304 – VLSI Design Tools
(Effective from the admitted batch of 2010-2011)
Unit-1: Introduction to VLSI Methodologies
VLSI Physical Design Automation - Design and Fabrication of VLSI Devices - Fabrication process and
its impact on Physical Design.
Unit -2: A Quick Tour of VLSI Design Automation Tools
Data structures and Basic Algorithms - Algorithmic Graph theory and computational complexity Tractable and Intractable problems
Unit-3: General purpose methods for combinational optimization
Partitioning - Floor planning and pin assignment – Placement - Routing
Unit-4: Simulation-logic synthesis
Verification - High level synthesis – Compaction - Physical Design - Automation of FPGAs, MCMS VHDL-Verilog-Implementation of Simple circuits using VHDL and Verilog - Design & Testing Tools Commercial VLSI Design Tool
Text Books
1. Algorithms for VLSI Physical Design Automation – Shervani, N.A.
2. Algorithms for VLSI Design Automation – Gerez, S.H.
3. Commercial VLSI Design Tools Documentation – Laboratory
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
Third Semester
VL 304 – VLSI Design Tools
(Effective from the admitted batch of 2010 – 2011)
Department of Systems Design, Andhra University, Visakhapatnam – 530003
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
Third Semester
VL 305 – Cadence Front-End Design Laboratory
(Effective from the admitted batch of 2010-2011)
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
14.
15.
Implementation of logic gates (Basic gates & Universal gates)
Half adder / subtractor
Full adder / subtractor
Logical encoder / decoder
Mux / D-Mux
Logical comparator
Flip-flops (SR, JK, D, T, MS JK)
Binary up-counter, down-counter, and up-down counter using T and D flip-flops
Ring counter using T and D flip-flops
BCD counter using T and D flip-flops
Implementing shift registers (SISO, SIPO, PISO, PIPO)
Implementing fast adders
Implementing serial multipliers, pipelined multipliers
Implementing 8-bit ALU
Implementing traffic light controller
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
Third Semester
VL 306 – Cadence Layout Design Laboratory
(Effective from the admitted batch of 2010-2011)
1.
2.
3.
4.
5.
6.
7.
8.
9.
10.
11.
12.
13.
n-MOSFET I-V characteristics
p-MOSFET I-V characteristics
CMOS inverter layout
CMOS logic gates
CMOS logic comparator
Full adder
Full subtractor
Encoder / decoder
Mux / D-Mux
Flip-flops
Binary counters
Shift registers
Fast adders
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
Fourth Semester
VL 401 – Design and Analysis of ICs
(Effective from the admitted batch of 2010-2011)
Unit-1: Circuit Configuration for Linear IC
Current Sources - Analysis of difference amplifiers with active load - Supply and temperature
independent biasing technique - Voltage references
Unit-2: Operational Amplifiers
Analysis of operational amplifier circuits - Slew rate model and high frequency analysis - Operational
amplifier noise analysis - Low-noise operational amplifiers
Unit-3: Analog Multiplier and PLL
Analysis of four quadrant and variable trans-conductance multiplier - Voltage controlled oscillator Closed loop analysis of PLL
Unit-4: MOS Analog ICs and MOS Switched Capacitance Filters
Design of MOS Operational Amplifier - CMOS voltage references - MOS Power amplifier and analog
switches - Design Techniques for switched capacitor filters - CMOS switched capacitor filters and
MOS integrated active RC filters
Text Books
1. Principles of Data Conversion System Design – Behazad Razavi
2. Analysis and Design of Analog ICs – Grey and Meyar
3. Design of Analog Integrated Circuits and Systems – Laker and Sansen
4. Analog MOS Integrated Circuits – Grey, Wolley and Brodersen
5. Linear Integrated Circuits – Chaudhury and Jain
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
Fourth Semester
VL 401 – Design and Analysis of ICs
(Effective from the admitted batch of 2010 – 2011)
Department of Systems Design, Andhra University, Visakhapatnam – 530003
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
DSP & ESD
Electronics & Instrumentation
Fourth Semester
VL 402 / DS 402 / EI 402 – EMI and EMC in Design
(Effective from the admitted batch of 2010-2011)
Unit-1: EMI Environment
Sources of EMI, conducted and radiated EMI, Transient EMI, EMI – EMC definitions and units
parameters. EMI Coupling Principles conducted, Radiated and Transient Coupling, Common
impedance Ground Coupling, Radiated Common Mode and Ground loop coupling, Radiated
Differential mode coupling, Near field cable to cable to coupling, Power mains and power supply
coupling.
Unit-2: EMI Specification / Standards / Limits
Units of specification, Civilian standards, Military standards.
EMI Measurement
Open area test site (OATS) – OATS measurements – Measurement of RE, RS, Test site – Antennas
– Measurement precautions – TEM cell – Measurements using TEM cell – Reverberating chamber.
Unit-3: EMI Control Techniques
Grounding
Principles – Precautions – Measurement of ground resistance – System grounding for EMC – Cable
shield ground.
Shielding
Shielding theory and effectiveness – Materials – Integrity at discontinuities – Conductive coatingsMeasurements.
Bonding
Shape and material for bond strap – Guidelines for good bonds.
Unit-4: EMI Design of PCB
PCB Traces – Cross talk – Impedance control – Power distribution – Decoupling - Zoning mother
board – Design and propagation delay performance models.
Text Books
1. Principles of Electromagnetic Compatibility – Bernhard Keiser
2. Noise Reduction Techniques in Electronic System – Henry W. Ott
3. Engineering EMC Principles, Measurements and Technologies – Kodali, V.P.
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
DSP & ESD
Electronics & Instrumentation
Fourth Semester
VL 402 / DS 402 / EI 402 – EMI and EMC in Design
(Effective from the admitted batch of 2010 – 2011)
Department of Systems Design, Andhra University, Visakhapatnam – 530003
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
Fourth Semester
VL 403 – VLSI Physical Design
(Effective from the admitted batch of 2010-2011)
Unit-1: VLSI Methodologies
VLSI physical design automation - VLSI design cycle - Physical design cycle - Design styles - System
packaging styles - Die packaging and attachment styles - Design and fabrication of VLSI devices Fabrication of VLSI circuits - nMOS fabrication process - CMOS fabrication process
Fabrication Process and its Impact on VLSI Design
Status of fabrication process - Comparison of fabrication processes - Future of fabrication process SIA road map - Advances in lithography - Innovations in interconnect - Other process innovations Solutions for interconnect issues.
Unit-2: VLSI Design Automation Tools
Algorithms for NP-hard problems - Computational geometry algorithms - Graph algorithms - Matching
algorithms.
Graph Algorithms for Physical Design
Classes of graphs in physical design - Graphs related to set of lines - Graphs related to set of
rectangles - Relationship between graph classes - Graph problems in physical design.
Unit-3: General Purpose Methods for Combinational Optimization
Placement algorithms - Constructive placement - Iterative placement - Partitioning algorithms Kerninghan-lin algorithm
Floor Planning
Terminology and floor plan representation - Optimization problems in floor planning
Routing
Introduction to area routing - Channel routing - Global routing.
Unit-4: Layout Compaction
Design rules - Symbolic representation - Problem formulation - Applications of compaction - Informal
problem formulation - Graph theoretical formulation - Algorithms for constraint graph compaction Longest path algorithm for DAGs - Liao-Wong algorithm - The Bellman-Ford algorithm.
Physical Design automation of FPGAs - MCMs- Implementation of simple circuits using VHDL and
Verilog.
Text Books
1. Algorithms for VLSI Physical Design Automation – Sherwani, N.A.
2. Algorithms for VLSI Design Automation – Gerez, S.A.
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
Fourth Semester
VL 403 – VLSI Physical Design
(Effective from the admitted batch of 2010 – 2011)
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
Fourth Semester
VL 404 – VLSI Circuit Testing and Verification
(Effective from the admitted batch of 2010-2011)
Unit-1: Introduction to Testing
Introduction - Digital and analog testing - Types of testing - Testing equipments - Test economics
Unit-2: Fault Modeling and Simulation
Levels of fault models - Simulation for design verification and test evaluation - Modeling circuits for
simulation - Algorithms for fault simulation
Unit-3: Test Generation
Combinatorial circuit test generation - Sequential circuits test generation.
Unit-4: Analog & Mixed Signal Testing
Memory test - Memory test levels - Memory testing – Definitions - Static ADC and DAC testing
methods - Design for testability - Design for test fundamentals - Built-in self test fundamentals System test and architecture - Future of testing.
Text Books
1. Essentials of Electronic Testing for Digital, Memory and Mixed-Signal VLSI Circuits – Michel L
Bushnell and Vishwani D Agrawal
2. Digital Systems Testing and Testable Design – Abramovici, M., M. A. Breuer and A. D. Friedman
3. Introduction to Formal Hardware Verification – Kropf, T.
4. Principles of Testing Electronic Systems – Samiha Mourad and Yervant Zorian
5. System-on-a-Chip Verification-Methodology and Techniques – Rashinkar, P, Paterson and L.
Singh
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
Fourth Semester
VL 404 – VLSI Testing and Verification
(Effective from the admitted batch of 2010 – 2011)
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
Fourth Semester
VL 405 – Mini-Project Work Dissertation
(Effective from the admitted batch of 2010-2011)
Areas of mini-project work dissertation
1. Digital system design
2. Device Modeling
3. Modeling using MATLAB
4. Digital signal processing
5. Network analysis
6. Network synthesis
7. VLSI technology
8. VLSI signal processing
9. VLSI Design
10. VLSI physical design
11. Design of ICs
12. Analysis of ICs
13. Mixed signal design
14. VLSI testing
15. VLSI verification
16. Antennas
17. Analog circuit design
18. VHDL
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
DSP & ESD
Fifth Semester
VL 501 / DS 501 – FPGA Design
(Effective from the admitted batch of 2010-2011)
Unit-1: Introduction to PLDs
ROMs - Logic array (PLA) - Programmable array logic – GAL - Bipolar PLA - NMOS PLA - PAL 14L 4
- Examples
Unit-2: Programmable Gate Arrays
Xilinx logic cell array (LCA) - I/O Block Programmable interconnect Xilinx 3000 series and 4000 series
FPGAs - Altera CPLDs - Altera FLEX 10 K series PLDs
Unit-3: Placement and Routing
Placement
Min-cut based placement - Iterative improvement placement – Kernighan Lin algorithm – Simulated
annealing.
Routing
Segmented channel routing - Maze routing - Routability and routing resources - Net delays
Unit-4: Verification and Testing
Verification timing verification - Testing concepts - Fault coverage – ATPG - Types of tests - Testing
FPGAs - Design for testability - Recent developments - New architectures - Field programmable interconnect - Configuring logic arrays and prototyping boards - CAD support
Text Books
1. Digital Design using Field Programmable Gate Array – Chan & Mourad
2. Field Programmable Gate Array – Old Field & Dorf
3. Digital System Design with Programmable Logic – Bolton
4. VLSI Engineering – Thomas E Dillinger
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
DSP & ESD
Fifth Semester
VL 501 / DS 501 – FPGA Design
(Effective from the admitted batch of 2010 – 2011)
Department of Systems Design, Andhra University, Visakhapatnam – 530003
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
Fifth Semester
VL 502 – ASIC Design
(Effective from the admitted batch of 2010-2011)
Unit-1: Introduction to ASICs, CMOS Logic and ASIC Library Design
Types of ASICs – Design flow - CMOS transistors - CMOS Design rules - Combinational Logic Cell Sequential logic cell – Data path logic cell - Transistors as Resistors - Transistor Parasitic
Capacitance - Logical effort - Library cell design - Library architecture.
Programmable ASICs, Programmable ASIC Logic Cells and Programmable ASIC I/O Cells
Anti-fuse - Static RAM – EPROM and EEPROM technology - PREP benchmarks - Actel ACT - Xilinx
LCA - Altera FLEX - Altera MAX DC & AC inputs and outputs - Clock & power inputs - Xilinx I/O
blocks.
Unit-2: Programmable ASIC Interconnet, Programmable ASIC Design
Software and Low-Level Design Entry
Actel ACT – Xilinx LCA – Xilinx EPLD – Altera MAX 5000 and 7000 - Altera MAX 9000 - Altera
FLEX - Design systems - Logic Synthesis – Half gate ASIC – Schematic entry – Low-level design
language – PLA tools – EDIF - CFI design representation.
Unit-3: Logic Synthesis, Simulation and Testing
Verilog and logic synthesis - VHDL and logic synthesis – Types of simulation – Boundary scan test Fault simulation - Automatic test pattern generation.
Unit-4: ASIC Construction, Floor Planning, Placement and Routing
System partition - FPGA partitioning – partitioning methods - Floor planning – placement - Physical
design flow - Global routing - Detailed routing – Special routing – Circuit extraction – DRC
Text Books
1. Application-Specific Integrated Circuits –
2. VLSI Circuits and Systems in Silicon – Andrew Brown
3. Field Programmable Gate Arrays – Brown, Francis, Rox and Uranesic
4. Analog VLSI Signal and Information Processing – Mohammed Ismail and Terri Fiez
5. VLSI and Modern Signal Processing - Kung, White House & Kailath
6. Design of Analog - Digital VLSI Circuits for Telecommunication and Signal Processing – Jose E.
France, Yannis Tsividies
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
Fifth Semester
VL 502 – ASIC Design
(Effective from the admitted batch of 2010 – 2011)
Department of Systems Design, Andhra University, Visakhapatnam – 530003
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
Fifth Semester
VL 503 – Low-Power VLSI Design
(Effective from the admitted batch of 2010-2011)
Unit-1: Low-Power VLSI Chips
Charging and discharging capacitances – Basic principles of low-power design – Low-power design
methodology – Logic synthesis for low-power – Sources of power dissipation – CMOS leakage
current.
Unit-2: Power Estimation
Statistical techniques – Estimation of glitching power – Estimation of power dissipation – Modeling of
signals – Probabilistic techniques for signal activity estimation – Delay models – Power dissipation in
domain CMOS – Power estimation at the circuit level – Information based theory approach –
Capacitance estimation.
Unit-3: Probabilistic Power Analysis
Random logic signals – Characterization of logic signals – Continuous and discrete random signals –
Static probability and frequency – Conditional probability and frequency – Word-level and bit-level
statistics – Probabilistic power analysis techniques – Signal entropy
Unit-4: Special Techniques
Power reduction in clock networks – Clock gating – Reduced swing clock – Oscillator circuit for clock
generating frequency division and multiplication – Other clock power reduction techniques – Lowpower swing bus – Charge recycling bus low-power techniques for SRAM – SRAM cell – Memory
bank portioning – Pulsed word line and reduced bit line swing – Design and test of low-voltage and
low-power circuits – Sources of software power dissipating – Software power estimation – Software
power optimization
Text Books
1. Low-Power CMOS VLSI Circuit Design – Kaushik Roy and Sharat C. Prasad
2. Practical Low-Power Digital VLSI Design – Gary B Yeap. K.
3. Logic Synthesis for Low-Power VLSI Designs – Sasan Iman and Massoud Pedram
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
Fifth Semester
VL 503 – Low-Power VLSI Design
(Effective from the admitted batch of 2010 – 2011)
Department of Systems Design, Andhra University, Visakhapatnam – 530003
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
Fifth Semester
VL 504 – Mixed-Signal Design
(Effective from the admitted batch of 2010-2011)
Unit-1: CMOS Analog Circuits
Introduction to CMOS analog circuits - MOS transistor DC and AC small signal parameters from large
signal model - Common source amplifier with resistive load - Diode load and current source load Source follower - Common gate amplifier - Cascode amplifier - Folded Cascode.
Unit-2: Frequency Response
Frequency response of amplifiers - Current source/sink/mirror - Matching - Wilson current source
and Regulated Cascode current source - Band gap reference - Differential amplifier - Gilbert cell - OpAmp, - Design of 2 stage Op-Amp - DC and AC response - Frequency compensation - slew rate Offset effects - PSRR – Noise – Comparator - Sense Amplifier.
Matching
Sources of mismatch - Systematic layout errors - Sizing and ratio strategy - Unit elements and
common - Centroid layout and Random mismatch models.
Unit-3: Data Converters
Data Converter Fundamentals - Analog Versus Discrete Time signals - Converting analog signals to
digital signals - Sample and hold characteristics – Switched capacitor circuits – Switched capacitor
amplifiers – Switched capacitor filters - Data Architectures - DAC and ADC specifications.
Mixed Signal Layout Issues
DAC Architectures - R-2R Ladder Networks - Current steering - Pipeline DAC - ADC Architectures Flash - The two step flash ADC - The successive approximation ADC - RF amplifier – Oscillator - PLL
- Mixer.
Unit-4: Nyquist A/D and D/A Converters; Comparators
Non-linearity specs - Voltage scaling D/A – Settling - Current scaling D/A – Matching – Segmentation
- Charge redistribution - Flash A/D - ENOB vs BW - Sparkle code elimination – Kickback –
Asynchronous - Regenerative band offset cancellation.
A/D Converters and Mixed Signal Layout Issues
Basic principles - Sample & hold characteristics - Practical implementations - SC vs continuous time Z domain model - Single bit vs multi-bit F/B - Higher order - MASH vs single loop and D/A principle.
Text Books
1. Design of Analog Integrated Circuits and Systems – Laker & Sansen
2. Analysis and Design of Analog Integrated Circuits – Gray Hurst, Lewis & Meyer
3. VLSI Design Techniques for Analog and Digital Circuits - Geiger, Allen & Strader
4. CMOS Analog Circuit Design – Allen & Holberg, Oxford
5. CMOS Analog circuit Design – Phillip E. Allen, Douglas R. Holberg
6. RF Microelectronics – Razavi
7. CMOS: Circuit Design, Layout and Simulation – Baker Li, Boyce
8. VLSI for Wireless Communication – Bosco Leung
9. Design of Analog CMOS Integrated Circuits – Razavi, B
10. VLSI System Design: Introduction to NMOS and CMOS VLSI System Design – Mukherjee
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
Fifth Semester
VL 504 – Mixed Signal Design
(Effective from the admitted batch of 2010 – 2011)
Department of Systems Design, Andhra University, Visakhapatnam – 530003
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
Fifth Semester
VL 505 – Mini-Project Work Dissertation
(Effective from the admitted batch of 2010-2011)
Areas of min-project work dissertation
1. Digital system design
2. Device Modeling
3. Modeling using MATLAB
4. Digital signal processing
5. Network analysis
6. Network synthesis
7. VLSI technology
8. VLSI signal processing
9. VLSI Design
10. VLSI physical design
11. Design of ICs
12. Analysis of ICs
13. Mixed signal design
14. VLSI testing
15. VLSI verification
16. Antennas
17. Analog circuit design
18. VHDL
19. VLSI design tools
20. Low-power VLSI design
21. ASIC Design
22. FPGA Design
Department of Systems Design, Andhra University, Visakhapatnam – 530003
M.Sc.(Tech.) Degree Examination
VLSI Design
Sixth Semester
VL 601 – Project Work Dissertation
(Effective from the admitted batch of 2010-2011)
Areas of project work dissertation
1. Digital system design
2. Device Modeling
3. Modeling using MATLAB
4. Digital signal processing
5. Network analysis
6. Network synthesis
7. VLSI technology
8. VLSI signal processing
9. VLSI Design
10. VLSI physical design
11. Design of ICs
12. Analysis of ICs
13. Mixed signal design
14. VLSI testing
15. VLSI verification
16. Antennas
17. Analog circuit design
18. VHDL
19. VLSI design tools
20. Low-power VLSI design
21. ASIC Design
22. FPGA Design