Working Title: Hysteretic Response of CVD Graphene on SiO2/SiC Substrates
Author Info:
Edward Cazalas1, Isaac Childres2,3, Amanda Majcher1, Yong P. Chen2-4, Igor Jovanovic1
1
Department of Mechanical and Nuclear Engineering, Pennsylvania State University, University Park,
PA 16801, USA;
2
Department of Physics, Purdue University, West Lafayette, IN 47907, USA;
3
Birck Nanotechnology Center, Purdue University, West Lafayette, IN 47907,USA;
4
School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN 47907, USA
Abstract:
Graphene field effect transistors (GFETs) were fabricated with chemical vapor deposition (CVD)
graphene deposited onto SiC/SiO2 substrates. The GFET is shown to have sensitivity to broadband
visible light, observed by current-voltage (I-V) measurements. The hysteretic nature of this GFET type
was studied utilizing a developed I-V measurement technique in conjunction with current-time (I-t)
measurements. The developed I-V method accounts for hysteretic changes in graphene’s response to
gate voltages and enables transconductance measurements at a desired fixed gate voltage. Graphene
hysteresis is shown to be consistent with electrochemical p-type doping, and I-t measurements clearly
resolve a transitioning from +h to –e back to h+ carrier types in graphene with a single large change in
gate voltage.
Introduction:
The unique properties of single layer graphene, such as its high electrical conductivity, large
carrier mobility, and ambipolar behavior make it a prime material of study for electrical device
applications1–3. The ambipolarity of response of graphene is manifested by maximum resistivity at a
given external electric field, known as the Dirac point4. Near the Dirac point, the resistance of graphene
is especially sensitive to local changes in electric field, enabling the development of graphene fieldeffect transistors (GFETs) with operational characteristics that are dependent on this unique ambipolar
response5,6.
Hysteretic effects have been widely observed in current-voltage (Isd-Vbg) transconductance
measurements of GFETs, causing the shape of the transconductance curve and the voltage of the Dirac
point to be dependent on direction, speed, and range with which gate voltage sweeps are performed 7–11.
An origin of this hysteresis has been shown to be caused by electrochemical doping of the substrate
material on which graphene is deposited12. The introduction of electrochemical p-type doping may
occur through device fabrication or after exposure to environments containing H2O and O2, or NO213–15.
Electrochemical doping involves electron transfer to or from graphene via a redox reaction:
O2 + 2H2O + 4e- (graphene) = 4OH-. The direction of the reaction is determined by the relative height
of Fermi energy levels of the graphene and the redox solution, the former being controlled by gate bias
and the latter by the density of redox states13,15.
Systematic studies have explored the hysteresis occurring in GFETs on Si/SiO2 substrates7–
by varying the Isd-Vbg sweep parameters. The time evolution of graphene resistance in the
presence of electrochemical species on SiO213,14,17,18, Si/SiO219, and in aqueous solution20 has also been
studied. While previous studies have already examined the hysteresis effect of chemical vapor
deposition (CVD) graphene on Si/SiO221–23 and ferroelectric lead-zirconate-titanate (PZT)24 substrates,
11,15,16
this Letter provides the first insight into the hysteretic nature of GFETs fabricated by CVD of graphene
on SiC/SiO2 substrates. This insight was developed by the use of a time-dependent characterization of
GFET through graphene current vs. time (Isd-t) measurements. To aid in Isd-t measurement analysis, an
Isd-Vbg technique was developed that measures the graphene transconductance while being effectively
kept at a fixed gate voltage. Such studies can provide understanding into the operation of graphenebased devices with hysteretic behavior for memory devices21,24–27, chemical sensing14,17,20,28–31,
photodetectors32,33, and ionizing radiation detectors34.
Experiment:
Graphene was grown on a Cu foil through the decomposition of CH4 in a furnace at 1000 ˚C,
leading to carbon deposition and graphene formation. To transfer the graphene to other substrates, the
samples were spin-coated by PMMA (polymethyl methacrylate) and placed in an aqueous solution of
Fe(NO3)3 (iron nitrate) to etch off the Cu substrate. Afterwards, the graphene with PMMA coating was
retrieved from the solution by the transfer substrate. The PMMA was then removed by acetone and the
sample was rinsed several times by de-ionized water. Graphene field-effect devices were fabricated
using electron-beam lithography. The electrical contacts (5 nm-thick chromium and 35 nm-thick gold)
were fabricated by electron-beam evaporation.
Graphene measurements have been conducted at room temperature by 2-point resistance
measurement, as shown in Figure 1a. 4-point measurements of graphene reveal that contact resistance
was negligible compared to the resistance of graphene samples. An Ametek Model 7270 lock-in
amplifier was used to apply the source-drain voltage, Vsd, and measure the source-drain current, Isd,
passing through graphene. The current is then converted to resistance for plotting. A Keithley Model
2400 source meter applies a voltage between the gold backgate and graphene and measures the leakage
current. The data acquisition system was controlled by a customized LabView code, which also
controls instrumentation. The contact array and the active graphene region used during all described
experiments are shown in Figure 1b. Measurements are performed at room temperature in ambient air.
Graphene’s physical and electrochemical properties are largely influenced by the underlying
substrate and have been previously studied for graphene deposited on a SiO2 layer37,38. In our GFET
design, shown in Figure 1a, the CVD graphene is also deposited on a SiO2 substrate, which is in turn
placed onto a SiC semiconducting substrate. In this design, the electric field experienced by the
graphene is a function of the applied voltage to the backgate and the conductivity of SiC substrate. The
doping species located between graphene and SiO2 capacitively shield the electric field between the
backgate and graphene.
Since SiC is a semi-conductor of band-gap of 3 eV (at 300 K for 6H), its conductivity is
sensitive to photons with λ < 413.3 nm. Photons of these wavelengths are available on the UV end of
broadband visible light. In the absence of illumination by broadband visible light, the SiC substrate is
highly resistive, and a large fraction of the applied backgate voltage, Vbg, drops across the substrate.
The relatively large thickness of the SiC substrate (in our design dSiC = 300 μm) results in a relatively
small electric field (E = Vbg/dSiC in a plate capacitor model). When exposed to broadband visible light,
the SiC substrate becomes partially conductive, increasing the electric field seen by graphene.
Experiments show that the exposure to light can an electric field change sufficiently large to overcome
the capacitive shielding, as evidenced by the presence of Dirac peak in Figure 2. In the absence of light
exposure, the Dirac peak was not observed in the same backgate voltage range. The graphene resistance
then becomes determined primarily by the electric field resulting from charge trapped by the dopands,
causing the Dirac point to shift to very high backgate voltages, outside the range of our experiment, as
shown in Figure 2. Thus, to effectively characterize the GFET resistance in the vicinity of Dirac point
by using moderate backgate voltages, the GFET was exposed to broadband visible light. The Dirac
point voltage, Vd, is dependent on the voltage sweep direction, as evident in Figure 2 and reported in
prior studies8,11,38. The positive values of Vd indicate p-type doping of graphene, and the hysteretic and
doping characteristics in Figure 2 are consistent with electrochemical doping15,25. It would be expected
that for dopant-free graphene with VD = 0 V, the light exposure would not affect Vd. However, in the
absence of light exposure, a substantial broadening of the Dirac peak would occur within the
experimental backgate voltage range used in our experiments.
[ A comparison of the capacitance time constant (τrc) of the SiC GFET to a heavily p-doped Si
GFET shows that exposure to broadband visible light does not make the SiC fully conductive, allowing
it still be used in detection of greater than band-gap radiation. VD in the absence of light is estimated to
be ?V, as is evidenced by the slight upward trend with increasing positive backgate voltages of the flat
gm L
curves of Figure 2. The mobility of graphene was calculated by m =
, where L and W are the
CssVdsW
graphene channel length and width, gm is the transconductance (taken as the slope of the linear section
of the Dirac peak), Vds is the source-drain voltage, and Cbg is the capacitance of the GFET. ] <- perhaps
not needed.
Many studies have been conducted to characterize the dependence of the GFET hysteresis on
sweep speed (V/s)8,9,21,23–25,38. Figure 3 illustrates the underlying cause of this dependence in our
experiment. Graphene resistance fluctuates greatly with time when responding to changes of backgate
voltage. High rates of voltage change were utilized to obtain a better insight into the hysteretic behavior.
For slower changes in voltage, as done in experiment shown in Figure 2, the hysteretic behavior is
partially obscured by graphene’s field effect response to gate voltage. As observed in Figure 3,
graphene resistance eventually stabilizes, reaching an asymptotic value. Stabilization (or relaxation)
requires applying a backgate voltage much longer than the hysteresis time constant, τh. This time
constant is a measure of the period required for the density of redox states to come to equilibrium in
response to a change in electric field by a gate voltage12. By exponential fit of Isd-t response to Vbg = 20 V in Figure 3, τh = 67 s. This is the hysteretic time constant from one fully stabilized state (Vbg = 0
V) to another fully stabilized state (Vbg = -20 V) in our experiment, and is comparable to previous
studies21,25.
A more suitable measurement technique was developed to simultaneously 1) minimize the
measured hysteresis and 2) obtain the transconductance curves for a hysteretic GFET at any given
operating voltage. The technique is based on an Isd-Vbg measurement method that stabilizes graphene
resistance at a backgate voltage between discrete voltage sweep steps. While this Isd-Vbg measurement
method is similar to “pulse” type transconductance measurements8,39–42, this technique was developed
to allow transconductance characterization at any given Vbg that may be desired for GFET operation. It
was empirically determined that this was the amount of time usually required to reach a resistance
minimum following a step change in sweep voltage was 10s, as shown in Figure 6 by the time to
inflexion point ‘b’. A 20 s stabilization time was selected, sufficiently long for graphene resistance to
stabilize, except when there was a significant difference between the sweep voltage and the selected
stabilization voltage. This is illustrated in Isd-t response in Figure 4, which shows that as sweep voltages
become greater than Vbg = 9 V (or at times greater than 890 s), the graphene resistance no longer
stabilizes over the same period. However, this incomplete stabilization does not affect Vd. The
switching of the backgate voltage between sweep and stabilization voltages causes the oscillating
behavior in graphene resistance in Figure 4. A guide to eye curve was traced over Figure 4, which
transects the graphene resistance maxima (left of Dirac point) and minima (right of Dirac point) of the
sweep voltage steps. This curve closely matches the transconductance curve shown in Figure 5 (for -20
V, forward sweep).
Using the described Isd-Vbg measurement method, the transconductance curves for backgate
stabilization voltages of Vbg = -20, 0, and +20 V were measured, and shown in Figure 5. The measured
Vd hysteresis was reduced for all stabilization voltages by use of this measurement method, as can be
seen by comparing Figures 2 and 5. Transconductance curves exhibit the characteristics consistent with
electrochemical p-type doping of graphene, as Vd shifts in the direction opposite of the sweep
direction15,25. The residual hysteresis present when this measurement method is applied was due to the
selected voltage sweep step period being comparable to τh. [Add more to time constant discussion if
add tc plots] The developed Isd-Vbg measurement technique can be used to appropriately account for the
hysteretic response of graphene when used as a sensor. The measured resistance change (signal) can be
correlated to the transconductance curve (i.e. the voltage corresponding to measured resistance) so long
as the transconductance curve had been measured with the sweep step time comparable to that of the
signal.
The features of graphene response in Figure 3 can now be explained with the aid of the Isd-Vbg
measurement method. An expanded view of Isd-t response with backgate voltage shift of Vbg = -20 V to
0 V is provided as an example in Figure 6. The inset figure displays transconductance curves stabilized
at Vbg = -20 V and 0 V (forward sweeps). There are two key features in Isd-t response to a change in
backgate voltage observed in our GFET. The first feature (a-b) is dominated by the capacitance formed
by the backgate and graphene. The slow response speed of our GFET allowed the Dirac point to be
distinctly observed between times a and b, following a change in backgate voltage. As the Vd point is
crossed, the graphene switches from h+ to e- carrier type. In related experiments we conducted, the
transient occurrence of the Dirac point could not be observed in exfoliated graphene on doped Si due to
the relatively small capacitance that results in fast device response, similar to obervations by Martínez
et al.20 and Wu et al.28 As evidenced in Figure 6, inflection point ‘b’ has a minimum resistance that
appproximately equals the resistance at Vbg = 0 V in the transconductance curve stabilized at Vbg = -20
V. The second feature, occurring between points c and d in Figure 6, arises from the trapping of
electrons from graphene in the underlying dopant species through redox reactions, causing the eventual
p-doping of graphene. During this time, Vd slowly shifts from -5 V to 7 V, corresponding to the Dirac
points measured in transconductance curves stabilized at Vbg = -20 V and 0 V, respectively, in Figure 5.
Within this time, the graphene reverts back to h+ from e- carrier type. Graphene resistance in Figure 6
eventually approaches the resistance at Vbg = 0 V for a transconductance curve stabilized at Vbg = 0 V
in Figure 5. In retrospect, each voltage sweep step of Figure 4 can be explained similarly for Vbg > Vd.
When Vbg < Vd, the Dirac point is not crossed and therefore not observed in Isd-t measurements. It is
expected that performing an Isd-t measurement in the backward direction (Vbg = +20 V to 0 V to -20 V)
will maintain h+ carrier type in graphene, as the Dirac point is never traversed.
Conclusion:
The hysteretic nature of CVD graphene on SiC/SiO2 substrates was explored and found to be
consistent with electrochemical doping through redox reactions. Our GFET was also found to be
sensitive to broadband visible light and the transconductance curves were measured both in the
presence and absence of illumination. The hysteretic behavior was studied with complimentary Isd-Vbg
and Isd-t measurements, which reveal a response consisting of a fast and a slow component. The fast
component is attributed to GFET capacitance, while the slow component is attributed to electron
transfer through redox reaction. Graphene carrier type was observed to switch from h+ to e-, and back
to h+ following a relatively large positive change in backgate voltage. To aid the understanding and
analysis of the hysteretic Isd-t response, an Isd-Vbg measurement technique was developed that accounts
for the graphene hysteresis. This technique will enable the characterization of hysteretic GFET
response while at a desired operating gate voltage, useful in signal detection applications that rely on
modifying the local electric field experienced by graphene.
Acknowledgements:
This work was funded by the Department of Homeland Security (DHS) and the National
Science Foundation (NSF) through the Academic Research Initiative (ARI) (2009-DN-077-ARI036-02)
and by the Defense Threat Reduction Agency (DTRA).
Vsd
Isd
1 µm
Graphene
Insulator – SiO2
S
1 atom
300 nm
4 µm
Semiconductor – SiC
Backgate – Au
300 µm
D
Vbg
40 nm
a)
b)
Figure 1: a) Cross section of our GFET design that consists of graphene on insulator (SiO2) on a
semiconductor (SiC) with ohmic electrodes and backgate. Voltage, Vsd, measures graphene current, Isd,
in response to a backgate voltage, Vbg. b) SiC GFET as viewed from top. Gold electrodes are visible
with source (S) and drain (D) indicated. Dotted box represents graphene area of 4 μm2.
Figure 2: Transconductance curves (Isd-Vbg) with GFET in illuminated and unilluminated conditions.
The sweeps are performed with backgate voltage changing in ‘forward’ and ‘backward’ directions,
indicated by the arrows. A sweep speed of |dVbg| = 1 V/s was utilized. Hysteresis of Dirac points of 9 V
was observed when GFET is illuminated.
Figure 3: Time dependent hysteretic graphene response (Isd-t) from instantaneous change in backgate
voltage for Vbg = -20 V (0 – 300 s) to 0 V (300 – 600 s) to +20 V (600 – 800 s). Graphene resistance is
monitored for five minutes at each voltage. Vbg = 0 V at the beginning of the test.
Backgate (V)
8500
−19−17−15−13−11 −9 −7 −5 −3 −1
1
3
5
7
9 11 13 15 17 19
Resistance ( )
8000
7500
7000
6500
6000
5500
5000
4500
0
200
400
600
Time (s)
800
1000
1200
Figure 4: Time dependent graphene resistance measurement (Isd-t) for a stabilization voltage of Vbg = 20 V (forward sweep). Each grid spacing is composed of 30 s, the first 10 s was used to apply the
sweep voltage, while the last 20 s was used to allow stabilization at Vbg = -20 V. The transconductance
curve was traced where data points were recorded for Isd-Vbg measurements, matching the Dirac peak
given in Figure 5 for Vbg = -20 V (forward sweep).
Figure 5: Transconductance curves (Isd-Vbg) with stabilization at Vbg = -20 V (red), 0 V (black), and
+20 V (blue). The vertical dotted lines represent voltage of stabilization/operation respective to the
same color transconductance curve. The Dirac peaks are located above the stabilization voltages. The
square and star data points represent forward and backward sweeps, respectively. Hysteresis of the
Dirac point is reduced to 1, 2, and 3 V for Vbg = -20 V, 0 V, and +20 V, respectively.
8500
7500
c
b
7000
d
c
8500
d
8000
7500
6500
6000
5500
Resistance ( )
Resistance ( )
8000
7000
6500
6000
5500
a
300
5000
a
4500
−20 −16 −12
340
−8
b
−4
0
4
8
Backgate Voltage (V)
380
12
16
420
20
460
500
540
580
Time (s)
Figure 6: Expansion of Figure 3 Isd-t response with backgate change of Vbg = -20 V to 0 V. Inset
graphically elaborates on the features observed in the time dependent response and is composed of the
transconductance curves stabilized at Vbg = -20 V and 0 V (forward sweep) for left and right Dirac
peaks, respectively.
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