Circuits, Devices, Networks, and Microelectronics
CHAPTER 14. DC-DC SWITCHING CONVERTERS
14.1 INTRODUCTION TO POWER CONVERTERS
Converters are the most common form of power electronics. They take one form of electrical power and
convert it into another. The desired context is that a converter will convert with no loss of energy, which
is a probably something of a ‘faith’ assumption but is also a reasonable starting point.
I 1V1  I 2V2
(14.1-1)
AC-AC conversion is a case-in-point. It is achieved by inductive coupling, which is simple and direct
and well suited to the time-varying context of an AC current. The ideal transformer makes use of
equation (14.1-1) via the assumption that the transformer constant k = 1. AC-AC converters are the
principal means by which power is tapped from the power grid at frequency of either 50Hz or 60Hz,
depending on what part of the world is being considered.
AC-DC conversion from AC (= bipolar) waveform to DC (= unipolar) is also relatively simple. It is
accomplished by transformer-coupled diode topologies that rectify (convert) the AC waveform to halfwave, full-wave, or three-phase outcomes. These waveforms are then improved by backend circuits that
yield a fairly respectable fixed level DC with relatively little ripple.
DC-DC conversion is accomplished by high-speed switches, usually in the form of power transistors.
These are categorized as ‘switching power supplies’. A variant of these topologies is the DC-AC
converter, also identified as an ‘inverter’. Given the technology advances in semiconductor devices the
DC-DC switching technique has taken the lead over the older linear technologies since it offers many
advantages in adaptability, size, weight, and efficiency.
14.2 THE DC-DC DOWNCONVERTER
There is no power dissipation in an ideal switch since either Vswitch = 0 (when the switch is closed) or
Iswitch = 0 (when the switch is open). So, for a converter based on ideal switches, equation (14.1-1) is an
exact relationship.
DC-DC converters are designed as either a ‘down converter’ or an ‘up converter’. The down converter is
one where the voltage V2 at the output (load) is lower than the voltage V1 at the source end of the
converter. The basic down converter topology is represented by figure 14.2-1 and consists of a series
switch and a shunt switch, with drop-down topology not unlike that of a voltage divider except with
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switches. However as a caveat, the two switches must be complementary in order to satisfy equation
(14.1-1). The 12V - 9V example of Figure 14.2-1(a),(b),(c) conveys the context and concept.
Figure 14.2-1(a) and (b). Basic down converter topology. 12V - 9V example
Figure 14.2-1(c). (I,V) waveforms for the 12V - 9V down converter and their time-averaged levels.
As represented by the figure, source voltage V1 and load current I2 are assumed to be fixed. Current I1
and voltage V2 are then time-averaged quantities, as represented by
V2  V2 (t )  DS V1
(14.2-1a)
I 1  I SW1 (t )  DS I 2
(14.2-1b)
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where x(t ) indicates time averaging and DS represents the duty cycle of the series (connecting) switch..
Equations (14.2-1a) and (14.2-1b) are exactly consistent with equation (14.1-1).
It should also be self evident as well as affirmed by equation (14.2-1a) that voltage V2 is defined by the
duty cycle DS of series switch. And it should also be evident that current I2 will remain constant only if
shunt switch SW2 toggles on when SW1 toggles off.
For the 12V - 9V converter of figure 14.2-1 the duty cycle for the series switch (SW1) must then be DS =
9.0/12.0 = 0.75. And the duty cycle of the shunt switch SW2 is then = (1 – DS) = 0.25.
As is also represented by figure 14.2-1(c), that the V2(t) and I1(t) associated with the naked switches
would suffer from an unacceptable degree of ripple. It is therefore in order to temper them by means of
capacitance and inductance components. Since L and C components are also (ideally) lossless then the
assumption of equation (14.1-1) is still completely intact.
The advantage of the switching converters is that the switches are transistors, which can be toggled at
frequencies sufficiently high so that capacitances and inductances of relatively modest size will suffice to
keep the ripple low. These elements also are energy storage elements. Capacitances store voltage, for
which VC = V1 is kept relatively constant. Inductances store current, which keeps the current IL = I2
relatively constant. Which is exactly the premise that defines equations (14.2-1a) and (14.2-1b).
The effect of the L and C components are realized by
dV 
I
dt
C
(14.2-2a)
dI 
V
dt
L
(14.2-2b)
So it should be no great revelation that the larger the values of C and L, the smaller the ripple. Take note
that there are also time constants at each end of the converter:
 1  R1C
(14.2-3a)
 2  L R2
(14.2-3b)
where R1 is the resistance of the source and R2 is the resistance of the load. Neither is represented by
figure 14.2-1 but do play a role in the ripple considerations.
Equation (14.2-2b) also emphasizes that an emf (voltage) is induced across the inductance for any change
in current. This effect is represented by figure 14.2-2, which indicates how an interruption of current flow
by a switch induces an emf of magnitude that can easily cause an arc break-over of the switch gap. In the
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early part of the century, when unwary experimenters would hook up a DC induction motor to a simple
knife switch, a panicky yank on the switch to shut off the motor would create a dangerous arc, usually
sufficient to melt parts of the switch. In modern circuits, this effect merely annihilates the switching
transistor. For this reason many circuits containing an inductance include a ”snubber” to shunt
destructive overvoltage spikes and arcs.
Figure 14.2-2. Induced voltages in an inductance due to current interruption.
When a switch opens it is equivalent to a transition of RSWITCH = very small to RSWITCH = very large. In this
respect the end of the switch connected to the inductor will be driven low by the flow of current. This
response is of operational advantage to converter circuits because the action of opening the controlled
switch will act to forward-bias a reactive (diode switch) element as is illustrated by figure 14.2-3
Figure 14.2-3. Inductive complementary switching by means of a diode ‘switch’ being toggled
by the back emf of the inductance.
The diode switch element is toggled by the emf induced across the inductance in a complementary
response to the action of the controlled switch. The controlled switch is usually a transistor.
The down converter (a.k.a. direct downconverter) topology is therefore of the form represented by figure
14.2-4
Figure 14.2-4. The direct down-converter topology.
As represented by the figure of the down converter the input voltage V1 is also that which is stored on
capacitance C. The capacitance is partially discharged by a current of magnitude I2 during the interval in
which SW1 is on.
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Figure 14.2-5. Charge and discharge current.
and so the drop in voltage on the capacitance over the interval from 0 to DST is then
1
VC  V1 
C
DS T
 I
2
 I 1 dt 
0


1
I 2  I1 DS T  I1 1  I1 T
C
C  I2 
since DS I2 = I1. The ripple in source voltage is then
VC  V1 
I1
1  DS T
C
 I1 R1 
1  DS T
1
Figure 14.2-6 illustrates the ripple on voltage V1 due to the charge flux.
Figure 14.2-6. Ripple on VC = V1 due to charge/discharge of capacitance.
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(14.2-4)
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The amplitude of this ripple can also be evaluated by evaluating VC when SW1 is open, for which the
capacitance is charged up by a flow of current I1 onto the capacitance. This current causes an increment
of voltage across C of value
VC  V1 
1
C
T

I 1 dt 
DS T
I1
1  DS T
C
(14.2-5)
and is the same as that of equation (14.2-4), as expected.
Similarly, a ripple in the current I2 will occur as the inductance discharges through the load while SW2 is
closed, i.e.
I 2 
T
V
1
V2 dt  2 1  DS T

L DS T
L

V2 1  DS T

R2
2
(14.2-6)
This ripple will induce a corresponding ripple in V2, i.e.
V2  I 2  R2
(14.2-7)
EXAMPLE 14.2-1: A VB = 13V source with internal resistance RB = 1.2 is used to supply 5V to an RL
= 2.5 load. It is switched by a clock at fs =50 kHz.
(a) What are the converter values I2, V1, and I1 and what duty cycle DS is required?
(b) What minimum values of L and C are needed to keep the ripple at the output and input to less
than 5%?
Figure 14.2-7: 13V-to-5V direct converter operating at fs = 50 kHz.
SOLUTION: I2 = V2/R2 = 5/2.5 = 2A
PL = IL x VL = 2 x 5 = 10W
Assuming V1 x I1 = V2 x I2 = 10 W, and I1 = (13 – V1 )/RB, we get the quadratic:
V1 x (13 - V1) = 10 x 1.2
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which has solutions V1 = 12.0 and V1 = 1.0. Only the solution V1 = 12.0V makes sense since the other
solution is less than V2 (= 5V). For this value, we then get:
I1 = (13 – V1 )/RB = 0.833A
The duty cycle DS is then: DS = V2 / V1 = 0.417
The ripple current at the output is, from equation (14.2-6),
I 2  .05  2 
1.0
 5.0  (1  0.417)  20 s
L
where T = 1/50kHz = 20 s. The inductance needs to be (at least) L  5.0  0.583  20u
= 583H
0.05  2
Similarly, from equation (14.2-4)
V1  .05  12 
1
 0.833  (1  0.417)  20s
C
from which the capacitance will need to be (at least) C  0.833  0.583  20u
0.05  12
= 16.2F
If the topology of figure 14.2-4 is framed in terms of a source consisting of VB and RB and a power level
PL to the load, the lossless condition I1V1  I 2V2  PL translates to
V1 V B  V1   PL R B
which has solution
V1 
VB
2

1  1  4 PL R B

V B2





(14.2-8)
where only the positive root is valid, required in order that V1 > V2.
14.3 THE DC-DC UPCONVERTER
The topology represented by figure 14.2-4 is also called the down converter or buck converter since it
‘bucks’ the voltage down to a lower output level V2 < V1 . It has a sister topology that uses the same
principles, called the boost converter or up converter for which V2 > V1, represented by figure 14.3-1.
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Figure 14.3-1. The direct converter ‘boost’ topology.
Much of the action identified for the down converter applies to the up converter. The inductance will
store energy in the form of current, and when SW1 is toggled off, then SW2 will be toggled on because
the current I1 through the inductance will not be denied without a fight and has to go somewhere. The
current stored in the inductance during the first part of the duty cycle will toggle SW2 in the same way as
it did for the down converter by induced emf and flowing into the right-hand side of the circuit at a higher
voltage V2 > V1.
The controlled switch, SW1, which is a shunt switch, has duty cycle DP . Current through the diode
(series switch) results only when the controlled switch is toggled off. It has duty cycle DS = 1 – DP.
The current through the diode is therefore
I D  I 2  DS I1
(14.3-1)
And since we assume that the circuit is ideal and lossless, for which I2V2 = I1V1, then equation (14.3-1)
identifies voltage V2 as
V2  V1 DS
(14.3-2)
Since DS is always less than 1, then V2 > V1, and the converter therefore ‘boosts’ the voltage.
The voltage across capacitance C is VC = V2. Compare this condition to the down converter for which V1
was that that was across capacitance C. Equation (14.3-2) is the same as equation (14.2-1a) with the
subscripts flipped.
This is no coincidence, of course. The topologies are the same, except that figure 14.3-1 is a right-to-left
flip of figure 14.3-4. Otherwise the only difference is that the shunt switch is now the controlled switch
and the series switch is now a reactive switch.
Analysis is therefore entirely the same as for the down converter except that subscripts are interchanged.
And the ripple for the voltage across the capacitance and the current through the inductance are the same
as (14.2-4) and (14.2-6), except that the subscripts will be interchanged if we retain the orientation
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nomenclature of subscript 1 at the input and subscript 2 at the output. A comparison is represented by
example 14.3-1.
EXAMPLE 14.3-1: Warrior-brand combat underwear uses a muscle electrostimulation (ESM) unit
which requires 72V at 1A to operate in the superman mode. If it is supplied by a 9V battery belt capable
of supplying 50A of short-circuit current, determine (a) converter values V1, and I1 and duty cycle DP of
the controlled switch, (b) values of L and C needed to keep voltage ripple at the output and current ripple
of the input to less than 2%, assuming that the circuit is toggled at switching frequency fs = 50 kHz.
SOLUTION: (a) The output requirement is P2 = PL = I2 V2 = 1.0A × 72V = 72W.
Assuming that the converter is approximately lossless, I1V1 = I2V2.
In this case we have V1 = VB – I1R1, where VB = battery voltage = 9V and R1 = RB = 9V/50A = 0.18.
Therefore
(V B  I 1 R B ) I 1  P2  72
which, with values is of the form
(9  0.18 I 1 ) I 1  72
which has solutions I1 = 10A and 40A. Although both solutions will work, I1 = 10A is the more
reasonable one, and will correspond to
V1 = 7.2V
and DP = 1 – I2/I1 = 0.9
(b) For ripple of less than 2%,
V2 = VC = .02 × 72 = 1.44 V
According to equation (14.2-4)
C
I1
1  DS T
VC
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Take note that DP and (1 - DS) are the same, since both are the fraction of the cycle for which the two
sides are not conjoined. For the boost converter I1 must be replaced by I2 since I2 is the current flowing
from the capacitance to the load = 1.0A, so that
C
1.0
 (0.9  20 s)
1.44
= 12.5F
where we have used T = 1/fs = 20s.
Similarly for a 2% ripple in input current and evaluating for the condition that SW1 = ON (and for which
the two sides are disconnected) equation (14.2-6a), with the orientation subscripts flipped, then gives
1
I 1  I L  .02  10   (7.2  (0.9  20 s))
L
and which gives L = 648H
The topology of figure 14.3-8 suggest the usage of I1V1 = I2V2 = PL as a quadratic equation of the form
I1 (VB  I1 RB )  PL
for which the required solution (negative root) is
I1 
VB
2 RB

1  1  4 PL R B

V B2





(14.3-3)
Synopsis: For the direct converter (whether up or down), equations (14.2-8) and (14.3-3) identify the
electrical characteristics at the input port as defined by the load and the source. If a little fun algebra is
applied to the product of equations (14.2-8) and (14.3-3)
I 1  V1 
VB
2RB

1  1  4 PL R B

V B2


V B2
4RB
 VB

 2


1  1  4 PL R B

V B2

 
4 PL R B
1  1 
V B2
 








= PL
(14.3-4)
Which is exactly the same as equation (14.1-1). The converter use the switching action to pass energy
between energy storage components L and C, for which
for downconverter:
V1 = VCX
(14.3-5a)
for upconverter):
I1 = ILX
(14.3-5b)
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where VCX is the voltage across the capacitance and ILX is the current through the inductance. The
inductance also induces the emf (voltage) necessary to toggle the reactive (diode) switch.
In order to avoid the nomenclature question about orientation subscripts, it is also a better option to restate
ripple denoted by equations (14.2-4) and (14.2-6a) as
VCX 
I CX
1  DS T
C
(14.3-6a)
I LX 
VLX
1  DS T
L
(14.3-6b)
where current ICX is that which flows from the capacitance and voltage VLX is that induced across the
inductance. The part of the duty cycle for which the two sides of the converter are momentarily
disconnected relates only to the series switch, for which the
It is a also practical to express equations (14.3-6a) and (14.3-6b) in terms of the time constants associated
with the reactive elements. Regardless of the orientation of the direct converter, whether up converter or
down converter, time constant CX = RCXC and LX= L/RLX may be defined, for which RCX is the resistance
in the side of the circuit having the capacitance and RLX is the resistance in the side having the inductance
. Using these identifications the ripple equations take the form
VCX
1

t (off )
I CX RCX  CX
(14.3-7a)
I LX
1

t (off )
VLX RLX  LX
(14.3-7b)
Where t(off) is the part of the duty cycle for which the series switch (with duty cycle DS) has toggled off.
In the case of the direct-down converter topology, the resistance in the capacitance path corresponded to
RB and the resistance in the inductance path corresponded to RL. Consistent with equations (14.3-5) the
current I1 corresponds to ICX and current I2 corresponds to ILX. Take note that VCX  I CX RCX for the down
converter since VCX is a node voltage at the input port and ICXRCX is the voltage drop across RCX = RB.
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14.4 THE DC-DC INDIRECT (UP/DOWN) CONVERTER
Another topology is the indirect converter represented by figure 14.4-1. This topology can be either an
‘up’ converter or a ‘down’ converter.
Figure 14.4-1. The indirect (buck-boost) converter topology.
If we acknowledge that the time average of voltage over the inductance must be zero, then
V1 DT  V2 (1  D)T  0
so that
V2
D

V1 1  D
(14.4-1)
where D is the duty cycle of the controlled switch and T is the period of the cycle. Depending on the value
of D, V2 can be either greater or less than V1. We also note that the average capacitance current must be
zero, in which case,
I 2 DT  I 1 (1  D)T
which is the same as
I2 1 D

I1
D
(14.4-2)
This result just confirms that the (ideal) net power going into the converter should be zero, assuming that
the converter is approximately lossless.
14.5 LOSS ANALYSIS FOR DC-DC CONVERTERS
The reality of the DC-DC converter is that it is not lossless since some power is dissipated in the
switching components themselves. The context is represented by figure 14.5-1. The switches are
semiconductor devices. Although considerably faster than electromechanical switches these components
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will have finite turn-on and turn-off times. They will also have a finite voltage drop VON across the switch
when it is conducting. Significant power dissipation occurs. The principle is represented by figure 14.5-1.
Figure 14.5-1: Power dissipation in the switches.
In a quasi-ideal context the switching transition can be represented as an approximately linear transition
over the interval (0 < t < tON) as represented by Figure 14.5-8. Consequently
I (t )  I ON 
t
t ON
and

t
V (t )  VOFF  VON 1 
 t ON

  VON

The power dissipated in the switch during transition is the time-average P(t ) over the switching
interval 0 < t < tON for which
1
P(t ) 
T
tON

0
I (t )V (t )dt 
t  1 1 VON 
 
 I ON VOFF
T  6 3 VOFF 
(14.5-1)
where t is the transition time (= either tON or tOFF) and T = 1/fS, with fS = switching frequency.
Equation (14.5-1) is the same for either the ON-OFF or the OFF-ON transition.
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If you examine the down converter and up converter topologies and their operation, the current ION that is
passed by the switches when they are ON is always the current through the inductance. Likewise the
voltage VOFF across a switch when it is OFF is always the voltage across the capacitance. In the context
of energy being transferred from one type energy storage element to another it should be no surprise that
they also directly define the electrical quantities for the two switches.
Furthermore, the power dissipated when a switch is ON is
 DT  t ON 
PD (ON )  I ON VON  

T


(14.5-2)
where D is the duty cycle for the switch, whether it be DS or DP.
Turn-on and turn-off times tON and tOFF for a semiconductor switch involve more overhead than
represented by figure 14.5-1. They are functionally related to the levels of current and voltage, since
these switches must usually be ”charged up” for minority-carrier injection or if they have a drift region it
must be depleted before ceasing to conduct. For power transistors and power diodes the transition times
tON and tOFF are therefore assumed to be on the order of s and these response times are the
fundamental limit to the switching speed fs.
Semiconductor devices will also suffer a finite voltage drop across the conduction path, particularly for
devices that are designed to accommodate higher level voltages. These may on the order of 1 to 6V for a
power BJT in the ‘ON’ state. A power diode will have a voltage drop on the order of 0.6V to 2.0V. For
lower voltage converters as represented by examples 14.2-1, and 14.3-1 common off-the-shelf power
BJTs and diodes may be employed, for which the ‘ON voltage’ voltage drop across the devices should be
less severe.
EXAMPLE 14.5-1: Assume that the controlled switch (= BJT) of example #14.2-1 has VCE (on) = 1.0V,
and that the diode has VD(on) = 0.6 V. Assume that tON = 1.0s = tOFF for both devices. Determine
the power dissipated in the switches.
SOLUTION: The switching frequency fS = 50kHz, for which T = 1/fS = 20s. From the example it was
determined that I2 = IL = ION = 2A and V1= VC = VOFF = 12V. From equation (14.5-1) the power
dissipated during switch transitions is then
PD1 (transition )  2.0  12 
1.0s  1.0s  1 1 1.0 
 

20s
 6 3 12.0 
PD 2 (transition )  2.0  12 
1.0s  1.0s  1 1 0.6 
 

20s
 6 3 12.0 
400
= 0.467W
= 0.44W
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The power dissipated during the time when the switches are ON is
PD1 (ON )  2.0 A  1.0V  
(0.417  20s)  1.0s
20s
= 0.733W
PD 2 (ON )  2.0 A  0.6V  
(0.583  20s)  1.0s
20s
= 0.64W
Therefore the power dissipated budget due loss in the switches is
PD1 (SW1)  PD1 (trans)  PD1 (ON )
= 1.2W
PD2 (SW 2)  PD2 (trans)  PD2 (ON )
= 1.08W
Take note that each switch has two transitions during a toggle cycle.
This loss represents a total PD of 2.28 W. Since the power load requirement was 10W, then for a more
accurate assessment it would be appropriate to include this power loss into the analysis. And then it
would be necessary that duty cycle DS be increased in order to compensate for the loss in the switches.
The process then becomes iterative. If an iteration is carried back and forth between examples 14.2-1 and
14.5-1 using the modification
I 1V1  I 2V2  PD
with PD = PD1 + PD2 and a repeat of the analysis, we find that the duty cycle must be increased to DS =
0.426. And with this change we also find that V1 decreases to 11.75 V.
The change in the duty cycle D due to the power loss in the switches is usually minor. But the analysis
does acknowledge that we need to have a BJT and a diode capable of dissipating approximately 1.2W and
1.08W, respectively, each of which should then be assessed for thermal de-ratings, safety margins, and
the use of heat sinks.
As a rough assessment, and allowing for safety margins and de-rating via the heat sinks, this converter
can probably be constructed using a 5W power transistor and a 5W diode to support the 10W load with
circuit efficiency 81%.
401
Circuits, Devices, Networks, and Microelectronics
PORTFOLIO and SUMMARY
Direct converter
Ideal:
I 1V1  I 2V2
V1 
VB
2

1  1  4 PL RB

VB2





I1 
VB 
4P R
1  1  L2 B
2 RB 
VB




Down converter
Ripple
VC 
I L 
I Cx
1  DS T
C
VLx
1  DS T
L
Up converter
Non-ideal DC-DC converter:
PD (transition ) 
t  1 1 VON 
t  1 1 VON 
 
 I ONVOFF   
 I LxVCx
T  6 3 VC 
T  6 3 VC 
 DT  t ON 
PD (ON )  I ON VON  

T


Indirect Converter
V2
D

V1 1  D
I2 1 D

I1
D
Thermal:
TJ  T A   JA PD
 JA   JC   CS   SA
 JC  TJ (max)  25 PD (rated )
402
Circuits, Devices, Networks, and Microelectronics
Simulation exercises results
1.
12V- 9V down converter
2.
9V - 45V up converter
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Circuits, Devices, Networks, and Microelectronics
404