ECE194J Power Electronics
Lab 1: Basic Measurements with Switch-Mode DC-DC Converters
Equipment
Linear Technology Demo circuit 392A-B, High Efficiency Dual Regulator, built with the LTC3728EUH
controller. Schematic, bill of materials, and description of the test circuit and data sheet for the
controller are available at the course web site, or at www.linear.com.
DC power supply, 7V to 24V up to 5A
Oscilloscope and probe
Decade resistor box, 200W rating.
Precision meters for measuring input and output DC voltage and current.
Preparation
Simulate the circuit with SPICE. A simulation circuit for the LTC3728 controller is available at
http://www.linear.com/product/LTC3728#simulate
Notice that the simulation circuit is for
“Input 12V Outputs: 2.5V @ 10A and 1.2V @ 10A, Fswitch = 400kHz”.
The 392A-B demo circuit, on the other hand, produces outputs of 5.0V @ 4A and 3.3V @5A at 250kHz or
550kHz (switch selectable, plus a 3rd option – 400kHz – if the switch is open). The external components
used in the simulation are also different from those on the demo board. Referring to the schematic and
bill of materials on pages 4 and 5 of the Quick Start Guide/Manual for the 392 demo board, modify the
simulation file to match the demo board. Particularly important are the external MOSFETs Q1 – Q4 and
diodes D1-D4. [D3 and D4 are actually integral in the FDS6982.] If SPICE models are not available either
in the LTspice libraries or from the manufacturers, then modify the existing models to match the onresistance, gate charge, etc. from the data sheets. Also important are the series resistance values of L1
and L2, and of the filter capacitors C3,4,10, and 11.
Notes:
1. See the comment on the simulation schematic (LT3728.asc) regarding Run S S capacitors C7 and
C8. Leave these at the lower values for ease of simulation.
2. The U1 signal names given on the demo-board schematic are for the LTC1628, which is more or
less pin compatible with the LTC3728. Refer to the LTC3728 data sheet to see the correct pin
functions for a given pin number. The PLLFLTR input, pin 2, for example controls the switching
frequency and reflects the status of jumper JP3 on the demo board.
3. The input voltage range for the demo circuit is 7-24V, not 5-24V as indicated on the PCB itself.
4. The steady state function in LTspice only works if both sides of the LTC7328 are running
(evidently). Otherwise the simulation runs to the time limit given in the .tran statement.
5. Disable whichever output is not being analyzed by adding a wire to short the appropriate Run/S
S input to ground. This is equivalent to moving the Run jumper on the demo board to the 0
position.
6. Diodes D1 and D4 (PCB reference designations) do not actually exist on our PCB. Q2 of the
FDS6982 includes a Schottky diode.
Efficiency sweeps. The efficiency of a converter is not a number but a family of curves. We will
generate a few representative efficiency curves for the 5.0V side of this converter. You can find
efficiency either with the LTspice built-in efficiency report, or by using waveform math. In the latter
case you will need the average current from the input (V1) (why not rms?). Under Help Topics in
LTspice, search for rms and/or waveform arithmetic to learn how to get the average of a waveform. Be
sure the screen shows a significant, and nominally integer, number of cycles from the steady-state
portion of the simulation when finding an average.
Hint: to use the efficiency-report method, the load must be a current source. Make it piecewise linear
(PWL) with a small initial value, like 100mA, and then pulse it to the desired load condition after the
output has settled to 5.0V (about 700us).
With the simulation file modified to match the demo board, configure it to operate the 5.0V output
only, at a frequency of 550kHz. This corresponds to the following jumper settings on the demo board
JP6/RUN2=0
JP5/FCB=0
JP4/STBY=1
JP3/FSET=1
JP2/FLTCPL N/A
JP1/RUN1=1
Run transient analyses and determine efficiency of the 5V output for Vin= 7V, 12V, and 24V, and for load
currents of 20%, 40%, 60%, 80% and 100% of full load (15 points all together). Tabulate the data and
graph efficiency vs load current for each value of Vin.
With the input at 24V and the load at 20% of full, repeat the analysis with the switching frequency at
250kHz (JP3=0) and ~400kHz (JP3=open). Verify the switching frequency for these runs. Tabulate these
two results together with the previously run case of fs=550kHz/Vin=24V/load=20%. Calculate power
loss and graph loss vs switching frequency for these three points.
Either print out the schematic and quick-start guide for the demo board or take the pdf file for viewing
during the lab. Likewise for at least the pin-out page from the LT3728 data sheet.
Lab Procedure
Set the jumpers on the demo board as follows:
JP6/RUN2=1
JP5/FCB=0
JP4/STBY=1
JP3/FSET=1
JP2/FLTCPL N/A
JP1/RUN1=1
If the DC power supply has an adjustable current compliance, set it to 0.5A as a precaution. Set the
supply to 12V and connect the supply and meters to the Vin terminals as shown in figure 1 of the quick
start guide (reproduced below). We won’t load both sides at the same time, so a single load is
sufficient. With a meter verify that the output voltages are 3.3V and 5.0V. With the oscilloscope
measure the switching frequency and duty cycle of both switching nodes (the solder pads of L1 and L2
are convenient places to probe).
If operation seems correct, increase the power-supply current compliance to 5A. Set the variable load
resistor to a value >100 ohms and connect to the 3.3V output. Verify that the output voltage is
regulated against changes in load up to the 5A limit, and against changes in input voltage up to 24V. For
a load current of about 1A and Vin=12V measure the output ripple of the 3.3V output using the
technique shown in figure 2 of the quick start guide, reproduced below. (borrow a high-frequency
probe for this measurement if you don’t have one.) Using the same technique measure the voltage
overshoot on L2 (voltage above 12V on the rising edge of the switching waveform; see figure 3) and
undershoot (voltage below gnd). Now measure the overshoot and undershoot using a low-frequency
lead (coax + alligator clips, for example), rather than the method of figure 2. Is there a difference?
Figure 3. example of overshoot on a switching node
Calculate power loss in the circuit for this configuration (Vin=12V, Io=1A). Would you expect a
significant temperature rise in any of the components at this level of loss? With an appropriate
temperature sensor (e.g. a finger) attempt to verify.
Measure the deadtime(s) used in the LTC3728. The time period where both high-side and low-side
transistors are off is called the dead time. Compare figures 3a and 3b. The voltage of the switching
node during the dead time depends on the direction of the inductor current. If the average load current
is less than half the pk-pk ripple current, the inductor current will change signs during each period. This
fact can be used to measure the magnitude of the ripple current.
Figure 3 a. Voltage of switching node, current always positive.
Figure 3 b. Voltage of switching node, current changes direction.
Continue to use the 3.3V side and observe the switching signal at L2 on the scope. Starting with a load
current that is clearly always positive, lower the load current (increase the load resistance) until the
deadtime behavior indicates that the current is changing sign (waveform like figure 3b rather than 3a).
Assuming the positive and negative peaks are symmetric about the average, what is the measured peakto-peak current. How does that compare to the theoretical value calculated from voltage, inductance,
and on-time?
Efficiency sweeps. Set jumper JP6/RUN2 to zero to disable the 3.3V output and move the variable load
resistor to the 5.0V output. Measure efficiency for the same set of input voltages and output currents
that you simulated in the pre-lab section (Vin=7, 12, and 24; load=20, 40, 60, 80, and 100%). Be sure to
measure the output voltage and current; don’t use V2/R for Pout since the temperature of the load
resistor will be changing.
With the input at 24V and the load at 20% of full, measure efficiency with the switching frequency at
250kHz (JP3=0) and ~400kHz (JP3=open). Verify the switching frequency for these cases.
Post Lab
Tabulate the measurement data and graph efficiency vs load current for each value of Vin. Compare the
measured efficiency vs load curves to the simulated ones. Comment on differences.
Tabulate the efficiency measurements made at 24V and 20% load for the three values of switching
frequency. Calculate power loss and graph loss vs switching frequency for these three points.
Compare the measured loss vs frequency curve to the simulated one. Comment on the difference.