Spectral Characterization of Functional Vectors for

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SPECTRAL CHARACTERIZATION OF
FUNCTIONAL VECTORS FOR GATELEVEL FAULT COVERAGE TESTS
Nitin Yogi1 and Vishwani D. Agrawal1
Abstract
Vector sequences generated from functional description of digital circuits
exercise a sufficient set of key or critical operations and are used for
verification of pre-synthesis architecture and post-synthesis logic design.
We analyze these vectors using Hadamard matrices and determine the
prominent or essential Walsh spectral components and the low intensity
noise-like components. This implementation-independent spectral
information is then used to generate fault coverage vector sequences for
gate-level non-scan implementations by making use of Hadamard matrix
again and by randomly perturbing the Walsh spectra in which the essential
components are left unperturbed. At the gate-level, a fault simulator is used
to compact the vector sequences. We give results for three non-scan
ISCAS’89 and one ITC’99 benchmarks for which functional descriptions
were available. Our results show that the spectral vectors are comparable
in fault coverage and test length to gate-level sequential ATPG.
1. Introduction
Verification of a digital system checks the functional correctness, which is
essential before proceeding with low-level implementation and manufacture.
Verification vectors are created from the knowledge of the input-output
behavior and exercise all or most functions with selected critical data
patterns. These vectors are used for simulation of the architecture-level,
register-transfer level (RTL), and gate-level designs. Such vectors are also
found to be useful in detection of several kinds of manufacturing defects
such as timing faults. However, they have not been used in manufacturing
test because of a usually low gate-level stuck-at fault coverage and large test
data volume. Therefore, the problem of finding a small subset of functional
vectors with high fault coverage is of interest.
We develop a new spectral method to generate vectors that resemble, though
they are not the same as, functional vectors. Analysis shows that the
temporal behavior of a functional vector sequence is largely described by a
digital spectrum of Walsh functions. Besides, recognizable Walsh functions
a functional sequence also contains random behavior. Using these two
characteristics, we generate vector sequences for gate-level fault coverage.
Only a gate-level fault simulator is used; no ATPG program is required.
2. Background
Background work related to our research has been in two directions, namely,
behavior or RTL test generation, and spectral test generation.
1
Auburn University, Dept. of ECE, 200 Broun Hall, Auburn University, AL 36849,
USA; Email: yoginit@auburn.edu, vagrawal@eng.auburn.edu.
Proc. 10th VLSI Design and Test Symp. (VDAT), Goa, August 9-12, 2006.
Published as Progress in VLSI Design and Test 2006, New Delhi: Elite Publishing
House Pvt. Ltd., 2006, pp. 407-417.
408 ● Progress in VLSI Design and Test
2.1 Register-Transfer Level Methods
Several RTL test generation methods have been proposed. Ravi and Jha
[Ravi and Jha (2001)], Ghosh and Fujita [ Ghosh and Fujita (1999)], Kim
and Hayes [ Kim and Hayes (1998)] and Goloubeva et al. [ Goloubeva et
al. (2002)] use pre-computed test sets for RTL constructs like adders,
multiplexers etc. and derive test vectors for the whole RTL circuit. Precomputed test sets either make assumptions about the synthesis of the
design or use a superset of the actually required test vectors. All of them use
some kind of data structure or metrics to derive the RTL test sets, which
have implications of large memory and computation overheads.
Ravi and Jha [ Ravi and Jha (2001)], and Kim and Hayes [ Kim and Hayes
(1998)] use controllability and observability metrics, while Ghosh and Fujita
[Ghosh and Fujita (1999)] and Goloubeva et al. [Goloubeva et al. (2002)]
use data structures like decision diagrams. Yi and Hayes [ Yi and Hayes
(2005)], and Pomeranz and Reddy [ Pomeranz and Reddy (1999)] have
proposed a fault model which considers fault activation and propagation
from the primary inputs to primary outputs. Test vectors can then be
generated to cover these faults. However these fault models have been
restricted to only combinational circuits.
Thaker et al. [Thaker et al. (2003)] have shown that a set of stuck-at faults
of variables in high-level synthetic operators and at the boundaries of RTL
modules can be used as a statistical sample for the gate-level coverage
analysis. Recent work by Kang et al. [ Kang et al. (2006)] uses a set of
stuck-at faults on primary inputs for high-level coverage analysis. Their
sensitization fault coverage considers the detection of each primary input
fault separately at every primary output. The coverage of sensitization
faults is shown to correlate well with the stuck-at fault coverage in any
gate-level implementation.
2.2 Spectral Methods
In 1983, Susskind [Susskind (1983)] showed that Walsh spectrum can be
used for testing a digital circuit. General properties and applications of
digital spectra can be found in the published literature [Beauchamp (1984),
Falkowski (2002), Hurst (1985) and Thornton (2001)]. Hsiao and Seth
[Hsiao and Seth (1984)] further expanded that work to compact testing.
More recently, Giani et al. [Giani et al. (2001)] have reported spectral
techniques for sequential ATPG and built-in self-test. Hsiao’s group at
Virginia Tech has published further work on spectrum-based self test and
core test [Chen and Hsiao (2002), Chen and Hsiao (2006), Kasturirangan
and Hsiao (2002)]. Khan and Bushnell [Khan and Bushnell (2006)] have
designed hardware signature analyzers using spectral components. Zhang et
al. [Zhang et al. (2004)] further refined the method of extracting the
spectra from a digital signal using a selfish gene algorithm.
In recent work, Yogi and Agrawal [Yogi and Agrawal (2006)] consider RTL
faults on the inputs and outputs of the circuit and inputs and outputs of flipflops. Test vectors for these RTL faults are analyzed for prominent spectral
components and new vectors are generated using them. Recent work
suggests that wavelet transforms can also be used for similar application
[Devanathan and Bushnell (2006)].
With the exception of the RTL ATPG of Yogi and Agrawal [Yogi and
Agrawal, 2006], all other published work on spectral methods requires gatelevel vectors generated for testing stuck-at faults, from which spectra are
Spectral Characterization of Functional Vectors ● 409
extracted. In contrast, in this paper we use behavioral vectors to extract the
spectra. The outline of the paper is as follows. Section 3 gives a brief
overview of how bit streams can be analyzed in the spectral domain. In
Section 4 we present spectral analysis and discuss results in Section 5.
Finally, we conclude in Section 6.
3. Walsh Spectrum
Our method of test generation is based on the premise that the spectrum
of vectors that are meaningful to the function of the circuit reflects
important characteristics of the circuit. However, any functional vectors
will not only have the relevant spectral components but will also have
some amount of noise, which corresponds to the functional don’t care
bits. So, we analyze the spectrum and the noise level, and then generate new
vectors using the spectrum, to which noise samples are added.
Frequency decomposition means that any bit stream or signal can be
projected on or represented using a set of orthogonal functions. The
projections of the signal on each of the functions, give the contribution of
the corresponding functions to the original signal. We shall use Walsh
functions [Weisstein], because, as mentioned in the previous section, they
have been used for testing with effective results.
Walsh functions form a set of orthogonal functions and consist of trains of
square pulses having only +1s and -1s as the allowed states, and can only
change at fixed intervals of a unit time step. For an order n, there are 2n
Walsh functions and are given by the rows of a 2n dimensional Hadamard
matrix [Weisstein] H (n) when arranged in the so-called “sequency” order
[Thompson et. al. (1986), Wolfram (2002)]. The Hadamard matrix is a
symmetric matrix with each row being a unique Walsh orthogonal
function, also called the basis vector. Since it consists of only +1s and −1s, it
is a good choice for the signals in VLSI testing (+1 = logic 1, −1 = logic 0).
Also, multiplications can essentially be computed using additions and
subtractions only. Hence, we shall use the Hadamard matrices to analyze
the bit-streams for each input contained in test vectors. Hadamard matrices
are square matrices containing only +1 and −1 elements and can be
generated using the following recurrence relation:
 H (n  1) H (n  1) 
H ( n)  

 H (n  1)  H (n  1)
(1)
where H (0) = 1 and 2n is the dimension of the nth order Hadamard matrix,
H (n). For example, for n = 1 and n = 2, we have:
1 1
H (1)  

1  1
and
1
1
1
1
 1 1
1  1
H (2)  
1
1  1  1


1
 1 1 1
(2)
An important property of the Hadamard matrix is that its transpose is equal
to its inverse, thus giving H (n) × H (n)T = nIn where In is the n × n identity
matrix. This simplifies reconstruction of the test vectors from the spectral
410 ● Progress in VLSI Design and Test
domain. Any bit stream can be represented as a linear combination of the
basis vectors of the Hadamard matrix. For example, consider H (2) having
the four basis vectors [1 1 1 1], [1 −1 1 −1], [1 1 −1 −1] and [1 −1 −1 1].
The vector [1 −1 −1 −1] can be written as −1 × [1 1 1 1] + 1 × [1 −1 1
−1] + 1 × [1 1 −1 −1] + 1 × [1 −1 −1 1] where the multiplicand used for
each basis vector is the projection of the bit stream on that basis vector. We
shall refer to them as coefficients. By analyzing these coefficients we will
be able to determine the major contributing basis vectors to the original
signal, which we shall regard as important o r es sen tia l basis vectors.
New test vectors are then generated retaining those basis vectors.
4. Functional Test Generation
Our approach to test generation consists of two principal steps:
1. Spectral characterization of the circuit
 Functional verification vector generation
 Spectral analysis
2. Gate-level test generation
 Spectral vector generation
 Vector compaction and coverage analysis
4.1 Functional Verification Vector Generation
Functional test vectors are targeted at the functional description of the
circuit and characterize its behavior. They exercise the important functions
of the design which differentiates them from other designs and hence in a
sense are unique to the design. So we use them to find the characteristics
of the circuit which will help us in test generation for gate-level fault
coverage. Functional vectors, if available or created by the designer to
verify the design, can be conveniently used in our method. In our case
functional vectors are generated so that they exercise the various functions
of the circuit and also cover its corner conditions. For example for a
multiplier circuit, it becomes important not only to test the multiplication
function but also to test the corner conditions of 0 multiplied with 0, 0
multiplied with a finite number, largest number multiplied with itself, etc.
Depending on the circuit under consideration, the conditions required to
be verified will vary.
In this work, we have used three ISCAS-89 benchmark circuits that were
reverse engineered by Hayes and his associates at the University of
Michigan [Hansen et al. (1999)]. These are s298 (traffic light controller),
s344 and s349 (both 4 × 4 add-shift multipliers). We have also used one
ITC’99 benchmark circuit, b02 which is a finite-state machine that
recognizes BCD numbers.
4.2
Spectral Analysis
After we obtain the functional vectors, they are analyzed using Hadamard
matrix to find the major components. To analyze the vectors, the bit streams
entering each input are considered and analyzed separately. The 0s and 1s in
the bit stream are represented as −1s and +1s. To find the coefficients of a bit
stream corresponding to an input, the bit stream is multiplied with the
Hadamard matrix. The multiplication operation is basically a correlation
Spectral Characterization of Functional Vectors ● 411
operation of the bit stream with each of the basis vectors. A high value of
the coefficient corresponds to a high correlation of the bit stream to the
corresponding basis vector and vice-versa. Hence basis vectors exhibiting
high coefficient values are considered as important vectors or essential
components and others are considered as noise.
Figure 1. Spectral analysis of an 8-bit stream. The essential Walsh
component in this bit-stream has magnitude 6 and is represented by the
second row of Hadamard matrix, H(3).
Figure 1 shows an example. An 8 bit stream (0s and 1s in the original
sequence being represented as −1s and +1s) is analyzed by multiplying with
the third order 8 × 8 Hadamard matrix. The corresponding result gives the
coefficients. As shown, we obtained a single coefficient with high
correlation coefficient, which we shall treat as essential component and
others will be treated as noise.
The verification vectors we used are long vector sequences and do not
always have lengths that are powers of two. One option is to use a limited
dimension Hadamard matrix and analyze pieces of the bit stream
individually. However, this method has the disadvantage that, it might not be
able to capture the long periodicity inherent in the bit stream. Hence, we
analyze the whole bit stream using a u s i n g a s i n g l e Hadamard matrix
of l a r g e . To exactly fit in into our matrix analysis, we either need to truncate
the bit stream or use a higher order Hadamard matrix. We use a
dimension that is closest to the length of the bit stream. For example for a
bit stream of length 135 we choose a Hadamard matrix of dimension 128
and analyze only the first 128 bits of the bit stream. Analysis using a
dimension of 256 is found to give rise to a large number of noisy
components due to the uncertainty in the unspecified bits from 135 to
256. The noise tends to hide the essential components. In cases where we
use a dimension greater than the bit stream, the bit stream is extended
with 0s up to the dimension of the matrix to indicate non-inclusion of
these bits in the correlation operation. Figure 2 shows the spectral
coefficients for the circuit s298 whose three input bit streams were of
length 75 but were analyzed using the 64 × 64 Hadamard matrix after
truncating the original bit streams. The high rising bars show high
correlation with the corresponding basis vector and are considered essential.
To determine the threshold level, which would separate the essential
components from the noise components, a technique in which the
coefficient value is compared with the mean of the total spectrum is used.
Assuming white noise we shall have all equal valued coefficients and their
magnitudes will be equal to the mean of any other arbitrary spectrum.
Hence after all the coefficients are determined, they are squared and the
magnitude of the maximum coefficient is compared with the mean of all
the coefficients by taking a ratio of the two. In this comparison we are
actually comparing the percentage of power in the coefficient to the mean
412 ● Progress in VLSI Design and Test
noise power. If the ratio of the magnitude of the coefficient being
considered, to the mean of the coefficients is greater than some constant
K, then the coefficient and hence the corresponding basis vector is
considered to be an essential component. The corresponding coefficient is
separated from the spectrum and the same process is repeated for the next
maximum coefficients until the criteria are no longer satisfied. The
coefficients thus remaining after this process are considered non-essential
or noise. The constant K affects which coefficients being considered as
essential ones. A very high value of K makes the selection process very
acute, selecting only few components as essential while a low value of K is
more liberal and selects more essential coefficients. Further discussion
follows in the next section.
Figure 2. Walsh spectral coefficients for s298 circuit.
Figure 3. Bit-steam generation by perturbing the spectra. Note that the
essential component having a magnitude 6 is not perturbed.
4.3 Spectral Vector Generation
After spectral analysis of the functional vectors, the spectral coefficients are
obtained. To generate gate-level test vectors, the essential spectral
coefficients d eter mined by the threshold are retained and others are
Spectral Characterization of Functional Vectors ● 413
considered noise. The noise can be filtered out or changed as per the
selected methodology. Filtering out the noise components [Giani et. al.
(2001)] has the disadvantage of losing the phase information inherent in
those components, which is a part of the characterization of the circuit.
Hence in our approach the noise components are perturbed in a confidence
range in terms of magnitude and/or in phase to generate new coefficients.
The confidence levels which make up the range and correspond to the
amount of randomness to be added, have to be selected suitably and differ
depending on the circuit as well as the type of test vectors being used.
We are currently working on finding the correlation between these
confidence levels and the nature of the spectral coefficients obtained from
the test vectors, by studying their statistical properties. Currently, to find
these levels, we investigate different ranges by generating new coefficients
in that range and analyzing the fault coverages of the corresponding test
vectors. The threshold is kept at the minimum during this process, to closely
track the changes. A trend is generally visible and the optimum range for
the confidence levels is then selected.
The test vectors can easily be generated from the coefficients by multiplying
the coefficients with the Hadamard matrix again. Figure 3 shows an
example of reconstruction of the test vectors. As discussed before, the
value of the constant K, to select the essential components, has a crucial
impact on the nature of the generated test vectors. A low value of K tends
to preserve most of the nature of the original functional vectors and has been
found to give good initial fault coverage. A high value of K tends to select
very few components as essential, regarding most as noise. This can
sometimes generate vectors that may detect hard to detect faults. Hence we
generate test vector sets with different values of K. Also since we are
adding noise randomly, this variation gives different characteristics to each
vector set. We generate multiple sets of vectors for each value of K.
4.4 Vector Compaction and Coverage Analysis
Compaction is done by an integer linear program (ILP) [Drineas and Makris
(2003)]. Each vector sequence is fault simulated, with the circuit starting in
an unknown state and with the complete fault list restored, to eliminate the
effect of the ordering of sequences. The fault simulator provides a complete
list of vector sequences that detect each fault. The vector sequence Vi is
assigned an integer variable, xi = [0; 1] (xi = 1: select the ith sequence, else
discard it). Suppose kth fault is detected by sequences V3, V4, and V11, then
the following ILP constraint picks at least one sequence:
x3 + x4 + x11 ≥ 1
(3)
The number of such constraints equals the number of faults. ILP determines
the values of variables xi's that satisfy all the constraints with the following
objective function:
iM
Minimize
x
i 1
i
(4)
where M is the total number of vector sequences generated. For the results
given in the next section, we used the ILP software contained in the AMPL
mathematical programming package [Fourer et. al. (1993)]. In the ILP
414 ● Progress in VLSI Design and Test
solution, the smallest possible number of x's is assigned the value 1 and all
others are assigned 0. The sequences with corresponding x’s set to 1 form
the compacted test set.
5. Results
The spectral technique of enhancing functional verification vectors for gate
level fault coverage was applied to three ISCAS’89 (s289, s344 and s349)
and one ITC’99 (b02) benchmark circuits. The characteristics of the
different circuits are shown in Table 1. The functional test vectors for the
circuits were generated by exercising the functions in the circuit. For s298,
which is a traffic light controller, functional vectors exercise its three
different modes of operations of signal switching. For s344 and s349,
which are slightly different implementations of a sequential 4 × 4 bit addshift multiplier, functional vectors verify the corner cases of the
multiplication operation. The functional test vectors were then a n a l yz e d
f o r spectra, new test vectors were generated using the technique discussed
above and then compacted. Results were obtained on Sun Ultra 5 machines
with 256MB RAM. Table 2 shows the comparison of the proposed method
with gate-level non-scan sequential ATPG method. The first two columns
give the circuit and the number of gate level stuck-at faults in the circuit.
Verification vectors, Functional ATPG and gate-level ATPG are then
compared with respect to the gate-level fault coverage, the number of
vectors generated and the test generation time. For Functional ATPG, the
test generation time includes only the fault simulatio n and compaction
times; time to generate the different spectral test sets being negligible.
From Table 2, we observe that all four circuits do satisfactorily in terms of
gate-level fault coverage, number of vectors and CPU time. Figure 4
compares the graph of fault coverage percentage against the number of
vectors applied for circuit s298 for gate-level ATPG (FlexTest [Mentor
Graphics (2004)]), spectral ATPG, functional vectors and random vectors.
FlexTest was used in the non-scan mode as gate-level ATPG.
Circuit
s298
s344
s349
b02
PIs
3
9
9
2
Table 1. Circuit description.
POs FFs Function
6
14 Traffic light controller
11
15 4 x 4 add-shift multiplier
11
15 4 x 4 add-shift multiplier
1
4
Finite-state machine
Table 2. Functional vectors, spectral ATPG and gate-level ATPG.
Circuit
name
s298
s344
s349
b02
Functional
Spectral ATPG
Gate-level ATPG
No. of
vectors
gate
No. of Fault No. of Fault CPU No. of Fault CPU
faults
vecs cov (%) vecs cov (%) s
vecs cov (%) s
698
1020
1030
148
75
57
57
13
81.23
87.45
87.09
85.47
192
256
256
48
84.74
91.08
90.68
93.92
21
51
51
10
152
150
150
38
85.89
90.78
90.39
94.26
45
23
26
1
6. Conclusion
We have presented a new method of functional test generation using
spectral techniques. Functional verification vectors are analyzed using
Spectral Characterization of Functional Vectors ● 415
Hadamard matrix to extract important features. Generation of new vector
sets fr o m tho se features and compacting them is an efficient method
for test generation. Results show that the coverage of functional
vectors can be effectively improved to match that of a gate-level ATPG.
Figure 4. Test coverage in s298 circuit.
Although the coverages are not as high as are possible with scan vectors,
non-scan vectors with highest attainable coverage have value in the highvolume production testing of processors and other custom devices. When
applied at speed, these vectors are found to detect timing and other defects
not normally detected by the scan vectors. Our on-going work on processor
testing will be reported in a forthcoming paper.
References
[1] K. G. Beauchamp (1984). Applications of Walsh and Related Functions
with an Introduction to Sequency Theory. Orlando, FL: Academic Press,
1984.
[2] X. Chen and M. S. Hsiao (2002). Characteristic Faults and Spectral
Information for Logic BIST, Proc. Int. Conf. Computer-Aided Design,
November 2002, pp. 294-298.
[3] X. Chen and M. S. Hsiao (2006). Testing Embedded Sequential Cores
in Parallel Using Spectrum-Based BIST. IEEE Trans. Computers, vol. 55,
no. 2, pp. 150-162, Feb. 2006.
[4] S. K. Devanathan and M. L. Bushnell (2006). Sequential Spectral
ATPG Using the Wavelet Transform and Compaction. Proc. 19th
International Conference on VLSI Design, 2006, pp. 407-412.
[5] P. Drineas and Y. Makris (2003). Independent Test Sequence
Compaction through Integer Programming. Proc. ICCAD, 2003, pp. 380386.
[6] B. J. Falkowski (2002). Spectral Testing of Digital Circuits. VLSI
Design, vol. 14, no. 1, pp. 83-105, 2002.
[7] R. Fourer, D. M. Gay, and B. W. Kernighan (1993). AMPL: A Modeling
Language for Mathematical Programming. South San Francisco, California:
The Scientific Press, 1993.
416 ● Progress in VLSI Design and Test
[8] I. Ghosh and M. Fujita (1999). Automatic Test Pattern Generation for
Functional RTL Circuits Using Assignment Decision Diagrams. Proc. 35th
Design Automation Conf., 1999, pp. 43-48.
[9] A. Giani, S. Sheng, M. S. Hsiao, and V. D. Agrawal (2001). Efficient
Spectral Techniques for Sequential ATPG. Proc. Design, Automation and
Test in Europe (DATE) Conf., 2001, pp. 204-208.
[10] A. Giani, S. Sheng, M. S. Hsiao, and V. D. Agrawal (2001). Novel
Spectral Methods for Built-In Self-Test in a System-on-a-Chip
Environment. Proc. 19th IEEE VLSI Test Symp., 2001, pp. 163-168.
[11] O. Goloubeva, G. Jervan, Z. Peng, M. Sonza Reorda, and M. Violante
(2002). High-level and Hierarchical Test Sequence Generation. Proc. of
HLDVT, 2002, pp. 169-174.
[12] M. Hansen, H. Yalcin, and J. P. Hayes (1999). Unveiling the ISCAS-85
Benchmarks: A Case Study in Reverse Engineering. IEEE Design & Test of
Computers, vol. 16, no. 3, pp. 72-80, July-Sep. 1999. Also see
http://www.eecs.umich.edu/~jhayes/iscas.
[13] T.-C. Hsiao and S. C. Seth (1984). An Analysis of the Use of
Rademacher-Walsh Spectrum in Compact Testing. IEEE Trans. Computers,
vol. 33, pp. 934-938, October 1984.
[14] S. L. Hurst, D. M. Miller, and J. C. Muzio (1985). Spectral Techniques
in Digital Logic. Orlando, FL: Academic Press, 1985.
[15] J. Kang, S. C. Seth, and V. Gangaram (2006). Functional Fault Model
for Coverage Analysis and Test Generation. 2006 (in preparation).
[16] G. Kasturirangan and M. S. Hsiao (2002). Spectrum-Based BIST in
Complex SOCs. Proc. 20th IEEE VLSI Test Symp, April 2002, pp. 111-116.
[17] O. I. Khan and M. L. Bushnell (2006). Aliasing Analysis of Spectral
Statistical Response Compaction Techniques. Proc. 19th International
Conference on VLSI Design, 2006, pp. 801-806.
[18] H. Kim and J. P. Hayes (1998). High-Coverage ATPG for Datapath
Circuits with Unimplemented Blocks. Proc. International Test Conf., 1998,
pp. 577-586.
[19] Mentor Graphics, FastScan and FlexTest Reference Manual, 2004.
[20] I. Pomeranz and S. M. Reddy (1 9 9 9 ). Pattern Sensitivity: A Property
to Guide Test Generation for Combinational Circuits. Proc. 8th IEEE Asian
Test Symposium, 1999, pp. 75-80.
[21] S. Ravi and N. K. Jha (2001). Fast Test Generation for Circuits with
RTL and Gate-Level Views. Proc. International Test Conf., 2001, pp.
1068-1077.
[22] A. K. Susskind (1983). Testing by verifying Walsh coefficients. IEEE
Trans. Computers, vol. 32, no. 2, pp. 198-201, February 1983.
[23] P. A. Thaker, V. D. Agrawal, and M. E. Zaghloul (2003). A Test
Evaluation Technique for VLSI Circuits Using Register-Transfer Level Fault
Modeling. IEEE Trans. CAD, vol. 22, no. 8, pp. 1104-1113, August 2003.
[24] A. R. Thompson, J. M. Moran, and G. W. Swenson Jr. (1986).
Interferometry and Synthesis in Radio Astronomy. New York: Wiley, 1986.
[25] M. A. Thornton, R. Drechsler, and D. M. Miller (2001). Spectral
Techniques in VLSI CAD. Boston: Springer, 2001.
[26] E. W. Weisstein. From MathWorld A Wolfram Web Resource.
http://mathworld.wolfram.com.
[27] S. Wolfram (2002). A New Kind of Science. Champaign, IL: Wolfram
Media, 2002.
[28] J. Yi and J. P. Hayes (2005). A Fault Model for Function and Delay
Faults. Journal of Electronic Testing: Theory and Applications, vol. 21, no.
6, pp. 631-649, 2005.
Spectral Characterization of Functional Vectors ● 417
[29] N. Yogi and V. D. Agrawal (2006). High-Level Test Generation for
Gate-Level Fault Coverage. Proc. 15th IEEE North Atlantic Test
Workshop, May 2006, pp. 65-74.
[30] J. Zhang, M. L. Bushnell, and V. D. Agrawal (2004). On Random
Pattern Generation with the Selfish Gene Algorithm for Testing Digital
Sequential Circuits. Proc. International Test Conference, 2004, pp. 617-626.
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