Rectifier and regulator
In this lab you will construct and analyze a full wave rectifier and a shunt voltage
regulator. All component types in the example circuit are available in OrCAD – Capture
libraries for simulation.
I. Introduction
1.1 The Full Wave Rectifier
The first building block in the dc power supply is the full wave rectifier. The purpose of
the full wave rectifier (FWR) is to create a rectified ac output from a sinusoidal ac input signal. It
does this by using the nonlinear conductivity characteristics of diodes to direct the path of the
current.
Figure 1. Common four-diode bridge configuration for the FWR
Diode Currents
Consider the current path in the diode bridge rectifier. In the positive half cycle of Vin,
diodes D4 and D3 will conduct. During the negative half cycle, diodes D2 and D1 will conduct.
As a result, the load will pass current in the same direction in each half cycle of the input.
Design Concerns

Reverse current does not exceed the breakdown value

Power dissipation limit P = Vd Id is not exceeded
Diode Voltages

Forward Bias
o
If we consider a simple, piece-wise linear model for the diode IV curve, the diode
forward current is zero until Vbias >= Vthreshold, where Vthreshold is 0.6 V to 0.8 V.
The current increases abruptly as Vbias increases further. Due to this turn-on or
threshold voltage associated with the diode in forward bias, we should expect a 0.6 to
0.8 V voltage drop across each forward biased diode in the rectifier bridge. In the
case of the full wave rectifier diode bridge, there are two forward biased diodes in
series with the load in each half cycle of the input signal.
o
The maximum output voltage (across load) will be Vin - 2 Vthreshold, or ~ Vin - 1.4 V.
o
Since some current does flow for voltage bias below Vthreshold and the current rise
around is Vthreshold is more gradual than the piece-wise model, the actual diode
performance will differ from the simple model.

Reverse Bias
o
In reverse bias (and neglecting reverse voltage breakdown), the current through the
diode is approximately the reverse saturation current, Io. The voltage across the load
during reverse bias will be Vout = Io Rload.
o
In specifying a diode for use in a circuit, you must take care that the limits for
forward and reverse voltage and current are not exceeded.
1.2 Filtered Full Wave Rectifier
The filtered full wave rectifier is created from the FWR by adding a capacitor across the
output.
Figure 2. Filtered full wave rectifier
The result of the addition of a capacitor is a smoothing of the FWR output. The output is
now a pulsating dc, with a peak to peak variation called ripple. The magnitude of the ripple
depends on the input voltage magnitude and frequency, the filter capacitance, and the load
resistance.
To describe the source of the voltage ripple, consider the performance of the filtered full
wave rectifier above. The input to the rectifier is a sinewave of frequency f. Let Vi be the full
wave rectified signal input to the filter stage of the rectifier and Vo be the output. Vi can be
approximated as the absolute value of the rectifier input, with frequency 2f.
Figure 3. Output (Vi) and input (Vo) of a filtered full wave rectifier
In the time period from T0 to T1, the diode D1 (or D3, depending on the phase of the
signal) is forward biased since Vi > VC1 (approximate the forward biased diode as a short
circuit). The capacitor C1 charges and the voltage across the load R increases. From T1 to T2,
the diodes D1 and D2 are reverse biased (open circuit) because Vcap > Vi, and the capacitor
discharges through the load R with a time constant of RC seconds.
The voltages between times T1 and T2 lie along a capacitor discharge curve. Along this
line,
The peak to peak (pp) ripple is defined as the voltage difference between Vmax and
Vmin.
If C is large, such that RC >> T2 - T1, we can approximate the exponential
.
Then
as
Since T2 - T1 ~ T/2, where T is the period of the sine wave, then
Peak Current Levels
Diodes in the bridge conduct only in the time period from T0 to T1. The diode current
must replace the charge lost by the capacitor during its discharge.
I = dQ/dT = C*dV/dT
As the magnitude of the filter capacitor increases, the peak current through the diodes
must increase to replace the charge in less time. Therefore it is not always best to choose the
largest value of C1 available. In a dc power supply, you can rely on the stages following the
FFWR to significantly improve the voltage regulation.
1.3 The Shunt Regulator
A shunt regulator may be placed between the filtered full wave rectifier and the load
resistance (impedance). Its purpose is to minimize the variation in the voltage across the load, as
either the input voltage or the output resistance changes.
Figure 4. Filtered FWR and shunt regulator
This regulator is called a shunt because it provides an additional path for current to flow,
so that some current can bypass the load. The shunt regulator consists of a zener diode and a
resistor. The zener diode has a nearly constant voltage drop when used in reverse bias. The
resistor is chosen to maintain the zener in its proper working region, where it can provide
regulation and not exceed a maximum power limit.
A simple model for the zener diode is a dc supply (battery) with a value of Vzo, where
Vzo is the effective zener voltage,
, Vz is the rated breakdown voltage, and Rz is
the effective resistance of the zener, given by the inverse of the slope of the IV curve in the
working region.
Figure 5. Filtered FWR and shunt regulator with the zener diode replaced with its circuit model
In the zeners working region, Rz is small (0.1 to 50 ohm ). For voltages less than the knee
voltage, Rz is very high, and for purposes of hand calculations can be considered to be an open
circuit.
Figure 6. Current-voltage characteristic of a zener diode
You can show for the circuit above that
where IL is the current through the load. The 1st term in this equation is constant since it
depends only on the diode zener voltage and two resistances. The 2nd and 3rd terms depend on
the input voltage and load current, both of which may change with time. These terms must be
minimized for quality regulation.
Input Sensitivity and Load Sensitivity
Assume the input to the shunt regulator is Vdc +/- Vripple. For Vin = Vin(max) = Vdc +
Vripple, additional current is available from the source. To keep Vo = IL RL constant, some of
that current must be shunted through the zener diode. As long as Iz < Iz(max), as defined by the
maximum power dissipation for the zener, the circuit will safely regulate. Choose R to prevent
the zener from exceeding its maximum current limit.
For Vin = Vin(min) = Vdc - Vripple, current drops. To keep Vo = IL*RL constant, the
current through the zener diode must be reduced. To maintain regulation, Iz must not be reduced
below the knee current. Choose R to maintain sufficient current through the zener:
The shunt regulator has several major problems which prevent its common use as the sole
pre-regulation stage in dc power supplies:
o
When the load is open circuit, all current is shunted through the zener diode. This
requires an expensive, high power device.
o
The line and load regulations values are high (~ 10 % or more).
o
The energy efficiency is low.
For an improved design, the shunt regulator is used in conjunction with a series pass
element with gain, usually a transistor, between the unregulated supply and the load.
II. Project Design
2.1 Simulation
Part 1:
To simulate the full wave rectifier circuit as shown in Figure 1, the following components
should be used:
1. Input AC voltage (Vin): Vin is a 10 Vpeak and 60 Hz sinusoidal wave. Use VSIN with
the setting: VOFF = 0, VAML = 10 and FREQ = 60
2. Full wave rectifier (FWR): The full wave rectifier is constructed in the form of bridge
rectifier using four diodes (D1N4004).
3. Load resistor: 200 Ω and 500 Ω resistors are used to understand the effect of load resistor
on the performance of the DC power supply.
Simulation results required in your lab report:
1. Output voltage for Rload = 200 Ω
2. Output voltage for Rload = 500 Ω
All the simulations in this project are in transient mode with run time = 35ms. On the
simulation results, you should indicate the maximum output voltage (Vmax), the minimum
output voltage (Vmin) and the ripple voltage Vr (Vmax – Vmin).
To simulate the filtered full wave rectifier circuit as shown in Figure 2, the filter capacitor
is chosen from 100 uF, 470 uF and 1000 uF.
Simulation results required in your lab report:
1. Output voltage for Rload = 200 Ω and C1 = 100 uF
2. Output voltage for Rload = 200 Ω and C1 = 470 uF
3. Output voltage for Rload = 200 Ω and C1 = 1000 uF
4. Output voltage for Rload = 500 Ω and C1 = 100 uF
5. Output voltage for Rload = 500 Ω and C1 = 470 uF
6. Output voltage for Rload = 500 Ω and C1 = 1000 uF
Part 2:
To design and simulate a filtered full wave rectifier with a shunt regulator, the following
design steps should be followed:
1. To design a shunt regulator, first pick up a 3.3 volts zener diode (a particle diode, part
number 1N5226) and plug it into the curve tracer. Caution: zener diode should be
reverse biased. The cathode of the zener diode (the end with a black ring) should be
connected to the “A” of the diode test port. Menu Settings: type – diode; Vd – 5 volts; Id
– 20 mA; Rload – .25 ohm; Pmax – 2 Watt). Choose any two points in the linear region
and use CURSOR function to display Id and Vd of the two points. Print out from the
screen and it should look like that in Figure 6 except in the first quadrant.
2. Calculate the effective zener resistance Rz and effective zener voltage Vzo from the
equation
or Rz = (Vz2 – Vz1)/(Iz2 – Iz1) and Vzo = Vz1 – Iz1*Rz.
3. Calculate the value of the series resistor R (R5 in Figure 4) for the shunt regulator with
the equation
 Vin(min) is the minimum input voltage, Vin(min) = Vp – 2*0.7 – Vr, Vp is the peak
input voltage or 10 volts in this lab, 0.7 volt is the voltage drop across one diode, Vr
can be used as 2 volts for an estimation
 Vzo and Rz are obtained in step 2
 Iz(min) is the minimum current needed for the zener diode to operate properly, for
example, 5 mA is a good rating
 IL(max) is the maximum load current and determined by Vo/Rmin. The output
voltage of the shunt regulator is about the zener voltage used, Rmin is the minimum
load resistance. In this lab, Vo ~ 3.3 volts and Rmin = 200 Ω
4. Get a practical resistor with a value close but smaller than the resistance R calculated
above. Use this value for R in all the following calculation and simulation.
5. Calculate the capacitance required for the filter using C = Vp/(2*f*Vr*R).
6. Create a FWR and shunt regulator circuit in OrCAD-Capture as shown in Figure 4. R5
and C1 in Figure 4 should use the value of R and C obtained in step 4 and step 5,
respectively. Dz1 is the 3.3 volts zener diode (D1N5226).
7. Simulate the circuit with Rload = 200 Ω. Obtain a capture of the output voltage.
8. Simulate the circuit with Rload = 500 Ω. Obtain a capture of the output voltage.
2.2 Measurements
Part 1:
1. Build the hardware circuit of a full wave rectifier as shown in Figure 1. The input voltage
Vin is a 10 volts peak, 60 Hz sinusoidal wave. Vin is stepped down from line voltage (60
Hz and 110 Vrms) using a 15:1 turns-ratio transformer. Use 1N4004 diodes to construct
your bridge rectifier. Observe the output voltage across the load resistor on the scope for
Rload = 200 Ω. Capture the output into a Word file. Repeat for Rload = 500 Ω and
obtain a capture.
2. Add a capacitor C = 100 uF to form a filtered full wave rectifier. Be careful of the
polarity of the capacitor when you connect the circuit. “Positive” of the capacitor goes to
“positive” of the DC output of the bridge rectifier. Capture the output voltages for both
Rload = 200 Ω and Rload = 500 Ω.
3. Repeat step 2 for C = 470 uF and C = 1000 uF and capture the output voltages for both
Rload = 200 Ω and Rload = 500 Ω.
All the measurements on the scope in this project should have Vp-p, Vavg and frequency
displayed.
Part 2:
1. Modify your circuit as Figure 4. R5 and C1 should be the values obtained in the
simulation part. The zener diode is 1N5226 and Rload = 200 Ω. Capture the output
voltage.
2. Repeat step 1 for Rload = 500 Ω and capture the output voltages.
III. Report
1. Brief Introduction
2. Schematic of full wave rectifier, filtered full wave rectifier and filtered full wave rectifier
with a shunt regulator
3. Calculation of the series resistor R and the filter capacitor C (R5 and C1 in Figure 4).
Please also give the values of the physical R and C in your circuit.
4. Simulation results. All the ten required captures are in bold font.
5. Measurement results. All the ten required captures are in bold font.
6. Discussion and conclusion:
 Effect of the load resistance on the output voltage (ripple, average)
 Effect of the filter capacitance on the output voltage (ripple, average)
 Effect of the shunt regulator on the output voltage (ripple, average)
 Comparison between the simulation results and the measurement results
 Any other questions, comments