Test 1 Solutions

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ECE 3714 Digital Devices and Logic Design
Test 1A Solutions
September 11,2001
Name:_________________________
Section:__________________
1) (42) Convert the following to fixed 8-bit number representations.
Decimal
53
53
-53
-53
-54
22
56
179
Unsigned
%00110101
------------------------------------------$B3
Signed
Magnitude
%00110101
-------%10110101
$B5
10110110
-------------------
1's
2's
Complement Complement
%00110101 %00110101
$35
-------%11001010 %11001011
-------$CB
------------------00010110
$38
---------------------
2) (10)Perform the following operations involving 8-bit 2’s complement numbers. Indicate whether
arithmetic overflow occurs.
10111011
+10011001
101010100
Final Answer = %_01010100 ___ (note only 8 bits for final answer!)
Overflow (Y/N) __Y __________
3) (10)For the following timing diagram, write the equation for the function z(x1,x2,x3) in POS form
Z = (x1 + x2' + x3)(x1' + x2' + x3)(x1' + x2' + x3')
4) (20)A switching network has 3 inputs (A,B,C) and one output Z. The output is 1 if the sum of the three
inputs is greater than or equal to 2.
A
0
0
0
0
1
1
1
1
a)
Find the truth table for Z.
B
0
0
1
1
0
0
1
1
C
0
1
0
1
0
1
0
1
Z
0
0
0
1
0
1
1
1
b) Write Z in minterm notation.
Z = m(3,5,6,7)
c) Write the equation for Z in SOP form.
Z = A'BC + AB'C + ABC' + ABC
d) Draw the logic diagram for Z using an 2-level AND-OR network.
5) (4)Put F = (A+B+C)(A+B’+C’)(A’+B+C’) in SOP form.
F = M(0,3,5) maxterm notation
Therefore, the minterms must be all of the other terms
F = m(1,2,4,6,7)
F = A'B'C + A'BC' + AB'C' + ABC + ABC
6) (4)Explain propagation delays (tphl and tplh).
Propagation delay is the time between a change in an input and a change in the output. It is measured from
a 50% change in input signal level to a 50% change in the output signal level.
Tphl - the propagation delay time from when the input signal changes until the output changes (a high to
low
Transition on the output)
Tplh - the propagation delay time from when the input signal changes until the output changes (a low to
high transition on the output)
7) (10)Draw the transistor diagram for a 2-input OR gate showing the switch positions if one input(A) is
high and the other input(B) is low. Clearly label which transistors are associated with each input, what type
of transistors are used and what the output voltage levels would be (high or low).
Look in lecture slides
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