Department of Information Engineering University of Pisa . TUTORIAL RF and Digital Components for Highly-Integrated Low-Power RADAR Sergio Saponara & Maria S. Greco 2012 IEEE Radar Conference, May 7-11, Atlanta Speakers Sergio Saponara is Associate Professor of Electronics Maria S. Greco is Associate Professor of Telecomunications both at the Department of Information Engineering University of Pisa, via G. Caruso 16, 56122, Pisa, Italy sergio.saponara@iet.unipi.it, maria.greco@iet.unipi.it 2012 IEEE Radar Conference, May 7-11, Atlanta Outline of the tutorial Scenarios and applications for highly-integrated low-power RADAR RADAR architecture and analog-digital partitioning RF/mm-Wave RADAR transceivers and ADC Ubiquitous low-power RADAR case studies: vital sign detection, automotive driver assistance Digital signal processing for RADAR HW-SW implementing platforms for RADAR digital signal processing Conclusions 2012 IEEE Radar Conference, May 7-11, Atlanta Outline of the tutorial Scenarios and applications for highly-integrated low-power RADAR RADAR architecture and analog-digital partitioning RF/mm-Wave RADAR transceivers and ADC Ubiquitous low-power RADAR case studies: vital sign detection, automotive driver assistance Digital signal processing for RADAR HW-SW implementing platforms for RADAR digital signal processing Conclusions 2012 IEEE Radar Conference, May 7-11, Atlanta The semiconductor components market is growing.. …driven by highly integrated digital-based ubiquitous systems realized in standard Silicon (Si)-based technologies.. Source: iSuppli 2012 IEEE Radar Conference, May 7-11, Atlanta Technology evolution driven by large volume HW-SW systems addressing societal needs (health care, energy, security, safety, intelligent transport..) Source: World Semiconductor Trade Statistics 2012 IEEE Radar Conference, May 7-11, Atlanta Electronics evolution Not only nanoscale CMOS but also System-in-Package integration of passives, RF & mm-Wave, high voltage, sensors/actuators (MEMS) .. 2012 IEEE Radar Conference, May 7-11, Atlanta Ubiquitous RADAR applications Although RADAR development was pushed by military applications in II world war with high-power, large size and long-distance systems, today the RADAR is becoming an ubiquitous technology adopted for: Safer transport systems in automotive (automatic cruise control, urban traffic warning, parking aid, obstacle detection), railway (crossing monitoring, obstacle detection), ships Info-mobility in urban, airport or port scenarios Civil engineering, (static and dynamic structural health monitoring, landslide monitoring, ground penetration for detecting pipes, electric lines,….) Distributed surveillance systems (smart cities, airports, banks, schools) mm-wave body scanner for security 2012 IEEE Radar Conference, May 7-11, Atlanta Ubiquitous RADAR applications Remote bio-signal detection for health care (heart rate, breath rate) Elderly/infant syndrome,..) assistance (fall detection, sudden infant death Civil protection (e.g. detection of buried people in case of earthquakes, or under the snow after an avalanche or other natural disasters, or even in war scenarios) Contactless industrial measurements and in harsh environments Through-wall target detection RADAR sensing is suited to address societal needs of safety, security, health-care, intelligent transport 2012 IEEE Radar Conference, May 7-11, Atlanta Ubiquitous highly-integrated low-power RADAR RADAR can become ubiquitous adopted as sensing system for large volume applications? RADAR as EM sensor can offer big advantages for large volume highly integrated applications w.r.t. other technologies: operations in all weather and bad light conditions contactless sensing and no line of sight sensing non ionizing radiations ground penetrating capabilities multi parameter sensing (target detection, speed,May angles) 2012 IEEEdistance, Radar Conference, 7-11, Atlanta Ubiquitous RADAR design needs With respect to conventional RADARs for defense and civil applications, with large transmitted-power x antenna aperture product, the realization of highly-integrated RADARs with low power consumption, size, weight and cost is needed to enable its ubiquitous adoption in large–volume markets Transmitted Power < 10-15 dBm Short wavelength for miniaturization (3.9 mm@77 GHz) Range from < 1m to < 100-200 m Detection also with low SNR of 10-20 dB Cross section from tens of cm2 to m2 Pt Gt Gr 2 Pr (4 ) 3 R 4 DSP techniques to improve performance and solve range-speed ambiguities Receiver sensitivity down to -100 dBm Multiple channels may be used for channel diversity gain 2012 IEEE Radar Conference, May 7-11, Atlanta Ubiquitous RADAR design needs Key enabling factor for the success of this scenario is the realization, in Si-based standard technologies, rather than using niche market dedicated technologies, of integrated transceivers for the RF radar frontend and the implementation of computing intensive RADAR signal processing algorithms in cost-effective and power-efficient embedded platforms Advanced concepts for System-in-Package integration have to be explored 2012 IEEE Radar Conference, May 7-11, Atlanta Frequency bands for highly integrated ubiquitous RADAR At high frequencies (short wavelengths of few mm) there is potential for high miniaturization, even the antenna integration thanks to technology scaling Si-based technologies are offering good characteristics at microwaves and mmWaves 2012 IEEE Radar Conference, May 7-11, Atlanta Opportunities at mm-Waves Compared with visible light and infrared, a RADAR offers lower attenuation in bad weather and bad light conditions Due to high attenuation 60 GHz band (V Band) reserved for short communication s At 77-81 GHz (W band) good opportunities for both LRR and SRR in mmWave domain 2012 IEEE Radar Conference, May 7-11, Atlanta Outline of the tutorial Scenarios and applications for highly-integrated low-power RADAR RADAR architecture and analog-digital partitioning RF/mm-Wave RADAR transceivers and ADC Ubiquitous low-power RADAR case studies: vital sign detection, automotive driver assistance Digital signal processing for RADAR HW-SW implementing platforms for RADAR digital signal processing Conclusions 2012 IEEE Radar Conference, May 7-11, Atlanta Example architectures for integrated RADAR systems RADAR as a mixed analog-digital system Pulsed RADAR with homodyne receiver Pulsed RADAR with super-heterodyne receiver Pulsed RADAR with correlator-type receiver From analog to digital down-conversion FMCW RADAR with digital down-conversion Direct digital receiver 2012 IEEE Radar Conference, May 7-11, Atlanta RADAR as a mixed analog-digital signal system DIGITAL DOMAIN (RX signal processing, TX waveform gener, LO synthesis, user interface, antenna switch control) ADC DAC ANALOG DOMAIN (PA, LNA, AGC, FILT, T/R SWITCH, MIXER) To the vehicle network 2012 IEEE Radar Conference, May 7-11, Atlanta Pulsed RADAR architecture with homodyne type receiver Periodic transmission of a train of pulses of peak power Pt with fpr (frequency pulse repetition), transmitted Pavg depends on duty cycle In integrated systems high peak power can be problematic limit on duty cycling to achieve acceptable range performance ToF analysis of the received echo pulses for target detection 2012 IEEE Radar Conference, May 7-11, Atlanta Pulsed RADAR architecture Easier on-chip integration of homodyne vs. a heterodyne architecture avoiding selective passive filters at high frequencies Antenna array used in timed-division for TX and RX (T/R antenna switch needed, also for LNA protection from PA out) A/D and D/A converters (ADC, DAC) To reduce distortions DAC has to be of PAM type rather than PWM (used in MCU) ADC can operate at baseband (LO for I and Q down-conversion has the same RADAR central frequency) or at IF Signal processing (waveform generation, pulse compression, filtering, range-speed ambiguities resolutions, CFAR detection, tracking) done in the digital domain 2012 IEEE Radar Conference, May 7-11, Atlanta Heterodyne-receiver alternative By sharing the conversion requirements among different blocks operating at different frequencies, RF, IF, baseband better performance can be achieved Selective passive filters at high frequencies (e.g. for image frequency rejection). On-chip or in-package integrated selective filters today possible 2012 IEEE Radar Conference, May 7-11, Atlanta Trend from analog down-conversion … IF or RF input at the quadrature down-conversion system depending if homodyne or heterodyne receiver is used 2012 IEEE Radar Conference, May 7-11, Atlanta .. to digital down-conversion ADC operating at IF with digital based down-conversion (Numeric Controller Oscillator –NCO- needed plus digital decimation) 2012 IEEE Radar Conference, May 7-11, Atlanta FM-CW RADAR f Target VCO Quartz Osc fref Phase det. t Loop filter PA R Freq. divider Interface User I/O 77 GHz TOF=2R/c LO Modulation control (B, Tm) X LNA RF f TX RX DSP FFT & logic ADC amp f fbeat fbeat TOF t t Received signal at the ADC 2012 IEEE Radar Conference, May 7-11, Atlanta FM-CW RADAR Separate antenna used for TX and RX due to continuous wave Range and relative speed detection from batiment frequency analysis (with FFT in digital domain) The FMCW sweep frequency B and the time sweep Tm determine the achievable range and speed resolution Stable frequency synthesis based on PLL+VCO in analog domain used in TX ADC can operate at baseband or at IF Signal processing and control (FMCW modulation control, filtering, FFT, range-speed ambiguities resolutions, CFAR detection, tracking) done in the digital domain 2012 IEEE Radar Conference, May 7-11, Atlanta UWB Pulsed RADAR with correlatortype receiver 2012 IEEE Radar Conference, May 7-11, Atlanta Receiver-type correlation The received pulse echo signal, amplified by the LNA is multiplied with a delayed replica of the transmitted pulses generated on-chip by a Shaper circuit and integrated in the analog domain (low-rate ADC needed) or in the digital one (high-rate ADC needed) The amplitude of the signal at the output of the multiplier is related to the target position Averaging a large number of pulses allows us to increase the SNR, depending on integrator bandwidth and pulse repetition frequency SNRimp f PR 10 log( ) Bint 2012 IEEE Radar Conference, May 7-11, Atlanta RADAR with direct digital receiver Aiming at a Software Defined Radio, in wireless communication industry there is lot of interest on direct digital receiver where the ADC is moving towards the antenna. The dream is that all signal processing (apart antenna impedance matching and first amplification) is done in the digital domain and is fully programmable/configurable What’s for RADAR? 2012 IEEE Radar Conference, May 7-11, Atlanta RADAR with direct digital receiver At least the LNA + RF Filter before the ADC is needed for optimal impedance antenna matching, receiver Noise Figure, out-of-band interference reduction, and to adapt the weak receiver signals to the dynamic range of the high-speed ADC The mixer could be removed at UHF, L or S RADAR bands since Nyquist-rate ADCs exist capable of several GS/s The limit is that high-speed low-power ADC have low dynamic range (typ 5-6 ENOB) posing a limit to RADAR needing wider bit range to face clutter High speed DSP needs high data transfer and storage (large memory size) and high clock frequency thus increasing power consumption High speed medium/high dynamic range ADC needs high power consumption and hence a mixer should be reintroduced 2012 IEEE Radar Conference, May 7-11, Atlanta Main HW RADAR sub-blocks in analog domain Low Noise Amplifier Antenna switch Power Amplifier Mixer Adaptive Gain Control (AGC) amplifier Phase Locked Loop (PLL), Voltage Controlled Oscillator, Quartz Oscillator, phase detectors, phase shifter, frequency dividers Baseband amplifiers and filters Integrators 2012 IEEE Radar Conference, May 7-11, Atlanta Main HW RADAR sub-blocks in digital domain ADC DAC Numerical Controller Oscillator (NCO) Digital Delay Locked Loop (DLL), Digital Clock Manager (DCM) Fast Fourier Transformer Digital filters Direct Digital Synthesis (DDS) for waveform generation Other DSP blocks User interface Networking interface 2012 IEEE Radar Conference, May 7-11, Atlanta RADAR Architectures –Bibliography M. Skolnik, Radar Handbook, 3d Ed, McGraw Hill 2008 M. Skolnik, Introduction to radar systems, McGraw Hill J. Hasch et al., Millimeter-Wave Technology for Automotive Radar Sensors in the 77 GHz Frequency Band, IEEE Tran. Micr Theory and Tech, 2012 Y.-A. Li et al., A fully integrated 77 GHz FMCW radar transciever in 65 nm CMOS, technology IEEE J. Solid-State Circuits 2010 C. Li et al., High-Sensitivity Software-Configurable 5.8-GHz Radar Sensor Receiver Chip in 0.13um CMOS for Noncontact Vital Sign Detection, IEEE Tran. Micr. Theory Tech 2010 D. Zito et al., SoC CMOS UWB pulse radar sensor for contactless respiratory rate monitoring, IEEE Tran. Biomedical Circuits and Systems 2011 S. Saponara, B. Neri et al, Integrated 60 GHz Antenna, LNA and Fast ADC Architecture for Embedded Systems with Wireless Gbit Connectivity, Journal Circuit Systems Computers 2012 B. Neri, S. Saponara, Advances in Technologies, Architectures and Applications of HighlyIntegrated Low-power Radars, IEEE Aerospace Electr. Syt. Mag. 2012 2012 IEEE Radar Conference, May 7-11, Atlanta Outline of the tutorial Scenarios and applications for highly-integrated low-power RADAR RADAR architecture and analog-digital partitioning RF/mm-Wave RADAR transceivers and ADC Ubiquitous low-power RADAR case studies: vital sign detection, automotive driver assistance Digital signal processing for RADAR HW-SW implementing platforms for RADAR digital signal processing Conclusions 2012 IEEE Radar Conference, May 7-11, Atlanta Integration levels and technologies for RADAR transceiver and ADC Radar integration levels System-on-board, -in-package, -on-chip Integrated antenna Technologies for integrated RADAR III-V Transceiver SiGe Transceiver CMOS Transceiver ADC 2012 IEEE Radar Conference, May 7-11, Atlanta RADAR integration levels Different levels of integration are possible for low-power RADARs from single-board to single-chip systems with increasing miniaturization but also increased technology complexity System-on-a-single-Chip (SoC) where completely contained in a single chip the RADAR is System-in-a-Package (SiP) where the RADAR is realized using multiple chips but embedded in a single package Single-board RADAR where the system is realized using multiple integrated circuits mounted on a single board 2012 IEEE Radar Conference, May 7-11, Atlanta Pro/Con of RADAR integration Pro of Highly Integrated RADAR Component assembly is minimized thus reducing cost and increasing reliability and operating lifetime Small size, small weight, low power consumption Increased reproducibility and lower cost for large volume production Con of Highly Integrated RADAR IC design has high Non Recurring Costs (CAD tools and foundry cost, design time and team design cost) cost is minimized only for large volume production A single technology can not offer optimal performance for all RADAR subsystems (CMOS optimal for baseband DSP, not for antenna design or RF power amplifiers or for mm-Wave analog design) Low transmit power limits possible applications to short range ones 2012 IEEE Radar Conference, May 7-11, Atlanta RADAR-System-on-a-Board RADAR with high transmit power and large aperture antenna are realized by assembling multiple electronic boards, each optimized for a RADAR subsystem: antenna subsystem with feed, reflectors, and scanning modules, TWT or Klystron as Power Amplifier modules, MMIC for TX/RX module, multiple boards for digitization and RADAR signal processing, User Interface and networking The next step, for low-power ubiquitous RADAR, is assembling all sub-systems on the same single printed circuit board (PCB) 2012 IEEE Radar Conference, May 7-11, Atlanta RADAR-System-on-a-Board RADAR-System-on-a-Board will assembly on the same board - a single chip of a few mm2 integrating the whole TX and RX chains operating in the RF or mm-Wave domain (CMOS or SiGe or MMIC in III-V technologies) - Solid-state power amplifier (depending on the transmit power needed) - a single chip for baseband digital signal processing (DSP, FPGA or custom IC in CMOS tech.): waveform generation, matched-filtered, pulse compression, range/speed ambiguities resolution, CFAR… - Memory modules (RAM and NV) - ADC/DAC module (if not integrated in the custom IC, CMOS tech.) - antenna (printed on the PCB board if gain, beam-width are enough..) 2012 IEEE Radar Conference, May 7-11, Atlanta RADAR-System-on-Chip or in-Package Thanks to submicron technology scaling CMOS is providing good performance also for RF and mm-Wave low-power transceivers The trend for the future is further increasing the miniaturization level by integrating single-chip the RADAR transceiver plus the A/D and D/A converters and part of the DSP chain, such as an FFT processor CMOS SOI offers further improved performance at high frequencies and for the realization also of passive components (inductors, capacitors, even V/W bands antennas if few dB gain are enough) Only the power amplifier and the antenna will be off-chip 2012 IEEE Radar Conference, May 7-11, Atlanta RADAR-System-on-a-Chip or in-Package Unless very low power and low antenna gain are required SiP is a more viable solution for RADAR than fully SoC 2012 IEEE Radar Conference, May 7-11, Atlanta System-in-Package Technology Options - Different System-in-Package technology options available or under research for mm-wave low-power RADAR or radio applications: - Integrated substrate and/or Multi Chip Module (MCM), even 3D Huei Wang , IEEE SIRF 2010 2012 IEEE Radar Conference, May 7-11, Atlanta Integrated antennas Towards high miniaturized systems the trend is integrating the antenna - at board level (printed antenna on PCB boards) - at package level (e.g. using Low Temperature Co-fired Ceramic LTCC technology to realize multi-layer circuits with integrated passive components including the antenna) - at chip level using MMIC or Silicon on Insulator technologies The higher the frequency, the lower the wavelength (e.g. for 77 GHz RADAR or 60 GHz radio λ is few mm) and hence realizing an integrated antenna becomes feasible However lot of works still to do to achieve the high antenna gain required by RADAR systems 2012 IEEE Radar Conference, May 7-11, Atlanta Example of a single-package chip and integrated antenna Lots of on-chip antenna designs at 60 GHz for short-range consumer radio (the antenna performance are less stringent than for typical RADAR systems) Huei Wang , IEEE SIRF 2010 mm-Wave transceiver chip with double-slot antenna 2012 IEEE Radar Conference, May 7-11, Atlanta V-band transmitter and receiver with on-chip (MMIC) integrated antennas Huei Wang , IEEE Microwave Mag. 2009 2012 IEEE Radar Conference, May 7-11, Atlanta Integrated antenna for RADAR systems RADAR antennas are typically realized off-chip. Long-range Radar automotive applications (100m-200m) require antennas with high gain and high directivity which can not be realized on-chip (e.g. up to 20-25 dB in literature with a patch or horn or dish antenna) For RADARs operating at frequencies below 10 GHz, the wavelength amounts to several cm and hence it is not convenient to integrate the antenna due to the high silicon area occupied Single-chip antennas integrated on MMIC or SOI technology recently proposed in literature for 60 GHz and 77 GHz (few dB gain) useful only for short-range applications and/or using special dielectric lens antenna or smart resonator to improve the characteristics 2012 IEEE Radar Conference, May 7-11, Atlanta Integrated antenna for RADAR systems FMCW RADARs use separate TX and RX antennas Pulsed RADARs can use the same antenna in time-division for TX/RX By using an antenna array, a RADAR scanning effect can be obtained, by realizing beam-forming in the analog domain (phase shifters) or in the digital domain (digital beam-forming) Unlike beam-forming, which presumes a high correlation between signals either transmitted or received by an array, the Multiple-Input Multiple-Output (MIMO) concept exploits the independence between signals at the array elements to improve detection performance In conventional single-antenna RADAR target scattering is regarded as a parameter that degrades performance while MIMO RADAR takes the opposite view capitalizing target scattering to improve performance 2012 IEEE Radar Conference, May 7-11, Atlanta LTCC-integrated antenna example LTCC-integrated example of CW-radar antenna +transceiver for near-field high accuracy measures in industrial scenarios (C. Rusch et al., IEEE EuCAP’11) 2012 IEEE Radar Conference, May 7-11, Atlanta Example of PCB-integrated antenna for 77 GHz automotive RADAR Based on the FMCW principle, 4 77 GHz single microstrip patch antennas combined with parasitic elements to adjust bandwidth and beam-width Antenna elements tilted by 45deg to reduce interference from coming cars The antenna elements serve as feeds for a further dielectric lens resulting in four narrow beams RADAR sensor size of 7.4 x 7 x 5.8 cm3 (J. Hasch et al., IEEE Tran. Micr Theory Tech, 2012) 2012 IEEE Radar Conference, May 7-11, Atlanta Example on-chip integrated antenna for 77 GHz automotive RADAR On-chip antenna elements based on shorted λ/4 microstrip lines, formed by the top and bottom metal layers of the chip backend Most of the radiation dissipated due to conductor and dielectric losses, resulting in a low antenna efficiency (<10%) Quartz glass resonators are positioned above the on-chip patch antenna elements to improve efficiency and bandwidth. The antennas are spaced at a distance to allow direction of arrival (DOA) estimation of a target or provide separate beams illuminating a dielectric lens (J. Hasch et al., IEEE Tran. Micr Theory Tech, 2012) 2012 IEEE Radar Conference, May 7-11, Atlanta Performance of mm-Wave on-chip integrated antenna C. Person, IEEE BCTM 2010 F (GHz) 77 24 24 Tech Gain SiGe GaAs CMOS 60 Dipole Slot Antenna Cavity backed folded dipole Folded Dipole Yagi Spiral 60 Antenna type 4 array Dipole Slot Dipole Zig zag Aperture Coupled Patch Feeder Imped. 2 2 1.5 BW (GHz) 2 1.4 N/A Differential CPW N/A 45Ω 50 Ω 30 Ω CMOS 7 7.8 Balanced 100 Ω 60 60 SiGe CMOS 2.35 10 7 5 CPS N/A 30 Ω N/A 60 SiGe 7 18 CPS 50 Ω 60 60 SiGe SiGe CMOS SOI 8 7 8 9.4 CPW N/A 100 Ω 50 Ω 4.2 15 CPW 50 Ω 2012 IEEE Radar Conference, May 7-11, Atlanta Semiconductor material properties III-V high mobility devices (GaAs, InP, …) suited for high performance at high frequencies (electrons rather hole carrier-based devices) Devices (es. GaN) with wide energy-bandgap and breakdown voltage suited for high voltage high power (e.g. vacuum tube replacement in high transmitter power RADAR) Si devices suited for large volume low-cost since dominate baseband analog&digital processing for TLC, Computers, Consumer Electronics 2012 IEEE Radar Conference, May 7-11, Atlanta FET vs. HBT basics FET (Field Effect transistors) as MOS (Metal Oxide Semiconductor) or HEMT (High Electron Mobility transistor) are unipolar devices (singlecarrier: electrons in HEMT and NMOS, holes in PMOS) while HBT is bipolar (holes and electrons) HBT and FET can act as digital (on/ff) or analog devices (current generator controlled by an input current HBT or an input voltage FET) HBT has an exponential drive characteristics while for FET is quadratic HBT has higher transconductance (gain) HBT has a resistive input impedance while for FET is capacitive FET has lower power consumption in standby mode FET has lower noise at high freq (but it suffers of 1/f noise at low freq) HBT are vertical integrated devices (high current density) while low-power FET are planar devices (higher integration density and easier scaling) 2012 IEEE Radar Conference, May 7-11, Atlanta Semiconductor technologies for RADAR transceivers and ADC In highly integrated low-power RADAR the vacuum-tube technologies (Traveling Wave Tube, klystron, or magnetron,..) adopted for high power high performance RADAR transmitter are completely avoided Competing technologies are solid state ones: - Monolithic microwave integrated circuits (MMIC) in compound III-V semiconductors such as GaAs, In-P using High Electron Mobility FET Transistors (HEMT) - For power amplifier interest on GaN and SiC is increasing - SiGe HBT (hetero-junction bipolar transistor) or BiCMOS (bipolarMOS) IC - Si CMOS (N- and P- MOS) technologies IC - CMOS SOI (Silicon on Insulator) IC 2012 IEEE Radar Conference, May 7-11, Atlanta Competing technologies 2012 IEEE Radar Conference, May 7-11, Atlanta Competing technologies FT Gain/NF ratio Cost Power Suited for Consumption BJT High High Medium High Analog, RF CMOS Medium Medium Low Low Digital BiCMOS High High Medium Medium Analog, RF, mixed-signal HEMT Very High High High Medium mm-wave 2012 IEEE Radar Conference, May 7-11, Atlanta State of the art and trends in RADAR design III-V MMIC III-V MMIC (Monolithic Microwave Integrated Circuit) for radio/RADAR at high frequencies developed since 70’s-80’s (dedicated US funding programs for MMIC tech) MMIC are now a mature technology, offering for analog circuitry (active and passive components) at microwaves and mm-Waves best in class performances (max Ft, NF and gain of LNA, gain and Psat of the PA) MMIC dominates high-end transceivers from tens of GHz to THz Most of MMIC are in GaAs technology (automotive RADAR front-end at 77/79 GHz, 60 GHz applications, 94 GHz imaging, Ka-, V-, W-Radar) 100-nm HEMT GaAs and 500-nm InP HBT tech. available 2012 IEEE Radar Conference, May 7-11, Atlanta State of the art and trends in RADAR design III-V MMIC Limits of poor digital and mixed-signal integration capability not suited for low-cost, large volume, digital-based applications Since 2005 III-V HEMT devices with Ft (the frequency at which the shortcircuit current gain is 1) of 700 GHz are available Today we are going in the THz domain However due to niche market applications, and higher device size, the cost of ICs with III-V technologies is higher than that of silicon technologies. While such cost is affordable in military or space applications, for low-cost low-power civil RADAR applications silicon technologies must be used 2012 IEEE Radar Conference, May 7-11, Atlanta State of the art and trends in RADAR design Si-based IC Si-based technology dominates electronic industry for baseband signal processing and IF (BB and IF circuitry integrated in the same SoC) Since 2000 Si-based technologies (SiGe bipolar or CMOS) used for telecom RF IC (cellular phone transceivers, WLAN, Bluetooth, UHF wireless sensors) Recent technology scaling proves the potential of CMOS, CMOS SOI or BICMOS also for mm-Waves. Si-based mm-wave SoC developed in recent years with commercial technologies for automotive RADAR (24 GHz and now 77/79 GHz) or TLC radio (60-GHz short-range) Technologies: SiGe BiCMOS 130 nm, 180 nm; CMOS/CMOS SOI 130 nm, 90 nm, 65 nm, 45 nm, 32 nm, 28 nm; FDSOI at 28 nm and smaller SiGe BiCMOS 130 nm, 180 nm or CMOS 90 nm, 65 nm used for RADAR 2012 IEEE Radar Conference, May 7-11, Atlanta MOSFET, HBT and BiCMOS for RADAR design In RADAR design HBT are more suited for high-frequency analog circuitry ensuring higher gain and cut-off frequency, lower Noise Figure (NF) MOSFET are more suited for the base-band DSP due to lower power consumption, easier device scaling, higher integration levels, lower cost SiGe BiCMOS (Bipolar Complementary MOS) allows the co-integration of BJT for high-frequency applications and MOS devices for digital circuits although at higher cost At the state of the art the SiGe BiCMOS technology, with 130 nm transistors channel length and an Ft of 230 GHz, offers a good trade-off between cost and performance for single-chip mm-wave RADAR transceivers. Several transceivers at 24, 77, 90, 120 GHz have been proposed in literature using SiGe BiCMOS technology 2012 IEEE Radar Conference, May 7-11, Atlanta MOS technology dominates DSP logic M. Bhor, IEEE ISSCC0’9 2012 IEEE Radar Conference, May 7-11, Atlanta MOS technology dominates memory 2012 IEEE Radar Conference, May 7-11, Atlanta Thanks to technology scaling CMOS becomes suitable also for mm-waves Huei Wang , IEEE SIRF 2010 For future, for large volume applications (60 GHz radio, RADAR?) the trend will be using CMOS also for mm-wave circuits. As an effect of device scaling a Ft higher than 150 GHz can be obtained Realizing a mm-wave transceiver in scaled CMOS technology, as baseband DSP, entails a lower area, higher integration and lower cost for large volume markets but also lower performance vs. 130nm BiCMOS SiGe tech 2012 IEEE Radar Conference, May 7-11, Atlanta Technology benchmark - oscillator Oscillator phase noise (at 1 MHz from the carrier) vs. operating frequency in mm-wave bands in various technologies A. Scavennec et al., IEEE Microwave Mag. 2009 CMOS has comparable performance up to 70 GHz 2012 IEEE Radar Conference, May 7-11, Atlanta Technology benchmark - oscillator Oscillator output power (0 dBm=1 mW) vs. operating frequency in mmwave bands in various technologies A. Scavennec et al., IEEE Microwave Mag. 2009 III-V devices have best in class performance, up to several hundreds of GHz, CMOS realizable within 100 GHz but at lower performance 2012 IEEE Radar Conference, May 7-11, Atlanta Technology benchmark – Power amplifier A. Scavennec et al., IEEE Microwave Mag. 2009 On-chip mm-wave Power Amplifier is a big issue in CMOS technology considering that from RADAR equation the range capability heavily depends on transmitted power levels 2012 IEEE Radar Conference, May 7-11, Atlanta Summary of GaAs vs. Si-based transceivers 2012 IEEE Radar Conference, May 7-11, Atlanta SiGe – processes from different vendors Most offers bipolars and FET and passive components (J. Hasch et al., IEEE Tran. Micr Theory Tech, 2012) 2012 IEEE Radar Conference, May 7-11, Atlanta SiGe – Ft vs. Ic (J. Hasch et al., IEEE Tran. Micr Theory Tech, 2012) Technology evolution allows for higher ft at a given current or the same ft for lower current: this reduces power consumption, power supply and thermal issues reducing size and cost and increasing reliability in harsh environments 2012 IEEE Radar Conference, May 7-11, Atlanta SiGe – Power Amplifier capability 2012 IEEE Radar Conference, May 7-11, Atlanta SiGe vs. CMOS vs. III-V technologies For applications at mm-Wave bands lower NF expected for SiGe and CMOS hence the same performance available with lower transmit power and hence small size and lower costs Source: International technology Roadmap for semiconductors (ITRS) 2012 IEEE Radar Conference, May 7-11, Atlanta CMOS capability- LNA (Gain) Gain, dB - CMOS LNA 25 20 15 10 1 F (GHz) 10 100 State-of-art designs up to 10-20 GHz in CMOS technology have good performances: gain higher than 20 dB At higher frequencies the performances start decreasing. Around 77 GHz (W-band) acceptable but non optimal performance are achieved today (gain lower than 20 dB) 2012 IEEE Radar Conference, May 7-11, Atlanta CMOS capability- LNA (NF) NF, dB - CMOS LNA 10 8 6 4 2 0 1 F (GHz) 10 100 State-of-art designs up to 10-20 GHz in CMOS technology have optimal performances: NF lower than 4 dB At higher frequencies the performances start decreasing Around 77 GHz (W band) acceptable but non optimal performance are achieved today (NF higher than 4 dB) 2012 IEEE Radar Conference, May 7-11, Atlanta CMOS capability- PA Pout TX, dBm - CMOS PA At frequencies of few GHz an integrated PA up to 1 W peak power is possible The peak power of integrated PA decreases with frequency At high frequency (77 GHz or higher, W band ) the peak power is < 10 dBm (10 mW) Only short range applications are possible with high duty cycle or external off-chip PA are needed 35 30 25 20 15 10 5 0 1 10 F (GHz) 100 1000 2012 IEEE Radar Conference, May 7-11, Atlanta Issues in Si-based transceivers Another issue in Si-based transceivers is the design of low-losses passive components such as CoPlanar Stripline or Waveguides (CPS/CPW) At mm-Wave frequencies, due to very short wavelength, the antenna integration is possible but low efficiency and low gain are main concerns Solution migration to SOI technologies 2012 IEEE Radar Conference, May 7-11, Atlanta CPW, CPS and Antenna In CMOS SOI In SOI technology the high resistivity of the substrate on which n- and pMOSFET are created allows dielectric isolation of circuit elements Junction capacitances are reduced increasing maximum operating freq Reduced noise coupling between digital-analog parts integrated in the same chip The performances of CPS, CPW or antennas in SOI CMOS are improved due to a reduced amount of energy loss in the supporting substrate 2012 IEEE Radar Conference, May 7-11, Atlanta Integrated antenna in CMOS SOI Incidence of substrate resistivity on achievable radiation efficiency and gain (bulk 20 Ω/cm, SOI > 1000 Ω/cm) F. Gianesello, IEEE SOI 2010 2012 IEEE Radar Conference, May 7-11, Atlanta Quality factors of inductance in CMOS SOI F. Gianesello, IEEE SOI 2010 2012 IEEE Radar Conference, May 7-11, Atlanta CMOS SOI useful also for high speed digital applications vs. bulk CMOS P. Simonen, IEEE IMC 2001 2012 IEEE Radar Conference, May 7-11, Atlanta Antenna in CMOS SOI Single-chip integrated antennas on 65 nm CMOS SOI recently proposed in literature: a double-slot antenna with CPW feed, tunable to operate in different mm-wave frequencies has been proposed with a gain of 4.4 dB (at 60 GHz) and an area occupation of 1 mm2 2012 IEEE Radar Conference, May 7-11, Atlanta Antenna in CMOS SOI 2012 IEEE Radar Conference, May 7-11, Atlanta ADC – main cost figures The ADC is gaining a key role in RADAR systems due to trend of digitization of the signal processing functionalities Main cost figures of interest are: Bits (Effective number of bits –ENOB- rather than nominal bits) Sampling frequency, Number of channels Integral and Differential Non Linearity (INL, DNL) Signal-to-Noise and Distortion Ratio (SNDR) Spurious Free Dynamic Range (SFDR) Aperture uncertainty Area, power consumption 2012 IEEE Radar Conference, May 7-11, Atlanta ADC – RADAR requirements RADAR architectures may require ADC operating at intermediate frequency and not only at base band frequency: sampling rates up to tens, or even hundreds, of MS/s can be required in highly digitized RADAR The number of ADC channels depends on the system architecture (1 or 2 for I-Q for each of the K RADAR channels, e.g. 4 in last LRR automotive Bosch RADAR) The bit resolution is typically higher than 10 b, e.g. a nominal 14b -16 b required for 12 b-14 b ENOB (at least 70 dB dynamic range) Specs on non linearity and aperture uncertainty ta depends, together with ENOB bits N, also on the required SNR level 2012 IEEE Radar Conference, May 7-11, Atlanta Comparing performance of different architecture types L . Bin et al., IEEE Signal Proc. Mag., 2005 Absolute data not updated (see next slide) but useful relative architecture comparison 2012 IEEE Radar Conference, May 7-11, Atlanta ADC – Performance available (2011) M. Mishali et al. IEEE Signal Proc. Mag. 2011 2012 IEEE Radar Conference, May 7-11, Atlanta ADC – Conclusions ADC sampling at several GS/s available but too-high power consumption per channel and too low bit resolution for typical RADAR dynamic range and SNR requirements Mixer is needed, full-digital RADAR is not convenient IF ADC can reach the required bit resolution and sampling rate with good power performance (e.g. 100 MS/s, 16-b nominal at least 14 ENOB) with power consumption within hundreds of mW Pipelines or time-interleaved SAR can be suited architectures Figure of Merit (FoM) in scaled CMOS technologies can be in the range fJ to pJ per conversion-step 2012 IEEE Radar Conference, May 7-11, Atlanta RADAR Technologies – Recent Bibliography J. Hasch et al., Millimeter-Wave Technology for Automotive Radar Sensors in the 77 GHz Frequency Band, IEEE Tran. Micr. Theory and Tech, 2012 T. Mitomo et al., A 77 GHz 90 nm CMOS transceiver for FMCW radar applications, IEEE J. SolidState Circuits 2010 Y.-A. Li et al., A fully integrated 77 GHz FMCW radar transciever in 65 nm CMOS, technology, IEEE J. Solid-State Circuits 2010 W. Menxel et al., Antenna Concepts for Millimeter-Wave Automotive Radar Sensors, Proceedings of the IEEE, 2012 V. Giammello et al., A Transformer-Coupling Current-Reuse SiGe HBT Power Amplifier for 77GHz Automotive Radar, accepted on IEEE Tran. Micr. Theory and Tech. B. Neri, S. Saponara, Advances in Technologies, Architectures and Applications of HighlyIntegrated Low-power Radars, IEEE Aerospace Electr. Syt. Mag. 2012 B. Brannon et al., Analog devices AN-501,Aperture Uncertainty and ADC System Performance M. Mishali et al., Sub-nyquist sampling, IEEE Signal Proc. Mag. 2011 L . Bin, et al., Analog-to-digital converters, IEEE Signal Proc. Mag., 2005 P. Harpe et al., A 7-to-10b 0-to-4MS/s Flexible SAR ADC with 6.5-to-16fJ/conversion-step, IEEE ISSCC 2012 Bei Yu et al, A 14-bit 200-MS/s Time-Interleaved ADC with Sample-Time Error Detection and Cancelation, IEEE ASSCC 2011 Y. M. Greshishchev, A 40GS/s 6b ADC in 65nm CMOS, IEEE ISSCC 2010 2012 IEEE Radar Conference, May 7-11, Atlanta RADAR Technologies – Recent Bibliography D. Liu et al., Integration of Array Antennas in Chip Package for 60-GHz Radios, Proceedings of IEEE 2012 F. Gianesello, SOI CMOS Technology for Wireless Applications: Current Trends and Perspectives, IEEE Int. SOI conf. 2010 C. Person, Antennas on Silicon for millimeter-wave applications – status and trends, IEEE BCTM 2010 A. Scavennec et al., Semiconductor technologies for higher frequencies, IEEE Microwave Mag. 2009 Huei Wang, Current status and future trends for Si and Compound MMICs in millimeter wave regime and related issues for System on Chip (SoC) and System in Package (SiP), IEEE SIRF 2010 M. Bhor, The New Era of Scaling in an SoC World, IEEE ISSCC 2009 S. Saponara , B. Neri et al, Feasibility study and on-chip antenna for fully integrated μRFID tag at 60 GHz in 65 nm CMOS SOI, IEEE RFID-TA 2011 S. Saponara, B. Neri et al, Integrated 60 GHz Antenna, LNA and Fast ADC Architecture for Embedded Systems with Wireless Gbit Connectivity, Journal Circuit Systems Computers 2012 Huei Wang et al., MMICs in the millimiter-wave regime, IEEE Microwave Mag. 2009 P. Simonen, Comparison of bulk and SOI CMOS technologies in a DSP processor circuit implementation, IEEE ICM 2001 C. Rusch et al., W-Band Vivaldi Antenna in LTCC for CW Radar Near field Distance Measurements, IEEE EuCAP 2011 2012 IEEE Radar Conference, May 7-11, Atlanta Outline of the tutorial Scenarios and applications for highly-integrated low-power RADAR RADAR architecture and analog-digital partitioning RF/mm-Wave RADAR transceivers and ADC Ubiquitous low-power RADAR case studies: vital sign detection, automotive driver assistance Digital signal processing for RADAR HW-SW implementing platforms for RADAR digital signal processing Conclusions 2012 IEEE Radar Conference, May 7-11, Atlanta Ubiquitous low-power RADAR architecture case studies Why a RADAR as contactless health sensor? UWB pulsed bio RADAR Doppler bio RADAR Why a RADAR for automotive driver assistance? Standards, frequency and technology selection Automotive RADAR spec and commercial devices FMCW RADAR architecture SiGe automotive RADAR CMOS automotive RADAR 2012 IEEE Radar Conference, May 7-11, Atlanta Needs for health monitoring Due to aging population and needs of national health system cost reduction there is high interest in monitoring electronic health devices, specially for heart or respiratory pathologies (CHF, BPCO) A low-cost RADAR can be used as contactless sensor for monitoring heart rate or breath rate in patient with cardiopulmonary illness or to monitors babies while sleeping against sudden infant death syndrome Acquired RADAR data are then processed by an home gateway an send to Hospital Information Server 2012 IEEE Radar Conference, May 7-11, Atlanta Why RADAR for vital signs sensing A RADAR can sense the mechanical activity of heart of chest instead of the electrical one and from that the heart or breath rate can be detected and estimated The RADAR bio sensor can ensure continuous home monitoring avoiding wires, gels, LOS requirement, electrodes of conventional solutions based on SpO2 measures and multi-lead ECG acquisition (prone to electrode error positioning when done outside hospital ) Sensor RADAR requirements are low-power and high miniaturization for portability/wearability, short-range, low cost for large volume market CMOS silicon integrated approach should be followed No ionizing effect 2012 IEEE Radar Conference, May 7-11, Atlanta Which RADAR architecture? Recent proposals based on Ultra Wide Band pulsed RADAR (within 3-10 GHz range) for very low power and low complex short-range (tens of cm) contactless vital sign detection Correlator-type receiver (Zito, De Rossi, Neri, architecture 20072010, implementation in 90 nm CMOS 2011-2012), (Ta-Shun Chu et al., 130 nm CMOS implementation in 2011) Doppler RADAR based on transmission of un-modulated signal and the analysis of the received echo phase modulated by the chest/heart movement (Dracourt 2004, several works by J. Li, J. Lin et al.). Various designs at 450 MHz, 1.6 GHz, 2.4 GHz, 5.8 GHz in various technologies (250 nm CMOS and BiCMOS, 130 nm CMOS,..) 2012 IEEE Radar Conference, May 7-11, Atlanta UWB pulsed RADAR Very low power spectral density (-41.3 dBm/MHz from 3.1 to 10 GHz, 14 bands each of 500 MHz) – ETSI/FCC regulation Robust against interference No ionization effect Transceiver activated only when needed (low power consumption due to low duty cycling) 2012 IEEE Radar Conference, May 7-11, Atlanta UWB pulsed RADAR Due to low power the RADAR is limited to detection of heart/breath rate of few Hz, at distances of tens of cm Single TX/RX antenna multiplexed in time Transmitter: pulse generator in the TX path transmits short pulses, typically 200-400 ps, towards the human body with a pulse repetition frequency (fPR) > 1 MHz so that the heart can be considered motionless between consecutive pulses. The energy level of each pulse amounts to few pJ Zito et al., IEEE TBCS, 2011 2012 IEEE Radar Conference, May 7-11, Atlanta UWB pulsed RADAR Low-complex cross correlation receiver architecture (differential path to improve EMI robustness) The output signal is modulated by the heart movement, acting as a target with a cross sections of tens of cm2 After a TOF dependant on the target distance (e.g. few ns for 15-30 cm distance) the signals reflected by the target is captured by the RX antenna RADAR works in ranging mode (delay varied to span the range of interest and identify the target) or tracking mode (once detected, the delay is fixed for target tracking) Vo (t) at multiplier output Vout (t) at integrator output 2012 IEEE Radar Conference, May 7-11, Atlanta Receiver-type correlation The signal amplified by the LNA is multiplied with a delayed replica of the transmitted pulses generated on-chip by a Shaper circuit The amplitude of the signal at the output of the multiplier is related to the heart position. Since vital signs vary within a few Hertz, an integrator 3-dB band (Bint) of 100Hz allows an accurate detection. Averaging a large number of pulses allows us to increase the SNR (e.g. the SNR improvement is 40 dB with Bint=100 Hz and fPR=1 MHz) SNRimp f PR 10 log( ) Bint 2012 IEEE Radar Conference, May 7-11, Atlanta Flicker noise issue at receiver At the low frequency (DC-100 Hz) of the baseband bio-signal the MOS transistors used for RADAR-on-chip integration suffer 1/f flicker noise, much higher than thermal noise (KTB term) The total NF of a multi-stage RX path is NFtot NF1 ( NF2 1) / G1 ( NF3 1) / G2G1 To have NFtot~NFLNA a gain of at least 20 dB is required for the LNA stage provided that NF2<10-15 dB, a value feasible at state of the art LNA realized in 90 nm CMOS with 22.7 db gain (3-stage), 6 dB NF, -19 dBm ICP1,<35 mW, <0.7 mm2 area Fully differential Gilbert cell mixer in 90 nm CMOS with NF 14.3 dB, 12 dB Gain, 3.7 mW, 0.3 mm2 area The integrator realized with a 3-stage gm-c cell (cut-off 145 Hz, 1 mW) 2012 IEEE Radar Conference, May 7-11, Atlanta Transmitter Pulse generator based on triangular pulse generation (TPG) and shaping network (SN): two triangular pulsed (delayed by a pulse period) generated and shaped by a CMOS differential pair 2012 IEEE Radar Conference, May 7-11, Atlanta Performance of state of art UWB RADARs fPR in the range 1-10 MHz, pulses of 300-400 ps and 7-8 pJ energy The baseband digital processing can be realized with a simple MCU since low-speed ADC is required (12bit ADC in ISSCC’11), low data rate serial connection, only control tasks to be implemented Whole chip by Zito et al. in 90 nm CMOS has <2 mm2 area, < 80 mW power consumption, 40dB SNR integrator improvement, <1m range RADAR packaged in QFN32 and mounted on a test-board including antennas (TX and RX) with 2.3 dBi gain at 3.5 GHz, band 2.8 to 5.4 GHz covering the range of interest from 3 to 5 GHz. Whole chip by Ta-Shun Chu et al. in 130 nm CMOS has <12 mm2 area, <700 mW power consumption, 34.7 dB SNR integrator improvement, <15 m range 2012 IEEE Radar Conference, May 7-11, Atlanta Doppler Bio RADAR In DR for noncontact vital sign detection an un-modulated signal is transmitted towards the human body, where it is phase modulated by the physiological movement, then reflected and captured by the radar receiver (h and r are heart and respiratory rate respectively) C. Li et al., IEEE TIM 2010 2012 IEEE Radar Conference, May 7-11, Atlanta Doppler Bio RADAR Using the same un-modulated TX signal as the RX LO signal, the receiver down-converts the received signal into baseband with no frequency offset. Here it is digitized and the physiological movement (i.e., heartbeat and respiration) can be identified by DSP (FFT or wavelet proposed in literature) C. Li et al., IEEE Tran. Micr. Theory Tech. 2010 2012 IEEE Radar Conference, May 7-11, Atlanta Doppler Bio RADAR A doppler RADAR with 5.8 GHz central frequency and 1 GHz bandwidth has been realized in 130 nm CMOS technology powered by 1.5V batteries and using direct conversion quadrature architecture The LNA has 2.56 dB NF and 24 dB gain The system is sized to ensure 10-20 dB SNR, using a baseband sampling rate of 20 Hz (ADC is sized for 1 kHz) The whole RX chain has min 37 dB gain, -32 dBm P1dB sensitivity of -101 dBm and a Off-chip 2x2 patch antennas (separate for TX and RX) were used With 7 dBm output power detection up to 3 m can be done The received power is from -37 dBm to -61 dBm when the target distance increases from 50 cm to 2 m 2012 IEEE Radar Conference, May 7-11, Atlanta Vital Signs Detection RADAR – Bibliography D. Dracourt et al., Range Correlation and I/Q Performance Benefits in Single-Chip Silicon Doppler Radars for Noncontact Cardiopulmonary Monitoring, IEEE Tran. Micr. Theory Tech 2004 D. Zito et al., SoC CMOS UWB pulse radar sensor for contactless respiratory rate monitoring, IEEE Tran. Biomedical Circuits and Systems 2011 C. Li et al., Accurate doppler radar noncontact vital sign detection using the RELAX algorithm, IEEE Tran. Instr. and Measur. 2010 C. Li et al., Radar Remote Monitoring of Vital Signs, IEEE Microwave Mag. 2009 D. Zito et al., A 90nm CMOS SoC UWB pulse radar for respiratory rate monitoring, IEEE ISSCC’11 Ta Shun Chu et al., A short-range UWB impulse-radio CMOS sensor for human feature detection, IEEE ISSCC’11 G. Reyes et al., VitalTrack: a doppler radar sensor platform for monitoring activity levels, IEEE BioWireleSS 2012 M. Mercuri et al, SFCW microwave radar for in-door fall detection, IEEE BioWireleSS 2012 Tariq et al., Vital signs detection using Doppler radar and continuous wavelet transform, IEEE EuCAP 2011 A. Lazaro et al., Vital signs monitoring using Impulse Based UWB Signal, IEEE EuMA 2011 G. Blumrosen et al., Noncontact tremor characterization using low-power wideband radar technology, IEEE Tran. Biomedical Eng. 20120 C. Li et al., High-Sensitivity Software-Configurable 5.8-GHz Radar Sensor Receiver Chip in 0.13um CMOS for Noncontact Vital Sign Detection, IEEE Tran. Micr. Theory Tech 2010 C. GU et al., Instrument-based noncontact doppler radar vital sign detection system using heterodyne digital quadrature demodulation architecture, IEEE Tran.Conference, Instr. and Measur. 2010 2012 IEEE Radar May 7-11, Atlanta Automotive RADAR – Why? Automotive RADARs as core sensor (range, speed) of driver assistance systems: long range (LRR) for Adaptive Cruise Control, medium range (MRR) for cross traffic alert and lane change assist, short-range (SRR) for parking aid, obstacle/pedestrian detection W.r.t. to other sensing technologies RADAR is robust in harsh environments (bad light, bad weather, extreme temperatures) Multiple RADAR channels required for additional angular information Data fusion in the digital domain with other on-board sensors 2012 IEEE Radar Conference, May 7-11, Atlanta Automotive RADAR –a bit of Story First tentative for mm-wave automotive RADAR since 70’s (but integrated-unfriendly technologies lead to large size, high cost) Since 1998-1999 first generation of RADAR sensors (Daimler, Toyota) Since 2000 MMIC GaAs-based RADAR in premium cars Last generation based on 180/130 nm SiGe chipset and advanced packaging with integrated antenna commercially available (e.g. Bosch) Radar CMOS transceivers recent announced in 65 nm and 90 nm High RADAR frequency (small λ) allows small size and weight; highly integration with SiGe and future CMOS tech. will reduce assembly and testing costs and hence final user cost much below US$1000 Market expanding at 40%/year and is expected increasing with all premium/middle cars having a RADAR in next years (7% of all vehicles sold world-wide, mainly in Europe, Japan and US, will have RADARs) 2012 IEEE Radar Conference, May 7-11, Atlanta Automotive RADAR – Regulation 24 GHz and 77 GHz are the dominant bands for automotive 77-81 GHz is promising since offers 4 GHz bandwidth 2012 IEEE Radar Conference, May 7-11, Atlanta Automotive RADAR – 24 vs. 77 GHz 77 GHz is more challenging for designers: given the same technology the node performances (gain, NF, ..) at 24 GHz are better but 77 GHz RADARs reduce size, volume, weight and hence cost 77 GHz offers more opportunity for high performance RADAR design: λ is 3 times smaller (few mm) smaller antenna size for a given beamwidth spec and/or better angular separability for the same size Combination of high transmit power and high bandwidth available at 77 GHz for long range operation and fine distance separability Due to SiGe and CMOS technologies evolution 77 GHz is affordable 77-81 GHz (under regulation worldwide) offers 4 GHz Bandwidth with EIRP max PSD of - 3dBm/MHz (-9 dBm/MHz outside the vehicle) 2012 IEEE Radar Conference, May 7-11, Atlanta Automotive RADAR – Technical spec (J. Hasch et al., IEEE Tran. Micr Theory Tech, 2012) 2012 IEEE Radar Conference, May 7-11, Atlanta Automotive commercial RADARs (J. Hasch et al., IEEE Tran. Micr Theory Tech, 2012) Product size is in the order of 7 cm per side in LRR, 5 cm per side or lower in MRR and SRR Products exist with mechanical (slowly, increased size) or electronic beam forming (increased electronic complexity affordable in new tech nodes) Multi channel transceivers required All use FMCW RADAR technique 2012 IEEE Radar Conference, May 7-11, Atlanta FMCW Automotive RADAR principle f Target VCO Quartz Osc fref Phase det. t Loop filter PA R Freq. divider Interface User I/O 77 GHz TOF=2R/c LO Modulation control (B, Tm) X LNA RF f TX RX DSP FFT & logic ADC amp f fbeat fbeat t TOF t Received signal at the ADC 2012 IEEE Radar Conference, May 7-11, Atlanta FMCW Automotive RADAR equations Receiver power and SNR (min 10 dB required) Pt Gt Gr 2 Pr (4 ) 3 R 4 fd 2 vr Pr SNR K T NF BWFFT cTcpi ( f f ) R 2B 2 c ( f f ) vR 2 fc 2 Range and relative speed detection from batiment frequency analysis (with FFT in digital domain) The FMCW sweep frequency B and the time sweep determine the achievable range resolution and speed resolution 2012 IEEE Radar Conference, May 7-11, Atlanta Automotive RADAR – Technology Selection Automotive RADAR based on GaAs MMIC in production, multiple chips and boards needed thus increasing assembly and testing cost Last generation based on SiGe chipset (HBT or BiCMOS): less ICs thus reducing cost, already mature technology for 77 GHz, 2 boards (1 for radar transceiver and 1 for RADAR baseband processing) W.r.t CMOS SiGe today offers higher fmax, up to 200-300 GHz (at least 20% reduction is expected at extreme temperatures), higher output power (Psat of 15-16 dBm available) and is mature for mass production CMOS transceivers in 90 nm and 65 nm for 77 GHz already published, some improvements needed for automotive mass production but CMOS has high integrating potential (transceivers and baseband DSP) Today SiGe-based RADAR, tomorrow CMOS-based RADAR expected given technology evolution and trends towards more digital RADAR 2012 IEEE Radar Conference, May 7-11, Atlanta Automotive RADAR with SiGe mm-Wave T/R Commercially available from Bosch based on SiGe Infineon Chipset 2 PCB boards FCMW modulation LRR 7dBm Pout, 4 channels (2 TX/RX, 2 RX only), dielectric lens antenna provides high gain for Rmax 250m Alternative versions with PCB or onchip Integrated antennas B. Fleming, IEEE Vehicular Tech. Mag. 2012 2012 IEEE Radar Conference, May 7-11, Atlanta Block diagrams of automotive RADAR with SiGe mm-Wave T/R (J. Hasch et al., IEEE Tran. Micr Theory Tech, 2012) 2012 IEEE Radar Conference, May 7-11, Atlanta Performance of transceivers in CMOS technology JSSC2010 JSSC2010 IEEEAESM 2012 65 nm CMOS 90nm CMOS guidelines 243 mW 517 mw N/A 1 mm2 6.8 mm2 N/A 77 GHz 77 GHz 77 GHz Resolution N/A < Doppler resolution N/A ~5 km/h Range and antenna gain with off-chip 24 dB antenna 8m with off-chip 20 dB antenna >100m with off-chip 24 dB antenna, <10 m with on-chip 4 dB antenna On-chip PA output 5 dBm -2.8 dBm <10 dBm Technology Power consumption Area Carrier frequency RX gain LNA+mixer+IF Sweep time Tm 1.5 ms 23 dB LNA+mixer 0.5 ms Sweep freq. B 700 MHz 614 MHz FFT points 2048, 3 MS/s 4096, 2 MS/s ~38.7 dB ~40 dB ~1 ms 150-750 MHz up to 8192, few MS/s 2012 IEEE Radar Conference, May 7-11, Atlanta Automotive RADAR – Recent Bibliography J. Hasch et al., Millimeter-Wave Technology for Automotive Radar Sensors in the 77 GHz Frequency Band, IEEE Tran. Micr Theory and Tech, 2012 T. Mitomo et al., A 77 GHz 90 nm CMOS transceiver for FMCW radar applications, IEEE J. SolidState Circuits 2010 Y. Kawano et al., A 77 GHz transceiver in 90 nm CMOS,” IEEE ISSCC 2009 Y.-A. Li et al., A fully integrated 77 GHz FMCW radar transciever in 65 nm CMOS, technology, IEEE J. Solid-State Circuits 2010 R. Stevenson, A driver’s sixth sense, IEEE Spectrum 2011 S. Trotta et al., An RCP Packaged Transceiver Chipset fo Automotive LRR and SRR Systems in SiGe BiCMOS Technology, IEEE Tran. Micr- theory and tech, 2012 B. Fleming, Recent Advancement in Automotive Radar Systems, IEEE Vehicular Tech. Mag. 2012 W. Menxel et al., Antenna Concepts for Millimeter-Wave Automotive Radar Sensors, Proceedings of the IEEE, 2012 V. Giammello et al., “A Transformer-Coupling Current-Reuse SiGe HBT Power Amplifier for 77GHz Automotive Radar”, accepted on IEEE Tran. Micr Theory and Tech B. Neri, S. Saponara, Advances in Technologies, Architectures and Applications of HighlyIntegrated Low-power Radars, IEEE Aerosp. Eelectr. Syst. Mag. 2012 2012 IEEE Radar Conference, May 7-11, Atlanta Outline of the tutorial Scenarios and applications for highly-integrated low-power RADAR RADAR architecture and analog-digital partitioning RF/mm-Wave RADAR transceivers and ADC Ubiquitous low-power RADAR case studies: vital sign detection, automotive driver assistance Digital signal processing for RADAR HW-SW implementing platforms for RADAR digital signal processing Conclusions 2012 IEEE Radar Conference, May 7-11, Atlanta Main signal processing functions in classical RADARs: Digital range compression Single and multi beamforming Space-time adaptive processing CFAR techniques Direction of arrival (DOA) estimation Tracking 2012 IEEE Radar Conference, May 7-11, Atlanta Digital pulse compression Frequency of phase modulated long signals are transmitted and compressed in reception for improving range resolution. The receiver is a matched filter/correlator. The correlation can be done in time or frequency domain. The most common is the frequency domain through FFT. Many pulses are then integrated for target detection. 2012 IEEE Radar Conference, May 7-11, Atlanta Digital pulse compression The FFT/IFFT is the core of the digital pulse compression 8-point, Radix-2 FFT 2012 IEEE Radar Conference, May 7-11, Atlanta Digital pulse compression 2012 IEEE Radar Conference, May 7-11, Atlanta Single and multi beamforming To form a beam in a particular direction, each element of the array needs to be followed by a time delay such that when all the outputs are summed they add up coherently to form a beam Analog beamforming Figures from Skolnik book Digital beamforming 2012 IEEE Radar Conference, May 7-11, Atlanta Single and multi beamforming Analog beamforming used to implement subarrays, followed by digital receivers and digital phase shifter. In digital domain, the beamfomers are FIR filters with complex weigths Analog/digital beamforming Figure from Skolnik book 2012 IEEE Radar Conference, May 7-11, Atlanta Space-Time Adaptive Processing STAP is an advanced signal processing technique used in airborne RADAR applications to suppress interferences by performing jointly data-adaptive beamforming (space domain) and Doppler processing (time domain) 2012 IEEE Radar Conference, May 7-11, Atlanta Space-Time Adaptive Processing R. Klemm, J. Ward, STAP tutorial, 2008 2012 IEEE Radar Conference, May 7-11, Atlanta STAP: data cube R. Klemm, J. Ward, STAP tutorial, 2008 2012 IEEE Radar Conference, May 7-11, Atlanta Optimum STAP R. Klemm, J. Ward, STAP tutorial, 2008 2012 IEEE Radar Conference, May 7-11, Atlanta Optimum STAP The core of the STAP is the inversion of the disturbance covariance matrix, adaptively estimated both in time and space domains using secondary vectors. Direct computation of the weight vector w by inverting Rˆ is not practical for STAP due to the huge dimension of Rˆ itself. Generally the STAP system try to solve the equivalent linear system ˆ kv Rw through the QR decomposition after covariance matrix estimation. The number of RFLOPs with QR decomposition is of order of (NM)3. QR decomposition can be applied directly to secondary vectors avoiding the matrix estimation. With L secondary vectors the number of RFLOPs is 8 L MN 2.67 MN 2 3 2012 IEEE Radar Conference, May 7-11, Atlanta Reduced dimension STAP R. Klemm, J. Ward, STAP tutorial, 2008 2012 IEEE Radar Conference, May 7-11, Atlanta Incoherent CFAR detector (only amplitude information is used) 2012 IEEE Radar Conference, May 7-11, Atlanta Incoherent CFAR detectors Depending on the adaptive threshold Z we have different CFAR techniques CA-CFAR : Z=mean(X1, X2,…. XN) GO-CFAR: Z1=mean(X1, X2,…. XN/2) Z2=mean(XN/2+1, XN/2+2,…. XN) Z=max(Z1, Z2) SO-CFAR: Z1=mean(X1, X2,…. XN/2) Z2=mean(XN/2+1, XN/2+2,…. XN) Z=min(Z1, Z2) OS-CFAR: Y=sort(X1, X2,…. XN) Z=YK 2012 IEEE Radar Conference, May 7-11, Atlanta Coherent adaptive CFAR detectors (both I and Q components are used) For Gaussian target in Gaussian clutter we have: AMF (z ) : 2 ˆ 1z H1 v R > H ˆ 1 v R v < H0 H target steering vector complex envelop of the observed signal 2 ˆ 1z H1 v R > (z H R ˆ 1z ) ˆ 1 v < vH R H0 H ANMF (z ) : GLRT (z ) : 2 ˆ 1z H1 v R > 1 1 z H R ˆ 1z ˆ 1 v ) < K (vH R H0 H clutter covariance matrix estimated by secondary vectors 2012 IEEE Radar Conference, May 7-11, Atlanta DOA estimation - Monopulse It needs two beams for each angular coordinate Sum and difference patterns are used It can use single or multiple pulses H. Rohling, Automotive Radar tutorial, 2008 2012 IEEE Radar Conference, May 7-11, Atlanta DOA estimation - Monopulse Normalized antenna pattern 1 0.5 Example, with Gaussian antenna pattern and -3dB beamwidth=3o 0 -0.5 -1 -8 -6 -4 -2 0 2 4 6 8 azimuth (degrees) Ideally, without noise 2012 IEEE Radar Conference, May 7-11, Atlanta Tracking - Linear Kalman filter Kk P P R * k Object parameters Measurement Sensor t xk t y k yk vxk v yk t xk t yk yk vxk v yk Linear model t xk t yk vxk v yk 1 0 0 0 H. Rohling, Automotive Radar tutorial, 2008 0 T 1 0 0 0 1 0 * k Linear Kalman Filter 1 Track estimate Prediction t xk* * t yk yk * vxk * v yk 0 t xk 1 T t yk 1 0 vxk 1 1 v yk 1 tˆxk ˆ t yk yˆ k vˆxk vˆ yk y k Ay k 1 2012 IEEE Radar Conference, May 7-11, Atlanta Linear Kalman filter Prediction step: - Prediction estimation based on Process matrix A: yˆ *k Ayˆ k 1 - Track estimation: Pk* APk1AT Q Track estimation step - Prediction accuracy estimation based on tracking accuracy and process noise: yˆ k yˆ k* K k yk yˆ k* - Tracking accuracy estimation: Pk I K k P * k Kalman gain based prediction accuracy and measurement noise Kk P P R * k * k 1 2012 IEEE Radar Conference, May 7-11, Atlanta Some applications 2012 IEEE Radar Conference, May 7-11, Atlanta Automotive RADARs Functionalities: •Autonomous cruise control (ACC) •ACC support with Stop&Go functionality •Pre-crash sensing •Collision mitigation and avoidance •Parking aid (forward and reverse) •Lane change assistant •Rear crash collision warning Goals: Simultaneous measurement of obstacle range, radial velocity and angle 2012 IEEE Radar Conference, May 7-11, Atlanta Long Range RADAR (LRR) Observation area Requirements for LRR RADAR Functionalities: Autonomous Cruise Control (ACC) Collision warning 2012 IEEE Radar Conference, May 7-11, Atlanta LRR for vehicular applications Transmitted signals Some special waveforms must be used to fulfill the requirements of simultaneous range and radial velocity measurement: •Pulse Doppler •FMCW with (at least) up- and down-chirp signals •Frequency Shift Keying (FSK) CW •MFSK CW 2012 IEEE Radar Conference, May 7-11, Atlanta LRR for vehicular applications Single channel scheme Bsw t 2 sT (t ) cos 2 fT t TCPI 2 sR (t ) sT t t 2B 2 f B ,1 f D f vr sw R cTCPI 2B 2 f B ,2 f D f vr sw R cTCPI Parameters for an LRR radars 24 GHz or 77 GHz H. Rohling, Automotive Radar tutorial, 2008 2012 IEEE Radar Conference, May 7-11, Atlanta LRR for vehicular applications FFT: applied on each segment (up and down chirp) frequency and range estimation accuracy depends on the number of FFT points. Typical values: 128-4096 points up chirp H. Rohling, Automotive Radar tutorial, 2008 down chirp f B ,1 f B ,2 2012 IEEE Radar Conference, May 7-11, Atlanta LRR for vehicular applications With only one up and down chirp , two targets are ambiguous. With four chirps two targets can be easily resolved H. Rohling, Automotive Radar tutorial, 2008 2012 IEEE Radar Conference, May 7-11, Atlanta LRR for vehicular applications CFAR techniques for detection Most common: 1D-CA-CFAR applied on FFT output (frequency domain) Signal processing DOA estimation Most common: Monopulse with two antennas Tracking techniques after detection Most common: linear KF 2012 IEEE Radar Conference, May 7-11, Atlanta UWB RADARs Chacteristics: Low power consumption Low cost circuitry Low probability of detection Different materials and environments distort pulses differently Applications: Vehicular RADAR (Short range) Ground Penetrating RADAR (GPR) Trough-the-wall imaging Medical RADARs 2012 IEEE Radar Conference, May 7-11, Atlanta UWB RADAR definition The amount of spectrum occupied by a signal transmitted by a UWB-RADAR (i.e. the bandwidth of the UWB signal) is at least 25% of the center frequency. Thus, a UWB signal centered at 2 GHz would have a minimum bandwidth of 500 MHz and the minimum bandwidth of a UWB signal centered at 4 GHz would be 1 GHz. Often the absolute bandwidth is bigger than 1 GHz. narrowband UWB noise 2012 IEEE Radar Conference, May 7-11, Atlanta UWB RADAR for medical applications D S P D S P static signal cancellation How does it work? FFT and frequency estimation 2012 IEEE Radar Conference, May 7-11, Atlanta UWB RADAR for medical applications 2012 IEEE Radar Conference, May 7-11, Atlanta UWB RADAR for medical applications Frequency band: 3.1 -10.6 GHz, typical bandwidth: 2 GHz 2012 IEEE Radar Conference, May 7-11, Atlanta UWB RADAR for medical applications Chest movements for breathing and heart beat: the time delay of the reference signal in the correlator is fixed to the position of the target, then any movement will change the output amplitude at the receiver. The relationship between the target distance and the output amplitude is almost linear around the correlation maximum, then a distance change can be directly seen through the amplitude of the output signal Measured sensor output for a breathing person and a breath hold of about 12 s Transmitted pulse: 1st derivative Gaussian pulse Distance fixed to the skin-air boundary Heart beat 2012 IEEE Radar Conference, May 7-11, Atlanta UWB RADAR for medical applications static signal cancellation Xs=mean(X) Y=X-Xs FFT and frequency estimation • Undesired harmonic terms and intermodulations other than the sinusoids of interest • The third and forth- order harmonics of respiration signal are very close to the frequency of heart beat, complicating the output spectrum • Need for frequency super-resolution methods (like RELAX or MUSIC) 2012 IEEE Radar Conference, May 7-11, Atlanta UWB RADAR for medical applications Predicted attenuation of pulse-echo traveling from the transmitting antenna to the receiving antenna. Each step accounts for echo at the boundary. Decreasing of the curve accounts for linear attenuation in the tissue RCS of the heart @5GHz: 0.001 m2 2012 IEEE Radar Conference, May 7-11, Atlanta Doppler Bio RADAR How does it work? C. Li et al., IEEE TIM 2010 •The transmitter generates a CW signal •The phase shift of the reflected signal is proportional to the time-varying chest position •Spectral analysis through FFT or super-resolution method estimate beat and breath frequencies 2012 IEEE Radar Conference, May 7-11, Atlanta Conclusions Automotive applications: in the future a network of small RADARs will be used to improve the performance in terms of angular, frequency and range accuracy and in terms of number of tracked targets Biomedical applications: use of MIMO RADAR techniques to mitigate the noise caused by other body motion artifacts 2012 IEEE Radar Conference, May 7-11, Atlanta References M. A. Richards, “Fundamentals of Radar Signal Processing,” McGraw-Hill, 2005, ISBN 0-07-144474-2. S. Lal, R. Muscedere, S. Chowdhury, “An FPGA-Based Signal Processing System for a 77 GHz MEMS Tri-Mode Automotive Radar,” 2011 22nd IEEE International Symposium on Rapid System Prototyping, 2011 , pp. 2 - 8. S. Venkatesh, C.R. Anderson, N.V. Rivera, R.M. Buehrer, "Implementation and analysis of respiration-rate estimation using impulse-based UWB", IEEE MILCOM 2005, 2005, pp. 3314-3320, Vol. 5 M. Leib, W. Menzel, B. Schleicher, H. Schumacher, " Vital signs monitoring with a UWB radar based on a correlation receiver", Fourth European Conference on Antennas and Propagation (EuCAP), 2010, pp. 1 - 5 H. Dominik "Short Range Radar - Status of UWB Sensors and their Applications", 4th European Radar Conference, 2007, pp. 251-254. J. J. Alter, J.O. Coleman, “Radar Digital Signal Processing", Ch. 25 in Introduction to Radar Systems, ed M. Skolnik”, McGraw Hill. R.H. Hosking, "FPGA Cores Enhance Radar Pulse Compression", COTS Journal, October 2003, pp. 32-35. H. Rohling, "Radar Sensors for Automotive Applications", tutorial 2008 IEEE Radar Conference, Rome R. Klemm, J. Ward, "Space-Time Adaptive Processing Architectures and Algorithms", tutorial 2008 IEEE Radar Conference, Rome 2012 IEEE Radar Conference, May 7-11, Atlanta Outline of the tutorial Scenarios and applications for highly-integrated low-power RADAR RADAR architecture and analog-digital partitioning RF/mm-Wave RADAR transceivers and ADC Ubiquitous low-power RADAR case studies: vital sign detection, automotive driver assistance Digital signal processing for RADAR HW-SW implementing platforms for RADAR digital signal processing Conclusions 2012 IEEE Radar Conference, May 7-11, Atlanta HW-SW implementing platforms for RADAR digital signal processing Overview of implementing platforms for RADAR DSP Custom SoC (System-on-Chip) MCU (Microcontroller Unit) GPP (General Purpose Processor) DSP (Digital Signal Processor) and GPU (Graphics Processing Unit) High-end FPGA (Field Programmable Gate Array) Cost-effective FPGA 2012 IEEE Radar Conference, May 7-11, Atlanta Implementing platforms for RADAR DSP Ubiquitous integrated RADAR applications (automotive, bio,..) needs lowpower consumption (reduced power supply and thermal issues and increased portability) but can require high computational capabilities and large data transfer rate and memory storage size Energy-flexibility trade-off to be found between Software-oriented platforms (GPP, DSP, GPU, Microcontroller) and Hardware-oriented platforms (custom IC-SoC or MPSoC, FPGA) Note: apart custom SoC designs or microcontrollers, external ADC and DAC are required since only digital interfaces are provided 2012 IEEE Radar Conference, May 7-11, Atlanta Implementing platforms for RADAR DSP Main performance metrics to be considered: - Computational capabilities: GOPS (Giga Operations Per Second) and if there are DSP-dedicated instructions (e.g. Multiply, MAC, …) - Operand bit-width and arithmetic type (Fixed, Floating or Block Floating Point Operations) - Memory: access frequency, size and hierarchy levels - Flexibility: level of re-programmability or re-configurability - Efficiency (GOPS/MHz, GOPS/mW, GOPS/mm2) - On-chip available I/O interfaces (type, data-rate, supported protocols …) 2012 IEEE Radar Conference, May 7-11, Atlanta Custom SoC design for RADAR DSP Custom SoC design can provide the best in terms of performance for a given technology at minimum area and power occupation Digital and mixed (ADC, DAC) functions can be integrated together in CMOS, flexibility can be achieved integrating in the ASIC also programmable cores Development time and costs are high (cost is minimized only for large volume productions) Today, RADAR system concept for bio, automotive or other ubiquitous applications is still changing from one platform generation to the next Automotive RADAR is not yet a commodity application with accepted and frozen standards 2012 IEEE Radar Conference, May 7-11, Atlanta Architecture for cost-effective RADAR DSP Rather than designing custom SoC for RADAR in next years an architecture based on MCU+ (DSP or FPGA) is considered more suited Thanks to the availability of IP cores such designs can be seen also a prototyping step towards a migration to SoC if and when RADAR will become a commodity R. Whil, IWPC 2011 2012 IEEE Radar Conference, May 7-11, Atlanta Microcontroller Unit (MCU) MCU are typically characterized by low-cost low-power but lowperformance capabilities (MIPS rather than GOPS, integer operations, low data–rate digital I/O), ADC/DAC can be integrated on-chip MCU are the core of ubiquitous electronic systems (automotive ECUs) For RADAR, MCU are suitable only for applications needing control of data/operation flow but not DSP (e.g. the digital controller of the UWB pulsed RADAR health detector with analog correlator and integrator) In automotive RADARs the MCU acts as a baseband control unit and manages the telemetry/telecontrol on vehicle network (CAN or FlexRay bus) but a DSP or FPGA co-processor is required if computing intensive signal processing is needed (pulse compression, filtering, FFT, CFAR,…) 2012 IEEE Radar Conference, May 7-11, Atlanta Why not General Purpose Processors (GPP)? GPP are evolving as SW-programmable computing architecture with many cores, large operand size (64b or higher), tens of GOPS, multiple cache levels (several Mbytes on chip) and fast connections to off-chip DDR memories or networks However the energy efficiency (<<1GFLOPS/Watt) and absolute power (tens of Watts) are far from specs of highly-integrated low-power RADAR applications Intel I5 multicore example 2012 IEEE Radar Conference, May 7-11, Atlanta Digital Signal Processors SW-programmable processors with instruction set optimized for DSP (e.g. ALU as HW resources for fast MAC implementations) rather than general purpose computing Fixed or floating point versions available Different architectural approaches: SIMD, VLIW up to GPU High-end computing performance (GPU) of TFLOPS higher than multicore GPP and with better energy efficiency for DSP tasks DSP for consumer, automotive and biomedical markets already available DSP available also as IP cores (soft or hard macrocells) to be integrated in custom IC Vector SIMD DSP (Synergistic Processor of CELL BE) and GPU analyzed and compared 2012 IEEE Radar Conference, May 7-11, Atlanta Graphics Processing Unit (GPU) GPUs are evolving as massively parallel platforms for graphics but also for computing-intensive algorithms with high degree of parallelism Fermi NVIDIA GPU composed of 512 CUDA (Compute Unified Device Architecture) processing cores hierarchically organized in 16 streaming multi-processors each with 64-kB L1 cache, 128-kB local register file, and sharing 768-kB L2 cache. 4 MB total on-chip memory The Fermi GPU has PCIe host interface and six 64-b DDR DRAM interfaces. Each CUDA core is capable of integer and floating point operations with 64-b results. Each of the 16 streaming processors has also 4 40-b units for fast approximation of non linear operators (square root, sin, cos, exp, log functions) and 16 load/store units. The Fermi GPU leads to a computational power up to 1500 GFLOPS in single-precision, 1 order of magnitude higher than GPP 2012 IEEE Radar Conference, May 7-11, Atlanta GPU for RADAR signal processing Real time RADAR DSP processing is not an issue for such GPUs GPU’s area and power costs (and power supply and thermal issues) are not suited for highly integrated low-power RADAR applications GTX480 Fermi NVIDIA, realized in 45 nm CMOS, has a transistor count of 3 billions, a core area of 422 mm2 and the power consumption > 150 W when implementing algorithms with a workload > 500 GFLOPs The NVIDIA Quadro 4000 GPU has 256 CUDA cores, 4 64-b DDR DRAM interface and a max. power consumption of 100 W 2012 IEEE Radar Conference, May 7-11, Atlanta GPU vs GPP Comparison of computational and bandwidth capabilities and power cost of some GPP and GPUs 2012 IEEE Radar Conference, May 7-11, Atlanta GPU vs GPP NVIDIA GTX260 GPU tested against Core2Duo GPP E8x series for several RADAR DSP classic algorithms: e.g. FFT and IFFT, Timed domain FIR (TDFIR), Frequency domain FIR (FDFIR, consisting of FFT + TDFIR + IFFT), Single value decomposition and QR-decomposition on complex large size matrix, CFAR, matrix rowcolumn transposition, bi-cubic interpolation, STAP using covariance matrix, STAP using QRD GPU has a speed-up from 10% up to two orders of magnitude vs. GPP depending on: the algorithms, the size of the input array data, the regularity and parallelization degree of the data flow, the bottleneck caused by memory transfers (the GPU kernel can be faster than the whole GPU computing platform considering also the memory system) 2012 IEEE Radar Conference, May 7-11, Atlanta GPU vs GPP: speed up for TDFIR For TDFIR the GPU kernel has a speed-up up to 80x vs. GPP, considering also memory transfer the speed-up is reduced, the higher the length of the input array data the higher the GPU speed-up Patterson et SAAB 2010 al, 2012 IEEE Radar Conference, May 7-11, Atlanta GPU vs GPP: speed up for CFAR For CFAR the GPU kernel has a speed-from 3x to 30X but considering also memory transfer the speed-up is reduced to x 1.1 for small data set Patterson et al, SAAB 2010 2012 IEEE Radar Conference, May 7-11, Atlanta GPU vs GPP: speed up for FFT Kernel GPU Patterson et al, SAAB 2010 Total GPU speed up: kernel +memory system 2012 IEEE Radar Conference, May 7-11, Atlanta Vector DSP – Synergistic Processor of CELL Vector processor 128 bit SIMD (Single Instruction Multiple Data) 128 registers each 128 bits wide 25.6 GFLOPS (single precision), 51 GOPS (8 bit) Two- to sixteen-way SIMD Memory control Load/store instructions can access only local store 256KB local store SP includes DMA instructions for explicitly moving data between local store and main memory 2012 IEEE Radar Conference, May 7-11, Atlanta The CELL BE multi-core DSP • Cell BE processor integrates 9 processors on a single die – 1 Power® processor + 8 vector SP processors • Computational Performance – 205 GFLOPS @ 3.2 GHz, 410 GOPS @ 3.2 GHZ • High-speed communication ring 205 GB/s maximum sustained bandwidth • High performance chip interfaces 25.6 GB/s XDR main memory bandwidth 2012 IEEE Radar Conference, May 7-11, Atlanta CELL BE vs. GPP: FFT and 2D FIR benchmarks 60 56 Cell BE 3.2 GHz Freescale 744x 975 MHz 50 Pentium 3.6 GHz 2MB L2 Relative Performance Opteron 2.4 GHz 40 PPC 970 2.0 GHz 32 30 30 25 20 13 10 1.8 1.0 1.5 0.9 1.0 2.1 1.3 2.0 1.0 1.9 1.0 1.0 1.0 1.0 0 1K point FFT 8K point FFT 64K point FFT 15x15 16-bit filter 15x15 8-bit filter Patterson et al, SAAB 2011 2012 IEEE Radar Conference, May 7-11, Atlanta Trendline of DSP- and GPP-oriented platforms Die size, number of transistors, computational power (GOPS) and power consumption of single core systems (ATOM 230 and 1 SP- Cell BE), and multi core systems (ATOM330, Fermi GPU GTX480, Core2, Cell BE, Tile64) 2012 IEEE Radar Conference, May 7-11, Atlanta FPGA (Field Programmable Gate array) FPGAs are evolving from reconfigurable HW devices to complex Systems on Programmable Chip (SoPC) with: integrated reconfigurable logic blocks (based on FF, LUT) and I/O blocks, memory blocks, DSPdedicated units (Multiply, Acc), soft or hard cores (Microblaze, Nios, ARM Cortex,..) for SW-programmability and HW- reconfigurability Different FPGA technologies exist: Flash (ProAsic), Anti-fuse (AX, RTAX) , SRAM (Virtex, Spartan, Cyclone, Stratix) some already qualified for automotive or even space/military applications For DSP intensive applications SRAM-based are typically preferred Mixed-signal FPGAs also exist(Fusion) FPGA designs for DSP require algorithmic and HW know-how (HDL and synthesis tools) 2012 IEEE Radar Conference, May 7-11, Atlanta High-end FPGA for RADAR DSP High-end FPGAs for intensive RADAR DSP are available but their cost (>1000 USD) and power consumption are too high for ubiquitous lowpower applications (rather suited for defense, avionic or marine radars) E. Chung, IEEE/ACM Micro 2010 Virtex6 LX760 FPGA device in 40 nm for FFT processing has 380 GFLOPS at a power cost of 50 W LX760 FPGA has worse efficiency, (GFLOPS/W, GFLOPS/mm2), by 1 order of magnitude vs. custom IC, better performance by 1 order of magnitude vs. GPP and slightly better than GPU (GTX480) 2012 IEEE Radar Conference, May 7-11, Atlanta High-end FPGA for RADAR DSP Stratix Altera FPGA in 28 nm with variable precision DSP blocks (Mul 18x18, 27x27,18x36 etc., 64 bit acc) with 2000 GMACs Several RADAR DSP functions implemented such as STAP, digital beamforming, pulse compression Altera 2012 However to fit the DSP RADAR requirements of low-cost low-power applications the challenge is an optimized algorithmic-architecture codesign on less complex FPGA families with HW-SW capabilities 2012 IEEE Radar Conference, May 7-11, Atlanta Cost-effective FPGA for RADAR DSP MCU+DSP functionalities of a FMCW automotive RADAR realized in Xilinx Virtex2Pro (Microblaze + radix-2 FFT processor 2048-point, 14 b) Control and DSP functionalities of a 77 GHz FMCW RADAR with GaAs MMIC front-end and MEMS switch realized in Spartan-3A and Virtex-5 SX50T which manage switch control, TX sweep generation, Hamming filtering, FFT (radix-2 2048-point), CA-CFAR, peak pairing 11b ADC, 10b DAC, 12b/16b DSP data/coefficient resolution S. Lal, IEEE RSP 2011 2012 IEEE Radar Conference, May 7-11, Atlanta Cost-effective FPGA for RADAR DSP Virtex5 SX50T: 8160 slices (4 LUT+4FF), 5000 kb RAM; 288 DSP48 unit (25x18 mul+acc +adder), 12 DCM 6 PLL, fast I/O Spartan3 A-DSP (XA3SD1800A): 16640 slices (2LUT+2FF), 1500 kb RAM, 84 18x18 mul, 8 DCM, automotive grade device exist S. Lal, IEEE RSP 2011 2012 IEEE Radar Conference, May 7-11, Atlanta Cost-effective FPGA for RADAR DSP From first simulation results the Virtex-5 RADAR version is more performing and has comparable performance to LRR3 RADAR S. Lal, IEEE RSP 2011 2012 IEEE Radar Conference, May 7-11, Atlanta Implementing platforms for RADAR DSP– Recent Bibliography J. Pettersson et al., Radar signal processing with GPU, SAAB doc. 5/0363-FCP1041180 en, p. 127, 2010 E. Chung et al., 2010, Single-Chip Heterogeneous Computing: Does the Future Include Custom Logic, FPGAs, and GPGPUs?, IEEE/ACM 43rd Micro 2010 R. Whil, Fast growing, diversified Automotive Radar Market presents chip vendors with new challenges , IWPC 2011 S. Lal, An FPGA-based signal processing system for a 77 GHz MEMS tri-mode automotive radar , IEEE RSP 2011 V. Mauer, et al., Floating point STAP implementation on FPGAs , IEEE Radar conf. 2011 J. Saad, FPGA-based Radar Signal Processing for Automotive Driver Assistance System, IEEE Int. Symp, Rapid prot. 2009 S. Lal et al., An FPGA-based 77 GHZ MEMS radar signal processing system for automotive collision avoidance; IEEE CECE 2011 Altera, White Paper Using Floating-Point FPGAs for DSP in Radar, May 2011 S. Saponara et al., A multi-processor NoC-based architecture for real-time image/video enhancement, JRTIP 2012 2012 IEEE Radar Conference, May 7-11, Atlanta Conclusions RADAR sensing is suited to address societal needs of safety, security, health-care, intelligent transport with big advantages vs. other technologies Differently from high power and large antenna RADARs, highlyintegrated systems with low power consumption, size, and cost are needed for the ubiquitous adoption of RADARs in large–volume markets At mm-waves (λ of few mm) there are great opportunities for miniaturization Key enabling factor is the realization, in Si-based CMOS or BiCMOS tech., of integrated transceivers for the RADAR front-end with enough NF, gain and Power to meet automotive or bio RADAR requirements 2012 IEEE Radar Conference, May 7-11, Atlanta Conclusions The ADC is moving at IF offering enough bit-resolution and samplingrate at low energy cost per conversion step Increasing RADAR signal processing in the digital domain (FFT, filtering, pulse compression, beam-forming, CFAR, tracking), realized in costeffective embedded platforms (MCU+FPGA), allows for high performance RADAR in standard technologies at low power consumption and low size Proof-of-concept demonstrators of this scenario and first commercial solutions recently available for UWB Pulsed RADAR for vital signs detection and FMCW RADAR for automotive LRR, MRR and SRR The path to full CMOS/CMOS SOI to be completed as well as advanced concepts for System-in-Package integration to be further explored 2012 IEEE Radar Conference, May 7-11, Atlanta Conclusions Automotive applications: in the future a network of small RADARs will be used to improve the performance in terms of angular, frequency and range accuracy and in terms of number of tracked targets Biomedical applications: use of MIMO RADAR techniques to mitigate the noise caused by other body motion artifacts Data fusion of low-power ubiquitous RADAR systems with other sensor technologies (e.g. camera) In networked RADAR sensor scenario new DSP functions to be adopted (e.g. code division multiple access to avoid crowding) 2012 IEEE Radar Conference, May 7-11, Atlanta Thanks for your attention Acknowledgment Discussions with Bruno Neri, Full Professor of RF electronics and Fulvio Gini, Full Professor of Telecommunications at University of Pisa are gratefully acknowledged 2012 IEEE Radar Conference, May 7-11, Atlanta Brief Biographies of the Speakers Sergio Saponara graduated in Electronic Engineering cum laude and received the Ph.D. degree in Information Engineering from the University of Pisa. In 2002 he was with IMEC, Belgium, as Marie Curie Research Fellow. Since 2001 he collaborates with Consorzio Pisa Ricerche (I) to technology transfer projects in the field of integrated systems. Currently, he is Professor of Electronics at University of Pisa in the field of microelectronics and electronic systems, including integrated wireless systems. He co-authored more than 160 scientific publications and 10 patents and is Associate Editor of the Journal of Real-Time Image Processing, Springer. He has also associations with the Italian National Institute for Nuclear Physics (INFN) and with the Italian interuniversity consortium for telecommunications (CNIT). He served as special issue guest editor on international journals and as committee member or session chairman for international conferences such as IEEE Euromicro DSD 2008, IEEE DATE from 2006 to 2012, IEEE MTT-S IMWS 2011, IEEE ISIEA 2012 Maria S. Greco graduated in Electronic Engineering in 1993 and received the Ph.D. degree in Telecommunication Engineering in 1998, from University of Pisa. From December 1997 to May 1998 she joined the Georgia Tech Research Institute, Atlanta, USA as a visiting research scholar where she carried on research activity in the field of radar detection in non-Gaussian background. Currently she is Associate Professor of Telecommunications at University of Pisa. She is IEEE Fellow and she was co-recipient of the 2001 IEEE Aerospace and Electronic Systems Society's Barry Carlton Award for Best Paper. She has been cogeneral-chair of the 2007 International Waveform Diversity and Design Conference (WDD07), and she was in the technical committee of EUSIPCO 2006. She is guest co-editor of the special section of the Journal of the IEEE Signal Processing Society on Special Topics in Signal Processing on "Adaptive Waveform Design for Agile Sensing and Communication“ 2007. She has given lectures at universities and institutions in Italy and abroad. Her general interests are in the areas of statistical signal processing, estimation and detection theory. Her research interests include cyclostationarity signal analysis, DOA estimation techniques, clutter models, spectral analysis, coherent and incoherent detection in non-Gaussian clutter and CFAR techniques 2012 IEEE Radar Conference, May 7-11, Atlanta