ENGG3190
Logic Synthesis
“Boolean Satisfiability”
Winter 2014
S. Areibi
School of Engineering
University of Guelph
Outline
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2
SAT Problem
Terminology
How do we solve it?
Applications
Logic Circuit Representation
Efficiency
Boolean Satisfiability
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What is SAT?
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Why is it important
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How to make a Boolean Function=1
Application (Network Repair)
Conjunction Normal Form
SAT in a Nutshell

Given a Boolean formula (propositional logic formula), find a
variable assignment such that the formula evaluates to 1, or
prove that no such assignment exists.
F = (a + b)(a’ + b’ + c)

For n variables, there are 2n possible truth assignments to be
checked.
a
0
0
b
c
0
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1
b
1
0
c
1 0
1
c
1 0
c
1 0
1
First established NP-Complete problem.
S. A. Cook, The complexity of theorem proving procedures,
Proceedings, Third Annual ACM Symp. on the Theory of
Computing,1971, 151-158
Using BDDs to Solve SAT
R. Bryant. “Graph-based algorithms for Boolean function manipulation”.
IEEE Trans. on Computers, C-35, 8:677-691, 1986.

Store the function in a Directed Acyclic Graph (DAG) representation.
Compacted form of the function decision tree.
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Reduction rules guarantee canonicity under fixed variable order.
Provides for efficient Boolean function manipulation.
 Overkill for SAT.
Why Bother?

Core computational engine for major applications
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EDA
 Testing and Verification
 Logic synthesis
 FPGA routing
 Path delay analysis
 And more…
AI
 Knowledge base deduction
 Automatic theorem proving
For what values of d0,d1,d2,d3 can Z = 1??
Problem Representation

Conjunctive Normal Form

F = (a + b)(a’ + b’ + c)
clause
literal


Logic circuit representation


Simple representation (more efficient data structures)
Circuits have structural and direction information
Circuit – CNF conversion is straightforward!!!
d  (a + b)
(a + b + d’)
(a’ + d)
(b’ + d)
a
b
c
d
e  (c  d)
(c’ + d’ + e)
(d + e’)
(c + e’)
e
Clauses
Positive Literal
Negative Literal
a = 0, b = 1
 Clause = 0
Conflicting!!
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a = 0, b = 1
 Clause = 1
Satisfied!!
a = 0, b = 1
Unresolved!!
a = 0, b = 1
 Clause = 1
Satisfied!!
If a clause evaluates to a “0” we call it conflicting
It is conflicting because it conflicts with the goal of Boolean Satisfiability.
If a clause evaluates to a “1” we call it satisfied.
In the third clause since we only know the value of “a” it is unresolved!
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Deduction is at the heart of Boolean Satisfiability.
If we can deduce that other values must be assigned to some value for SAT
Example?
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Can BDDs help?
Yes but many Boolean functions are large and using BDDs will be complex!
Boolean Satisfiability
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Recursion to solve Satisfiability.
Boolean Constraint Propagation (BCP).
The Algorithm.
Limitation.
Code for SAT problem.
0
1
0
1
This clause has become unit
C must be ‘0’
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However, only C is the deciding factor (exactly one unassigned literal found in
the third clause).
What do we know?  c has to be a “0” so that c’=1
We deduced by implication that c=0
Implications and Boolean
Constraint Propagation
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Implication
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A variable is forced to be assigned to be True or False based on
previous assignments.
Unit clause rule (rule for elimination of one literal clauses)
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An unsatisfied clause is a unit clause if it has exactly one unassigned
literal.
Satisfied Literal
(a +b’+ c)(b + c’)(a’ + c’)
a = T, b = T, c is unassigned
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Unassigned Literal
The unassigned literal is implied because of the unit clause.
Boolean Constraint Propagation (BCP)
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Unsatisfied Literal
Iteratively apply the unit clause rule until there is no unit clause available.
a.k.a. Unit Propagation
Workhorse of DLL based algorithms.
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Phi has nine clauses (Omega1 – Omega9)
Not easy to say if Phi is Satisfiable!! Imagine thousands of clauses
If we perform the partial assignment then what happens?
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Nothing much happens?
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I can’t satisfy any of these clauses yet.
So what should we do?
Don’t worry about these ..
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Assigning x1=1 implies that x2 has to equal to 1 and x3 also.!!
Which clauses imply this decision?
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W7 and W8 are already satisfied! (don’t worry about them)
What next?
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In gigantic circuits the BCP goes on and on ..
 Unit
 Unit
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If X5=1 and X6=1 then w4 and w5 are unit (Satisfiable).
So we are making great progress …
We continue to uncover clauses that make unit to reach a solution.
So far so good!
What next?
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Unfortunately we have a conflict …
This is one reason of using recursion.
What should we do now?
Undo some previous decision taken that might have led to this situation!!
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So
what is the name
of the algorithm for the recursive framework?
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This the heart and soul of every SAT engine!! (50 years old)
It is famous and has an entry in Wikipedia.
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Lots of work on SAT.
What do you think research concentrated on to make the algorithm more efficient?
DLL Algorithm

Davis, Logemann and Loveland
M. Davis, G. Logemann and D. Loveland, “A Machine Program for
Theorem-Proving", Communications of ACM, Vol. 5, No. 7, pp. 394-397,
1962
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Also known as DPLL for historical reasons
Basic framework for many modern SAT solvers
Basic DLL Procedure - DFS
(a’ + b + c)
(a + c + d)
(a + c + d’)
(a + c’ + d)
(a + c’ + d’)
(b’ + c’ + d)
(a’ + b + c’)
(a’ + b’ + c)
Basic DLL Procedure - DFS
(a’ + b + c)
(a + c + d)
(a + c + d’)
(a + c’ + d)
(a + c’ + d’)
(b’ + c’ + d)
(a’ + b + c’)
(a’ + b’ + c)
a
Basic DLL Procedure - DFS
(a’ + b + c)
(a + c + d)
(a + c + d’)
(a + c’ + d)
(a + c’ + d’)
(b’ + c’ + d)
(a’ + b + c’)
(a’ + b’ + c)
a
0
 Decision
Basic DLL Procedure - DFS
(a’ + b + c)
(a + c + d)
(a + c + d’)
(a + c’ + d)
(a + c’ + d’)
(b’ + c’ + d)
(a’ + b + c’)
(a’ + b’ + c)
a
0
b
0
 Decision
Basic DLL Procedure - DFS
(a’ + b + c)
(a + c + d)
(a + c + d’)
(a + c’ + d)
(a + c’ + d’)
(b’ + c’ + d)
(a’ + b + c’)
(a’ + b’ + c)
a
0
b
0
c
0
 Decision
Basic DLL Procedure - DFS
(a’ + b + c)
(a + c + d)
(a + c + d’)
(a + c’ + d)
(a + c’ + d’)
(b’ + c’ + d)
(a’ + b + c’)
(a’ + b’ + c)
a
0
b
0
c
0
a=0
(a + c + d)
d=1
Conflict!
Implication Graph
c=0
(a + c + d’)
d=0
Basic DLL Procedure - DFS
(a’ + b + c)
(a + c + d)
(a + c + d’)
(a + c’ + d)
(a + c’ + d’)
(b’ + c’ + d)
(a’ + b + c’)
(a’ + b’ + c)
a
0
b
0
c
0
a=0
(a + c + d)
d=1
Conflict!
Implication Graph
c=0
(a + c + d’)
d=0
Basic DLL Procedure - DFS
(a’ + b + c)
(a + c + d)
(a + c + d’)
(a + c’ + d)
(a + c’ + d’)
(b’ + c’ + d)
(a’ + b + c’)
(a’ + b’ + c)
a
0
b
0
c
0
 Backtrack
Basic DLL Procedure - DFS
(a’ + b + c)
(a + c + d)
(a + c + d’)
(a + c’ + d)
(a + c’ + d’)
(b’ + c’ + d)
(a’ + b + c’)
(a’ + b’ + c)
a
0
b
0
c
0
1  Forced Decision
a=0
(a + c’ + d)
d=1
Conflict!
c=1
(a + c’ + d’)
d=0
Basic DLL Procedure - DFS
(a’ + b + c)
(a + c + d)
(a + c + d’)
(a + c’ + d)
(a + c’ + d’)
(b’ + c’ + d)
(a’ + b + c’)
(a’ + b’ + c)
a
0
b
0
 Backtrack
c
0
1
Basic DLL Procedure - DFS
(a’ + b + c)
(a + c + d)
(a + c + d’)
(a + c’ + d)
(a + c’ + d’)
(b’ + c’ + d)
(a’ + b + c’)
(a’ + b’ + c)
a
0
b
0
c
0
1
1  Forced Decision
Basic DLL Procedure - DFS
(a’ + b + c)
(a + c + d)
(a + c + d’)
(a + c’ + d)
(a + c’ + d’)
(b’ + c’ + d)
(a’ + b + c’)
(a’ + b’ + c)
a
0
b
0
1
c
0
c
1
0
a=0
 Decision
(a + c’ + d)
d=1
Conflict!
c=0
(a + c’ + d’)
d=0
Basic DLL Procedure - DFS
(a’ + b + c)
(a + c + d)
(a + c + d’)
(a + c’ + d)
(a + c’ + d’)
(b’ + c’ + d)
(a’ + b + c’)
(a’ + b’ + c)
a
0
b
0
1
c
0
c
1
0
 Backtrack
Basic DLL Procedure - DFS
(a’ + b + c)
(a + c + d)
(a + c + d’)
(a + c’ + d)
(a + c’ + d’)
(b’ + c’ + d)
(a’ + b + c’)
(a’ + b’ + c)
a
0
b
0
1
c
0
c
1
0
a=0
1  Forced Decision
(a + c’ + d)
d=1
Conflict!
c=1
(a + c’ + d’)
d=0
Basic DLL Procedure - DFS
(a’ + b + c)
(a + c + d)
(a + c + d’)
(a + c’ + d)
(a + c’ + d’)
(b’ + c’ + d)
(a’ + b + c’)
(a’ + b’ + c)
a
0
b
0
1
c
0
c
1
0
1
 Backtrack
Basic DLL Procedure - DFS
(a’ + b + c)
(a + c + d)
(a + c + d’)
(a + c’ + d)
(a + c’ + d’)
(b’ + c’ + d)
(a’ + b + c’)
(a’ + b’ + c)
a
0
1
b
0
1
c
0
c
1
0
1
 Forced Decision
Basic DLL Procedure - DFS
(a’ + b + c)
(a + c + d)
(a + c + d’)
(a + c’ + d)
(a + c’ + d’)
(b’ + c’ + d)
(a’ + b + c’)
(a’ + b’ + c)
a
0
1
b
0
b
c
0
0  Decision
1
c
1
0
1
Basic DLL Procedure - DFS
(a’ + b + c)
(a + c + d)
(a + c + d’)
(a + c’ + d)
(a + c’ + d’)
(b’ + c’ + d)
(a’ + b + c’)
(a’ + b’ + c)
a
0
1
b
0
b
1
c
0
0
c
1
a=1
0
1
(a’ + b + c)
c=1
Conflict!
b=0
(a’ + b + c’)
c=0
Basic DLL Procedure - DFS
(a’ + b + c)
(a + c + d)
(a + c + d’)
(a + c’ + d)
(a + c’ + d’)
(b’ + c’ + d)
(a’ + b + c’)
(a’ + b’ + c)
a
0
1
b
0
b
1
c
0
0
c
1
0
1
 Backtrack
Basic DLL Procedure - DFS
a
(a’ + b + c)
(a + c + d)
(a + c + d’)
(a + c’ + d)
(a + c’ + d’)
(b’ + c’ + d)
(a’ + b + c’)
(a’ + b’ + c)
0
1
b
0
b
1
c
0
a=1
b=1
0
c
1
(a’ + b’ + c)
0
c=1
1
1  Forced Decision
Basic DLL Procedure - DFS
a
(a’ + b + c)
(a + c + d)
(a + c + d’)
(a + c’ + d)
(a + c’ + d’)
(b’ + c’ + d)
(a’ + b + c’)
(a’ + b’ + c)
0
1
b
0
b
1
c
0
a=1
b=1
0
1
c
1
(a’ + b’ + c)
0
c=1
1
(b’ + c’ + d)
d=1
Basic DLL Procedure - DFS
a
(a’ + b + c)
(a + c + d)
(a + c + d’)
(a + c’ + d)
(a + c’ + d’)
(b’ + c’ + d)
(a’ + b + c’)
(a’ + b’ + c)
0
1
b
0
b
1
c
0
a=1
b=1
0
1
 SAT
c
1
(a’ + b’ + c)
0
c=1
1
(b’ + c’ + d)
d=1
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Since problems are large (Vars, Literals, Clauses) we cannot use BDDs!!
What are available SAT code available?
SAT Solvers
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Many Good SAT Solvers.
Examples:
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MiniSat, from NiKlas Een, Sweden
CHAFF, Sharad Malik (Princeton)
GRASP (Greedy Randomized Adaptive Search)
from Karem Sakallah, University of Michigan
… Many others …
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Lots of information on the web and lots of papers and research
What next?
Applications in VLSI Design and Logic Synthesis …
Boolean Satisfiability
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Using SAT for Logic.
Real Netlists logic of gates  CNF
Applications:
 Similarity of logic functions
Gate Consistency Function.
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BDDs are not equivalent to SAT!
BDDs are a canonical representation of a Boolean Function.
We can do SAT with a BDD but it is not the most efficient way!
Exactly the same inputs!
Is F == G?
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For every pair of output
X = F1 XOR G1, Y = F2 XOR G2
Z = X OR Y, Z == 1 IFF F NOT EQUAL TO G!
PHI
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For NAND gate, (Phi)d = d XNOR (ab)’
(Phi)d = (a + d) (b + d)(a’ + b’ + d’)  How?

Y = A’B + AB’

Y = AB + A’B’


(Phi)d = d XNOR (ab)’ == 1  Consistent

(Phi)d = d XNOR (ab)’ == 0  inconsistent
You enter a pattern for inputs and output and
then you say either

“YES” that is what the circuit does, or

“NO” that is not what the circuit does.
(d’ + g)(e’ + g)(d + e + g’)

(Phi)g = g XNOR (d + e) = (d’ + g)(e’ + g)(d + e + g’)
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Five gate consistency functions listed!
No Boolean simplification necessary for the whole function …
How can we remember the CNF for each gate??
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Are there rules for all kinds of basic gates?
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Just need to remember them!! 
Summary
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SAT has largely displaced BDDs for “just solve it” apps
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Reason is scalability: can do large problems faster, more reliably
Still, SAT, like BDDs, not guaranteed to find a solution in
reasonable time or space.
However, BDDs are still used in many important
applications apart from SAT.
Many important applications of SAT for Logic Synthesis
and Verification.
40 years old, but still “the” big idea: DPLL

Many recent engineering advances make it extremely fast!!