Zhou Peng, Zuo Decheng, Zhou Haiying
Harbin Institute of Technology
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


1.Introducation
2.Workload effect on Energy effective
3.Conclusion & Future works
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Green computing is
imperative
Increasing of
computers
Increasing of energy
cost
Increasing of Carbon
emissions
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Moore’s law
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Moore’s law for energy
effective
4
Explosive growth of the
tasks and complexity



Exponential growth of code；
e.g. Linux code in tar.gz format
increase from 117K(0.11) to
109M(3.11.1)
Explosive growth of
applications; e.g. apps for
android and apple
Explosive growth of amount of
computation; e.g.AI & Big data
Linear growth of energy
density in battery
VS

Linear improve of battery
Battery life become shorter and shorter；
e.g. smart phones
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
Main technologies to improve energy effective
◦ Hardware level: Low power devices
◦ System level: Power-management mechanisms in different
levels
◦ Application level: Consolidate with virtualization

Power-management mechanisms
To Shutdown unused
component or circuit
◦ Circuit level: Clock-gating
◦ System level: DPM
◦ Processor level: DVFS/DFS/DVS, C-state
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
According to the present researches:
◦ C-state can save up to 44%[1] energy
◦ DVFS can save 13%[2] to 70%[3] energy

Limitation of present research
◦ All the results come from particular system with special
application or SPAC CPU.
◦ Few works can consider the effect of workload to the energy
consumption.
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
Two solutions: slow down & race-to-halt
Typical technology
Slow down
race-to-halt
DVFS
C-state
DVFS
vs C-state:Dynamic
which is&better
effective?
Runtime
power
low in energy
Higher

Time to finish task
Longer
short
Deadline miss
High risk
Lower risk
Energy effective
Save lots of energy
Save lots of energy
Objectives: To evaluate the energy effective of DVFS &
C-state with different task models
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


1.Introducation
2.Workload effect on Energy effective
3.Conclusion & Future works
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 Relationship of the power and the frequency:


static 

P  CV  f  P
2
dd
C : is the capacitance of the transistor gates
f : is the frequency
Vdd: is the supply voltage of the device.
Pstatic: represents power consumed from leakage
mechanisms.
 Relationship of the voltage and frequency:
f  k  (Vdd Vt ) / Vdd
2
,
 k: is a circuit dependent constant
 Vt: is the threshold voltage
Note that:
The operation frequency almost has a linear relationship with voltage.
BUT, decreasing the frequency and keeping the voltage constant does not
contribute much to energy saving. It just saves the cost of cache misses[11] .
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
DVFS Modeling
◦ Defining the amount of computation/ instructions for a
task/workload is W,
◦ and then within a period of run-to-completion, the energy
consumption of task is
WVdd Pstatic
Ed (Vdd )  PT  CV W 
k (Vdd  Vt )2
2
dd


CVdd2 W

WVdd Pstatic
k (Vdd  Vt ) 2
is energy consumption based on dynamic power
is energy consumption based on leakage power








C: capacitance
f : frequency
Vdd: runtime voltage
Pstatic: leakage power
Vpeak: peak voltage
Tr: Time to finish task
Ts:Time to sleep
W: workload, the instruction
cycles of a task
Tr+Ts = W/fd
Summary:
◦ DVFS: compute the energy consumption of processor but
ignore the energy cost of cache misses.
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
C-state Modeling
◦ Defining the amount of computation/ instructions for a
task/workload is W, and then within a period of run-tocompletion, the energy consumption of task is
2
Ec  CWVpeak
 PstaticTr  PsleepTs
◦ Tr+Ts is the interval time of a task run-to-completion based on
DVFS
Tr+Ts = W/fd









C:capacitance
f :frequency
Vdd: runtime voltage
Pstatic: leakage power
Vpeak: peak voltage
Tr: Time to finish task
Ts:Time to sleep
W: workload, the instruction
cycles of a task
Summary:
◦ C-state operates at higher voltage, So C-state finish a task
faster than DVFS.
◦ If all the tasks is completed, system changes to sleep mode.
◦ Psleepis very low, which can be ignored.
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In order to minimize the energy consumption and also try to find
the best voltage, we can get the derivative of energy models

The derivative of energy model
WPst
2WVdd Pst
dv( E )  2CVddW 

2
k (Vdd  Vt ) k (Vdd  Vt )3

The extreme point in energy model shows that
◦ Workload W is not the key influence factor to the minimal
energy consumption
◦ The minimal energy consumption is only depended on the
characteristics of devices
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In order to evaluate the energy effective of DVFS and C-state，
We get the difference value of the two energy models：
E (t )  Ed  Ec  CW (v
2
dvfs


V
2
peak
W
)  Pstatic (t 
)
f dvfs
C-state becomes popular because Pstatic (leakage power)
increase effects
We can consider time t as the workload arrival time,
when E (t )  0 , rewrite the equation
CW 2
W
2
t
(Vpeak  vdvfs ) 
Pst
f dvfs
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
For Poisson distribution workload
◦ The average arrival rate of task is λ0;
◦ The average interval time of task is t=1/ λ0
1

CW 2
W
2

(Vpeak  vdvfs ) 
0 Pst
f dvfs
Summary:
◦ DVFS and C-state save the same energy in this situation
When deadline tdeadline < t, C-state saves more energy than
DVFS;
◦ When the arrival rate λ>λ0, DVFS is better than C-state
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
For Periodic distribution workload
◦ C-state saves more energy if and only if the deadline is
smaller than period, i.e. tdeadline < t;
◦ DVFS does not shutdown the processor after the task
finished.
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


1.Introducation
2.Workload effect on Energy effective
3.Conclusion & Future works
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
Evaluate the energy effective of DVFS & C-state
with different task models
◦ The most energy saving voltage is only depended on the
characteristics of the device itself.
◦ The energy effective of DVFS and C-state is closely related to
the arrival rate of the tasks and the features of workloads.
◦ For the heavy workload systems, DVFS is better in energy
saving than another. The result is consistent with the
conclusion in [5].
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

In this paper, we mainly focus on processor and ignore
the energy consumption during state transition.
So, future works will be:
◦ To analyze the effects of cache hit rate on energy effective in
the whole system.
◦ To take the reliability into consideration.
◦ To explore the schedulability analysis methods for the energy
and reliability critical system.
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1.
Pavel Somavat. Accounting for the Energy Consumption of Personal Computing Including Portable Devices
2.
Rotem, E., et al. Energy Aware Race to Halt: A Down to EARtH Approach for Platform Energy Management.
Computer Architecture Letters.
3.
Shekar, V. and B. Izadi. Energy aware scheduling for DAG structured applications on heterogeneous and DVS
enabled processors.
4.
Valentini, Giorgio Luigi, et al. An overview of energy efficiency techniques in cluster computing systems.
5.
Petters, S. M. and M. A. Awan., Slow down or race to halt: Towards managing complexity of real-time energy
management decisions.
6.
Awan, M. A. and S. M. Petters. Enhanced race-to-halt: A leakage-aware energy management approach for dynamic
priority systems. Real-Time Systems
7.
Naik, R. Biswas, S. , Datta, S.; Distributed Sleep-Scheduling Protocols for Energy Conservation in Wireless
Networks. System Sciences,
8.
Le Sueur, Etienne, Heiser, Gernot. Dynamic voltage and frequency scaling: The laws of diminishing returns.
9.
Le Sueur, E. and G. Heiser. Slow Down or Sleep, that is the Question.
10.
Schmitz, M.T., et al.; Energy-Efficient Mapping and Scheduling for DVS Enabled Distributed Embedded Systems.
11.
Wan Yeon Lee. Energy-Saving DVFS Scheduling of Multiple Periodic Real-Time Tasks on Multi-core Processors.
12.
F. Paterna, et al.Variability-Tolerant Workload Allocation for mpsoc Energy Minimization under Real-Time
Constraints
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Thank you!
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