Gheorghe M. Ştefan
http://arh.pub.ro/gstefan/
- 2014 -
Comparator
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Digital Integrated Circuits - week seven
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Elementary comparator
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Digital Integrated Circuits - week seven
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Log-depth comparator
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Digital Integrated Circuits - week seven
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Complex (random) circuits
An universal circuit:
Size  O(2n)
Depth  O(n)
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Digital Integrated Circuits - week seven
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SEMUX = 6
S3U_circuit = 42
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S3InMajority = 12
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Digital Integrated Circuits - week seven
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Many-input random circuit
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Digital Integrated Circuits - week seven
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Applying the de Morgan theorem results a Read-Only
Memory (ROM) which is not a memory, it is a
combinational circuit implemented as a Look-Up Table
(LUT).
xn-1, xn-2, … x0 : is the “address”
f, g, … s : is the “content stored at”
xn-1, xn-2, … x0
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Digital Integrated Circuits - week seven
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First-order – 1-loop digital systems
 Elementary latch
 Clocked latch
 Master-slave flip flop: serial extension
 Random Access Memory (RAM): parallel
extension
 Register: serial-parallel extension
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Digital Integrated Circuits - week seven
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Stable – unstable loops
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Low-cost oscillator
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Serial composition:
serial shift register
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Parallel composition:
Random Access Memory (RAM)
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Expanding the number of bits
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Expanding the number of words
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Synchronous RAM
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For L < 130 nm writing is synchronous,
while reading could be synchronous or
asynchronous
Example of synchronous reading:
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Register file
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Reading is asynchronous
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Home work 7
Problem 1: Let be the log-depth comparator (see slide 4) with n = 8. Compute
de size of the circuit (the number of inputs in all inverting circuits).
Problem 2: Design, using the method presented in the slide no. 7, the circuit
whose “program” is 11100100. Compute the final size (the number of
inputs in all inverting circuits).
Problem 3: Let be the low cost oscillator form the slide 16. Its output is
connected to the input of an inverter.
1.
Compute the frequency of the signal generated, fosc, when:

For the NAND gate: tpLH = 40ps, tpHL = 60ps

For the first NOT (connected to the NAND’s output): tpLH = 50ps,
tpHL = 30ps

For the second NOT: tpLH = 100ps, tpHL = 60ps
2.
What will be fosc if the output of the same oscillator will be connected
to the input of two invertors instead of one?
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