CPE 232
Computer Organization
MIPS Arithmetic – Part I
Dr. Gheith Abandah
[Adapted from the slides of Professor Mary Irwin
(www.cse.psu.edu/~mji) which in turn Adapted from Computer
Organization and Design,
Patterson & Hennessy, © 2005, UCB]
CPE 232 MIPS Arithmetic
1
MIPS Number Representations

32-bit signed numbers (2’s complement):
0000 0000 0000 0000 0000 0000 0000 0000two = 0ten
0000 0000 0000 0000 0000 0000 0000 0001two = + 1ten
...
0111
0111
1000
1000
...
MSB
1111
1111
0000
0000
1111
1111
0000
0000
1111
1111
0000
0000
1111
1111
0000
0000
1111
1111
0000
0000
1111
1111
0000
0000
1110two
1111two
0000two
0001two
=
=
=
=
+
+
–
–
maxint
2,147,483,646ten
2,147,483,647ten
2,147,483,648ten
2,147,483,647ten
1111 1111 1111 1111 1111 1111 1111 1110two = – 2ten
1111 1111 1111 1111 1111 1111 1111 1111two = – 1ten
minint
LSB

Converting <32-bit values into 32-bit values

copy the most significant bit (the sign bit) into the “empty” bits
0010 -> 0000 0010
1010 -> 1111 1010

sign extend
CPE 232 MIPS Arithmetic
versus
zero extend (lb vs. lbu)
2
MIPS Arithmetic Logic Unit (ALU)

zero ovf
Must support the Arithmetic/Logic
operations of the ISA
add, addi, addiu, addu
1
1
A
32
sub, subu, neg
ALU
mult, multu, div, divu
sqrt
result
32
B
32
and, andi, nor, or, ori, xor, xori
4
m (operation)
beq, bne, slt, slti, sltiu, sltu

With special handling for

sign extend – addi, addiu andi, ori, xori, slti,
sltiu

zero extend – lbu, addiu, sltiu

no overflow detected – addu, addiu, subu, multu,
divu, sltiu, sltu
CPE 232 MIPS Arithmetic
3
Review: 2’s Complement Binary Representation
-23 =

Negate
-(23 - 1) =
1011
and add a 1
1010
complement all the bits

Note: negate and
invert are different!
CPE 232 MIPS Arithmetic
23 - 1 =
2’sc binary
1000
1001
1010
1011
1100
1101
1110
1111
0000
0001
0010
0011
0100
0101
0110
0111
decimal
-8
-7
-6
-5
-4
-3
-2
-1
0
1
2
3
4
5
6
7
4
Binary Addition
CPE 232 MIPS Arithmetic
5
Review: A Full Adder
carry_in
A
B
1-bit
Full
Adder
carry_out
S
A
B
carry_in
carry_out
S
0
0
0
0
0
0
0
1
0
1
0
1
0
0
1
0
1
1
1
0
1
0
0
0
1
1
0
1
1
0
1
1
0
1
0
1
1
1
1
1
S = A  B  carry_in
(odd parity function)
carry_out = A&B | A&carry_in | B&carry_in
(majority function)

How can we use it to build a 32-bit adder?

How can we modify it easily to build an adder/subtractor?
CPE 232 MIPS Arithmetic
6
A 32-bit Ripple Carry Adder/Subtractor
Remember 2’s
complement is just

complement all the bits
control
(0=add,1=sub)
B0

B0 if control = 0,
!B0 if control = 1
add a 1 in the least
significant bit
A
0111
B - 0110
0001
CPE 232 MIPS Arithmetic

0111
 + 1001
1
1 0001
c0=carry_in
A0
1-bit
FA
c1
S0
A1
1-bit
FA
c2
S1
A2
1-bit
FA
c3
S2
B0
B1
B2
...

add/sub
c31
A31
B31
1-bit
FA
S31
c32=carry_out
7
Overflow Detection

Overflow: the result is too large to represent in 32 bits

Overflow occurs when


adding two positives yields a negative

or, adding two negatives gives a positive

or, subtract a negative from a positive gives a negative

or, subtract a positive from a negative gives a positive
On your own: Prove you can detect overflow by:

0
+
Carry into MSB xor Carry out of MSB, ex for 4 bit signed numbers
1
1
1
0
1
1
1
7
0
0
1
1
3
1
0
1
0
–6
CPE 232 MIPS Arithmetic
1
+
0
1
1
0
0
–4
1
0
1
1
–5
0
1
1
1
7
8
Tailoring the ALU to the MIPS ISA




Need to support the logic operations
(and,nor,or,xor)

Bit wise operations (no carry operation involved)

Need a logic gate for each function, mux to choose the output
Need to support the set-on-less-than instruction (slt)

Use subtraction to determine if (a – b) < 0 (implies a < b)

Copy the sign bit into the low order bit of the result, set
remaining result bits to 0
Need to support test for equality (bne, beq)

Again use subtraction: (a - b) = 0 implies a = b

Additional logic to “nor” all result bits together
Immediates are sign extended outside the ALU with
wiring (i.e., no logic needed)
CPE 232 MIPS Arithmetic
9
MIPS ALU

Least-significant bits
Function
and
or
add
sub
slt
CPE 232 MIPS Arithmetic
Bnegate
0
0
0
1
1
Operation
00
01
10
10
11
10
MIPS ALU

Most-significant bit
Function
and
or
add
sub
slt
Bnegate
0
0
0
1
1
CPE 232 MIPS Arithmetic
Operation
00
01
10
10
11
11
MIPS ALU
CPE 232 MIPS Arithmetic
12
Improving Addition Performance

The ripple-carry adder is slow
+
CPE 232 MIPS Arithmetic
+
+
+
13
Carry-Lookahead Adder

Need fast way to find the carry
Carry-Lookahead Circuit
+
CPE 232 MIPS Arithmetic
+
+
+
14
Carry-Lookahead Adder

Carry generate and carry
propagate
+

gi = ai . bi

pi = ai + bi
CPE 232 MIPS Arithmetic
ai
0
0
1
1
bi
0
1
0
1
gi
0
0
0
1
pi
0
1
1
1
15
Carry-Lookahead Adder
Carry Equations:
c1 = g0 + p0c0
c2 = g1 + p1c1
= g1 + p1g0 + p1p0c0
c3 = g2 + p2c2
= g2 + p2g1 + p2p1g0 + p2p1p0c0
c4 = g3 + p3c3
= g3 + p3g2 + p3p2g1 + p3p2p1g0 + p3p2p1p0c0
CPE 232 MIPS Arithmetic
16
4-bit Carry-Lookahead Adder
c0
c4
g0 p0
c3
+
c2
+
c1
+
a0 b0
+
s0
CPE 232 MIPS Arithmetic
17
Larger Carry-Lookahead Adders
P = p0p1p2p3
G = g3 + g2p3 + g1p2p3
+ g0p1p2p3
CPE 232 MIPS Arithmetic
18