uC/OS-II
Porting to Intel X86 Platform
2010/04/29
Yufeng Lin
Outline
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uC/OS-II Porting
Multicore Boot
Demo SMP uC/OS-II
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uC/OS-II
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uC/OS-II Porting Limit
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Hardware limit
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處理器的 C 編譯器能產生可重入程式碼。
用 C 語言就可以打開和關閉中斷。
處理器支援中斷，並且能產生定時中斷 (通常在 10 至 100Hz 之間)。
處理器支援能夠容納一定數量的資料的硬體堆疊 (可能是幾千位元
組)。
處理器有將堆疊指標和其他 CPU 暫存器讀出和儲存到堆疊或記憶
體中的指令。
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uC/OS-II Porting
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1. 裝置啟動後，執行完硬體的初始設定或是硬體狀態檢查，就
main
OSInit
OSStartHigeReady
直接跳轉到 AP 執行的位置
2. uC/OS-II 一般啟動流程
OSStart
Task create
Do something
Task 1
OSStatrtTimeDly
Context switch
Other Tasks
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uC/OS-II Porting
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Porting = bootloader + OS
Bootloader
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There are two ways
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Initialize hardware, vectors, memory, stack, register value
分開成兩個檔案(bin)，bootloader裡面要設定OS Image存放的位址
(OS入口)，需要兩者一致方可成功啟動OS
合成一個bin檔，在bootloader執行完以後，透過跳轉__main進入
OS入口
…
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uC/OS-II Porting --- Bootloader
Reset
EntryPoint32
Real mode
47
Set PE in CR0
Clear instr.
queue
Protected mode
NEAR
; Initialize allDescriptor
segment registersTable)
to 10h (entry
#2
16 GDTR
bit
LDT(Local
is
GDT
= Global
Descriptor
Table
in the GDT)
_Gdt: the same
16 15
mov
ax,10h
; entry #2 in GDT
DD
DD
32
Build GDT
PROC
0 ; GDT[0]: Null entry, never used.
16 bit Table
ds,ax
; ds = 10h
0 mov
bit Linear
Base
Address
mov
es,ax
; es = 10h Limit
mov read-only
fs,axcode, base
; fs address
= 10h of 0,
; GDT[1]: Executable,
mov
gs,ax
;
gs
= 10h
;limit of FFFFFh, granularity bit (G) set (making
the limit 4GB)
mov
ss,ax
; ss = 10h
DW
0FFFFh
; Limit[15..0]
DW
DB
DB
DB
DB
mov
eax,cr0
GDT or
addresseax,1
mov
cr0,eax
GDT Size
0000h
; Base[15..0]
; Set the top
of stack to allow stack operations.
00h
; Base[23..16]
10011010b ; P(1) DPL(00) S(1) 1 C(0) R(1) A(0)
mov
esp,8000h
; arbitrary top of stack
11001111b
; G(1)
D(1) 0 0 Limit[19..16]
00h
; Base[31..24]
; Call main(), which is not expected to return.
calldata segment
_main
; GDT[2]: Writable
32 bit
16 clear
bit Protected
Jump.386p
could
mode
LGDTqueue
GDT
DW instruction
0FFFFh
; Limit[15..0]
DW
DB
DB
DB
DB
; Base[15..0]
Jmp 0000h
EntryPoint32
00h
; Base[23..16]
10010010b ; P(1)
DPL(00) S(1)
0 E(0) W(1)
A(0)
uC/OS-II
Main
Function
11001111b ; G(1) B(1) 0 0 Limit[19..16]
00h
; Base[31..24]
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0
uC/OS-II Porting --- Hardware Init. (1/4)
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The rest of the hardware initialization is
performed in the application. Once in main(),
a call is done to OsCpuInit(), in order to
perform the following:
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Enable the address line 20
Relocate the IRQ interrupts
Initialize the interrupt table
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The clock handler is installed as the interrupt 20h handler
The uC/OS-II context switch handler is installed as the
interrupt 30h handler
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uC/OS-II Porting --- Hardware Init. (2/4)
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void OSCpuInit()
{
int
IntNo;
InitA20();
// Enable address line 20
InitPIC();
// Relocate IRQs to 0x20-0x2F
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// Install a default handler for all supported interrupts:
//
a) 0x00-0x1F: Intel-reserved
//
b) 0x20-0x2F: IRQ (relocated)
//
c) 0x30-0x3F: Available for uCOS and application.
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for (IntNo = 0; IntNo < 0x40; IntNo++)
SetIntVector(IntNo, DefIntHandler);
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SetIntVector(0x20, OSTickISR);
SetIntVector(0x30, OSCtxSw);
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}
// Install the tick handler
// Install uCOS-II's context switch handler
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uC/OS-II Porting --- Hardware Init. (3/4)
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The A20 line is enabled by sending a few commands
to the Intel 8042 keyboard controller.
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InitA20
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do {status = inportb(0x64);} while (status & 2);
// Wait until i8042 can receive the command.
outportb(0x64, 0xd1); // Send the 'write' command to the i8042.
do { status = inportb(0x64);} while (status & 2);
// Wait until i8042 can receive the command.
outportb(0x60, 0xdf); // Send the new set-up.
do { status = inportb(0x64);} while (status & 2);
// Wait until i8042 has received the command.
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uC/OS-II Porting --- Hardware Init. (4/4)
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Relocate the IRQ lanes from 0x00 to 0x20 to prevent conflicts between IRQ
and CPU's exceptions
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InitPIC
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// Reprogram the master 8259.
outportb(I8259_A0, 0x11);
outportb(I8259_A1, 0x20);
outportb(I8259_A1, 0x04);
outportb(I8259_A1, 0x01);
outportb(I8259_A1, 0x00);
// Reprogram the slave 8259.
outportb(I8259_B0, 0x11);
outportb(I8259_B1, 0x28);
outportb(I8259_B1, 0x02);
outportb(I8259_B1, 0x01);
outportb(I8259_B1, 0x00);
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uC/OS-II Porting
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OS_CPU.h
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Define Data type & register value depend on hardware specification &
compiler
OS_CPU_A.asm
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OSStartHighRdy()
OSCtwSw()
OSTickISR()
OSIntCtxSw()
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uC/OS-II Porting
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OS_CPU_C.c
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OSTaskStkInit()
OSTaskCreateHook()
OSTaskDelHook()
OSTaskSwHook()
OSTaskStatHook()
OSTimeTickHook()
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OS_CPU.h (1/2)
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Compiler dependent(請查看compiler手冊)
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typedef unsigned char
typedef unsigned char
typedef char
typedef unsigned short
typedef short
typedef unsigned long
typedef long
typedef float
typedef double
typedef INT32U
BOOLEAN;
INT8U;
INT8S;
INT16U;
INT16S;
INT32U;
INT32S;
FP32;
FP64;
OS_STK;
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OS_CPU.h (2/2)
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Processor dependent
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#define
#define
#define
#define
OS_ENTER_CRITICAL()
OS_EXIT_CRITICAL()
OS_STK_GROWTH
OS_TASK_SW()
__asm PUSHFD __asm CLI
__asm POPFD
1
__asm INT 0x30
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OS_CPU_A.asm
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一般寫完bootloader後，常要觀察其與OS搭配後，是否可以順
利進入OS
為了往後可以測試task context switch 是否成功，因此建立2個
task，不同的priority，分別進行不同動作，例如輸出不同字元
taskA priority 5 並在while迴圈中加入OSTimeDly
taskB priority 10並在while迴圈中加入OSTimeDly
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OS_CPU_A.asm --- OSStartHighRdy(1/3)
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OSStartHighRdy()
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由於OSstart()後，會去執行schedule，並且挑出最高priority的task執行
Pseudo code
 void OSStartHighRdy (void)
 {

Call user definable OSTaskSwHook();
Get the stack pointer of the task to resume:
Stack pointer = OSTCBHighRdy->OSTCBStkPtr;
OSRunning = TRUE;
Restore all processor registers from the new task's stack;
Execute a return from interrupt instruction;
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}
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OS_CPU_A.asm --- OSStartHighRdy(2/3)
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OSStartHighRdy
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OSRunning = TRUE
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mov eax,[_OSTCBHighRdy]
mov esp,[eax]
Pop all the processor registers from the stack
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mov eax, 1h
mov [ _OSRunning ], eax
Load the processor stack pointer with OSTCBHighRdy->OSTCBStkPtr
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call _OSTaskSwHook ; Call OSTaskSwHook();
popad
Execute a Return from interrupt intruction
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iretd
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OS_CPU_A.asm --- OSStartHighRdy(3/3)
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若是此函式完成後
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可以觀察到taskA的動作
若是沒有預期動作，則表示先前的準備工作尚未全部完成
Ex.bootloader、OS_CPU.h……
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OS_CPU_A.asm --- OSCtxSw(1/4)
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OSCtxSw()
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若是目前task ready queue中有更高priority的task，則使用此函式將目
前正在執行的task與之交換
Pseudo code
 void OSCtxSw(void)
 {
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保存處理器暫存器;
將當前 task 的堆疊指標保存到當前 task 的 OS_TCB 中:
OSTCBCur->OSTCBStkPtr = Stack pointer;
呼叫使用者定義的 OSTaskSwHook();
OSTCBCur = OSTCBHighRdy;
OSPrioCur = OSPrioHighRdy;
得到需要恢復的 task 的堆疊指標:
Stack pointer = OSTCBHighRdy->OSTCBStkPtr;
將所有處理器暫存器從新 task 的堆疊中恢復出來;
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執行中斷返回指令;
OS_CPU_A.asm --- OSCtxSw(2/4)
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OSCtxSw
 保存處理器暫存器
 pushad
 OSTCBCur->OSTCBStkPtr = Stack pointer
 mov eax,[_OSTCBCur]
 mov [eax],esp
; Stack pointer is ESP
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OS_CPU_A.asm --- OSCtxSw(3/4)
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呼叫使用者定義的 OSTaskSwHook()
 call _OSTaskSwHook
OSTCBCur = OSTCBHighRdy
 mov al,[_OSPrioHighRdy] ; AL is OSPrioHighRdy
 mov [_OSPrioCur],al
OSPrioCur = OSTCBHighRdy
 mov eax,[_OSTCBHighRdy] ; EAX is OSTCBHighRdy
 mov [_OSTCBCur],eax
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OS_CPU_A.asm --- OSCtxSw(4/4)
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Stack pointer = OSTCBHighRdy->OSTCBStkPtr
 mov esp,[eax]
; ESP = OSTCBHighRdy->OSTCBStkPtr
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將所有處理器暫存器從新 task 的堆疊中恢復出來
執行中斷返回指令
 popad
 iretd
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此函式成功，則在taskA動作結束後，taskB會隨之動作
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OS_CPU_A.asm --- OSTickISR
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OSTickISR
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保存處理器暫存器
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Send an end-of-interrupt to the i8259
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_OSIntEnter
call
_OSTimeTick
call
_OSIntExit
恢復處理器暫存器
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call
呼叫 OSIntExit()
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al,20h
20h,al
呼叫 OSTimeTick()
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mov
out
呼叫 OSIntEnter() 或者直接將 OSIntNesting 加 1
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pushad
popad
執行中斷返回指令
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iretd
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此函式完成後，可以在此函式中加入輸出，
若是此輸出可以依照interval持續到來，表示成功
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Multicore Boot
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Multicore
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BSP (Bootstrap Processor)
AP (Application Processor)
How to boot AP (Application Processor) ?
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Disable 8259
Initialize Local APIC
Initialize I/O APIC
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IMC
R
BSP
PIC Mode CPU 1
AP
CPU 2
AP
CPU 3
Local
APIC
0
Local
APIC
1
Local
APIC
2
NMI
LINTIN1
LINTIN0
RESET
ICC BUS
8259
I/O
Interrupt
INT
APIC
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Interrupt Mode
IMC
R
APIC
Mode
NMI
BSP
CPU 1
AP
CPU 2
AP
CPU 3
Local
APIC
0
Local
APIC
1
Local
APIC
2
LINTIN1
LINTIN0
RESET
ICC BUS
8259
I/O
Interrupt
INT`
APIC
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Multicore Boot
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Disable 8259
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It means leave PIC mode
IMCR ( Interrupt Mode Control Register)
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Write 0x70 on 0x22 (choose IMCR)
Write 0x01 on 0x23 (not use PIC mode)
Disable(mask) 8259 all IRQ pins
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Multicore Boot
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BSP初始化過程
Intel spec
AP初始化
1. 初始化memory
2. Load microcode到處理器
1. 獲取信號量，開始初始化
3. 初始化內存範圍寄存器(MTRRs)
2. load microcode到處理器
4. enable cache
3. 初始化內存範圍寄存器(MTRRs)
5. 確定BSP是否是"GenuineIntel"
4. enable cache
6. 執行CPUID，保存CPU信息為將來使用
5. 檢查AP是否是"GenuineIntel"
7. load AP的啟動代碼到低1M的一個4K的頁裡
6. 保存CPUID信息，為將來使用
8. 切換到保護模式
7. 切換到保護模式
9. 轉換4K的頁基址為一個8位的向量. 例如
8. 配置AP的共存內存接口執行環境
0x000BD000H --> 0xBDH
9. 將處理器個數加1
10.設置APIC的SVR的bit8來enable local APIC
10.釋放信號量
11.建立錯誤處理handler
11. 執行CLI並且進入halt狀態
12.初始化鎖信號量
12.等待INIT IPI
13.探測系統中的AP, 方法如下：
- 設置處理器COUNT為1
- 啟動一個timer，BSP開始等待
- 此時AP開始初始化，並將COUNT加1
- timer到期，BSP檢查COUNT，如果沒有增加，就表示系統中沒有AP.
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14. 等timer中斷，檢查COUNT並建立處理器數目
Multicore Boot
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Broadcasts an INIT-SIPI-SIPI IPI sequence to the APs
to wake them up and initialize
 send twice IPI (Inter-Processor Interrupt) (INIT)
1. make AP initialize
2. set AP Arb ID register
 broadcast SIPI (start-up IPI)
1. Number of times depend on CPU
2. Tell AP the address where it start execute
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Demo
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Questions?
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