Analog to Digital Conversion

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Analog/Digital Subsystem
Converting analog signals to digital
values
CS-280
Dr. Mark L. Hornick
1
Analog Input refers to some type
of input signal whose value is
continuously variable
Measuring analog input is very common
requirement for embedded systems

Sensors are used to convert a physical signal to
a time-varying voltage
CS-280
Dr. Mark L. Hornick
2
Some examples of physical
quantities that are measured in
devices you use






Temperature (HVAC)
Force/pressure/sound (Auto)
Position/Velocity/Acceleration (Robotics,
Cameras)
Oxygen (Auto)
Biometrics (ECG, BP)
Signal strength, battery charge (mobile
phone)
CS-280
Dr. Mark L. Hornick
3
Analog to Digital Conversion is

The process that discretizes a signal from its
continuous (analog) form to its corresponding
digital approximation

ADC or A/D
CS-280
Dr. Mark L. Hornick
4
Discretization explanation

Consider an analog signal that will vary
between two values – say VL and VH volts

Discretization refers to the “levels” the ADC is
able to resolve the analog signal to:

a 2-bit converter can resolve 4 different discrete
levels
CS-280
Dr. Mark L. Hornick
5
Resolution of Discretization

The resolution of an ADC is limited by the
number of bits within the ADC

What is the resolution of a 2-bit converter that
is trying to measure a 0-5v signal?

How can the resolution be improved?
CS-280
Dr. Mark L. Hornick
6
Atmel Atmega32
A/D Subsystem
CS-280
Dr. Mark L. Hornick
7
Atmega32 has a built-in 10-bit A/D
converter

1024 discrete levels

PortA pins are used to sense the
input analog signal



Measures the voltage on a PortA
pins w.r.t. ground


8 different signals can be connected
simultaneously
You cannot use PortA for output
E.g. ADC0 vs. ground
Can also measure relative
voltage between pins

E.g. ADC0 vs. ADC1
CS-280
Dr. Mark L. Hornick
8
The absolute voltage that can be
measured is limited

Measured voltage should be no higher than a
reference voltage supplied to the AREF pin

VM <= VAref
 AREF is tied to a potentiometer


The measured voltage VM




Voltage can be varied between 0v and Vcc (5v)
VM = 0v is converted to a value of 0
VM = VAref is converted to a value of 1023
VM > VAref is clipped to a value of 1023
Don’t try to measure voltages higher than 5v

Otherwise, you’ll fry the chip
CS-280
Dr. Mark L. Hornick
9
Several I/O Registers are used
to control the A/D subsystem

ADCSRC (0x06) – A/D Control/Status Register

SFIOR (0x30) – Special Function Register

Used for other subsystems as well as A/D

ADMUX (0x07) – A/D Multiplex Register

ADCH (0x05) – High byte of converted value

ADCL (0x04) – Low byte of converted value
CS-280
Dr. Mark L. Hornick
10
Enabling the ADC via ADCSRA
– A/D control/status register
Meaning of the various bits in the register:
 ADPS0-ADPS2 : ADC clock frequency divider


ADIE – Enable ADC Interrupt




Trigger source is determined by SFIOR register
ADSC – Start AD conversion



Automatically cleared when ISR is executed
Or writing 1 to it (SBI) clears it
ADATE – set to enable auto-trigger


Interrupt is triggered when AD conversion is complete
ISR Vector is 0x20
ADIF – automatically set when AD Interrupt occurs


set all to 1 to run ADC at 1/128th of Atmega32 clock
In Free Running Mode, start first conversion
automatically returns to 0 when conversion is complete
ADEN – Set to enable ADC
CS-280
Dr. Mark L. Hornick
11
SFIOR – Special Function
Register


Only meaningful if ADATE in ADCSRA is SET
In Free Running Mode, ADC Interrupts will not occur

ADC will just continuously convert as fast as it can
CS-280
Dr. Mark L. Hornick
12
ADMUX – another A/D
control/status register

MUX2-MUX0 – Used to pick the PortA pin to sense


MUX4-MUX3


Gain setting; just set to 0 for now
REFS1-REFS0


000 for PA0; 111 for PA7
Reference voltage; just clear REFS1, set REFS0 for now
ADLAR – see next slide
CS-280
Dr. Mark L. Hornick
13
The ADCH and ADCL I/O
Registers hold the 10-bit result

If ADLAR in ADMUX is set:


ADCL must be read first, because ADCL and
ADCH are automatically reset after ADCH is
read
If ADLAR in ADMUX is clear:
CS-280
Dr. Mark L. Hornick
14
A/D conversion takes a relatively
long time

How much?


65 – 250 microseconds
i.e. 1040 - 4000 clock cycles at 16MHz
CS-280
Dr. Mark L. Hornick
15
ADC Results

Discretization Q is a quantum



Q = (Vmax-Vmin)/2n
Q = (5 – 0)/210 = 5/1024 = 4.88 mV
Apply 1.34 volts


Result: 274 (0x112)
ADC “reports” 1.33712 volts
CS-280
Dr. Mark L. Hornick
16
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