CENG 241
Digital Design 1
Lecture 6
Amirali Baniasadi
amirali@ece.uvic.ca
Decimal adder
 When dealing with decimal numbers BCD code is used.
 A decimal adders requires at least 9 inputs and 5 outputs.
 BCD adder: each input does not exceed 9, the output can not exceed 19
 How are decimal numbers presented in BCD?
 Decimal
 9
 19
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Binary
1001
10011
BCD
1001
(0001)(1001)
1
9
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Decimal Adder
 Decimal numbers should be represented in binary code number.
 Example: BCD adder
 Suppose we apply two BCD numbers to a binary adder then:
 The result will be in binary and ranges from 0 through 19.
 Binary sum: K(carry) Z8 Z4 Z2 Z1
 BCD sum : C(carry) S8 S4 S2 S1
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For numbers equal or less than 1001 binary and BCD are identical.
For numbers more than 1001, we should add 6(0110) to binary to get BCD.
example: 10011(binary) = 11001(BCD) =19
ADD 6 to correct.
3
BCD adder
Numbers that need correction (add 6) are:
01010 (10)
01011 (11)
01100 (12)
01101 (13)
01110 (14)
01111 (15)
10000 (16)
10001 (17)
10010 (18)
10011 (19)
Decides to add 6?
Adds 6
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BCD adder
Numbers that need correction (add 6) are:
K Z8 Z4 Z2 Z1
0 1 0 1 0 (10)
0 1 0 1 1 (11)
0 1 1 0 0 (12)
0 1 1 0 1 (13)
0 1 1 1 0 (14)
0 1 1 1 1 (15)
1 0 0 0 0 (16)
1 0 0 0 1 (17)
1 0 0 1 0 (18)
1 0 0 1 1 (19)
C = K + Z8Z4 +Z8Z2
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Magnitude Comparators
 Compares two numbers, determines their relative magnitude.
 We look at a 4-bit magnitude comparator;
 A=A3A2A1A0, B=B3B2B1B0
 Two numbers are equal if all bits are equal.
 A=B if A3=B3 AND A2=B2 AND A1=B1 AND A0=B0
 Xi= AiBi + Ai’Bi’ ; Ai=Bi
Xi=1 (remember exclusive NOR?)
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Magnitude Comparators
 How do we know if A>B?
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1.Compare bits starting from the most significant pair of digits
2.If the two are equal, compare the next lower significant bits
3.Continue until a pair of unequal digits are reached
4.Once the unequal digits are reached, A>B if Ai=1 and Bi=0, A<B if Ai=0
and Bi = 1
 A>B = A3B3’+X3A2B2’+X3X2A1B1’+X3X2X1A0B0’
 A<B = A3’B3+X3A2’B2+X3X2A1’B1+X3X2X1A0’B0
 Xi=1 if Ai=Bi
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Magnitude Comparators
A3=B3 ?
X3A2’B2
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Decoders
 A decoder converts binary information from n input lines to a maximum of
2n output lines
 Also known as n-to-m line decoders where m< 2n
 Example 3-to-8 decoders.
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Decoders: Truth Table
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X
0
0
0
0
1
1
1
1
Y
0
0
1
1
0
0
1
1
Z
0
1
0
1
0
1
0
1
D0
1
0
0
0
0
0
0
0
D1
0
1
0
0
0
0
0
0
D2
0
0
1
0
0
0
0
0
D3
0
0
0
1
0
0
0
0
D4
0
0
0
0
1
0
0
0
D5
0
0
0
0
0
1
0
0
D6
0
0
0
0
0
0
1
0
D7
0
0
0
0
0
0
0
1
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Decoders: AND implementation
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2-to-4 Decoder: NAND implementation
Decoder is enabled when E=0
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How to build bigger decoders?
We can combine two 3-to-8 decoders to build a 4-to-16 decoder.
Generates from
0000 to 0111
Generates from
1000 to 1111
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Combinational Logic implementation
 A decoder provides the 2n minterms of n input variables.
 Any function is can be expressed in sum of minterms.
 Use a decoder to make the minterms and an external OR gate to make the
sum.
 Example: consider a full adder.
 S(x,y,z) = Σ(1,2,4,7)
 C(x,y,z) = Σ (3,5,6,7)
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Combinational Logic implementation
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Encoders
 Encoders perform the inverse operation of a decoder:
 Encoders have 2n input lines and n output line.
 Output lines generate the binary code corresponding to the input value.
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Encoders: Truth Table
Outputs
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X
0
0
0
0
1
1
1
1
Y
0
0
1
1
0
0
1
1
Z
0
1
0
1
0
1
0
1
 z=D1+D3+D5+D7
Inputs
D0
1
0
0
0
0
0
0
0
D1
0
1
0
0
0
0
0
0
D2
0
0
1
0
0
0
0
0
D3
0
0
0
1
0
0
0
0
y=D2+D3+D6+D7
D4
0
0
0
0
1
0
0
0
D5
0
0
0
0
0
1
0
0
D6
0
0
0
0
0
0
1
0
D7
0
0
0
0
0
0
0
1
x=D4+D5+D6+D7
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Priority Encoders
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Encoder limitations:
If two inputs are active, the output is undefined.
Solution: we need to take into account priority.
What if all inputs are 0?
Solution: we need a valid bit
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Input
D0 D1 D2
0
0
0
1
0
0
X
1
0
X
X
1
X
X
X
D3
0
0
0
0
1
x
X
0
0
1
1
Output
y
X
0
1
0
1
v
0
1
1
1
1
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Priority Encoders: Map
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Priority Encoders: Circuit
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Multiplexers
 Multiplexer: selects one binary input from many selections
 example: 2-to-1 MUX
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4-to-1 MUX
Directs 1 of the 4 inputs to the output
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Multi-bit selection logic
 Multiplexers can be combined with common selection inputs to support
multi-bit selection logic
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Implementing Boolean functions w/ MUX
 General rules for implementing any Boolean function with n variables:
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Use a multiplexer with n-1 selection inputs and 2 n-1 data inputs
List the truth tabel
Apply the first n-1 variables to the selection inputs of multiplexer
For each combination evaluate the output as a function of the last variable.
The function can be 0, 1 the variable or the complement of the variable.
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Implementing Boolean functions w/ MUX
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Implementing Boolean functions w/ MUX
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Summary
 Reading up to page 154
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