Microprocessors
Chapter 4
Data Movement Instructions
prepared by
Dr. Mohamed A. Shohla
Chapter Overview
•
•
•
•
‫جام عة الم نوف ية‬
MOV Revisited
PUSH/POP
String Data Transfers
Miscellaneous Data Transfer Instructions
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4-2
PUSH
• The 8086-80286 PUSH instruction always transfers two bytes of
data to the stack; the 80386 and above transfer two or four bytes,
depending on the register or size of the memory location.
•
Examples of the PUSH instructions.
Symbolic
PUSH reg16
PUSH reg32
PUSH mem16
PUSH seg
PUSH imm8
PUSHW imm16
PUSHD imm32
PUSHA
PUSHAD
PUSHF
PUSHFD
‫جام عة الم نوف ية‬
Example
PUSH BX
PUSH EDX
PUSH WORD PTR [BX]
PUSH DS
PUSH ‘,’
PUSHW 1000H
PUSHD 20
PUSHA
PUSHAD
PUSHF
PUSHFD
Note
16-bit register
32-bit register
16-bit pointer
Segment register
8-bit immediate
16-bit immediate
32-bit immediate
Save all 16-bit registers
Save all 32-bit registers
Save flags
Save EFLAGs
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4-3
PUSH Example :
PUSH AX
The effect of the PUSH AX instruction on ESP and stack
memory location 37FFH and 37FEH. This instruction is
shown after execution.
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4-4
PUSH Example :
PUSHA
The operation of the PUSHA instruction, showing the
location and order of stack data.
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4-5
POP
•
The POP instruction performs the inverse operation of a PUSH instruction. The POP
instruction removes data from the stack and places it into the target 16-bit register,
segment register, or a 16-bit memory location. In the 80386 and above, a POP can
also remove 32-bit data from the stack and use a 32-bit address.
•
Examples of the POP instructions.
Symbolic
POP reg16
POP reg32
POP mem16
POP mem32
POP seg
POPA
POPAD
POPF
POPFD
‫جام عة الم نوف ية‬
Example
POP CX
POP EBP
POP WORD PTR[BX+1]
POP DATA3
POP FS
POPA
POPAD
POPF
POPFD
Note
16-bit register
32-bit register
16-bit pointer
32-bit memory address
Segment register
Pop all 16-bit registers
Pop all 32-bit registers
Pop flags
Pop EFLAGs
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4-6
POP Example :
POP BX
The POP BX instruction, showing how data are removed
from the stack. This instruction is shown after execution.
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4-7
LEA
• The LEA instruction loads a 16- or 32-bit register with
the offset address of the data specified by the
operand.
• By comparing LEA with MOV, it is observed that LEA
BX,[DI] loads the offset address specified by [DI]
(contents of DI) into the BX register; MOV BX,[DI]
loads the data stored at the memory location
addressed by [DI] into register BX.
• For example, the MOV BX,OFFSET LIST performs
the same function as LEA BX,LIST. Both instructions
load the offset address of memory location LIST into
the BX register.
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4-8
Examples of Load-effective address instructions.
Assembly Language
LEA AX, NUMB
LEA EAX, NUMB
LDS DI, LIST
LDS EDI, LIST
LES BX, CAT
LFS DI, DATA1
LGS SI, DATA5
LSS SP, MEM
‫جام عة الم نوف ية‬
Operation
Loads AX with the address of NUMB
Loads EAX with the address of NUMB
Loads DS and Dl with the 32-bit contents of data
segment memory location LIST
Loads DS and EDI with the 48-bit contents of
data segment memory location LIST
Loads ES and BX with the 32-bit contents of data
segment memory location CAT
Loads FS and Dl with the 32-bit contents of data
segment memory location DATA1
Loads GS and SI with the 32-bit contents of data
segment memory location DATA5
Loads SS and SP with the 32-bit contents of
memory location MEM
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4-9
Example: A short program that loads SI with the address of DATA1 and
DI with the address of DATA2. Il then exchanges the contents of these
memory locations. Note that the LEA and MOV with OFFSET
instructions are both the same length (three bytes).
.MODEL SMALL
.DATA
DATA1 DW
2000H
DATA2 DW
3000H
.CODE
.STARTUP
LEA
SI, DATA1
MOV
DI, OFFSET DATA2
MOV
BX, [SI]
MOV
CX, [DI]
MOV
[SI], CX
MOV
[DI], BX
.EXIT
END
‫جام عة الم نوف ية‬
; select SMALL model
; start of DATA segment
; define DATA1
; define DATA2
; start of CODE segment
; start of program
; address DATA1 with SI
;address DATA2 with DI
; exchange DATA1 with DATA2
; exit to DOS
; end of file
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 10
LDS, LES, LFS, LGS, and LSS
• The LDS, LES, LFS, LGS, and LSS instructions load any
16-bit or 32-bit register with an offset address, and the
DS, ES, FS, GS, or SS segment register with a segment
address.
• These instructions use any of the memory-addressing
modes to access a 32-bit or 48-bit section of memory
that contains both the segment and offset address.
• The 32-bit section of memory contains a 16-bit offset
and segment address, while the 48-bit section contains a
32-bit offset and a segment address.
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 11
Example: LDS BX, [DI]
• The LDS BX, [DI] instruction loads register BX from addresses
11000H and 11001H and register DS from locations 11002H and
11003H. This instruction is shown at the point just before DS
changes to 3000H and BX changes to 127AH.
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 12
String Data Transfers
• There are five string data transfer instructions: LODS, STOS,
MOVS, INS, and OUTS. Each string instruction allows data
transfers that are either a single byte, word, or doubleword (or if
repeated, a block of bytes, words, or doublewords).
• Before the string instructions are presented, the operation of the D
flag-bit (direction), DI, and SI must be understood as they apply to
the string instructions.
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 13
The Direction Flag
• The direction flag (D) (located in the flag register) selects the
auto-increment (D = 0) or the auto-decrement (D = 1) operation
for the DI and SI registers during string operations.
• The direction flag is used only with the string instructions. The
CLD instruction clears the D flag (D = 0) and the STD instruction
sets it (D = 1). Therefore, the CLD instruction selects the autoincrement mode (D = 0) and STD selects the auto-decrement
mode (D = 1).
• Whenever a string instruction transfers a byte, the contents of DI
and/or SI increment or decrement by 1. If a word is transferred,
the contents of DI and/or SI increment or decrement by 2.
Doubleword transfers cause DI and/or SI to increment or
decrement by 4.
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 14
LODS
•
•
The LODS instruction loads AL, AX, or EAX with data stored at the data
segment offset address indexed by the SI register.
After loading AL with a byte, AX with a word, or EAX with a doubleword,
the contents of SI increment, if D = 0 or decrement, if D = 1.
•
Examples of the LODS instructions.
Assembly Language
LODSB
LODSW
LODSD
LODS LIST
LODS DATA1
LODS FROG
‫جام عة الم نوف ية‬
Operation
AL = DS:[SI]; SI = SI ± 1
AX = DS:[SI];SI = SI ± 2
EAX = DS:[SI];SI = SI ± 4
AL = DS:[SIJ; SI = SI ± 1 (if LIST is a byte)
AX = DS:[SI], SI = SI ± 2 (if DATA1 is a word)
EAX = DS:[SI]; SI = SI ± 4 (FROG is a doubleword)
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 15
LODS Example :
LODSW
The operation of the LODSW instruction if DS = 1000H, D =
0,11000H = 32, and 11001H = A0. This instruction is shown after
AX is loaded from memory, but before SI increments by 2.
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 16
STOS
•
•
The STOS instruction stores AL, AX, or EAX at the extra segment
memory location addressed by the DI register.
The STOSB (stores a byte) instruction stores the byte in AL at the
extra segment memory location addressed by DI.
•
Examples of the STOS instructions.
Assembly Language
STOSB
STOSW
STOSD
STOS LIST
STOS DATA3
STOS DATA4
‫جام عة الم نوف ية‬
Operation
ES:[DI] = AL; Dl = Dl ± 1
ES:[DI] = AX; Dl = Dl ± 2
ES:[DI] = EAX; Dl = Dl ± 4
ES:[DI] = AL; Dl = Dl ± 1 (list is a byte)
ES:[DI] = AX; Dl = Dl ± 2 (DATA3 is a word)
ES:[DI] = EAX; Dl = Dl ± 4 (DATA4 is a doubleword)
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 17
MOVS
•
•
The MOVS instruction transfers a byte, word, or doubleword from
the data segment location addressed by SI to the extra segment
location addressed by DI.
As with the other string instructions, the pointers then increment
or decrement, as dictated by the direction flag.
•
Examples of the MOVS instructions.
Assembly Language
MOVSB
MOVSW
MOVSD
MOVS BYTE1,BYTE2
‫جام عة الم نوف ية‬
Operation
ES:[DI] = DS:[SI]; DI = DI ± 1; SI = SI ± 1 (byte
transferred)
ES:[DI] = DS:[SI];D! = DI ± 2; SI = SI ± 2 (word
transferred)
ES:[DI] = DS:[SI]; Dl = DI ± 4; SI = SI ± 4
(doubleword transferred)
ES:[D!] = DS:[SI]; DI = DI ± 1;S! = SI ± 1 (if BYTE1
and BYTE2are bytes)
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 18
Miscellaneous Data Transfer Instructions
XCHG
•
The XCHG (exchange) instruction exchanges the contents of
a register with the contents of any other register or memory
location.
•
Examples of XCHG instructions.
Assembly Language
XCHG AL, CL
XCHG CX, BP
XCHG EDX, ESI
XCHG AL, DATA2
‫جام عة الم نوف ية‬
Operation
Exchanges the contents of AL with CL
Exchanges the contents of CX with BP
Exchanges the contents of EDX with ESI
Exchanges the contents of AL with data segment
memory location DATA2
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 19
IN and OUT
• The contents of AL, AX, or EAX are transferred only between
the I/O device and the microprocessor.
• An IN instruction transfers data from an external I/O device to
AL, AX, or EAX.
• An OUT transfers data from AL, AX, or EAX to an external I/O
device.
• Two forms of I/O device (port) addressing exist for IN and OUT:
fixed-port and variable-port.
• Fixed-port addressing allows data transfer between AL, AX, or
EAX using an 8-bit I/O port address.
• Variable-port addressing allows data transfers between AL, AX,
or EAX and a 16-bit port address. It is called variable-port
addressing because the I/O port number is stored in register DX
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 20
•Example of IN and OUT instructions.
Assembly Language
IN AL, p8
IN AX, p8
IN EAX, p8
IN AL, DX
IN AX, DX
IN EAX, DX
OUT p8, AL
OUT p8, AX
OUTp8, EAX
OUT DX, AL
OUT DX, AX
OUT DX, EAX
Operation
8-bits are input to AL from I/O port p8
16-bits are input to AX from I/O port p8
32-bits are input to EAX from I/O port p8
8-bits are input to AL from I/O port DX
16-bits are input to AX from I/O port DX
32-bits are input to EAX from I/O port DX
8-bits are output from AL to I/O port p8
16-bits are output from AX to I/O port p8
32-bits are output from EAX to I/O port p8
8-bits are output from AL to I/O port DX
16-bits are output from AX to I/O port DX
32-bits are output from EAX to I/O port DX
Note: p8 = an 8-bit I/O port number and DX = the 16-bit port address held in DX.
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 21
MOVSX and MOVZX
•
The MOVSX (move and sign-extend) and MOVZX (move and
zero-extend) instructions are found in the 80386-Pentium 4
instruction sets. These instructions move data, and at the
same time either sign- or zero-extend it.
•
Examples of the MOVSX and MOVZX instructions.
Assembly Language
MOVSX CX, BL
MOVSX ECX, AX
MOVSX BX, DATA1
MOVSX EAX, [EDI]
MOVZX DX, AL
MOVZX EBP, DI
MOVZX DX, DATA2
‫جام عة الم نوف ية‬
Operation
Sign-extends BL into CX
Sign-extends AX into ECX
Sign-extends the byte at DATA1 into BX
Sign-extends the word at the data segment
memory location addressed by EDI into EAX
Zero-extends AL into DX
Zero-extends Dl into EBP
Zero-extends the byte at data segment memory
location DATA2 into DX
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 22
BSWAP
• The BSWAP (byte swap) instruction is available only
in the 80486 and all versions of the Pentium
microprocessors.
• This instruction takes the contents of any 32-bit
register and swaps the first byte with the fourth, and
the second with the third.
• For example, BSWAP EAX instruction with EAX =
00112233H swaps bytes in EAX, resulting in EAX =
33221100H.
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 23
CMOV
• The CMOV (conditional move) class of instruction is
new to the Pentium Pro and Pentium 4 instruction
sets.
• These instructions move the data only if the condition
is true.
• For example, the CMOVZ instruction moves data
only if the result from some prior instruction was a
zero.
• The destination is limited to only a 16- or 32-bit
register, but the source can be a 16- or 32-bit register
or memory location.
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 24
Examples of the conditional move instructions.
Assembly
Language
CMOVB
CMOVAE
CMOVBE
CMOVA
CMOVZ
CMOVNE
CMOVL
CMOVLE
CMOVG
CMOVGE
CMOVS
CMOVNS
CMOVC
CMOVNC
CMOVO
CMOVNO
CMOVP
CMOVNP
‫جام عة الم نوف ية‬
Condition Tested
C=1
c=0
Z = 1 or C = 1
Z = 0 and C = 0
Z=1
Z=0
S<>0
Z = 1 or S <> 0
Z = 0 and S = 0
S=0
S=1
S=0
C=1
C=0
O=1
0=0
P=1
P=0
Operation
Move if below
Move if above or equal
Move if below or equal
Move if above
Move if equal or set if zero
Move if not equal or set if not zero
Move if less than
Move if less than or equal
Move if greater than
Move if greater than or equal
Move if sign (negative)
Move if no sign (positive)
Move if carry
Move if no carry
Move if overflow
Move if no overflow
Move if parity or set if parity even
Move if no parity or set if parity odd
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 25
Questions and Answers
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 26
Which registers move onto the stack with
the PUSHA instruction?
• The PUSHA (push all) instruction copies the 16-bit registers to the
stack in the following order: AX, CX, DX, BX, SP, BP, SI, and DI.
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 27
Which registers move onto the stack for a
PUSHAD instruction?
• The PUSHAD (push all) instruction copies the 32-bit
registers to the stack in the following order: EAX,
ECX, EDX, EBX, ESP, EBP, ESI,
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 28
Describe the operation of each of the following
instructions:
(a) PUSH
AX
(b) POP
ESI
(c) PUSH
[BX]
(d) PUSHFD
(e) POPDS
(f) PUSHD 4
Instruction
PUSH AX
POP ESI
PUSH [BX]
Operation
Pushes the contents of AX onto the stack.
Remove a 32-bit number from the stack and places it
into the ESI register.
Pushes the 16-bit contents of the data segment memory
location addressed by BX onto the stack.
PUSHFD
Pushes the EFLAG register onto the stack.
POP DS
Remove a 16-bit number from the stack and places it
into the DS register.
PUSHD 4
Pushes the 32-bit number 4 onto the stack.
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 29
Explain what happens when the PUSH BX
instruction executes. Make sure to show
where BH and BL are stored. (Assume that
SP = 0100H and SS = 0200H.)
Stack segment
EBX
1234
ESP
0100
CS
DS
SS
02102
02101
02100
020FF
020FE
0100
02000
+
0200
02000
02100
Stack before the instruction PUSH
BX executed.
‫جام عة الم نوف ية‬
Stack segment
EBX
1234
ESP
00FE
CS
DS
SS
12
34
02102
02101
02100
020FF
020FE
020FD
020FC
02000
00FE
+
0200
02000
020FE
Stack after the instruction PUSH
BX executed.
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 30
Repeat the above question for the PUSH EAX
Stack segment
Stack segment
EAX
1234
02102
02101
02100
020FF
020FE
5678
EAX
1234
ESP
ESP
12
34
56
78
5678
00FC
02102
02101
02100
020FF
020FE
020FD
020FC
0100
CS
DS
SS
0100
02000
+
0200
02000
02100
Stack before the instruction PUSH
EAX executed.
‫جام عة الم نوف ية‬
CS
DS
SS
02000
00FC
+
0200
02000
020FC
Stack after the instruction PUSH
EAX executed.
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 31
Develop a sequence of instructions that
move the contents of data segment memory
locations NUMB and NUMB+1 into BX, DX,
and SI.
MOV BX, NUMB
MOV DX, BX
MOV SI, BX
‫جام عة الم نوف ية‬
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 32
Develop a sequence of instructions that
copy 12 bytes of data from an area of
memory addressed by SOURCE into an area
of memory addressed by DEST.
MOV
MOV
MOV
REP
‫جام عة الم نوف ية‬
SI, OFFSET SOURCE
DI, OFFEST DEST
CX, 12
MOVSB
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 33
Select an assembly language instruction
that exchanges the contents of the EBX
register with the ESI register.
XCHG
‫جام عة الم نوف ية‬
EBX, ESI
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 34
Write a sequence of instructions that input
50 bytes of data from an I/O device whose
address is 03ACH and stores the data in
extra segment memory array LISTS.
;Using the REP INSB to input data to a memory array
MOV
MOV
CLD
MOV
REP
‫جام عة الم نوف ية‬
Dl, OFFSET LISTS
DX, 3ACH
CX, 50
INSB
;address array
;address I/O
; auto-increment
; load count
;input data
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 35
Write a short sequence of instructions that
transfer data from a data segment memory
array (ARRAY) to an I/O device at I/O
address 3ACH.
; Using the REP OUTS to output data from a memory array
MOV
MOV
CLD
MOV
REP
‫جام عة الم نوف ية‬
SI, OFFSET ARRAY
DX, 3ACH
CX, 100
OUTSB
;address array
;address I/O
; auto-increment
; load count
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 36
Develop a sequence of instructions
that exchange the contents of AX with
BX, ECX with EDX, and SI with DI.
XCHG
XCHG
XCHG
‫جام عة الم نوف ية‬
AX, BX
ECX, EDX
SI, DI
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 37
Write a short program that exchanges the
contents of memory locations DATA1 with
the and DI with the contents of these
memory locations DATA2.
DATA1
DATA2
‫جام عة الم نوف ية‬
.MODEL SMALL
.DATA
DW 2000H
DW 3000H
.CODE
.STARTUP
MOV SI, OFFSET DATA1
MOV DI, OFFSET DATA2
MOV BX, [SI]
MOV CX, [DI]
MOV [SI], CX
MOV [DI], BX
.EXIT
END
; select SMALL model
; start of DATA segment
; define DATA1
; define DATA2
; start of CODE segment
; start of program
; address DATA1 with SI
; address DATA2 with DI
; exit to DOS
; end of file
Faculty of Electronic Engineering – Dept. of Computer Science & Eng.
Microprocessors Course
4 - 38