ISPD 2014
Shang-Tsung Yu, Sheng-Han Yeh, and Tsung-Yi Ho
jidung@eda.csie.ncku.edu.tw
http://eda.csie.ncku.edu.tw
Electronic Design Automation Laboratory
Department of Computer Science and Information Engineering
National Cheng Kung University
Tainan, Taiwan
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Outline
Introduction
Problem Formulation
Algorithm
Experimental Results
Conclusions
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Digital Microfluidic Biochips (DMFBs)
․The architecture of DMFBs




2D microfluidic array: A set of basic cells for biological
reactions
Droplets: Biological sample carrier as basic units to perform
the laboratory procedures on a DMFB
Reservoirs/dispensing ports: Generate droplets
Optical detectors: Detection of reaction result
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Electrowetting-On-Dielectric Chips (EWOD Chips)
․For EWOD chips, electrodes can be actuated by
applying voltage to the electrode.
Hydrophobic
insulation
Ground
electrode
Control
electrodes
Top plate
Droplet
Bottom plate
Side view
Droplet
Actuated
Generated electrical field
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Operation of Digital Microfluidics (1/3)
Transport
25 cm/s flow rates,
order of magnitude
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Operation of Digital Microfluidics (2/3)
Splitting/Merging
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Operation of Digital Microfluidics (3/3)
Droplet Dispensing
Synchronization of many droplets
7
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Chip-Level Design of EWOD Chips
․Bottom layer contains conduction wires, electrical
pads, and a substrate
․The routing problem: 2D pin array (routing inner
electrodes to outside electrical pads)
․How to control these electrodes
Bottom Layer
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Pin-Constrained EWOD chips
․Huge number of electrodes in large-scale DMFBs
․Limited number of ports in external controller
Electrodes
․Broadcast addressing technique for pin-constrained
- Reduce pin count and fabricate cost
Pin Count: 12
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share the same
control pin
Pin Count: 5
9
Broadcast Electrode Addressing (1/2)
․Electrode Actuation Sequence (AS)

An AS represents every status demanded at each time step
1: Actuated term
0: Grounded term
X: Don’t care term
time step
1
2
3
4
5
6
status of electrode
1
0
X
0
1
X
․Share the same control pin

By observing, multiple electrodes can share an identical
sequence by replacing X with 1 or 0
11
X01 00 X
1
Compatible
X
11 0 1 X
0X
01
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These electrodes can be merged
into the same control pin
10
Broadcast Electrode Addressing (2/2)
․Broadcast addressing constraint

If the actuation sequences are (aren’t) mutually compatible, they can
(cannot) be addressed with the same control pin
e3
e11
e1
e3
e5
e9
e6
e8
e10
e7
e4
e12
e2
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Clique
partition
Compatible
Compatibility graph
Pin 2
Pin 1
Electrode
e11
Pin 3
e1
e5
e9
e6
e8
e10
e7
e4
e12
e2
Electrode groups: {e1 , e2 , e9 ,
e10}, {e3 , e4 , e5 , e8 , e11 , e12}, {e6 , e7}
11
Reliability Issue (1/2)
․Arbitrary broadcast addressing will cause huge number
of switching times in resulting AS
10X0X0
100000
e1
101010
e2
e3
1X0X00
X01X1X
Number of switching times (𝑆𝑇) = 1
5
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Reliability Issue (2/2)
․Contact angle reduction problem [10]

High switching times will cause contact angle change
reduction, and it will decrease the reliability especially in high
frequency DMFB.
Grounded
Actuated
․The reliability issue can be modeled as

Maximum of switching times (𝑆𝑇𝑚𝑎𝑥 )
[10] L. Huang, B. Koo, and C. J. Kim, Evaluation of anodic Ta2O5 as the dielectric
layer for EWOD devices," IEEE MEMS, pp. 428-431, 2012.
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Outline
Introduction
Problem Formulation
Algorithm
Experimental Results
Conclusions
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Problem Formulation
․Input




Chip size: m x n
Electrode set: 𝐸 = {𝑒1 , 𝑒2 , … 𝑒𝑛 } (their locations)
Actuation sequence 𝐴𝑆𝑖 of each electrode 𝑒𝑖 (ex: “0010X”)
Pin constraint 𝑃𝑚𝑎𝑥
․Goal & Constraint


Minimize the value of 𝑆𝑇𝑚𝑎𝑥 : 𝑀𝑎𝑥 𝑆𝑇𝑖 , 𝑒𝑖 ∈ 𝐸
Meet all the design constraints



Broadcast addressing constraint
Pin constraint
Wire routing constraint
․Output

A feasible electrode addressing solution and wire routing
solution
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Outline
Introduction
Problem Formulation
Algorithm
Experimental Results
Conclusions
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Algorithm
․The algorithm contains 2 main steps
Step 1. Incremental search
Step 2. Simultaneous broadcast
addressing and routing
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Incremental Search Method (1/4)
․Lower Bound of Switching Times (BST)
𝐴𝑆3 = XX0X111XXX001X01
eliminate X terms
011100101
𝐵𝑆𝑇𝐴𝑆3 = 5
𝑆𝑇𝑖 ≥ 𝐵𝑆𝑇𝐴𝑆𝑖 (∀𝑒𝑖 ∈ 𝐸)
𝑆𝑇𝑚𝑎𝑥 ≥ max(𝐵𝑆𝑇𝐴𝑆𝑖 ) (∀𝑒𝑖 ∈ 𝐸)
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Incremental Search Method (2/4)
․Switching-constrained compatibility graph 𝐺𝑠𝑐𝑐 under a
specific value 𝑆𝑚𝑎𝑥

An edge was constructed between two electrodes a & b when
their switching times is not greater than 𝑆𝑚𝑎𝑥 after merging
10X0X0
100000
(ST=1)
e2
1X0X00
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e1
101010
(ST=5)
e3
3
Smax = 5
X01X1X
19
Incremental Search Method (3/4)
․A value 𝑆𝑚𝑎𝑥 (start from lower bound 𝐵𝑆𝑇𝑚𝑎𝑥 ) is
gradually increasing by 1 for each iteration
𝑆𝑚𝑎𝑥 = 𝐵𝑆𝑇𝑚𝑎𝑥
𝑆𝑇𝑚𝑎𝑥 ≥ max(𝐵𝑆𝑇𝐴𝑆𝑖 ) (∀𝑒𝑖 ∈ 𝐸)
Construct switching constrained
compatibility graph Gscc under 𝑆𝑚𝑎𝑥
Smax
NO
+= 1
Simultaneous broadcast
addressing and routing
Feasible solution?
YES
A feasible solution
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Incremental Search Method (4/4)
․If we can find a feasible solution under 𝐺𝑠𝑐𝑐 , then we
can obtain a solution with 𝑆𝑇𝑚𝑎𝑥 ≤ 𝑆𝑚𝑎𝑥
high
𝑆𝑚𝑎𝑥
𝑆𝑚𝑎𝑥
𝑆𝑚𝑎𝑥
ST
low
𝑒1 𝑒2
𝑒3 𝑒4
𝑒5 𝑒6 𝑒7
𝑒8
infeasible
feasible
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Simultaneous Broadcast Addressing and Routing (1/2)
Main idea: progressive solving
Divide the original problem into a set of manageable sub-problems
corresponding to a pin-electrode merging
: Unaddressed electrodes
Switching-constrained
compatibility graph 𝑮𝒔𝒄𝒄
: Addressed electrodes
e22
e1 e2 e3 e4 e5 e6 e7 e8 e9 e10
Set Broadcast
anpins
unaddressed
electrode
as routing
a new pin
Set initial
by addressing
aaddressing
maximal
independent
set
Broadcast
and
routing
and
e3
e1
e2
e5
e6
e8
e7
e10
e9
e4
P1
P2
P3
P4
P5
ee33
e1
ee10
10
ee44
ee99
ee55
e88
ee7
7
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ee6
6
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Simultaneous Broadcast Addressing and Routing (2/2)
Identify an initial electrode set and
address them with individual control pins
𝑆𝑚𝑎𝑥 = 𝐵𝑆𝑇𝑚𝑎𝑥
All electrodes
addressed?
Constructare
switching
constrained
compatibility graph Gscc under 𝑆𝑚𝑎𝑥
NO
Smax
Simultaneous
broadcast
candidates
Simultaneous
broadcastby
NOFind pin-electrode
addressing
routing
network
flow model
+=
1
addressing
andandrouting
YES
solution?
1. Trace theFeasible
resulting
flow
2. Routing check and conduct the
YES
broadcast addressing and routing
A feasible solution
Do escape routing and output the solution
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Network Flow Model (1/2)
․Minimum-Cost Maximum-Flow (MCMF) formulation

To find suitable merging candidates between 𝑃𝑖 and 𝑈𝐸𝑗
Capacity = 1
P1
Cost = 0
P2
UE1
Gscc
Capacity = 1
Cost = 0
UE2
‧‧‧
‧‧‧
S
T
Pn-1
UEm-1
Pn
UEm
Capacity
Existed= 1
Unaddressed
Cost
=
HPWL-Extension(
Pi , UEj )
control pins
electrodes
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Network Flow Model (2/2)
․HPWL-Extension
The variation of half-perimeter wire length
(The variation of half-perimeter of bounding box)

𝑒𝑒33
𝑒𝑒77
𝑃1
𝑃1
Cost = 03
𝑒2
𝑒2
𝑒𝑒88
𝑒2
Using lower routing cost to do the broadcast addressing and routing
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Wire Routing
․Pin-electrode merge

Only if there is a successful routing between a pin and an
electrode, they can be merged
e1
candidate 1
P1
candidate 2
candidate 3
e8
e2
routing check
Two-stage routing check will be conducted
one by one from candidates
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Wire Routing Check
․Stage 1: Do wire routing check between existing pin
and unaddressed electrode from candidates
𝑒2
𝑒7
𝑒5
𝑒1
𝑒3
𝑒6
𝑒4
If 𝑒5 is going to be merged with
a pin containing 𝑒6 and 𝑒7 , a
wire routing check is conducted
by BFS algorithm
Wire routing check failed
because 𝑒5 can NOT reach the
pin
Drop this pin-electrode merging!
27
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Escape Routing Check
․Stage 2: Do escape routing check whenever a wire
routing check (stage 1) is successful
𝑒5
𝑒1
𝑒7
Although the wire routing check
between 𝑒3 and 𝑒4 is successful…
𝑒3
𝑒6
𝑒2
𝑒4
𝑒8
Escape routing check failed
because 𝑒5 and 𝑒7 can NOT
escape simultaneously without
overlapping
(implemented by maximum flow)
Drop this pin-electrode merging!
Escape routing
Wire routing
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Conduct the Merging and Routing Successfully
․If both the stage 1 and stage 2 checks are approved,
conduct the merging and routing immediately
P1
e1
candidate
e1
e2
e8
P1
e8
e8
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e2
conduct
routingrouting
check
29
Matching Pairs in Order
․To have more pairs of successful routing, matching
pairs (candidates) will be checked for routing and route
in the increasing order of their cost (𝛻𝐻𝑃𝑊𝐿)
P1
P2
7
UE1
UE2
9
S
T
P3
12
5
P4
P5
UE3
20
Order:
1. 𝑃3 -𝑈𝐸4
2. 𝑃1 -𝑈𝐸1
3. 𝑃2 -𝑈𝐸3
4. 𝑃4 -𝑈𝐸5
(5)
(7)
(9)
(20)
UE4
UE5
30
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Blacklist of Failed Routing Pairs
․Record those pin-electrode matching pairs (candidates)
with failed routing check into the blacklist
․When the 𝐺𝑠𝑐𝑐 is rebuilt for the following network flow
model, the edges in the blacklist will NOT be built
again.
P1
UE1
P2
UE2
S
T
P3
UE3
P4
UE4
P5
UE5
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Blacklist:
𝑃1 -𝑈𝐸2
𝑃3 -𝑈𝐸1
𝑃3 -𝑈𝐸5
𝑃4 -𝑈𝐸4
31
Review Algorithm
Calculate Lower Bound of
Switching Times
Set Initial Switching-Constrained
Abandon Current Matching Results
Construct
Compatibility Graph
Select an Initial Pin Set
Rebuild Compatibility Graph
Routing Check, Merge Pins and
Electrodes and Conduct Wire
Routing
Build MCMF Network Flow Model
NO
Resulting Flow =
0?
YES
Select an Unaddressed Electrode as
a New Pin
NO
# of Unaddressed
Electrodes = 0 ?
YES
Switching-Constrained = SwitchingConstrained + 1
NO
Meet PinConstrained ?
YES
End
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Outline
Introduction
Problem Formulation
Algorithm
Experimental Results
Conclusions
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Experimental Result (1/3)
․Environmental Setup




CPU: Intel(R) Core(TM) i7-3770 CPU @ 3.40GHz
Memory: 8GB DDR3-1600
Operating System: Linux Mint 15 Olivia with 64-bits
Programming Language: C++
․5 real-life chips are used for test cases
Chip
Size
#E
Pmax
#Time Step
BST
amino
6X8
20
16
34
12
Multiplex
15 X 15
59
32
20
4
PCR
15 X 15
62
32
20
6
Multifunctional
15 X 15
91
64
77
12
DNA preparation
13 X 21
77
32
106
12
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Experimental Result (2/3)
Baseline
Ours
Chip
𝑆𝑇𝑚𝑎𝑥
#Pin
GR(%)
CPU
𝑆𝑇𝑚𝑎𝑥
#Pin
GR(%)
CPU
amino
14
13
16.67%
0.19
12
14
0%
0.15
multiplex
10
18
150%
29.6
4
23
0%
21.95
PCR
12
29
100%
33.2
6
32
0%
34.09
multifunctional
16
58
33.33%
39.8
12
61
0%
37.62
DNA preparation
22
28
83.33%
41.5
13
31
8.33%
70.78
𝑆𝑇𝑚𝑎𝑥 −𝐵𝑆𝑇𝑚𝑎𝑥
*Growth Rate (GR):
𝐵𝑆𝑇𝑚𝑎𝑥
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Experimental Result (3/3)
․Result of multifunctional assay
․Size: 15x15
․#Electrode: 91
․Pmax: 64
․#Pin: 64
․𝐺𝑅: 0%
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Outline
Introduction
Problem Formulation
Algorithm
Experimental Results
Conclusions
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Conclusions
․Reliability-driven chip-level design for high-frequency
DMFB
․A network flow based progressive addressing to handle
the complex problem
․The contact angle reduction problem is minimized.
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Appendixes
Motivation for Microfluidic Biochips
․ Applications: Clinical diagnostics, environmental monitoring,
automated drug discovery, etc.
Automation
Test tubes
Integration
Miniaturization
Higher throughput, minimal human
intervention,
Automation
Robotics
smaller sample/reagent consumption
Integration
Miniaturization
Automation
Microfluidics Biochips
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Integration
nl-pl sample
Miniaturization
40
Appendix
Broadcast Electrode Addressing
Electrode
Spacing
Droplet
Actuation
sequence
High voltage to generate an electrical field
time
0
X
X
X
X
0
0
X
X
X
00
00
XX
X
X
X
X
1
0
0
X
X
1
0
0
1
0
0
1
0
0
X
0
1
0
0
1
X
0
1
0
0
impossible
X1
X
0
0
0
1
01
0
X
X
X
0
1
0
1
0
0
1
7 pins -> 4 pins
Broadcast addressing
Wire
External controller
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Appendixes
CAD Flow (1/2)
Store O3
O6
Dispense
Store
O1
O5
Mix
O2
Detection
Mix
O4
Resource
Area
Time
Mixer
2x2-array
7
Max. Area: 5x5 array
Mixer
1x3-array
4
LED
1x1 cell
10
Max. Completion Time:
50 seconds
Storage
1x1 cell
N/A
Microfluidic
Module Library
Sequencing
Graph
Design
Spec.
Architectural-Level
Synthesis
Resource Binding
Operation
Resource
O1
On-chip
O2
2x2-array
O3
1x1 cell
O4
LED
O5
1x3-array
O6
1x1 cell
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Scheduling
O6
O3
O5
O2
O4
O1
Appendixes
CAD Flow (2/2)
Resource Binding
Operation
Resource
O1
On-chip
O2
2x2-array
O3
1x1 cell
O4
LED
O5
1x3-array
O6
1x1 cell
Scheduling
O6
O3
O1
O5
O2
O4
Physical-Level
Synthesis
Placement
O2
O2
O1
O4
O1
O4
O5
O6
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Routing
O3
O5
O6
O3
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