9th Annual “HUMIES” Awards for Human-Competitive Results
Genetic and Evolutionary Computation Conference (GECCO), 2012
Automatic Analog Integrated Circuits
Layout Generator
Ricardo Martins, Nuno Lourenço, Nuno Horta
IT / Instituto Superior Técnico, Lisbon, Portugal
© 2005, it - instituto de telecomunicações. Todos os direitos reservados.
OUTLINE
 Introduction and Motivation
 A brief description of the submitted Work
 R. Martins, N. Lourenço, N. Horta, “LAYGEN II – Automatic Analog
ICs Layout Generator based on a Template Approach”, Genetic
and Evolutionary Computation Conference (GECCO) 2012, July
2012, Philadelphia, USA.
 R. Martins, "LAYGEN II – Automatic Layout Generation of Analog
ICs based on Template Descriptions and Evolutionary
Computation", Master thesis in Electrical Engineering, May 2012,
IST, Lisbon, Portugal. (To be published by Springer)
 Why our result is “Human-Competitive”
 Why our result is the “best” entry
9th Annual “HUMIES” Awards, GECCO
2 | July 07-12, 2012, Philadelphia, USA
Integrated Circuit
[J. Goes et al, UNINOVA/CTS, 2011]
9th Annual “HUMIES” Awards, GECCO
3 | July 07-12, 2012, Philadelphia, USA
Why Analog IC Design Automation?
In today’s ASICs, analog circuits establish the LINK between
digital circuitry and the continuous-valued external world.
COMPUTER-AIDED
DESIGN TOOLS
 Digital:
 Auto Synthesis;
 Auto Layout;
 Highly Reusable IP.
 Analog:
[Rob A. Rutenbar, 2010]
 Limited Auto Synthesis;
 Limited Auto Layout;
 Hardly Reusable IP.
Urgent need for CAD tools that
Increase analog designers’ productivity and Reduce development cycles.
9th Annual “HUMIES” Awards, GECCO
4 | July 07-12, 2012, Philadelphia, USA
Analog IC Layout Generation Task
DIFICULTIES
 Due to the lack of automation,
designers keep exploring the
solution space MANUALLY
using traditional layout editors;
 Iterative and ERROR-PRONE
task;
 Demanding design rules of the
NANOMETER technologies;
 NON-REUSABLE nature of
analog IC layout.
[CADENCE® Virtuoso Layout Editor]
 Analog layout design is many technology nodes behind leading-edge digital.
9th Annual “HUMIES” Awards, GECCO
5 | July 07-12, 2012, Philadelphia, USA
Automatic Layout Synthesis using LAYGEN II
 The designer avoids time-consuming traditional editors.
INPUTS
LAYGEN II
Devices Sizes
Module Generator
HL Floorplan
Connectivity
TECHNOLOGY
DESIGN KIT
Desing Rules
PLACER
ANALOG
DESIGNER
ROUTER
EVOLUT.
KERNEL
EVAL.
EVAL.
Internal
THREAD
33
THREAD
Evaluation
ü DRC
DRC
üSCC
DRC
ü
ü
SCC
üERC
ü
SCC
ü ERC
ü
ERC ü
OUTPUTS
Layout
GDSII File
Verification
Calibre® DRC/LVS/PEX
 All the automatically generated layouts are
validated in CALIBRE®, a main reference
in the IC design industry.
9th Annual “HUMIES” Awards, GECCO
6 | July 07-12, 2012, Philadelphia, USA
AUTOMATICALLY
GENERATED LAYOUT
Why our result is “Human-Competitive”
(D) The result is publishable in its own right as a new scientific result.
Handmade Layout
[J. Goes et al, “A 1.2V 300µW second-order
switched-capacitor Δ∑ modulator”,´ESSCIRC 2011]
Automatically Generated
by LAYGEN II
[R. Martins et al, “Multi-Objective Multi-Constraint Routing of
Analog ICs using a modified NSGA-II Approach”, SMACD 2012]
Automatically generated layouts compete with human-created solutions in
terms of: ROBUSTNESS, QUALITY and GENERATION TIME.
9th Annual “HUMIES” Awards, GECCO
7 | July 07-12, 2012, Philadelphia, USA
Why our result is “Human-Competitive”
(D) The result is publishable in its own right as a new scientific result.
SIMULATIONS
 SCHEMATIC
(Without nonidealities of layout)
 Automatically generated results sent for
fabrication for the ultimate ON-DIE
comparison with human-created solutions.
9th Annual “HUMIES” Awards, GECCO
8 | July 07-12, 2012, Philadelphia, USA
Post-Layout:
 HANDMADE
 LAYGEN II
Why our result is “Human-Competitive”
(E) The result is equal to or better than the most recent human-created
solution to a long-standing problem.
 Our approach beats the existing state-of-the-art solutions by:
 Implementing a technology and specification independent approach;
 General for any circuit class;
 Fast, flexible and robust generation based on evolutionary optimization kernel;
9th Annual “HUMIES” Awards, GECCO
9 | July 07-12, 2012, Philadelphia, USA
Why our result is “Human-Competitive”
(E) The result is equal to or better than the most recent human-created
solution to a long-standing problem.
Efficiency on retargeting for different SPECIFICATIONS
Design 1
-a0 [dB]
Pareto Front of Optimal
Sizing Solutions
Design 3
Design 2
Design 3
Design 2
Area [µm²]
Design 1
SETUP TIME + AUTOMATIC GENERATION < 10 MINUTES
9th Annual “HUMIES” Awards, GECCO
10 | July 07-12, 2012, Philadelphia, USA
Why our result is “Human-Competitive”
(E) The result is equal to or better than the most recent human-created
solution to a long-standing problem.
Efficiency on retargeting for different TECHNOLOGIES
AMS 350 nanometers
UMC 130 nanometers
DIFFERENT TECHNOLOGIES = DIFFERENT DESIGN RULES
SETUP TIME + AUTOMATIC GENERATION < 10 MINUTES
9th Annual “HUMIES” Awards, GECCO
11 | July 07-12, 2012, Philadelphia, USA
Why our result is “Human-Competitive”
(G) The result solves a problem of indisputable difficulty in its field.
 The solution space grows rampantly with the number of devices to place
and wires to route, always considering technologies with strict design rules
and several layers, which all together lead to a huge problem;
 The designer can easily take HOURS
to explore partially the solution space;
 Retargeting operations performed
handmade usually lead to partial or
COMPLETE LOSS of the previous work.
9th Annual “HUMIES” Awards, GECCO
12 | July 07-12, 2012, Philadelphia, USA
Why our result is the “best” entry
 We solve real problems of a $300 billion industry;
 The approach deals with a problem of indisputable difficulty, that is
still solved manually by designers in the industry, in a time
consuming and error-prone process;
 LAYGEN II considers challenging nanometer technologies. We
have published results and sent for fabrication for a 130 nanometer
design process.
“In October 2010, TI acquired a 200mm
wafer fab in Chengdu, China.”
 Technology node:
TI’s 350 nanometer LBC5 Power BiCMOS
[Texas Instruments]
9th Annual “HUMIES” Awards, GECCO
13 | July 07-12, 2012, Philadelphia, USA
THANK YOU
9th Annual “HUMIES” Awards, GECCO
14 | July 07-12, 2012, Philadelphia, USA