Intelligent Storage Systems Chapter 4 ISMDR:BE5IT:VIII:Madhu N. PIIT 1 Chapter objective After completing this chapter, you will be able to: • Describe components of intelligent storage system • List benefits of intelligent storage system • Explain intelligent cache algorithms and protection • Describe intelligent storage array implementation – High-end storage array – Mid-range storage array ISMDR:BE5IT:VIII:Madhu N. PIIT 2 What is an Intelligent Storage System Intelligent Storage Systems are RAID arrays that are: • Highly optimized for I/O processing • Have large amounts of cache for improving I/O performance • Have operating environments that provide: – – – – Intelligence for managing cache Array resource allocation Connectivity for heterogeneous hosts Advanced array based local and remote replication options ISMDR:BE5IT:VIII:Madhu N. PIIT 3 Benefits of an Intelligent Storage System Intelligent storage system provides several benefits over a collection of disks in an array (JBOD) or even a RAID arrays: – Increased capacity – Improved performance – Easier data management – Improved data availability and protection – Enhanced Business Continuity support – Improved security and access control ISMDR:BE5IT:VIII:Madhu N. PIIT 4 Components of an Intelligent Storage System Intelligent Storage System Host Front End Back End Physical Disks Cache Connectivity FC SAN ISMDR:BE5IT:VIII:Madhu N. PIIT 5 Intelligent Storage System: Front End Intelligent Storage System Host Front End Back End Physical Disks Cache Connectivity FC SAN Ports Controllers ISMDR:BE5IT:VIII:Madhu N. PIIT 6 Front End Command Queuing A D C B A D I/O Requests C B A I/O Processing Order C D B Front-End Controller Cylinders Without Optimization (FIFO) A D C B A D I/O Requests B C A I/O Processing Order Front-End Controller C D B Cylinders With command queuing ISMDR:BE5IT:VIII:Madhu N. PIIT 7 Intelligent Storage System: Cache Intelligent Storage System Front End Host Back End Physical Disks Cache Connectivity FC SAN ISMDR:BE5IT:VIII:Madhu N. PIIT 8 Write Operation with Cache Write-through Cache Cache Write Request Acknowledgement Write-back Cache Write Request Acknowledgement Acknowledgement ISMDR:BE5IT:VIII:Madhu N. PIIT 9 Read Operation with Cache: ‘Hits’ and ‘Misses’ Data found in cache = ‘Hit’ Read Request Cache No data found = ‘Miss’ Cache Read Request ISMDR:BE5IT:VIII:Madhu N. PIIT 10 Cache Management: Algorithms • Least Recently Used (LRU) New Data – Discards least recently used data • Most Recently Used (MRU) – Discards most recently used data ( assumed that recent data may not be required for a while) Oldest Data Cache Implementation Dedicated Cache – Separate memory sets reserved for read and write Global Cache – Both read and write operation use available memory. – More efficient ISMDR:BE5IT:VIII:Madhu N. PIIT 11 Cache Management: Watermarking Manage peak I/O requests “bursts” through flushing/de-staging – Idle flushing, High Watermark flushing and Forced flushing For maximum performance: – Provide headroom in write cache for I/O bursts 100 % HWM LWM Idle flushing High watermark flushing Forced flushing ISMDR:BE5IT:VIII:Madhu N. PIIT Cache Data Protection • Protecting cache data against failure: (power failure) – Cache mirroring • Each write to the cache is held in two different memory locations on two independent memory cards • Cache coherency(only writes r mirrored) – Cache vaulting • Cache is exposed to the risk of uncommitted data loss due to power failure • In the event of power failure, uncommitted data is dumped to a dedicated set of drives called vault drives ISMDR:BE5IT:VIII:Madhu N. PIIT 13 Intelligent Storage System: Back End Intelligent Storage System Host Front End Back End Physical Disks Cache Connectivity FC SAN Controllers ISMDR:BE5IT:VIII:Madhu N. PIIT Ports 14 Intelligent Storage System: Physical Disks Intelligent Storage System Host Front End Back End Physical Disks Cache Connectivity FC SAN ISMDR:BE5IT:VIII:Madhu N. PIIT 15 What the Host Sees – RAID Sets and LUNs (Logical Unit Number) Host 1 Intelligent Storage System Front End LUN 0 Connectivity Back End Cache Physical Disks LUN 0 FC SAN LUN 1 LUN 1 Host 2 ISMDR:BE5IT:VIII:Madhu N. PIIT 16 LUN Masking It is a process that provides data access control by defining which LUNs a host can access. • LUN masking is access control mechanism • Process of masking LUNs from unauthorized access • Implemented on storage arrays and at front end controller Intelligent Storage Arrays High End Storage System Mid Range Storage System ISMDR:BE5IT:VIII:Madhu N. PIIT 17 • ISS Implementation: High-end Storage Systems Also referred as Active-active arrays – I/O’s are serviced through all the available path Active-Active Configuration Large storage capacity Huge cache to service host I/Os Fault tolerance architecture Multiple front-end ports and support to interface protocols – High scalability – Ability to handle large amounts of concurrent I/Os Active Active Host Port Port Controller B – – – – Controller A • Following are high-end array capabilities: LUN Storage Array • Designed for large enterprises ISMDR:BE5IT:VIII:Madhu N. PIIT 18 Midrange Storage Systems • Designed for small and medium enterprises • Less scalable as compared to high-end array Active Passive Port Port Host ISMDR:BE5IT:VIII:Madhu N. PIIT Controller A – Host can perform I/Os to LUNs only through active paths – Other paths remain passive till active path fails • Midrange array have two controllers, each with cache, RAID controllers and disks drive interfaces Active-Passive Configuration Controller B • Also referred as Active-passive arrays LUN Storage Array Chapter Summary Key points covered in this chapter: • Intelligent Storage Systems features • Components of Intelligent Storage Systems • Cache management algorithms • Intelligent Storage System implementation – High-end storage array – Mid range storage array ISMDR:BE5IT:VIII:Madhu N. PIIT 20 Concept in Practice: EMC CLARiiON CX-4 • Support for UltraFlex technology • Scalable from up to 960 disks • Supports flash drives • Supports different types and sizes of drives, and RAID types (0, 1, 1+0, 3, 5, 6) • Supports up to 16 GB of available cache memory per controller (Storage Processor) • Enhances availability with non disruptive upgrade and failover • Ensures data protection through mirrored write cache and cache vaulting • Supports storage-based local and remote data replication – Through SnapView and MirrorView software ISMDR:BE5IT:VIII:Madhu N. PIIT CLARiiON CX-4 Architecture Storage Processor Storage Processor Multi-Core Processors FC Module CPU CPU CPU CPU FC Module CPU CPU CPU CPU Multi-Core Processors 4 Gb/s Fibre Channel Front-End CPU CPU CPU CPU FC Module CLARiiON Messaging Interface (CMI) CPU CPU CPU CPU FC Module Multi-Lane PCI-Express Bridge Link FC Module FC Module iSCSI Module Power Supply Memory Fan iSCSI Module I/O Complex CPU Module 4 Gb/s Fibre SPS Fan Fan SPS FC Module Memory Fan Power Supply 4 Gb/s LCC FC Module 4 Gb/s LCC iSCSI Module iSCSI Module CPU Module I/O Complex 4 Gb/s Fibre Channel Back-End Channel Back-End 4 Gb/s LCC 4 Gb/s LCC 4 Gb/s LCC 4 Gb/s LCC 4 Gb/s LCC 4 Gb/s LCC ISMDR:BE5IT:VIII:Madhu N. PIIT 22 EMC Symmetrix DMX-4 • Incrementally scalable to 2,400 disks • Supports Flash-based solid-state drives • Dynamic global cache memory (16 GB–512 GB) • Advanced processing power (up to 130 PowerPC) • Direct matrix Architecture • High data processing bandwidth (up to 128 GB/s) • Data protection with RAID 1, 1+0 (also known as 10 for mainframe), 5, and 6 • Storage-based local and remote replication – Through TimeFinder and SRDF software ISMDR:BE5IT:VIII:Madhu N. PIIT Direct Matrix Architecture ESCON host attach Fibre Channel host attach ESCON Director FC Director Cntl Direct Matrix FICON, GigE, iSCSI host attach FICON, GigE, iSCSI host attach Multi-Protocol CD Multi-Protocol CD Cntl Direct Matrix Direct Matrix Cntl Direct Matrix Direct Matrix FICON, GigE, iSCSI host attach Multi-Protocol CD Cntl Direct Matrix Direct Matrix FICON, GigE, iSCSI host attach Multi-Protocol CD Cntl Direct Matrix Direct Matrix Fibre Channel host attach FC Director Cntl Direct Matrix Direct Matrix ESCON host attach ESCON Director Cntl Direct Matrix Direct Matrix Cntl Direct Matrix Direct Matrix Direct Matrix Control and communications Signals 64 GB Memory Environmental control and status signals 64 GB Memory 64 GB Memory 64 GB Memory 64 GB Memory 64 GB Memory 64 GB Memory 64 GB Memory Direct Matrix Direct Matrix Direct Matrix Environmental control and status signals Control and communications Signals Direct Matrix Direct Matrix Direct Matrix Direct Matrix Cntl Cntl FC (Back-End) FC (Back-End) UPS Direct Matrix Direct Matrix Cntl Direct Matrix Direct Matrix Cntl Cntl FC (BE or FE) FC (BE or FE) Direct Matrix Direct Matrix Cntl FC (BE or FE) FC (BE or FE) Direct Matrix Direct Matrix Cntl Cntl FC (Back-End) FC (Back-End) A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B A B Symmetrix Fibre Channel disk devices Service Processor Direct Matrix Symmetrix Fibre Channel disk devices Fibre Channel back-end director * Power supplies Fibre Channel back-end director * Fibre Channel back-end director * Fibre Channel back-end director * Battery backup Unit Modules Symmetrix Fibre Channel disk devices Symmetrix Fibre Channel disk devices Cooling Modem ISMDR:BE5IT:VIII:Madhu N. PIIT 24 Check Your Knowledge • What are the parts of an Intelligent Storage System? • What are the differences between a high-end and midrange storage array? • What is the difference between a read cache hit and a read cache miss? • What is the difference between Least Recently Used and Most Recently Used algorithms? • What is the difference between Write-through and Write-back cache? ISMDR:BE5IT:VIII:Madhu N. PIIT 25