An introduction to the group and its projects Tony McGregor tonym@wand.net.nz WAND Projects • • • • • • • • • CRCNet Active Measurement IP Measurement protocol Passive Measurement Simulation Integrated measurement and simulation Emulation Network Physical layer switch IPv6 • topology, mobile stacks, fast handover • NZNOG ‘04 CRCNet Introduction • Project started almost 2 years ago • Rural communities were frustrated by low speed unreliable Internet access • Develop a new platform suitable to deploy future generation (>>10Mbps) wireless networks in rural and remote areas • based around a mesh architecture • Funded by Foundation for Research Science and Technology CRCNet Architecture CRCNet Stage 1 – Build Trial Network Range of equipment • 2.4Ghz (802.11b and g) • Orinoco radio cards and APs • Advantech and Soekris Biscuit PC • Linksys wireless Ethernet bridges • 5.8 GHz • Proxim Quick bridge20 • Trango Current Topology CRCNet Pirongia Site CRCNet HSK Site CRCNet MFR Site CRCNet Web Casting • Between Hamilton Zoo and the Fieldays site • 6 wireless links CRCNet Stage Two – Platform Design • Routing protocols for mesh networks • Link Layer Design • Design of a new node AMP Introduction • NLANR’s active measurement project • Approx 140 monitors, mostly in the USA. • International deployments • • a single AMP monitor in about a dozen other countries some national AMPs (Australia, Taiwan, Russia soon) • Measure • • • • RTT loss topology throughput (on demand) • NSF funded AMP USA Sites AMP Architecture Test Results Web browser Active Monitor Analysis machine test traffic (amp) Test Results Cichlid Analysis machine (volt) Active Monitor Other target Active Monitor AMP Demo AMP Demo AMP Demo AMP Demo AMP Demo AMP Demo AMP Demo AMP Demo AMP Cost vs Function • Design • • • • dedicated machines 1ms accuracy No GPS/CDMA 1 sample per minute • Benefits • • • easy and cheap => wide deployment full mesh manageable • Limits • • no one-way delays (bidirectional traceroute, IPMP OWD) very short events missed AMP Management my SQL d atab se AMP Vo lt sy stem man ager ALL AMP HPW REN amp -k iwi amp -p alo mar mo n ito rs AMP New Zealand • Beginnings of a New Zealand AMP mesh • • • • Waikato Auckland APE Ihug (offer) Can fund more monitors and maintenance • • need hosts (here?) hosts provide space, power and network IPMP Introduction • Current active measurement protocols have weaknesses • • multiple packets (overhead, phantom routes) measurement of components (reverse path, CPU) • IPMP combines path and delay measurement in a single packet exchange with low router overhead IPMP Architecture High perfomance ISP IPM P IPMP Enabled router IPM P Measurement Host Non-IPMP Router IPM P Peering point IPM P Target Host Progression of packet through the network header header header header no change Packet that leaves measurement host (one path record) Path record added at first IPMP enabled router Packet as it leaves the kernel on the target host IPMP Protocol (IPv4) 0 0 0 8 1 6 Version Queue Type 00000000 Type 2 4 3 1 Checksum Returned TTL Length Return Type Path Pointer (optional) data (optional) Path Records Padding (if required) IPMP Timestamps • Router can use any timestamp it has available • Resolving to real-time is not done in the packet forwarding critical path • Uses a separate packet exchange (information request/reply) • • supplies real-time reference points other router information IPMP Information Reply 0 0 0 8 1 6 Version 00000000 00000000 Type 2 4 3 1 Checksum 00000000 Length Precision Performance Data Pointer Forwarding IP Address Accuracy IPMP Processing Overhead (optional) Path Records (optional) performance data IPMP Uses • POM made better • • • • • • • combined path and latency, no phantom routes etc lower overhead kernel based timestamps explicit clock information forward and reverse traceroute DoS resistant associates router interfaces • One way delay from NTP • Bandwidth Estimation • Deployment (AMP, CRCnet) Passive Measurement Overview • To support simulation work the group developed passive header capture hardware. • Known as Dag cards • Speeds from Ethernet to OC48 (2.5Gbps WAN) • Spun off a startup • • • Endace (www.endace.com) now OC192 better support Passive Measurement Dag Overview • Capture IP headers or full packet • Add accurate timestamp • GPS or CDMA for external time • Originally header trace focused • • real-time flow based security applications • Optical splitter, electrical card relay or electrical tap Passive Measurement Dag 3 block diagram Passive Dag 4.2 Passive WITS Traffic Archive • Long traces from Auckland University and NZIX •traces up to 45 days (3.2 billion packets) •IP headers •GPS timestamps • Some analysis online • Can fetch traces from NLANR • Summary CD Simulation Introduction • ATM-TN based • • • • University of Calgary/Waikato partnership parallel BSDLite network stack (sort of) high bandwidth delay, mixed real-time/TCP • NS-2 with FreeBSD stack • • new work network cradle • 802.11b link layer Simulation Example –TCP splitting international channel NZ Proxy NZ Internet US Proxy US Internet Web Clients US Servers Simulation The simulation process Simulation Parameters HTTP Log Logfile generator Digested Logfile Hostfile generator Host List buffer and MSS info Packet trace Simulator HTTP Page Latencies Line and Buffer use Host Information Summarise and Plot Graphs query on host live hosts Internet Pre-process Simulate Post-process Simulation Example –TCP spliting, Network parameters • Bandwidth 34.369Mbps (E3) • Delay 60ms • TCP buffer size • • proxy servers • MSS • US delay • NZ delay 32767 bytes as measured as measured as measured not simulated Simulation TCP Splitting – a single connection Simulation Introduction Simulation Introduction Messim Introduction • Simulation is only accessible to very large network operators and users • AIM: Make simulation available to medium sized enterprises • Integrate measurement and simulation • FRST funded Messim Introduction Monitored Network topology discovery measurement and analysis alerts and query results workload Workload Model Network Model validation simulator Messim Projects • Topology discovery • automated discovery of link layer devices • Traffic Models • • • • • • further development of specific models (e.g. peer to peer) generic Extraction of simulation parameters from traces Extended range of network stack models Continuous validation Hardware flows analysis Messim Kernel space User space Network Stack Cradle Mozilla / Bash / KDE / etc. Network stack FreeBSD 5 kernel Messim Network Stack Cradle Network User space Simulator Cradle (~200 functions) Network stack Messim Generic models • 2d Empirical distribution Messim Generic models Messim Generic models Messim Generic models • Use WEKA machine learning algorithms to • • cluster classify • For each cluster • • simplify the rule set into terms for a network manager produce an empirical distribution for each • Allow simulations with different proportions of traffic Emulation Network Introduction • There is a need for a structured environment in which to build networks in the laboratory • • validation of simulations testing on network equipment • The emulation network is two racks of PCs that can be configured as • • • routers end hosts delay • Plus configuration and measurement support Emulation Network Overview Configure PC PC PC PC PC PC PC PC PC PC R R SW Ixia Patch Panel Dag H Configure R R H delay R R R H Monitor (DAG) Emulation Network Usage and development • Usage • • • • Is a public facility Has been used to debug AT switch Used network trace capture and replay then Ixia script Ihug traffic shaper Bandwidth estimator • Development • Physical layer switch Crossbar Switch Introduction • • • • 64 Port FastEthernet Crossbar switch Fast / Flexible Reconfiguration Link Monitoring Latency Control • Bandwidth limiting • Self Documenting Network Topology • Centralised Control Crossbar Switch Block Diagram – Overview DaughterBoard Uplink DaughterBoard Mainboard DaughterBoard 12.8Gb/s DaughterBoard 3.2Gb/s Mainboard • Crossbar • Latency • Bandwidth Limiting Daughterboards • Ethernet Interface • Time Division MUX Crossbar Switch Block Diagram –Mother board Uplink DaughterBoard 12.8Gb/s FPGA FLASH CPU SDRAM DaughterBoard DaughterBoard DaughterBoard DDR SDRAM (8GB max). Crossbar Switch PHY Ethernet Ports Block Diagram – Daughter board Uplink to Motherboard 3.2Gb/s PHY Ethernet Ports FPGA Crossbar Switch Daughter board Layout Daughterboard Layout Skamper Overview • Skitter for IPv6 • Hope to capture the growth of the IPv6 internet IPv6 Stacks Overview • Small devices • • • • • • One of the motivators for IPv6 is to provide addresses and other support for small devices a.k.a. cell phones implementing a stack for embedded devices little ram moderate CPU speeds prototype hardware development • Fast handover between cells • • normally may exceed 2s reduce to around 150ms, l2 triggers, L3 preparation for handover and timing improvements in protocols NZNOG Conference • The New Zealand Network Operators Group has an • • • • • annual conference The next one will be hosted by WAND Jan 29-30 2004, at Waikato Discounted registration (free?) for students Hope to have a number of partial travel grants for students Could hold a parallel Academic Networking Conference • need feedback