Controlling Modules with MMRs
CS 478: Microcontroller Systems
University of Wisconsin-Eau Claire
Dan Ernst
MPC555 Block Diagram
CS 478: Microcontroller Systems
University of Wisconsin-Eau Claire
Dan Ernst
How Do I Control These Modules?
• These devices get their operating instructions through a set of registers
• The CPU can modify these registers through memory addresses
– “Memory-Mapped Registers”
• What do these registers do?
• Where do I find them?
• The Controller’s Users Manual is the definitive source!
CS 478: Microcontroller Systems
University of Wisconsin-Eau Claire
Dan Ernst
Internal Memory Map
(MPC555 user’s manual, Appendix A)
CS 478: Microcontroller Systems
University of Wisconsin-Eau Claire
Dan Ernst
A Simple MMR-Driven Device
Periodic Interrupt Timer
• This basic timer has many uses
–
–
–
–
To implement a clock
To check user input periodically
To monitor environment changes
To switch between programs
CS 478: Microcontroller Systems
University of Wisconsin-Eau Claire
Dan Ernst
Periodic Interrupt Timer
A timer is basically a counter of clock cycles.
count
reset
mux
clock
count register
zero?
timer expires
-1
Adder
CS 478: Microcontroller Systems
University of Wisconsin-Eau Claire
Dan Ernst
Periodic Interrupt Timer
Time Period
= (count + 1) × clock cycle time
= (count + 1) / clock frequency
EX:
The clock frequency is 5MHz.
The needed time period is 10ms.
What is the count value?
CS 478: Microcontroller Systems
University of Wisconsin-Eau Claire
Dan Ernst
Periodic Interrupt Timer
Time Period
= (count + 1) × clock cycle time
= (count + 1) / clock frequency
EX 2:
The clock frequency is 5MHz.
The needed time period is 1 sec.
What is the count value?
FYI: The count register is 16-bit
CS 478: Microcontroller Systems
University of Wisconsin-Eau Claire
Dan Ernst
Periodic Interrupt Timer
• How to program a timer?
–
–
–
–
Set up count value
Check if the timer expires
Configure interrupt, if interrupt is to be used
Read current value (if supported)
CS 478: Microcontroller Systems
University of Wisconsin-Eau Claire
Dan Ernst
What does the manual say?
• Check the table of contents:
(Page 6-15 has a short description of what the timer does)
CS 478: Microcontroller Systems
University of Wisconsin-Eau Claire
Dan Ernst
Internal Memory Map
CS 478: Microcontroller Systems
University of Wisconsin-Eau Claire
Dan Ernst
MPC555 PIT Programming
3 Registers form the MPC555 PIT programming interface
1.
PICSR: Periodic Interrupt Control & Select Register
2.
PITC: PIT Counter
3.
PITR: Periodic Interrupt Timer Register
CS 478: Microcontroller Systems
University of Wisconsin-Eau Claire
Dan Ernst
MPC555 PIT Programming
PICSR: Periodic Interrupt Control & Select Register
0x002FC240
0
PInterrupt Enable
0: disable interrupt
1: enable interrupt
Interrupt level
for PIT
1
2
3
4
5
6
7
12
PIE
13
PITF
14
PTE
15
PIRQ
PS
8
9
10
11
PIT Freeze
0: no effect
1: disable decrement
counter if internal
signal FREEZE is
asserted
CS 478: Microcontroller Systems
PIT Status
0: no PIT int asserted
1: PIT int asserted
University of Wisconsin-Eau Claire
PIT Enable
0: enable decrement
counter
1: disable decrement
counter
Dan Ernst
MPC555 PIT Programming
PTE
PITC
Clock
Disable
16-bit
Modulus
counter
PIF
PTE: PIT enable
PITC: PIT count value
PIE: PIT interrupt enable
PS
PIT
Interrupt
PIE
PIF: PIT freeze
PS: PIT status
PITR: current counter value (Read-Only)
CS 478: Microcontroller Systems
University of Wisconsin-Eau Claire
Dan Ernst
PITC: PIT Counter
0x2F C244
0
16
PITC
PITC: PIT counter
PIT Time-out period = (PITC+1)/(PIT Frequency)
PIT Frequency depends on another module…
CS 478: Microcontroller Systems
University of Wisconsin-Eau Claire
Dan Ernst
PITR: Periodic Interrupt Timer Register
If you want to read the current PIT count to estimate
time to next PIT interrupt?
0x2F C248
0
15
PIT
16
31
Reserved
PIT: Leftover (current) count in PIT counter
Writes to PITR have no effect: read only.
CS 478: Microcontroller Systems
University of Wisconsin-Eau Claire
Dan Ernst
PIT Initialization
; r4 base address of SIU regs
lis r4, 0x2f
; set PISCR bits: PIRQ=08, PS=PS, PIE=1, PITF=0, PTE=0
; so flag is cleared, interrupt is enabled, timer is
; enabled, and level is assigned (Level 0)
li
r0,0x0804
sth
r0,0xC240(r4)
;PITC = 33000 = 0x80e8 and store it in PITC (0x2fc244)
li r5, 0x80e8
sth r5, 0xC244(r4)
;now enable PIT: PTE = 1
lhz r0, 0xC240(r4)
ori r0, r0, 0x1
sth r0, 0xC240(r4)
CS 478: Microcontroller Systems
University of Wisconsin-Eau Claire
Dan Ernst
How to handle a PIT Interrupt
Easy, as far as module handlers go
Write a ‘1’ to the PS field. This indicates that you’ve handled the interrupt,
and the count will immediately start over again with the same period
(from PITC)
If you want to change the period, modify PITC.
CS 478: Microcontroller Systems
University of Wisconsin-Eau Claire
Dan Ernst
Software Watchdog Timer
• Timer used to guarantee forward progress for the processor.
• SWT must get attention every so often, or it will generate a NMI (reset)
CS 478: Microcontroller Systems
University of Wisconsin-Eau Claire
Dan Ernst
Configuring the SWT
CS 478: Microcontroller Systems
University of Wisconsin-Eau Claire
Dan Ernst