Post-Silicon Debugging of Transactional Memory Tests

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Post-Silicon Debugging of

Transactional Memory Tests

Ophir Friedler , Wisam Kadry,

Amir Nahir, Vitali Sokhin

{ophirf, wisamk, nahir, vitali}@il.ibm.com

Carla Ferreira, João Lourenço

{carla.ferreira, joao.lourenco}@fct.unl.pt

IBM Research Universidade Nova de Lisboa

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WTM’13, Prague, April 14, 2013

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Post Silicon

Post-silicon validation elements:

1.

2.

Stimulating the design under test

Detecting erroneous behavior

3.

4.

Localizing the root cause of the problem

Providing a fix.

WTM’13, Prague, April 14, 2013

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Stimulation

1.

2.

3.

Test generation

Execution

Consistency checking

4.

Repeat … Forever!

Exerciser Image (Threadmill)

Test Template

Topology

Architectural

Model

Accelerator

Generation

Execution

Silicon

Checking

OS services

WTM’13, Prague, April 14, 2013

Detection

Consistency checking

Run the same test-case from the same initial architectural state.

• Expect the same final architectural state ori r10,r0,170 stb r10,0(r6) lbz r11,0(r6)

...

Initial State

R0 = 0x1, R1 = 0x2 …

Final State

R0 = 0xA, R1 = 0xB …

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Micro-architectural state varies!

Caches, page misses, pre-fetching, thread priorities

WTM’13, Prague, April 14, 2013

Detection

And what if two different final states are manifested? ori r10,r0,170 stb r10,0(r6) lbz r11,0(r6)

...

Initial State

R0 = 0x1, R1 = 0x2 …

R0 = 0xA, R1 = 0xB … ori r10,r0,170 stb r10,0(r6) lbz r11,0(r6)

...

Initial State

R0 = 0x1, R1 = 0x2 …

R0 = 0xC, R1 = 0xB …

MIS-COMPARE

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Localization approach

1. A test-case that produces a mis-compare is found

2. Fast-forward to that test-case on a software simulator

(a.k.a. Reference model)

3. Execute test case on the reference model instruction by instruction and extract information

WTM’13, Prague, April 14, 2013

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Localization

 Reduce number of resources and instructions that might be the root cause of the mis-compare

 Study the effect of transactions in the test-case on the final state.

Justification:

Force erroneous behaviour on reference model and recreate the mis-compare results

WTM’13, Prague, April 14, 2013

Localization

:

1 4 1 2

R1

= suspicious instruction subset

I

2

: t e n

I RR

3 1 3

:

4 1 2

I R R

5 2 1

I t n

6

:

I R

7 3 1 2

8

R2 R3 R4

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Concluding remarks

 Debug automation effectively reduces the debugging effort.

 Graph analysis holds the potential automate the localization of suspicious resources and instructions

-

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Future work:

Study the impact of escaped stores in transaction aborts experiment with larger (real-world) cases

WTM’13, Prague, April 14, 2013

Questions

10

WTM’13, Prague, April 14, 2013

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