Intel 80286
Features of 80286
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24-bit address bus.
Able to address 16MB of physical memory.
1GB of virtual memory.
It has a MMU[memory management unit]
It operates in 2 modes
Real address mode
Protected virtual address mode
BLOCK DIAGRAM OF 80286
1)Address unit
2)Bus unit
3)Instruction unit
4)Execution unit
ADDRESS UNIT
address
unit
calculates
the address of
 The
The address
unit
calculates
the physical
instructions
data.
physical&address
of instructions &
 Thedata.
address computed by AU is handed over to BU.
The address computed by AU is
handed over to BU.
BUS UNIT
address
unit calculates
the
 The
It fetches
instruction
bytes from the
memory.
physicalareaddress
ofadvance[Instruction
instructions &
 Instructions
fetched in
Pipelining].
data.
 These fetched instructions are arranged in a 6-byte
The address
prefetch
queue computed by AU is
handed over to BU.
INSTRUCTION UNIT
 The
pre fetch
forwardsthe
the instructions
The6-byte
address
unitqueue
calculates
arranged
in it address
to the IU. of instructions &
physical
 It accepts
instructions
from
prefetch
queue
&
an
data.
instruction decoder decodes them one by one.
The address
computed
byonto
AU aisdecoded
 Decoded
instructions
are latched
instruction
handedqueue.
over to BU.
EXECUTION UNIT
 The
of the decoding
circuit is given
Theo/paddress
unit calculates
theto EU which is
responsible for executing the instructions received
physical
address
of
instructions
&
from the decoded instruction queue.
 ALUdata.
carries all the arithmetic & logic operations.
The address computed by AU is
handed over to BU.
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