Limits in Electronic ADCs

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导波光学
Photonic Analog-to-Digital
Conversion
班级:B1203491
学号:1120349012
姓名:钱阿权
Content
Limits in Electronic ADCs
How to solve in photonic approach?
Principles of Photonic ADC
Advantages of the A/D scheme
Discussion
A/D conversion
Limits in Electronic ADCs
sample-and-hold
quantization
The ENOB describe the possible maximum resolution that can be
achieved for a physical ADC with the meaningful number.
Limits in Electronic ADCs
Three
mechanisms
Thermal
noise
Timing jitter
Comparator
ambiguity
Limits in Electronic ADCs
Three mechanisms (thermal noise, timing jitter, and comparator ambiguity)
limiting the performance of an ADC.
Limits in Electronic ADCs
The conventional sample-interleaved analog-to-digital converter architecture.
Limits in Electronic ADCs
Conceptual block diagram for a time-stretched analog-to-digital converter.
Limits in Electronic ADCs
Conceptual block diagram of time-stretched analog to digital converter array
How to solve
in photonic approach?
Sample the RF signal
optically with ultra-stable
pulse trains available
from MLL
Separate the fast RF
signal into multiple
slower channels
Timing
jitter
Comparator
ambiguity
How to solve
in photonic approach?
Some
recent
photonic
ADC
RF
ENOB
733MHz
9.8
35GHz
2.5
4GHz
7.2
10GHz
6.65
6.5GHz
6.65
10GHz
6.15
40GHz
6.0
41GHz
7.0
What makes these developments especially exciting
is that with the recent progress made in silicon
photonic and electronic-photonic integration technologies
Principles of Photonic ADC
Layout of the photonic ADC
Principles of Photonic ADC
It is a photonic sampling and electronic
quantizing ADC, with electronics performing the
critical function of digitizing the modulated
pulses, which electronics can do best at high
resolutions.
At the post-processing stage, the samples
captured in different wavelength channels
are interleaved and distortion-compensated
to obtain the final digital representation of the
RF signal.
Principles of Photonic ADC
With this approach to sampling, the aperture
jitter is determined by the timing jitter of the
mode-locked lasers, which can be extremely
low , thus eliminating the problem of aperture
jitter.
The scheme with N channels reduces the
required analog bandwidth of photo detectors
and electronic ADCs in proportion to N,
which means that the comparator ambiguity
becomes a non-issue.
Advantages of the A/D scheme
The latest developments in silicon photonics
and electronic-photonic integration technology
make it possible to integrate the whole A/D
system on a silicon chip.
a vision for the photonic ADC implemented
as a single electronic-photonic silicon chip
Advantages of the A/D scheme
wavelength
•
banks
of
micro
ring
multiplexers and
resonator filters
demultiplexers
electrooptic
modulators
photodetectors
• carrier-depletion MachZehnder silicon modulators
• all-silicon defect-based
photo detectors
Discussion
The photonic sampling is capable of strongly
reducing the role of the two fundamental
limitations in ADCs: aperture jitter and
comparator ambiguity.
If the currently observed low levels of timing
jitter in mode-locked lasers can be translated
into effective bits, one will be able to digitize
signals of up to THz bandwidth with more than
10 ENOB.
Discussion
Together with silicon photonics as the
integration platform finally a practical, cheap,
integrated solution for photonic ADCs has
arrived, that might surpass its completely
electronic counterpart by potentially more than
three orders of magnitude in achievable
resolution-bandwidth product.
Thanks!
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