www.acsami.org Review Photosensitive Polyimides as Enabling Materials for Advanced Semiconductor Packaging Chungen Hsu,* Chenlei Pang, Qinghua Lu, and Seongku Kim* Cite This: https://doi.org/10.1021/acsami.6c09651 Metrics & More Article Recommendations ABSTRACT: Advanced packaging technologies have enabled electronic devices toward miniaturization, higher integration densities, and scalable optoelectronic applications. Among the key materials for lowdielectric redistribution layers, photosensitive polyimides (PSPIs) have emerged as a suitable candidate, owing to their combined capabilities in photo-patterning ability, mechanical strength, and low dielectric loss. However, recent research challenges the conventional view of performance trade-offs, demonstrating that molecular design and thermal management can be synergistically codesigned to enhance device performance. This review summarizes the latest advances in the molecular design of multifunctional PSPI design and highlights their integration into wafer-level packaging architectures. We focus on their role in promoting efficient heat dissipation from chip to external package and on reducing dielectric losses to improve signal integrity. Finally, future directions for PSPI-based materials are proposed, offering a forward-looking perspective for next-generation high-performance and flexible electronics. KEYWORDS: photosensitive polyimide, advanced semiconductor packaging, low dielectric constant, redistribution layers, thermal management, signal integrity essential for high-performance computing,27 mobile devices,28 and optoelectronic applications.29 Their performances heavily depend on high-density wiring substrates, thermal stability,30 and signal integrity.31 To mitigate power consumption,32,33 crosstalk noise,34 and resistance−capacitance (RC) delay,35 dielectric interlayers in Fan-out wafer-level packaging must exhibit a low dielectric constant (low-Dk). In these architectures, chips can be connected face-to-face, face-to-back, or back-to-face. Currently, organic dielectric materials such as epoxy molding compounds (EMCs)36 and polyimides (PIs)37 have been widely used as interlayer dielectrics (ILDs)38 or redistribution layers (RDLs)39,40 in advanced packaging.41 Among these, photosensitive polyimides (PSPIs) serve as a promising candidate due to their extended advantages by incorporating photoreactive groups into the PI precursor chain. This enables direct photolithographic patterning of PSPI,42 eliminating separate photoresist coating and etching steps, thereby simplifying manufacturing, minimizing film damage, and interfacial contamination.43 The process supports fine linewidths and spacings down to approximately 2−5 μm. Recent advances have enabled the widespread adoption of PSPIs in microelectronic packaging44 as interlayer insulation,45 stress buffer layers,46 1. INTRODUCTION The advancement of modern electronic products relies on the development of high-performance integrated circuits (ICs).1,2 Artificial intelligence (AI) computing chips3,4 and highbandwidth communication5 and assisted driving technologies6 continue to push ICs toward greater system integration,7,8 reduced power consumption,9 and improved reliability.10 In the post-Moore era, transistor channel scaling approaches its physical limits,11 which leads to exponential rise in process complexity and fabrication cost.12 To address these challenges, integrating multiple chips onto a single substrate has emerged as a promising strategy, creating new pathways for performance enhancement, and driving the industry toward multifunctional system-onchips (SoCs).13 This shift places advanced packaging, particularly through 2.5D (lateral chip-to-chip interconnects) and 3D (vertical stackings) architectures, at the forefront of innovation.14,15 These architectures facilitate the integration of high-bandwidth memory (HBM) and graphics processing units (GPUs) through fine-pitch interconnects,16,17 increase I/O density,18 reduce signal transmission latency,19 and lower power consumption through heterogeneous integration.20−22 Nevertheless, higher integration densities come with new challenges. Interconnect lines narrow and spacing shrinks, which inevitably leads to serious heat dissipation,23 transmission signal delay,24 and electromagnetic crosstalk noises,25 particularly under high-frequency operation.26 Heterogeneous integration and advanced packaging are now critical to extending semiconductor technology performance beyond Moore’s law. Insulating dielectric materials, along with wafer-level fan-in (Fan-in) and fan-out (Fan-out) packaging, are © XXXX American Chemical Society Received: May 12, 2026 Revised: July 31, 2026 Accepted: July 31, 2026 A https://doi.org/10.1021/acsami.6c09651 ACS Appl. Mater. Interfaces XXXX, XXX, XXX–XXX Downloaded from pubs.acs.org/aamick/article-pdf/doi/10.1021/acsami.6c09651/66462161/am-2026-09651r.pdf by JILIN UNIV user on 07 September 2026 ACCESS Read Online ACS Applied Materials & Interfaces www.acsami.org Figure 1. Photosensitive polyimide and their applications in advanced packaging. (a) Ester-type PSPIs: This class originated in 1976 with work by Siemens, where a photosensitive alcohol was reacted with pyromellitic dianhydride to form a diester diacid. This intermediate was then acylated with aromatic diamines to produce a stable polyamide ester (PAE) precursor.75 This synthetic route remains representative of commercial ester-type PSPIs today (Figure 3a). The key advancement of PAE-based systems is the replacement of unstable carboxylic acid groups (−COOH) in conventional poly(amic acid) (PAA) with stable ester groups (−COOR). This substitution significantly enhances solution stability, reduces viscosity, and provides an excellent precursor for both solution processing and photolithography. Despite these advantages, ester-type PSPIs are limited by high film shrinkage, moderate resolution (typically 5−10 μm), and relatively low photosensitivity, which have limited their adoption in high-end applications. 2. MOLECULAR DESIGN OF PSPI MATERIALS PSPIs are polyimide derivatives that incorporate photoreactive functional groups directly into the polymer backbone. They are typically synthesized through condensation polymerization of dianhydride and diamine monomers, yielding precursors such as poly(amic acid) (PAA) or polyamide ester (PAE), which are subsequently cyclized to the final PI through thermal imidization.53 The development of PSPIs can be traced back to 1970s; when researchers at DuPont company first introduced photosensitive groups into PI chains, they created the first negative-tone PSPI.54,55 Subsequent advancements have incorporated various functional groups, such as sulfones,56 alicyclic,57 fluorinated,58,59 or cinnamyl moieties,60 as well as tailored additives61,62 to precisely modulate PSPI properties. These characteristics make PSPIs highly suitable as RDLs,63,64 insulation interlayers,65 or stress buffer layers66 in applications ranging from biomedical sensors67 and advanced semiconductor packaging to flexible organic light-emitting diode (OLED) display (Figure 1).68,69 Compared with conventional photolithography, PSPI-based patterning significantly reduces the number of processing steps (Figure 2a−c).70,71 Depending on their response to optical exposure, PSPIs are classified into positive-tone or negative-tone resists. Positive-tone materials, typically derived from PAEs or ammonium salts with crosslinking sites, exhibit increased solubility after exposure.72 In contrast, negative-tone PSPIs become insoluble upon irradiation with ultraviolet (UV) or X-rays.73 In both cases, exposure induces photochemical transformations in the sensitive groups, enabling direct pattern transfer through lithography (Figure 2d).59,74 Most commercial PSPIs are negative-tone types, owing to their relatively low thermal curing temperatures (<250 °C) and the retention of the photocured pattern after development. These are commonly synthesized by attaching different photo-crosslinking groups to the amic acid moiety (Figure 2e). However, traditional negative-tone PSPIs have been limited by photolithographic resolution (>10 μm) and poor developability, thus driving ongoing molecular design efforts to overcome these drawbacks while preserving essential PI properties. Based on chemical design, negative-tone PSPIs are principally divided into three categories: ester-type, ionic-type, and selfsensitizing PSPIs. (b) Ionic-type PSPIs: Ionic-type PSPIs were developed to address the poor hydrolytic stability of traditional PAA, whose carboxylic acid groups tend to degrade, leading to changes in molecular weight, viscosity, and even gelation. These PSPIs attach photo-crosslinkable groups (acrylate- or methacrylate-containing tertiary amine groups) to the PAA backbone through ionic bonds (Figure 3b). This design confers PSPIs with excellent thermal stability, good electrical insulation, and favorable processability. However, a significant drawback is the lability of the ionic linkage between the photosensitive moiety and the polymer chain. During exposure and subsequent thermal imidization, a considerable portion of these groups dissociates, leading to higher curing temperatures, increased film loss, and reduced resolution. (c) Self-sensitizing PSPI: These materials incorporate intrinsic photosensitivity within the PI structure, eliminating the necessity for separate photosensitizers. Their crosslinking mechanism typically involves UVinduced excitation of ketone carbonyl groups, which abstract hydrogen from adjacent alkyl groups to generate free radicals, thereby initiating crosslinking (Figure 3c). Since no imidization step is required, processing is simplified and high-purity films can be obtained that align well with the modern microelectronics miniaturization demands. The primary limitation remains the comparatively low photosensitivity, which currently restricts broader practical application. The molecular weight, Tg, and photolithographic performance of a series of negative-tone PSPIs with varied chemical structures are summarized in Table 1.76−81 Apart from negative-tone systems, positive-tone PSPIs have emerged as alternative candidates for chip manufacturing. Over the past decade, they have achieved competitive performance, offering higher resolution, reduced particle sensitivity, and the practical advantage of development in alkaline solutions. In general, positive-tone PSPIs are designed by incorporating photodegradable functional groups (such B https://doi.org/10.1021/acsami.6c09651 ACS Appl. Mater. Interfaces XXXX, XXX, XXX–XXX Downloaded from pubs.acs.org/aamick/article-pdf/doi/10.1021/acsami.6c09651/66462161/am-2026-09651r.pdf by JILIN UNIV user on 07 September 2026 and radiation shielding layers.47 The excellent dielectric constant (Dk = 1.5−3.2),48,49 high thermal stability (thermal decomposition temperatures Td,1% > 450 °C) and strong mechanical strength (Eelastic = 3.0−5.0 GPa)50,51 of PIs are retained after patterning, making PSPIs a seamless evolution of conventional PI technology. Moreover, as high-power optoelectronic applications advance, thermal management within densely integrated packages has aroused much attention.52 PSPIs offer distinct advantages, owing to their properties that can be precisely tailored through molecular design and compositional optimization to meet specific electrical, thermal, and mechanical demands. Here, we review the progress and prospects of PSPIs in advanced packaging technologies. This review begins with molecular design approaches for tailoring key performance, including their electrical, mechanical, and thermal properties. We then provide recent industry examples that illustrate thermal management challenges in high-performance device integration, followed by a discussion of heat transfer and signal integrity mechanisms in advanced packaging architectures. We also investigate commercial PSPI products to bridge academic research and industrial application. Finally, we propose future research directions to address challenges such as performance trade-off and the need for PFAS-free, self-healing, and bio-based PSPI materials, the development of multifunctional integrated dielectric systems, and novel applications in flexible and integrated electronics. Review ACS Applied Materials & Interfaces www.acsami.org Review Figure 3. Negative-tone PSPI synthesized from (a) polyamide esters, (b) PAA salts, and (c) crosslinking through photoradical generation. as o-diazo-naphthoquinone-based groups) into the polymer. Upon exposure, these groups undergo reactions that increase solubility of the irradiated regions in a developer, and enable pattern formation identical to the photomask. For instance, Toray company has developed a positive-tone PSPI with photolithographic resolution down to 5 μm by optimizing the structure of photosensitive groups and polymerization processes.82 Based on photoactive chemistry, positive-tone PSPIs can be classified into diazo-naphthoquinone sulfonate (DNQ),83,84o-nitrobenzyl ester,85 polyisoimide,86 and cyclobutene-based types. 87 (a) DNQ-type PSPI: This material incorporates diazonaphthoquinone sulfonate (DNQ), a widely used photoactive compound (PAC), as an inhibitor into a soluble PI. The DNQ molecule forms hydrogen-bonded complexes with polymer chains, effectively inhibiting solubility in alkaline developers (Figure 4a). Under UV exposure, DNQ undergoes a Wolff rearrangement reaction to generate ketene intermediates, which hydrolyze to yield indene carboxylic acid derivatives.88 This photoreaction allows exposed regions soluble in alkaline solutions, thereby producing positive-tone patterns. C https://doi.org/10.1021/acsami.6c09651 ACS Appl. Mater. Interfaces XXXX, XXX, XXX–XXX Downloaded from pubs.acs.org/aamick/article-pdf/doi/10.1021/acsami.6c09651/66462161/am-2026-09651r.pdf by JILIN UNIV user on 07 September 2026 Figure 2. (a) Schematic of PSPI photopatterning and chemical changes after UV exposure. Reproduced with permission from ref 59. Copyright 2025 Wiley-VCH. (b) Comparison of photolithographic patterning processes using conventional photoresists and (c) PSPIs. Positive-tone patterns form after development and photoresist removal, whereas negative-tone patterns form through removing unexposed areas. (d) Optical microscope images of photomasks with complex, hole, and line patterns, alongside SEM images of crosslinked MK/PSPI structures, revealing microscale features.59,62 (e) Radar chart comparing the different performances of PSPIs. Reproduced with permission from ref 59. Copyright 2025 Wiley-VCH. ACS Applied Materials & Interfaces www.acsami.org Review Table 1. Molecular Weight, Glass Transition Temperature (Tg) and Photolithographic Performance of a Series of NegativeTone PSPIs Downloaded from pubs.acs.org/aamick/article-pdf/doi/10.1021/acsami.6c09651/66462161/am-2026-09651r.pdf by JILIN UNIV user on 07 September 2026 a Determined by DSC. In contrast, unexposed regions undergo thermal decomposition of DNQ-derived carbenes, which crosslink with the PI backbone to form an insoluble network. Key advantages of this material include compatibility with aqueous alkaline developers and high-resolution patterning capability.89 (c) Cyclobutane-type PSPI: This resin is synthesized through photochemical [2 + 2] cycloaddition of maleic anhydride derivatives to form a cyclobutene-based dimer. This dimer is then reacted with appropriate monomers to yield PAA or polyphthalamic acid precursors, which are finally dehydrated into cyclobutene-based PI. UV exposure induces ring-opening of the cyclobutene units in the irradiated area, increasing solubility in solvents such as dimethylacetamide (DMAC), thereby producing positive-tone patterns. (b) ortho-Nitrobenzyl ester-type PSPI: Polymer segments functionalized with ortho-nitrobenzyl carboxylate or phenoxide groups undergo photochemical rearrangement and cleavage reaction under UV irradiation90 and degrade them into soluble carboxylic acid, phenol, or aldehyde groups (Figure 4b). As a result, exposed areas become soluble in alkaline developers while unexposed regions remain insoluble, enabling positive-tone patterning with resolution down to approximately 1 μm.91 (d) Polyisoimide-type PSPI: This approach exploits the solubility difference between polyisoimide (PII), which exhibits excellent solubility, low k, and high stability, and its fully imidized counterpart. A representative synthesis, developed by Asahi Kasei D https://doi.org/10.1021/acsami.6c09651 ACS Appl. Mater. Interfaces XXXX, XXX, XXX–XXX ACS Applied Materials & Interfaces www.acsami.org Review Corporation, starts with an esterified dianhydride monomer polymerized with a diamine using N,N′-dicyclohexylcarbodiimide (DCC) as a dehydrating agent. The reaction produces a precursor that converts into PII under the strong dehydration conditions afforded by DCC.92 The PII can be patterned through photolithography and then thermally cured at 180−250 °C to produce the final PI film. The solubility contrast between PII and the fully cured PI enables positive-tone pattern formation. There are two approaches to reduce the PSPI dielectric constant by reducing its overall polarizability. The first involves manipulating molar polarization and dipole volume to restrict dipole alignment and chain packing. This can be achieved by incorporating chemical groups with low electron density or reduced electronegativity, which suppress induced polarization and lower permittivity. Second, researchers introduce micropores (ϕ < 2.0 nm) or porous low-k fillers into the material. Because air has a low permittivity of air (kair ≈ 1), vacant nanodomains significantly reduce the dipole density within the films, offering a practical route to fabricate low-k PIs.106,107 The permittivity of PI depends on the number density of molecular dipoles (N),102 polarization (P), Boltzmann’s constant (kb), and temperature (T), as described by the Debye equation in eq 1. The molecular weight, Tg, and photolithographic performance of a series of positive-tone PSPIs, with varying chemical structures, are summarized in Table 2.93−97 Apart from the development of highresolution negative- and positive-tone PSPIs, advanced PSPI packaging materials are also required to meet high-performance demands, including low curing temperature,93 excellent heat resistance,98 good adhesion, low warpage,99 and high dimensional stability.100 k − 1 4π μ2 = N Pe + Pd + k+2 3 3kb T 2.1. Molecular Structure Modulation for Low k (1) where Pe is the electron polarization, Pd is the distortion polarization, and μ is the orientation polarization related to the dipole moment. The dielectric constant is also frequency-dependent, with different polarizations associated with specific resonance regimes.108 A fundamental understanding of these polarization mechanisms, particularly dipole polarization and interfacial polarization, is significant for tailoring their dielectric behavior to meet advanced electronic applications. In polar PIs, dipole (orientation) polarization originates from intrinsic reorientation of permanent dipoles and induced dipoles due to asymmetric electron-cloud distortion relative to the nucleus. The extent of polarization reflects a balance between the ordering effect by an external electric field and disordering by thermal motion. This competition directly influences the Dk and loss tangent, particularly near Tg where molecular mobility increases. Interfacial polarization (Pint), also known as Maxwell–Wagner–Sillars polarization,109,110 results from charge accumulation at heterogeneous interfaces,111 creating dipole moments that contribute to macroscopic polarization. In practical PI films, this can arise from structural inhomogeneities, impurity phases, crystalline-amorphous boundaries, or incomplete electrode contact. Strategies to raise Dk of polymers through To meet the demands of miniaturization and higher performance in microelectronics, scaling down the interconnect size in RDLs and advanced packaging technologies has aroused much attention.101 Generally, materials in these structures exhibit low permittivity (K < 3.0) to prevent metal migration into the semiconductor and ensure long-term stability. Conventional PI films typically show K = 3.0−3.4 across frequencies from 1 kHz to 1 MHz, which does not satisfy the permittivity requirement (K < 2.5) for modern devices and advanced packaging.102 Additionally, their high CTE values contrast with the 5−15 ppm/°C range of inorganic materials, leading to residual stress and thermal deformation at interfaces under high temperatures. For discussion on polarization mechanisms, the dielectric constant (Dk) of polar PIs is fundamentally influenced by dipole alignment under an electric field. At high-density interconnect densities and faster signal speeds, a high-k material significantly increases parasitic capacitance,103 leading to detrimental effects such as signal delay (RC delay), power dissipation, and crosstalk. To address these challenges, the use of low-k PIs can offer several advantages, including minimized signal delay104 and enhanced signal integrity.105 E https://doi.org/10.1021/acsami.6c09651 ACS Appl. Mater. Interfaces XXXX, XXX, XXX–XXX Downloaded from pubs.acs.org/aamick/article-pdf/doi/10.1021/acsami.6c09651/66462161/am-2026-09651r.pdf by JILIN UNIV user on 07 September 2026 Figure 4. Positive-tone PSPI synthesized from (a) diazonaphthoquinone (DNQ) derivative type, (b) ortho-nitrobenzyl ester type, and (c) cyclobutene type. ACS Applied Materials & Interfaces www.acsami.org Review Table 2. Molecular weight, Tg, and Photolithographic Performance of a Series of Positive-Tone PSPIs Determined by DSC. high-permittivity fillers exploit interfacial polarization.112 While earlier studies used microfillers in microelectronics, the incorporation of nanofillers and porous low-k materials is commonly employed to tailor the microstructure and macroscopic interconnectivity of packaging materials. The polarization response of molecular dipoles and interfaces depends on temperature and electric field frequency, leading to corresponding variation in Dk. It is well-established that PIs exhibit significant changes in Dk near Tg, making high Tg polymers promising candidates for high-temperature dielectric applications, owing to their superior thermal stability and minimal dielectric property variation. polarization and depolarization under alternating electric fields.112 At high frequency (up to 1012 Hz), the polarization response may lag behind rapid variations of the external electric field, leading to a hysteresis that contributes to relaxation loss. Therefore, the Dk of composites with dipole polarization and interfacial polarization decreases with increasing frequency. Electrical conduction loss arises from current leakage, which can be classified as volume-limited or electrode-limited conduction.113 At low frequencies, dielectric loss is dominated by conduction loss due to insufficient charge trapping and ion migration. Since molecular dipoles have sufficient time to respond, the loss remains largely frequency-independent.114 As frequency increases, dipolar reorientation becomes constrained and leads to a rise in relaxation loss. Thus, the overall dielectric loss in this range reflects both conduction and relaxation mechanisms, resulting in a frequency-dependent increase.115 Elevated temperatures intensify these losses, as higher charge mobility and leakage current amplify conduction. Furthermore, high ambient humidity facilitates ion transport and elevates internal conduction, further increasing dielectric loss. 2.2. Low Dielectric Loss for Advanced Packaging The significance of dielectric loss has been heightened toward highfrequency operation and three-dimensional (3D) integration in advanced packaging. When an electric field is applied, unreleased energy within the dielectric is dissipated as heat (trapped electrical energy). For PIs, their low dielectric loss characteristics involve relaxation losses during F https://doi.org/10.1021/acsami.6c09651 ACS Appl. Mater. Interfaces XXXX, XXX, XXX–XXX Downloaded from pubs.acs.org/aamick/article-pdf/doi/10.1021/acsami.6c09651/66462161/am-2026-09651r.pdf by JILIN UNIV user on 07 September 2026 a ACS Applied Materials & Interfaces www.acsami.org Several molecular design studies have been explored to lower the curing temperature of PSPIs while maintaining their desirable properties. One effective approach involves the introduction of alkaline catalysts, such as photo-based generators (PBGs)81,134,135 and thermalbased generators,136 which efficiently reduce the energy barrier of the reactions. Alternatively, the use of diamine monomers with heteroaromatic groups has been shown to facilitate the preparation of lowtemperature curable films.99 More recently, the utilized soluble PI as the matrix for PSPIs has obviated the necessity for further intramolecular cyclization during the hardbake process.137 Despite these advances, low-temperature curable PSPIs still face critical trade-offs. Reducing the curing temperature often results in incomplete imidization, which can lead to elevated dielectric constant, increased moisture uptake, and degraded mechanical properties such as reduced Tg and increased CTE. Furthermore, the residual solvent and unreacted precursor species trapped during low-temperature processing may outgas during subsequent packaging steps, compromising interfacial adhesion and long-term reliability. Therefore, future research should focus on developing integrated molecular design strategies that simultaneously lower curing temperature while preserving or even enhancing the comprehensive performance of PSPIs, including low dielectric constant, high thermal stability, and robust mechanical strength. This is particularly critical for emerging applications such as panel level packaging and heterogeneous integration, where thermal budget constraints are increasingly stringent. 2.3. Molecular Design for Enhanced Thermal Conductivity (TC) Thermally conducting polymers can directly dissipate heat from highpower chips through dielectric layers, thereby reducing junction temperatures and improving device reliability during the operation.121,122 This approach mitigates hotspot formation and minimizes dependence on external cooling solutions. To begin with, the primary approach is to enhance the intrinsic thermal conductivity of isotropic bulk polyimides.123 In PI, heat is carried mainly by phonons, whose mean free path is limited by scattering at chain ends, defects, and disordered regions. Designing PI backbones with rigid-rod or nonplanar conjugate moieties strengthens interchain interactions and reduces phonon scattering that can make PSPIs suitable for thermal management.124,125 PI contains polar C═O groups in the conjugated imide ring; the mobility of electrons is greatly restricted, thus leading to excellent insulation properties. In addition, hyperbranched or dendritic PIs can decrease linear chain packing and entanglements, leading to higher free volume and reduced phonon scattering sites. 126 Another approach is to develop composites incorporating highthermal-conductivity fillers, such as boron nitride,127 graphene,128,129 and carbon nanotubes.130 However, manipulating the rheology and interface of polymer composites with a high percentage of fillers is essential for achieving thermal improvement without degrading photosensitive or dielectric properties. Consequently, molecular engineering of high-thermal-conductivity PIs is becoming a significant technology to bridge electrical insulation and thermal management demands.131 Enhancing in-plane and through-plane thermal conductivity in PSPIs remains a critical challenge. It requires a multifaceted approach that balances other material properties, including high thermal stability, low k, high breakdown voltage, and photoresponsive ability. Furthermore, designing composites with anisotropic thermal conductivity is particularly desirable for electronics, where heat could be transported laterally from hotspots or conducted vertically through oriented or crystalline polymer.132,133 3. THERMAL MANAGEMENT UNDER HIGH POWER DENSITY The pursuit of high performance in IC chips has driven transistor densities and operating frequencies to unprecedented levels. This result may lead to localized power concentrations and voltage drops that exceed conventional thermal management capabilities. In high-power devices, such as those in hyperscale data centers and RF power amplifiers, active regions become primary joule heating sites. Inadequate heat dissipation elevates junction temperatures and ultimately accelerates device aging,10 electromigration,138,139 and corrosion, thereby compromising device reliability and lifespan. Advanced cooling technologies have been developed to manage heat dissipation, which involves transferring heat from the device junction to surrounding areas.140 Key considerations in thermal design include (Figure 5a) (1) optimizing heat dissipation pathways from the chip backside or substrate; (2) enhancing heat transfer from the package to heat sinks;141 (3) utilizing high-conductivity materials and thermal vias; (4) mitigating stress from coefficient thermal expansion (CTE) mismatch between the chip and substrate; (5) validating design objectives, modeling approaches, and testing methodologies. Efficient thermal management relies on the understanding of heat transfer mechanisms, thermal expansion matching at interfaces, and controlling heat transfer between physical or chemical reactions. 2.4. Low-Temperature Curable PSPIs The drive toward advanced packaging with increasing integration densities has imposed stringent thermal budgets on dielectric materials. Conventional PSPIs typically introduced fluorine-containing monomers to improve the optical transparency of PSPI films, but the issue of the curing temperatures above 300 °C in the imidization process remains unresolved.55 It is evident that such high-temperature processing poses detrimental impacts for advanced packaging architectures, including thermally induced warpage, residual stress at heterogeneous interfaces, and potential damage to temperature-sensitive components such as organic substrates and embedded passive devices. Consequently, there is an urgent need for low-temperature curable PSPIs that can be fully processed at temperatures below 250 °C, without compromising dielectric performance, mechanical strength, or photo-patterning resolution. 3.1. PSPI as a Thermal Bridge in RDLs and Stress Buffer Layers When deployed as RDLs and stress buffer layers, advanced PSPIs can function as critical thermal management elements. By engineering these layers with high thermal conductivity, they can be transformed from mere electrical insulators and mechanical buffers into active thermal bridges. This enables a dual-path thermal management strategy, namely, in-plane heat spreading (through thermally conductive PSPI layers that dissipate heat laterally from hotspots) and through-plane heat conduction (via vertical extraction pathways such as TSVs and copper G https://doi.org/10.1021/acsami.6c09651 ACS Appl. Mater. Interfaces XXXX, XXX, XXX–XXX Downloaded from pubs.acs.org/aamick/article-pdf/doi/10.1021/acsami.6c09651/66462161/am-2026-09651r.pdf by JILIN UNIV user on 07 September 2026 The polymer structures play an important role in dielectric and adhesive performance.116 However, the requirements for low k, minimal dielectric loss, and strong adhesion often involve fundamental tradeoffs. For instance, strong adhesion to copper conductors typically requires polar functional groups, such as amino,117 hydroxyl,95 or isocyanate moieties,118 within the polymer chains.119,120 These groups enhance interfacial forces through electrostatic interactions, improving durability and reliability of circuit boards. However, orientation polarization of intrinsic dipoles, along with additional dipole polarization induced by these polar groups, can significantly increase dielectric loss. Consequently, optimizing dielectric properties for low dielectric loss applications requires nonpolar groups along the polymer backbone, and the spatial placement of polar groups is also important. When attached as flexible side chains, they can improve dielectric properties without compromising overall performance. Review ACS Applied Materials & Interfaces www.acsami.org Review improving thermal stability and chemical inertness. In advanced packaging, PSPI plays a critical role in wafer-level packaging (WLP),146 typically applied by spin-coating on different substrates as a stress buffer layer.52 Meanwhile, slot-die coating is another method used to deposit dielectric layers on large panels. The CTE value should be preferably <40 ppm/k for RDLs and smaller than 5 μm. High CTE values can cause significant mismatches with other interconnect components, leading to reliability problems during thermal cycling. Therefore, the polymer Tg should exceed the solder reflow temperature of approximately 250 °C.39 In addition, the adhesion between PSPI and copper is also important. By tuning the flexibility and functional groups of polymer chains, thermomechanical stress can be reduced and interconnect reliability between the chip and substrate improved. The reason is that PSPI exhibits intermolecular creep deformation at elevated temperatures. Through molecular chain slippage mechanisms, strain energy is dissipated and effectively relieves stress at the interface. As an interlayer dielectric (ILD),59 PSPI enables microbump pitch below 3 μm and supports higher-density integration. Moreover, numerous breakthrough devices have been made using PSPI in fan-out wafer-level packaging (FO-WLP).147 The standard integration sequence includes (i) PSPI coating and soft bake, (ii) UV exposure through a photomask, (iii) development to open vias, and (iv) metallization (Cu electroplating) to form interconnects, followed by a final curing step (Figure 5d). As chiplet integration densities increase, dielectric interlayers become major components for package reliability. Through optimization of dielectric materials, coating processes, and curing conditions, dielectric layers with a thickness uniformity < ±3% can be prepared and meet the high-precision demands of high-density advanced packaging (Figure 5e).144 pillars, which channel the heat out of the package). First, inplane heat spreading is achieved through highly thermally conductive PSPIs within RDLs. These layers act as efficient lateral heat spreaders, absorbing and dissipating thermal energy directly from localized hotspots at the chip surface and redistributing intense thermal flux over a larger area. Subsequently, through-plane heat conduction channels transfer laterally dissipated heat out of the package. The PSPI layer serves as a thermal conduit, bridging the heat source to primary vertical extraction pathways, such as through-silicon vias (TSVs) and copper pillars. These structures provide low-thermal-resistance channels to the heat sink or package substrate.142 This integrated approach, combining lateral spreading with vertical conduction, establishes an efficient thermal management network within the chip interconnect architecture. It reduces the overall thermal resistance from the junction to the ambient environment. The PSPI material in interlayer dielectrics and RDLs within a typical packaging architectures are illustrated in Figure 5b,c, respectively.143 3.2. Fabrication and Integration of PSPIs in Advanced Packaging Within photoresist technology, PSPI has become a critical enabler for advanced semiconductor manufacturing. For instance, in TSMC’s 7 nm process, PSPI-based photoresists are employed in gate patterning, achieving linewidth resolutions limited to 10 nm.145 As a dielectric, PSPI also facilitates interconnection of RDLs and addresses issues of additional photolithography steps, such as high cost and limited resolution. Compared with conventional photoresists, PSPI-derived polyimide can serve as an insulating dielectric layer after hightemperature curing, thereby reducing process complexity while H https://doi.org/10.1021/acsami.6c09651 ACS Appl. Mater. Interfaces XXXX, XXX, XXX–XXX Downloaded from pubs.acs.org/aamick/article-pdf/doi/10.1021/acsami.6c09651/66462161/am-2026-09651r.pdf by JILIN UNIV user on 07 September 2026 Figure 5. Key material properties and integration process of PSPIs for advanced packaging. (a) Advanced package structure with RDLs for I/O density enhancement. (b) Schematic of the PSPI/electroplated (EP) Cu/Cu seed Ti thin-film multilayer structure sandwiched between Si wafers for the four-point bending test. Reproduced with permission from ref 143. Copyright 2026 Springer Nature. (c) Selection of dianhydride or diamine with different rigidities. (d) Schematic of RDL fabrication using PSPI in advanced packaging. (e) Cross-sectional C-mode scanning acoustic microscopy (CSAM) image of the bridge die, the two surface die connected by the bridge, and the organic substrate in which the bride is embedded. Reproduced with permission from ref 144. Copyright 2019 Willey-VCH. Reproduced with permission from ref 143. Copyright 2026 Springer Nature. Reproduced with permission from ref 144. Copyright 2019 Willey-VCH. ACS Applied Materials & Interfaces www.acsami.org Review grain boundaries, which suppresses abnormal grain growth and reduces interfacial void formation at elevated temperatures.155 These results help maintain a stable interface and improve mechanical strength compared with nonpassivated Cu−Cu bonding. The stacking of active chiplets has emerged as a leading alternative design to monolithic dies in postMoore microelectronics.156 In traditional WLP and 2.5D/3D stacked packages, PSPI offers high thermal stability, stress dissipation, and tunable CTE. The growing demand for computing and automotive electronics has accelerated the adoption of chiplet integration, mainly through 2.5D/3D interposers or embedded multidie interconnect bridges (EMIB). These interposers interconnect disparate chiplets, but CTE mismatches between upper and lower substrates can induce warpage, cracking, and misalignment in fine-line patterning. Recent designs address these issues through gradient-modulus architectures and improved thermalpath engineering.148 With the advent of transparent circuits and high-frequency communications, developing PSPIs with excellent insulation, low Dk, and high reliability has become imperative to minimize signal transmission loss and distortion. The low dielectric loss of PSPI also helps reduce interlayer parasitic capacitance. For instance, PSPI-based RDL structures have enabled thinner, more integrated devices by supporting fine-line patterning and high thermal performance.39 In wafer-level packaging architectures, PSPI can be used both as a passivation layer and the dielectric within RDLs for signal routing. In advanced FO-WLP, PSPI dielectric interlayers incorporating nanosilica (SiO2) fillers have achieved a Dk of 2.8 and a breakdown field >150 kV/mm at room temperature.149 Current FO-WLP packages employ numerous dielectric layers and copper RDLs to redistribute chip I/O ports. Advanced packages may use up to four dielectric layers or dual-side RDLs for 3D package-onpackage (POP) stacking. This increases I/O density and accelerates communication between different chiplets.150 3.4. PSPI-Based Thermal Interface Materials (TIMs) 3.3. Evolution of Heat Transfer Technologies Advanced packaging is a powerful technology for transmitting electrical signals from ICs to external components. Early packaging, exemplified by plastic dual in-line packages (DIP) relied primarily on natural convection and conduction, with heat flux density below 10 W/cm2 (Figure 6a).151,152 The advent of surface mount technology (SMT) and ball grid array (BGA) packaging introduced more complex designs, making thermal conduction the dominant heat transfer mechanism.153 Meanwhile, in ceramic BGAs, thermal conductivity mismatch between metallization layers and ceramic substrate often creates uneven thermal resistance and localized hotspots. The thermal interface between the interposer, chip, and substrate becomes a key bottleneck in 2.5D packaging (Figure 6b). A well-known technology is TSMC’s integrated fan-out package. Their chipon-wafer-on-substrate technology (CoWoS) technology improves performance, reduces power consumption and size, and achieves efficient heat dissipation through optimized packaging architectures and material selection. CoWoS integrates multiple high-conductivity layers that provide parallel heatspreading paths, effectively channeling heat from the chip to the external system. Its architecture allows sophisticated thermal management schemes that mitigate heat accumulation and enhance overall cooling efficiency. With the rise of 3D stacking packaging and multichip module (MCM) technologies in the 21st century,154 heat transfer mechanisms have grown more diversified. Vertical stacking in 3D integration introduces dual thermal transfer pathways, lateral heat spreading within interlayers, and vertical heat extraction through the stack (Figure 6c). For instance, Chen et al. introduced a 3 nm Ag passivation layer within Cu−Cu bonding. Through TEM and 4DSTEM strain mapping, they show that Ag diffuses along Cu 4. LOW DIELECTRIC LOSS AND SIGNAL INTEGRITY 4.1. High-Frequency Signal Integrity Challenges for PSPI As optical communication systems advance into millimeter-wave regimes, signal integrity demands on integrated photonic– electronic platforms have aroused much attention.165 However, as frequencies extend above 100 GHz, fundamental material limitations dominate transmission behavior, where transmission signal delay,166 interchannel crosstalk, and power consumption remain as critical bottlenecks. High-frequency performance of PSPI depends on dielectric properties, specifically frequencydependent Dk and dissipation factor (Df ).167,168 Conventional PSPI formulations often exhibit significant dielectric dispersion at elevated frequencies, degrading signal integrity through group velocity delay and elevated insertion loss. These effects are exacerbated by interfacial polarization at polymer–conductor boundaries169,170 and inhomogeneous curing-induced morphology,171 which collectively degrade impedance matching and promote electromagnetic leakage.172 Nam et al. fabricated an I https://doi.org/10.1021/acsami.6c09651 ACS Appl. Mater. Interfaces XXXX, XXX, XXX–XXX Downloaded from pubs.acs.org/aamick/article-pdf/doi/10.1021/acsami.6c09651/66462161/am-2026-09651r.pdf by JILIN UNIV user on 07 September 2026 Modern heterogeneous packaging often integrates hundreds of passive and active components within a system. TSV and RDL technologies enable high-density interconnects between chips by vertically drilling holes and filling them with conductive materials in silicon. As operational temperatures increase, the selection of suitable packaging materials becomes limited. Most polymers and composites transit into elastic states above Tg and increase their susceptibility to thermal stress at interfaces. Thermal expansion mismatch can lead to interface cracking and void formation. In thermal management, materials are classified as thermal interface materials (TIMs) or bulk heat spreaders. TIMs provide a low thermal resistance path between chips and the bulk substrate, while bulk materials distribute heat over a larger area toward the heat sink. Early packaging heavily relied on epoxy-based composites, which typically offered thermal conductivities of 0.2−0.5 W (m−1 K−1).122 Meanwhile, PIs have been widely employed in ICs as buffer layer substrates, passivation films,157 planarization layers for multilayer interconnects, and interlayer dielectrics,158 owing to their excellent thermal stability,159 mechanical properties, and dielectric performance. Recent breakthroughs in high-thermal-conductivity filler technology, such as graphene/boron nitride composite fillers, have elevated thermal conductivity of epoxy resins to 2−7 W (m−1 K−1).160−162 Polymer-filler systems balancing thermal performance with mechanical robustness, chemical resistance, and electrical insulation are now commonplace in electronic packaging.163 However, high filler loadings often decrease mechanical properties and limit processing flexibility. In structural design, TIMs can improve heat transfer across rough or uneven surfaces, while TSVs integrate microfluidic channels that can distribute the heat pathway and lower junction temperatures across the die.164 ACS Applied Materials & Interfaces www.acsami.org Review electromagnetic interference (EMI) shielding film based on silver ink and low-k PI. The film demonstrated high-performance characteristics, including an average shielding effectiveness of −99.7 dB (6−18 GHz), a high in-plane thermal conductivity of 34.614 W (m−1 K−1), a significant reduction in crosstalk (up to 77.8%), and excellent mechanical durability, showing its potential for advanced packaging applications.173 Recent advances in molecular design have alleviated these limitations. The introduction of hyperbranched structures,174−176 fluorinated moieties,177 alicyclic segments,178 or controlled free-volume structures179,180 restricts dipole rotation and lowers energy dissipation at high frequencies. Such modifications have yielded PSPI variants with excellent dielectric stability, maintaining Dk ≤ 2.8 and Df < 0.009 up to 10 GHz.181 Backbone rigidity and reduced volumetric dipole moment further suppress dielectric loss. These changes also limit moisture uptake and polar-group density, thereby minimizing interfacial charge accumulation and capacitive coupling between adjacent transmission lines.182,183 Moreover, integrating photoactive chromophores with low polarizability and enhanced alignment enables fabrication of dense, void-free dielectric structures with tapered sidewalls. This morphology significantly reduces conductor surface roughness scattering and suppresses modal conversion at waveguide discontinuities. Combined with gradient-refractive-index designs, tailored PSPIs can facilitate impedance-matched transitions between silicon photonic components and electronic interconnects, mitigating power-ground noise. Synergistic optimization of the PSPI molecular structure and photonic routing topology represents a critical pathway toward terahertz-capable integrated systems.184 Coupled with electromagnetic codesign methodologies, these innovations will enable next-generation communication infrastructure,185 high-performance computing chips,186 and millimeter-wave sensors.187 4.2. Evolution of Dielectric Properties under Multifield Conditions and Long-Term Reliability The long-term reliability of devices requires understanding the relationship between dielectric properties (permittivity, k, and loss tangent, tan δ) under combined frequency, temperature, and humidity variations.188 The dielectric response of PSPIs is intrinsically linked to molecular polarizability and charge transport mechanisms. With increasing frequency, molecular dipoles exhibit reduced reorientation ability, leading to decreased Dk and often a tan δ peak at specific relaxation frequencies, typically associated with Tg and local chain motions.189 Elevated temperatures accelerate molecular and ionic motion in PSPIs, shifting relaxation peaks and sharply increasing permittivity J https://doi.org/10.1021/acsami.6c09651 ACS Appl. Mater. Interfaces XXXX, XXX, XXX–XXX Downloaded from pubs.acs.org/aamick/article-pdf/doi/10.1021/acsami.6c09651/66462161/am-2026-09651r.pdf by JILIN UNIV user on 07 September 2026 Figure 6. Technology evolution, progression and breakthrough, and advanced packaging examples. (a) Evolution of 2.5D/3D packaging technology highlighting key milestones achieved from 1970 to 2025. (b) Evolution of the chiplet ecosystem, substrate, and thermal management technology, highlighting key milestones toward 2030. (c) Advanced 2.5D/3D packaging examples. HBM: high-bandwidth memory, SoC: system-on-chip, LSI: large-scale integration, and IPD: integrated passive device. ACS Applied Materials & Interfaces www.acsami.org Review 4.4. Prospects for Next-Generation PSPIs 4.3. Commercial PSPI Products Fluorinated polyimides (FPIs) are valued for their low k, inherent hydrophobicity, and high-temperature stability against oxidation. However, impending regulatory restrictions on perand polyfluoroalkyl substances (PFAS) in regions such as the European Union are encouraging the search for highperformance, nonfluorinated alternatives. PSPIs offer a promising pathway, providing comparable performance without fluorinated chemistry. A key limitation of conventional PSPIs is long-term stability above approximately 450 °C, where thermal decomposition of the imide ring can compromise mechanical integrity. Recent research addresses this challenge. For instance, PIs functionalized with pyrazine groups have shown higher heat resistance with a Tg of 388 °C and a Td5% of 527 °C194 and nearzero CTE. This improvement is attributed to the orientation of rigid-rod moieties along the polymer backbone, which strengthens intermolecular packing and interactions.195 However, broader adoption of PSPIs has been restricted by relatively high manufacturing and processing costs. PSPI technology encounters issues like line-edge roughness (LER) and standing-wave effects during submicrometer patterning. Likewise, common approaches to enhance thermal conductivity involve incorporating inorganic fillers, but this may simultaneously increase dielectric loss, which is detrimental for high-frequency applications. In response, researchers have incorporated more robust molecular architectures. The integration of ladder-type segments (biphenylbased) improves thermal stability, while spirocyclic structures can effectively lower the Dk.196 Apart from materials science, the evolution of the industrial ecosystem is critical. Collaboration between material suppliers and packaging manufacturers has become a key trend. A notable example is the partnership between Samsung Electronics and Sumitomo Chemical that integrated PSPIs into 3D-IC packaging, thereby advancing their adoption in high-end applications.197 Market demand is driven by the development of 5G infrastructure, where requirements for high-frequency operation and miniaturization in base-station and terminal chips have accelerated PSPIs in antenna packaging and radio frequency front-end modules (RFFEM). By Beyond the academic development of PSPI materials, several mature commercial products have been established by major manufacturers. Understanding the current industrial landscape is essential for contextualizing the research gaps and future directions discussed in Section 4.4. Table 3 summarizes the key product families, their tone types, curing temperature, and primary characteristics from the leading PSPI suppliers. The data presented in Table 3 are compiled from the official product documentation and websites of the corresponding manufacturers. Toray Industries offers the PHOTONEECE series, a comprehensive lineup of liquid-type photodefinable polyimides.190 The product lineup includes the PW-Series (high-temperature curable positive-tone), UR-Series (high-temperature curable negative-tone), LT-Series (low-temperature curable positivetone, ≥200 °C), and PN-Series (low-temperature curable negative-tone). The LT-Series achieves resolution down to 5 μm with a Tg ≥ 270 °C and CTE ≤ 50 ppm/°C. Toray has also developed fluorine-free, NMP-free variants (GN-K, LT-K, and PW-K Series) in response to environmental concerns. Additionally, Toray’s FALDA polyimide low-dielectric adhesive film achieves a dielectric constant of 2.41 and a dielectric loss tangent of 0.003 at 20 GHz, demonstrating the feasibility of low-loss PSPI materials for high-frequency applications. HD MicroSystems provides both positive-tone and negativetone photodefinable polyimides and PBO precursors. The HD8820 is an alkaline-developable positive-tone polyimide designed for stress buffer and packaging applications.191 It features low moisture uptake and excellent dielectric properties. The HD4100 Series offers negative-tone options, while the HD-8930 is an NMP-free alkaline-developable positive-tone PBO precursor. It can be cured at low temperatures (200−250 °C) and used as an RDL (3 μm) in advanced packaging materials. Asahi Kasei commercialized PIMEL photosensitive polyimide in 1988, establishing it as one of the earliest PSPI products in the market. PIMEL is applied worldwide for buffer coatings, passivation layers, and dielectric layers for redistribution K https://doi.org/10.1021/acsami.6c09651 ACS Appl. Mater. Interfaces XXXX, XXX, XXX–XXX Downloaded from pubs.acs.org/aamick/article-pdf/doi/10.1021/acsami.6c09651/66462161/am-2026-09651r.pdf by JILIN UNIV user on 07 September 2026 bumping.192 The product line includes various grades, with the TL-series specifically designed for low CTE applications. Recently, Asahi Kasei has developed a novel PSPI film that combines PIMEL liquid PSPI technology with SUNFORT dry film photoresist expertise, targeting from wafer-level to panel-level packaging (PLP) applications. This film format supports lamination processes on large square panels and enables fine circuit patterns down to 1.0 μm when combined with appropriate lithography. The company plans to double PIMEL production capacity by 2030 in response to rising demand from AI and high-performance computing applications. Fujifilm offers the Durimide family of solvent-developable, negative-tone photosensitive polyimides.193 The LTC 9300 Series features low-temperature cure polyimides suited for redistribution layer applications in advanced packaging, with ultrafast curing capability. The Durimide 8300 Series comprises high-temperature cure polyimides for buffer coat applications in high-reliability packages. More recently, Fujifilm launched the ZEMATES brand of photosensitive insulating materials, encompassing both liquid-type polyimide for RDLs and protective films, as well as film-type polyimide for panel-level packaging. Notably, all ZEMATES polyimide products are PFAS-free, aligning with emerging environmental regulations. and loss at lower frequencies, threatening high-temperature operational stability. Humidity often poses the potential risk to PSPI reliability. Even with inherent water resistance, these materials can absorb environmental moisture and initiate degradation with two primary consequences. First, water can act as a plasticizer to lower Tg and increase chain mobility, which raises permittivity and loss at low frequency. Second, absorbed water facilitates ion migration, which drastically increases conductive loss. Under an applied electric field, ion flow can induce electrolytic corrosion and create conductive filaments, eventually leading to electrical failure. Long-term reliability is further threatened by synergistic degradation under combined thermal-humidity-bias stress. Increased dielectric loss generates Joule heating, which accelerates hydrolysis and material degradation. Ultimately, the process can cause insulation failure, short circuits, and severe duction in operational lifetime. A fundamental understanding of the interplay between molecular dynamics, moisture introduction, and electrical field distribution under multifield conditions is essential. Future material development should focus on enhancing hydrophobicity, improving crosslink density to restrict chain mobility, and developing novel monomers resistant to hydrolytic attack. Such advances will be significant for the reliability of nextgeneration electronics in harsh environments. ACS Applied Materials & Interfaces www.acsami.org Review Table 3. Representative Commercial PSPIs and Their Key Characteristics Manufacturer PHOTONEECE series Toray Photodefinable PI LT PW STF-1000 Negative tone i-line (365 nm) ≥300 ≥150 ≥40 ≥3 ≤50 ≥300 ≥30 HD4100 Negative tone i-line (365 nm) 350−390 200 45 3.5 Positive tone i-line (365 nm) ≥200 ≥130 ≥50 ≥2 ≤50 ≥270 ≥5 HD7110 Negative tone i-line (365 nm) 200−300 160−190 40 2.8−3.3 Positive tone i-line (365 nm) ≥300 ≥150 ≥50 ≥3 ≤40 ≥300 ≥5 HD8820 Positive tone i-line (365 nm) 280−350 170 100 2.2−2.7 Negative tone h-line (405 nm) ≥200 90−100 6.0−8.0 2.0−2.5 70−75 200−250 ≥10 HD8930 Positive tone i-line (365 nm) 200−250 170 80 1.7−1.9 Negative tone h-line (405 nm) ≥200 30−40 1.5−2.5 2.0−2.5 70−75 200−250 ≥10 HD7204 Negative tone i-line (365 nm) 200−300 180−210 50 2.5−2.9 320 5 PIMEL BL-301/401 Negative tone 200 150 60 3.4 50−60 200 LTC 9300-E07 Negative tone i-line (365 nm) 200−250 181 83 2.5 55 229 230 5 LV-105 Negative tone 200 150 60 3.4 50−60 200 LTC 9300-E19 Negative tone i-line (365 nm) 200−250 178 74 2.6 54 229 300 4 BM-302H Negative tone 200 170 55 4.5 50 220 LTC 9300-E76B Negative tone i-line (365 nm) 180−230 175 65 2.9 50 231 230 3 MA-1001 Positive tone 220 135 65 3.6 35 240 Durimide 7020 200−230 6 AM-271 Positive tone 320 130 35 2.7 55 300 Durimide 7500 Positive tone i/g/h-line 350−420 215 85 2.5 55 285 g-line/h-line (436/405 nm) 350−420 170 73 2.9 27 >350 STF-2000 conductivity, and low-temperature curable materials, while future progress hinges on PFAS-free and resilient functionalities. In this review, we have discussed the evolution of advanced packaging architectures, as well as roles and potential of PSPIs in heterogeneous integration. While vertical chiplet stacking and copackaged photonics represent prominent architectural directions, recent studies highlight the enabling performance of PSPIs. Their low-k, stress buffer capability, and planarization properties can improve signal integrity and system reliability. This functionality extends beyond a passive supporting role; through tailored molecular design and processing development, PSPIs are transitioning from conventional encapsulation auxiliaries into high-performance materials. Their excellent properties make them indispensable for constructing multifunctional interconnects and passive structures in 2.5D and 3D packaging. Such advancement expands the magnificent possibility in advanced packaging materials, from mere mechanical protection toward functional enablement. The development of PSPIs requires synergistic breakthroughs across multiple areas. First, controllable regulation of 2026, 5G-related applications are projected to account over 40% of the global PSPI market. Simultaneously, the AI and highperformance computing (HPC) sectors are experiencing rapid growth in PSPI materials, which is expected to more than triple in the next five years with data-center infrastructure expansion. The proliferation of wearable electronics is expanding PSPI applications into flexible packaging. Flexible electronics impose stringent demands on material flexibility and cyclic durability. Recent developments in PSPI films incorporating flexible chain segments and plasticizers have demonstrated survivability beyond 100,000 bending cycles, making them suitable for flexible printed circuit boards, display panels, electronic skin, and related applications.69,198 Moreover, the biocompatibility and thermal stability of tailored PSPIs support innovation in medical devices,199 enabling advanced circuit designs for wearable devices and biosensors. 5. SUMMARY AND OUTLOOK The future development of PSPIs for advanced packaging relies on the molecular design of low-dielectric, high-thermal L https://doi.org/10.1021/acsami.6c09651 ACS Appl. Mater. Interfaces XXXX, XXX, XXX–XXX Downloaded from pubs.acs.org/aamick/article-pdf/doi/10.1021/acsami.6c09651/66462161/am-2026-09651r.pdf by JILIN UNIV user on 07 September 2026 Type Exposure wavelength (nm) Curing temperature (°C) Tensile strength (MPa) Elongation (%) Modulus (GPa) CTE (ppm/°C) Tg (°C) Resolution (μm) HD MicroSystems Type Exposure wavelength (nm) Curing temperature (°C) Tensile strength (MPa) Elongation (%) Modulus (GPa) CTE (ppm/°C) Tg (°C) Resolution (μm) Asahi Kasei Type Curing temperature (°C) Tensile strength (MPa) Elongation (%) Modulus (GPa) CTE (ppm/°C) Tg (°C) Fujifilm Type Exposure wavelength (nm) Curing temperature (°C) Tensile strength (MPa) Elongation (%) Modulus (GPa) CTE (ppm/°C) Tg (°C) GN ACS Applied Materials & Interfaces www.acsami.org material properties is crucial. Former studies demonstrated that Dk, CTE, and other parameters can be precisely regulated through molecular structure and composite design; these approaches must shift from single-property optimization to system-oriented codesign. For instance, balancing low-k properties with high mechanical strength can be achieved through nanocomposites or porous structures. Second, process compatibility for high-density integration remains a challenge. Current PSPIs still face bottlenecks in ultrathinning, high aspect ratio through filling, and interface stability with heterogeneous materials. Particularly in 3D stacking environments, novel curing and interface control technologies compatible with semiconductor processes need to be developed. From an application perspective, the integration of PSPI formulations with novel thermal management solutions will address the challenges of power delivery and thermal management in high-power-density systems. For instance, embedding thermal management functions within PSPI dielectric layers or developing packaging structures with graded thermal conductivity can enable the co-optimization of multiple physical fields such as electrical, thermal, and mechanical. Moreover, it may be possible to integrate composite functions such as signal transmission, power distribution, thermal diffusion, and electromagnetic shielding within a single material layer. Looking further ahead, two emerging directions, bio-based PSPIs and self-healing PSPIs, deserve particular attention for sustainable and reliable electronics. Bio-based PSPIs, derived from renewable monomers such as isosorbide, vanillyl alcohol, lignin or furan-based diamines, offer a pathway to reduce the carbon footprint and dependency on petrochemical resources, while maintaining competitive thermal and dielectric properties. Although their current performance often lags behind that of petroleum-based counterparts, advances in monomer synthesis and polymerization chemistry are rapidly closing this gap. Self-healing PSPIs, on the other hand, address the critical issue of microcrack formation and delamination during thermal cycling and mechanical stress. Incorporating dynamic covalent bonds (e.g., Diels−Alder adducts, disulfide linkages, or thiolene-based) or supramolecular interactions into the PSPI backbone can enable autonomic repair of damage, thereby extending the service lifetime of packaging structures. These functionalities are particularly valuable for flexible, wearable, and harshenvironment applications where maintenance is difficult. Future research should therefore explore the integration of bio-based feedstocks with self-healing capability, as well as their compatibility with existing photo-patterning and curing processes, to realize truly sustainable and durable PSPI materials. The advancement of PSPI technology may open up new pathways for electronic integration. Future exploration of the connections between dielectric properties of PSPI and other emerging fields (e.g., flexible electronics) might drive microelectronic systems toward higher integration density and lower energy consumption. Engineering, Eastern Institute of Technology, Ningbo, Zhejiang 315200, China; Email: kimsk@ylab.ac.cn Review Authors Chenlei Pang – College of Chemical Engineering, Zhejiang University of Technology, Hangzhou, Zhejiang 310014, China Qinghua Lu – School of Chemistry and Chemical Engineering, Shanghai Jiao Tong University, Shanghai 200240, China; orcid.org/0000-0003-1522-1458 Complete contact information is available at: https://pubs.acs.org/doi/10.1021/acsami.6c09651 The manuscript was written through contributions of all authors. All authors have given approval to the final version of the manuscript. Notes The authors declare no competing financial interest. ■ ACKNOWLEDGMENTS We gratefully acknowledge funding support from the Yongjiang Laboratory, Ningbo, China (Y-Lab Project P2, B400TASD02). The authors also extend their appreciation to the technical staff and collaborators at the Specialty Polymer Research Center for their valuable insights and contributions throughout the preparation of this manuscript. ■ REFERENCES (1) Woon, W. Y.; Kasperovich, A.; Wen, J. R.; Hu, K. K.; Malakoutian, M.; Jhang, J. H.; Vaziri, S.; Datye, I.; Shih, C. C.; Hsu, J. F.; et al. Thermal management materials for 3D-stacked integrated circuits. Nat. Rev. Electr. Eng. 2025, 2 (9), 598−613. (2) Nishio, Y.; Zhong, D.; Kim, K. K.; Liu, Q.; Wu, C.; Tok, J. B. H.; Murmann, B.; Bao, Z. Intrinsically stretchable transistors and integrated circuits. Nat. Rev. Electr. Eng. 2025, 2 (11), 715−735. (3) Hua, S.; Divita, E.; Yu, S.; Peng, B.; Roques-Carmes, C.; Su, Z.; Chen, Z.; Bai, Y.; Zou, J.; Zhu, Y.; et al. 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