Experiments on TMS320F28377S-based Controllers
EMEC Lab, Department of Energy Science and Engineering,IIT Bombay
February 18, 2020
Contents
1 Blinking a LED
1.1 Aim of the exercise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.2 Device support files to be included . . . . . . . . . . . . . . . . . . . . . . . . .
1.3 Configuring GPIO module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
1.4 Result . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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2 Control a LED with SPDT switch
2.1 Aim of the exercise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.2 Device support files to be included . . . . . . . . . . . . . . . . . . . . . . . . .
2.3 Configuring GPIO module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
2.4 Result . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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3 Blinking an LED using timer interrupt
3.1 Aim of the exercise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
3.2 Device support files to be included . . . . . . . . . . . . . . . . . . . . . . . . .
3.3 Configuring GPIO and Timer0 interrupt module . . . . . . . . . . . . . . . . . .
3.3.1 Enabling the Timer0 interrupt . . . . . . . . . . . . . . . . . . . . . . . .
3.4 Result . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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4 Use ePWM module to generate a PWM pulse
4.1 Aim of the exercise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.2 Device support files to be included . . . . . . . . . . . . . . . . . . . . . . . . .
4.3 Configuration of ePWM module . . . . . . . . . . . . . . . . . . . . . . . . . . .
4.4 Configuring ePWM module for phase delayed signal . . . . . . . . . . . . . . . .
4.5 Result . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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5 Generate three phase PWM pulses using ePWM module
5.1 Aim of the exercise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.2 Device support files to be included . . . . . . . . . . . . . . . . . . . . . . . . .
5.3 Configuring ePWM module to generate 120 degree phase shift between two pulses
5.4 Configure ePWM to generate sine triangle PWM pulses . . . . . . . . . . . . . .
5.5 Generation of dead time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.6 Result . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5.7 Exercise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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6 Configuring external interrupt
6.1 Aim of the exercise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
6.2 Device support files to be included . . . . . . . . . . . . . . . . . . . . . . . . .
6.3 Configuring GPIO99 and XINT1 interrupt module . . . . . . . . . . . . . . . . .
6.3.1 Enabling the XINT1 interrupt . . . . . . . . . . . . . . . . . . . . . . . .
6.4 Result . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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1
7 Use DAC to generate an analog signal
7.1 Aim of the exercise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
7.2 Device support files to be included . . . . . . . . . . . . . . . . . . . . . . . . .
7.3 Configuring DAC togenerate an analog signal . . . . . . . . . . . . . . . . . . .
7.4 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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8 Use ADC to sense external signal
8.1 Aim of the exercise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8.2 Device support files to be included . . . . . . . . . . . . . . . . . . . . . . . . .
8.3 Configuring ADC to sense an external signal . . . . . . . . . . . . . . . . . . . .
8.4 Observation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8.5 Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
8.6 Exercise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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9 Implementation of a Low Pass Filter
9.1 Aim of the exercise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9.2 Transfer Function of a Low-Pass Filter . . . . . . . . . . . . . . . . . . . . . . .
9.3 Implementation in DSP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
9.4 Result . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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10 Implementation of a High Pass Filter
10.1 Aim of the exercise . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.2 Transfer Function of a Low-Pass Filter . . . . . . . . . . . . . . . . . . . . . . .
10.3 Implementation in DSP . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
10.4 Result . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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2
List of Figures
1.1
EALLOW protected . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
5
4.1
4.2
Use of CMPA and CMPB in up-down counter mode . . . . . . . . . . . . . . . .
Configuration of an ePWM module . . . . . . . . . . . . . . . . . . . . . . . . .
12
13
5.1
5.2
5.3
5.4
Configuring ePWM for 120 degree phase shift . . . . . . . . . . . . . . . . . . .
Generation of sine triangle PWM . . . . . . . . . . . . . . . . . . . . . . . . . .
Configuration of event trigger registers . . . . . . . . . . . . . . . . . . . . . . .
Modulating signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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6.1
6.2
PIE Channel Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Toggling the state of GPIO99 and changing the frequency of ePWM8 . . . . . .
20
21
8.1
8.2
8.3
PIE Channel Mapping . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Configuring ADC B . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PIN diagram for ’J2’ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
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25
26
9.1
Implementation of Low Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . .
27
10.1 Implementation of High Pass Filter . . . . . . . . . . . . . . . . . . . . . . . . .
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3
Chapter 1
Blinking a LED
1.1
Aim of the exercise
The aim of this exercise is to understand how to configure the GPIO module.
1.2
Device support files to be included
• Once a project is created, the ”include” folders from both, common and header folders
of device support folder are to be included using include option. This will have all the
necessary header files.
• F2837xS GlobalVariableDefs.c, F2837xS CodeStartBranch.asm,
F2837xS Headers nonBIOS.cmd and F2837xS SysCtrl.c files from source files must be
added as these will be common to all the projects.
• Based on the modules that are being used in the program, the corresponding initialization
C-files must be added from the \common\source folder of device support. Since only GPIO
and Delay module are used in this exercise, add F2837xS Gpio.c and F2837xS usDelay.asm
files.
1.3
Configuring GPIO module
• Given:The board that is used has LED connected to GPIO99. So, GPIO99 has to be
configured as output pin so that it can be made HIGH to turn the LED ON and make the
pin LOW to turn the LED OFF.
• Each GPIO pin of processor is multiplexed for many operations. First to configure the pin
GPIO99, configure the corresponding GMUX and MUX bits of GPIO control registers.
As per the Chapter7 (page no.828) of user manual, GPIO99 corresponds to Port-D. From
table 7.7-GPIO muxed pins (page no 836) of datasheet, GMUX has to be set to 00 and
MUX has to be set 00 to configure GPI099. To be able to write to these control registers,
check the protection status as shown in the reference manual. If it is EALLOW protected,
write EALLOW before starting and EDIS at the end of the instructions.
****************************************************************
// Configure the peripheral MUX to set GPIO99 as GPIO
GpioCtrlRegs.GPDMUX1.bit.GPIO99 = 0;
GpioCtrlRegs.GPDGMUX1.bit.GPIO99 = 0;
4
Figure 1.1: EALLOW protected
******************************************************************
• To configure GPIO99 as output pin, the direction of the pin as to be set to 1. (Refer the
manual for GPIO control register-page no 855)
****************************************************************
// Configure GPIO99 as output pin.
GpioCtrlRegs.GPDDIR.bit.GPIO99 = 1;
******************************************************************
• Now to make this pin HIGH, set the Data pin corresponding to GPIO99 as 1.
****************************************************************
//Write 1 to GPIO99
GpioDataRegs.GPDDAT.bit.GPIO99 = 1;
******************************************************************
• This makes the LED ON. Then use a delay to keep it on for some time based on the
argument passed to the delay function. Then turn the LED OFF by setting GPIO data
pin to 0 and wait for the required duration before turning it ON again to achieve the
blinking.
• Delay sub-routine can be called using DELAY function.
****************************************************************
//Calling Delay
DELAY US(100000);
******************************************************************
The same blinking of LED can also be done using TOGGLE function of GPIO.
1.4
Result
Observe the LED blink.
5
Chapter 2
Control a LED with SPDT switch
2.1
Aim of the exercise
To understand how to configure the GPIO pins to use an SPDT switch.
2.2
Device support files to be included
• Once a project is created, the ”include” folders from both, common and header folders
of device support folder are to be included using include option. This will have all the
necessary header files.
• F2837xS GlobalVariableDefs.c, F2837xS CodeStartBranch.asm,
F2837xS Headers nonBIOS.cmd and F2837xS SysCtrl.c files from source files must be
added as these will be common to all the projects.
• Based on the modules that are being used in the program, the corresponding initialization
C-files must be added from the \common\source folder of device support. Since only GPIO
and Delay module are used in this exercise, add F2837xS Gpio.c and F2837xS usDelay.asm
files.
2.3
Configuring GPIO module
• Given:The board that is used has LED connected to GPIO99. SPDT switch is connected
to GPIO66. When SPDT is made High, LED will turn ON and when SPDT is switched
low, LED will tun OFF. So, GPIO99 has to be configured as output pin and GPIO66 has
to be configured as input pin.
• Each GPIO pin of processor is multiplexed for many operations. First to configure the
pin GPIO99, configure the corresponding GMUX and MUX bits of GPIO control registers. As per the Chapter7 (page no.828) of user manual, GPIO99 corresponds to Port-D
while GPIO66 corresponds to Port-C. From table 7.7-GPIO muxed pins (page no 836) of
datasheet, GMUX has to be set to 00 and MUX has to be set 00 to configure GPI099 as
well as GPIO66. To be able to write to these control registers, check the protection status.
If it is EALLOW protected, write EALLOW before starting and EDIS at the end of the
instructions.On board LED is connected to GPIO-99.
****************************************************************
// Configure the peripheral MUX to set GPIO99 as GPIO
GpioCtrlRegs.GPDMUX1.bit.GPIO99 = 0;
6
GpioCtrlRegs.GPDGMUX1.bit.GPIO99 = 0;
// Configure the peripheral MUX to set GPIO66 as GPIO
GpioCtrlRegs.GPCMUX1.bit.GPIO66 = 0;
GpioCtrlRegs.GPCGMUX1.bit.GPIO66 = 0;
******************************************************************
• To configure GPIO99 as output pin, the direction of the pin as to be set to 1. (Refer the
manual for GPIO control register-page no 855)
****************************************************************
// Configure GPIO99 as output pin.
GpioCtrlRegs.GPDDIR.bit.GPIO99 = 1;
// Configure GPIO66 as input pin.
GpioCtrlRegs.GPCDIR.bit.GPIO66 = 0;
******************************************************************
• Now,the control logic to turn the LED ON when the switch is HIGH and vice versa can
be written in the while loop.
if (GpioDataRegs.GPCDAT.bit.GPIO66 == 1 ) // When switch is at logic HIGH
GpioDataRegs.GPDCLEAR.bit.GPIO99 = 1; // Turn ON the LED
else
// When switch is at logic LOW
GpioDataRegs.GPDSET.bit.GPIO99 = 1; // Turn OFF the LED
****************************************************************
2.4
Result
Observe the LED turn ON when SPDT is made HIGH.
7
Chapter 3
Blinking an LED using timer interrupt
3.1
Aim of the exercise
The aim of this exercise is to understand how to configure the timer interrupt module.
3.2
Device support files to be included
• Once a project is created, the ”include” folders from both, common and header folders
of device support folder are to be included using include option. This will have all the
necessary header files.
• F2837xS GlobalVariableDefs.c, F2837xS CodeStartBranch.asm,
F2837xS Headers nonBIOS.cmd and F2837xS SysCtrl.c files from source files must be
added as these will be common to all the projects.
• Based on the modules that are being used in the program, the corresponding initialization C-files must be added from the \common\source folder of device support. GPIO
module as well as interrupt module are used in this exercise. Add F2837xS Gpio.c,
F2837xS CpuTimers.c, F2837xS DefaultISR.c, F2837xS PieCtrl.c, F2837xS PieVect.c files
as will be used for interrupt generation.
3.3
Configuring GPIO and Timer0 interrupt module
• The configuration of GPIO99 will be same as in the previous exercises. GPIO99 is configured as output pin.
• Timer0 interrupt of the CPU timers is used to generate the interrupt after a certain time
period. This time period after which the interrupt is generated is based on the period value
loaded into the period of CPUTimer0 registers. This period value is intern dependent on
the system clock. Each time the counter becomes zero, an interrupt is generated and the
status of GPIO99 is toggled and so the LED blinks.
3.3.1
Enabling the Timer0 interrupt
- Global interrupt mask is to be set using DINT. This disables all the goal interrupts.
DINT;
- All the CPU interrupts are disabled by writing ’0’ to IER.
IER=0;
8
- All the interrupt flags are cleared.
IFR=0;
This process of disabling the interrupts is done so that there will not be any overwrite
of the registers due to any interrupt during the process of setting up of the interrupts.
This process is commonly followed before setting up any interrupt.
- To setup Timer0 interrupt, we should know the location of this interrupt. This
information will be available in PieVectorTable( Refer Table 3.2 in page 96 of user
manual). So, initialize these PIE control registers and PieVctorTable using
InitPieCtrl();
InitPieVectTable();
PIE vector table with pointers to the shell ISRs
- From the Pie Vector Table, it is observed that Timer0 interrupt belongs to Group 1
interrupts- INT1.y and 7th channel of group 1 interrupts contains the default Interrupt
Service Subroutine (ISR) for this Timer0 interrupt. So, INT1.7 represents Timer0
interrupt operation.
- So, to enable to Timer0 interrupt (by default all the PIE vectors are disabled and
flags cleared), the corresponding bits of the Pie control registers are to be set.
1 Set the PIE Enable bit of the Pie Control registers. Peripheral interrupts work
only if this is enabled.
PieCtrlRegs.PIECTRL.bit.ENPIE = 1;
2 Enable the Timer0 interrupt.
PieCtrlRegs.PIEIER1.bit.INTx7 = 1;
3 Once the interrupt is enabled, point this interrupt to the ISR address where the
function which is to be carried out when the interrupt is generated is written.
PieVectTable.TIMER0 INT = &timer isr;
Please note that all the control registers are EALLOW protected. Hence EALLOW is to be written before modifying the control registers and EDIS at the end
for this block of code.
- Once the Timer0 interrupt is enabled, now set the interrupt by loading the period
and telling it when to generate the interrupt. This is again done by writing the
appropriate values to the corresponding CPU-Timer prescale registers.
1 Tell the timer to decrement the timer counter register by one for every clock
cycle.
EALLOW
CpuTimer0Regs.TPR.bit.TDDR = 0;
CpuTimer0Regs.TPRH.bit.TDDRH = 0;
For example, if it has to be decremented after 5 clock cycles, the write this value
as 6.
2 Before writing the period into the register, stop the CPU timer
CpuTimer0Regs.TCR.bit.TSS = 1;
3 Now, write the required period to generate a toggling frequency of 0.1sec
CpuTimer0Regs.PRD.all = 50000000;
This number depends on the clock frequency being used. System clock frequency
is 200MHz. So, time for 1 clock cycle is 1/(200M). Number of clock cycles required
for 0.1 sec delay is then calculated and is loaded as period for CPU Timer0
register.
4 To tell the timer to run continuously
CpuTimer0Regs.TCR.bit.FREE = 1;
9
5 This timer period must also be loaded into the timer counter register explicitly
CpuTimer0Regs.TCR.bit.TRB = 1;
6 Now that the period is loaded into the timer counter register, the CPU timer
that was stopped earlier has to be restarted and time interrupt to be enabled’
CpuTimer0Regs.TCR.bit.TSS = 0; // start the CPU timer
CpuTimer0Regs.TCR.bit.TIE = 1; // Enable the CPU timer interrupt EDIS;
- After all the settings of Timer0 are done,the CPU interrupt group 1 has to be enabled
which contains this Timer0.
IER |= M INT1;
- Finally enable the global interrupts and global real time interrupts.
EINT;
ERTM;
• In the Interrupt Service Subroutine function, GPIO99 has to be toggled using
GpioDataRegs.GPDTOGGLE.bit.GPIO99 = 1;
and to indicate that the interrupt is served and to accept new interrupt, flag corresponding
to CPU-Timer0 has to be cleared and Group1 interrupt has to be acknowledged.
CpuTimer0Regs.TCR.bit.TIF =1; // Clear the interrupt flag for timer0
PieCtrlRegs.PIEACK.bit.ACK1 = 1; // Acknowledge the interrupt for group1.
3.4
Result
Observe the LED blink.
10
Chapter 4
Use ePWM module to generate a
PWM pulse
4.1
Aim of the exercise
• Generate a PWM pulses.
• Generate phase-delayed PWM pulses
4.2
Device support files to be included
• Once a project is created, the ”include” folders from both, common and header folders
of device support folder are to be included using include option. This will have all the
necessary header files.
• F2837xS GlobalVariableDefs.c, F2837xS CodeStartBranch.asm,
F2837xS Headers nonBIOS.cmd and F2837xS SysCtrl.c files from source files must be
added as these will be common to all the projects.
• Based on the modules that are being used in the program, the corresponding initialization
C-files must be added from the \common\source folder of device support. GPIO module as
well as interrupt module are used in this exercise. Also ADC and ePWM modules are used.
Add F2837xS Gpio.c, F2837xS CpuTimers.c, F2837xS DefaultISR.c, F2837xS PieCtrl.c,
F2837xS PieVect.c, F2837xS EPwm.c files as will be used for interrupt generation.
4.3
Configuration of ePWM module
• There are 12 ePWM modules. Each module can generate 2 pulses (ePWMxA and ePWMxB; x is 1,2,...,12). These two pulses can be made either dependent or independent
from each other.
• PWM pulses are generated by comparing a fixed value to a running counter. This counter
can be up, down or up-down counter. This is noting but comparing a fixed signal to a
sawtooth or triangular wave. The duty cycle is decided by the fixed signal.
• In the controller, there are two different fixed values that can be used simultaneously.
These are called CMPA or CA and CMPB or CB. These comparisons are done using
‘counter compare sub-module’. Refer to the reference manual for more information.
11
Figure 4.1: Use of CMPA and CMPB in up-down counter mode
• Based on these comparisons, what decision would be taken are decided by the ‘action
qualifier sub-module’. Refer to Fig. 4.1.
• From GPIO muxed pins table in technical reference manual of microprocessor ( Ref. Table
7.7 of the technical manual), it can be seen that GPIO pins can be configured to be
working as EPWM pin by appropriately selecting GMUX and MUX values of given pins.
For example, the following code will make the GPIO14 pin function as ePWM pin.
GpioCtrlRegs.GPAGMUX1.bit.GPIO14= 00;
GpioCtrlRegs.GPAMUX1.bit.GPIO14 = 01;
• The system clock frequency is 100 MHz.
• But, clock frequency for the module is decided by ‘CLKDIV’ bit of EPWM register (EPwmxRegs). Selecting it as ‘1’ means we are selecting a 100 MHz clock for the ePWM
module.
• Next, ‘TBPRD’ register will decide the frequency of the generated pulse. This is defined
in number of PWM clock cycles. Maximum value it can go upto is 65535.
• For a given frequency of PWM output, TBPRD register of EPWM is supposed to be loaded
with a specific value governed by Equation 4.1.
T BP RD =
100 M Hz
1
·
2 fsw · CLKDIV · HSP CLKDIV
(4.1)
• So, taking TBPRD register as 2500, CLKDIV register as 1 and HSPCLKDIV register as
1 will give a counter frequency of 20 kHz. For example,
EPwm8Regs.TBPRD = 2500;
EPwm8Regs.TBCTL.bit.CLKDIV = 1;
EPwm8Regs.TBCTL.bit.HSPCLKDIV = 1;
• LOADMODE of CMPCTL register of EPWM will allow the period to be loaded to the
period compare register.
EPwmxRegs.CMPCTL.bit.LOADBMODE = 2;
• Selecting ’CMPA’ as half of the ‘TBPRD’ means a 50 % duty cycle.
• ‘AQCTLA’ is action qualifier of the ePWMxA module. Selecting ‘CAU’ as 2 means set
the signal to ‘1’ whenever counter is equal to CMPA. ‘CAD=1’ means resetting the same
signal to ‘0’. Thus a signal of any requirement is generated.
12
• Similarly ‘AQCTLB’ is used to configure ePWMxB module. Making ‘CAU=1’ and ‘CAD=2’
for AQCTLB will generate a perfectly complementary pulses.
• ‘CTRMODE’ will set the counter as up. down or up-down mode as per requirement.
Selecting ‘CTRMODE=2’ will set the counter as a up-down counter.
Note: Change in ‘CTRMODE’ will change the frequency and duty cycle of the generated
Figure 4.2: Configuration of an ePWM module
signal.
• Code in Figure 4.2 will generate complementary signals in EPWMxA and EPWMxB.
• EPWM registers are EALLOW protected. So, they are supposed to modified between
EALLOW and EDIS commands as in Figure 4.2.
4.4
Configuring ePWM module for phase delayed signal
• For phase delay, two EPWM registers are supposed to be working in synchronism. For
the synchronization process, one of the register has to give synchronization signal to other
ePWM modules. Synchronization signals can only flow to the down-stream modules i.e.,
EPWMxRegs can give synchronizing signal to EPWMyRegs provided x < y. For more
details, refer Figure 14.7 in the reference manual.
• By making SYNCOSEL bit of EPwmxRegs 0 will configure it as master ePWM. And all
the other ePWM modules below it (EPwmyRegs provided y > x) will be synced with the
clock of ePWM x.
• The other ePWM module, i.e., EPWMyRegs, has to configured in the same way as explained in previous section. But, to sync it with the other ePWM module, set its PHSEN
bit to 1.
• Above configuration will make the pulses generated on both the modules to be identical.
Now, to add some phase delay in the pulse generated on EPwmyRegs, set the phase value
in ‘TBPHS’ with the appropriate value as governed by Equation 4.2 for a delay of θ◦ .
T BP HS =
T BP RD
·θ
180
(4.2)
• Setting PRDLD to 1 will load the time-based period register in shadow mode. This is to
be done only for the slave ePWM register
13
4.5
Result
• Observe a 20 kHz 50 % duty cycle square wave in the oscilloscope.
• Observed two square waves phase delayed by 90◦ on oscilloscope
14
Chapter 5
Generate three phase PWM pulses
using ePWM module
5.1
Aim of the exercise
• Generate 3 phase 180 degree pulses.
• Generate 3 phase sine triangle pulses.
• Generate dead band between PWM pulses.
5.2
Device support files to be included
• Once a project is created, the ”include” folders from both, common and header folders
of device support folder are to be included using include option. This will have all the
necessary header files.
• F2837xS GlobalVariableDefs.c, F2837xS CodeStartBranch.asm,
F2837xS Headers nonBIOS.cmd and F2837xS SysCtrl.c files from source files must be
added as these will be common to all the projects.
• Based on the modules that are being used in the program, the corresponding initialization
C-files must be added from the \common\source folder of device support. GPIO module as
well as interrupt module are used in this exercise. Also ADC and ePWM modules are used.
Add F2837xS Gpio.c, F2837xS CpuTimers.c, F2837xS DefaultISR.c, F2837xS PieCtrl.c,
F2837xS PieVect.c, F2837xS EPwm.c files as will be used for interrupt generation.
• Also include ’math.h’ as mathematical functions will be used to generate modulating signals.
5.3
Configuring ePWM module to generate 120 degree
phase shift between two pulses
• Configure ePWM clock frequency. It is set to 50 MHz for this experiment (half of system
clock frequency which is 100 MHz).
• Setting ‘SYNCOSEL’ bit for ePWM 8 will make it the master ePWM. Other ePWM
modules can be synced with the clock of ePWM 8.
15
Figure 5.1: Configuring ePWM for 120 degree phase shift
• For 1 kHz PWM output, ‘TBPRD’ is selected to be 25000.
• For 50 % duty ratio, select the comparator ‘CMPA’ value as half of ‘TBPRD’.
• To sync ePWM 9 with ePWM 8 and generate an identical pulse but 120 degree phase
apart, enable the phase enable ‘PHSEN’ bit of ePWM 9.
• Keep all other bits identical to ePWM 8 and set the phase value ‘TBPHS’ to 1/3rd of the
total period. This will make sure a 120 degree phase shift between the two ePWM pulses.
Similarly, generate another ePWM pulse which is 240 degree phase apart with respect to
ePWM 8.
5.4
Configure ePWM to generate sine triangle PWM
pulses
• As we’ll be able to define the modulating signal in this case, we do not need to use phase
enable and phase shift bits. But still, it is a good practice to sync all the ePWM clocks
using ‘SYNCOSEL’ bit.
• To generate sinusoidal modulating signal, it is required to update the comparator value
according to a sinusoidal signal (See Fig. 5.2). All these are done in a separate .c file
having all the configurations required to run the program.
• This update is done using an interrupt generated by ePWM. Use PIE channel mapping to
enable interrupt the same way as done before.
• To enable this interrupt, ’ETSEL’ or event trigger selection register needs to be configured.
This is shown in Fig. 5.3.
• Following steps are required to do this.
– Clear ‘ETSEL’ register to remove any previous data.
– ‘INTEN=1’ to enable ePWM interrupt.
– ‘INTSEL=3’ to generate an event at both zero and period points.
– ‘INTPSSEL=0’ to be able to generate interrupts once every 0 to 3 events.
16
Figure 5.2: Generation of sine triangle PWM
– ‘INPRD=1’ to select the frequency of interrupt generation at each period i.e. first
event.
Figure 5.3: Configuration of event trigger registers
• Referring to Fig. 5.4, the sine wave is generating at step of delt heta. This variable defines
the frequency of the signal. For 50 Hz, this has to be 3.14 ∗ fp50
. In the figure, an ADC
wm
output is used here to select the frequency. The details of this experiment will be shown
in the next chapter.
• Note that m B and m C are 120 degree phase apart.
17
Figure 5.4: Modulating signals
• Another thing to notice from Fig. 5.2 is that there is an off set to change the peak to peak
of sine wave from [-1,- 1] to [0, 1].
5.5
Generation of dead time
• To generate dead time, DBCTL of dead band control register needs to be used as shown
in Fig. 5.2.
• Selecting ‘IN MODE’ as all means dead time will be synced with ePWM A.
• ‘DBRED’ and ‘DBFED’ are values for rising edge and falling edge delays respectively.
• ‘POLSEL’ will be set to active high complimentary which means that ePWM B is inverted
and thus both the switches of one leg will be OFF during the dead time.
• Selectinh ‘OUT MODE’ as FULL means dead time will be there at both rising edge and
falling edge.
5.6
Result
See various waveforms of the generated PWM pulses in an oscilloscope.
5.7
Exercise
Generate a conventional space vector PWM using the method shown above.
18
Chapter 6
Configuring external interrupt
6.1
Aim of the exercise
• Changing the time period of an epwm pulse when an external interrupt occurs
• Changing the state of LED when an external interrupt occurs
6.2
Device support files to be included
• Once a project is created, the ”include” folders from both, common and header folders
of device support folder are to be included using include option. This will have all the
necessary header files.
• F2837xS GlobalVariableDefs.c, F2837xS CodeStartBranch.asm,
F2837xS Headers nonBIOS.cmd and F2837xS SysCtrl.c files from source files must be
added as these will be common to all the projects.
• Based on the modules that are being used in the program, the corresponding initialization C-files must be added from the \common\source folder of device support. GPIO
module as well as interrupt module are used in this exercise. Add F2837xS Gpio.c,
F2837xS CpuTimers.c, F2837xS DefaultISR.c, F2837xS PieCtrl.c, F2837xS PieVect.c files
as will be used for interrupt generation.
• Also include ’math.h’ as mathematical functions will be used to generate modulating signals.
6.3
Configuring GPIO99 and XINT1 interrupt module
• The configuration of GPIO99 will be same as in the previous exercises. GPIO99 is configured as output pin as an LED is connected to it.
• Configure the ePWM 8 as explained earlier. This pin will be used to observe the change
in the frequency of the pulses generated as and when an interrupt occurs.
• A switch is connected to GPIO64 which is used to get an interrupt from the user. Its
configuration will also be same as the other GPIO pins.
• Each time the state of switch connected to GPIO64 is changed, an interrput is generated
and the status of GPIO99 is toggled and the value stored in CMPB bit of ePWM 8 is
19
changed so that the frequency of the signal generated on this pin can be changed as
explained earlier.
• XINT1 interrupt will be used here to configure external interrupt. It will take the interrupt
signal from GPIO64.
6.3.1
Enabling the XINT1 interrupt
- Global interrupt mask is to be set using DINT. This disables all the goal interrupts.
DINT;
- All the CPU interrupts are disabled by writing ’0’ to IER.
IER=0;
- All the interrupt flags are cleared.
IFR=0;
- This process of disabling the interrupts is done so that there will not be any overwrite of
the registers due to any interrupt during the process of setting up of the interrupts. This
process is commonly followed before setting up any interrupt.
- To setup XINT1 interrupt, we should know the location of this interrupt. This information
will be available in PieVectorTable( Refer Table 3.2 in page 96 of user manual) l is shown
in Figure 6.1. So, initialize these PIE control registers and PieVctorTable using
InitPieCtrl();
InitPieVectTable();
PIE vector table with pointers to the shell ISRs
- From the Pie Vector Table, it is observed that XINT1 interrupt belongs to Group 1
interrupts- INT1.y and 4th channel of group 1 interrupts contains the default Interrupt
Service Subroutine (ISR) for this XINT1 interrupt. So, INT1.4 represents XINT1 interrupt
operation.
Figure 6.1: PIE Channel Mapping
- So, to enable to XINT1 interrupt (by default all the PIE vectors are disabled and flags
cleared), the corresponding bits of the Pie control registers are to be set.
20
1 Set the ENABLE bit of the Exterbal Interrupt Register. XINT1 external interrupt
work only if this is enabled.
XintRegs.XINT1CR.bit.ENABLE = 1;
2 Enable the XINT1 interrupt.
PieCtrlRegs.PIEIER1.bit.INTx4 = 1;
3 Set the POLARITY bit of External Interrupt Register. It will make the interrupt
positive edge triggered
XintRegs.XINT1CR.bit.POLARITY = 1;
4 Make Input Xbar Register 64 to select GPIO64 as the source of our interrupt signal.
InputXbarRegs.INPUT4SELECT = 64;
3 Once the interrupt is enabled, point this interrupt to the ISR address where the
function which is to be executed when the interrupt is generated is written.
PieVectTable.XINT1 INT = &xint isr;
Please note that all the control registers are EALLOW protected. Hence EALLOW
is to be written before modifying the control registers and EDIS at the end for this
block of code.
- After all the settings of XINT1 are done,the CPU interrupt group 1 has to be enabled
which contains this XINT1.
IER |= M INT1;
- Finally enable the global interrupts and global real time interrupts.
EINT;
ERTM;
- In the Interrupt Service Subroutine function, GPIO99 has to be toggled and the frequency
of ePWM 8 has to be changed. The interrupt is also supposed to be acknowledge by
clearing the XBAR flag and set ACK1 bit of PIEACR.
Figure 6.2: Toggling the state of GPIO99 and changing the frequency of ePWM8
6.4
Result
• Observed the change in frequency of the signal generated at ePWM 8.
• Observe the LED blink.
21
Chapter 7
Use DAC to generate an analog signal
7.1
Aim of the exercise
To learn how to configure a DAC to generate a signal from digital inpiut.
7.2
Device support files to be included
• Once a project is created, the ”include” folders from both, common and header folders
of device support folder are to be included using include option. This will have all the
necessary header files.
• F2837xS GlobalVariableDefs.c, F2837xS CodeStartBranch.asm,
F2837xS Headers nonBIOS.cmd and F2837xS SysCtrl.c files from source files must be
added as these will be common to all the projects.
• Based on the modules that are being used in the program, the corresponding initialization
C-files must be added from the \common\source folder of device support. GPIO module as
well as interrupt module are used in this exercise. Also ADC and ePWM modules are used.
Add F2837xS Gpio.c, F2837xS CpuTimers.c, F2837xS DefaultISR.c, F2837xS PieCtrl.c,
F2837xS PieVect.c, F2837xS EPwm.c, F2837xS Adc.c files as will be used for interrupt
generation.
7.3
Configuring DAC togenerate an analog signal
• An ePWM module has to be configured as explained earlier to generate a digital input to
DAC. –It has to be working as master ePWM and generating synchronization signal—.
• ePwm is configured to give an interrrupt by enableing the ’ETSEL’ i.e., event trigger
selection register which can be done as follows
– Clear ‘ETSEL’ register to remove any previous data.
– ‘INTEN=1’ to enable ePWM interrupt.
– ‘INTSEL=3’ to generate an event at both zero and period points.
– ‘INPRD=1’ to select the frequency of interrupt generation at each period i.e. first
event.
• By setting DACREFSEL bit of DACCTL in DacxRegs to 1, we are selecting the internal
reference of 2.5V for the register. If its 0, then it takes an external reference. For example,
DacaRegs.DACCTL.bit.DACREFSEL = 1;
22
• DACOUTEN allows to write the data to DAC outuput when it is set as 1. For example,
DacaRegs.DACOUTEN.bit.DACOUTEN = 1;
• It is a good practice to clear the values to DAC before writing the new values to it.
DacaRegs.DACVALS.all = 0;
• By loading proper value in SYNCSEL bit of DACCTL in DacxRegs, we can select with
which ePWM will the DAC synchronize. For example, below command will select ePWM6.
DacaRegs.DACCTL.bit.SYNCSEL = 6;
• LOADMODE bit of DACCTL in DacxRegs determines when to update the DAC values.
0 on this bit will update the values on the next system clock and 1 will update the value
on next PWM signal. For example, below command will update the content of DACA at
every system clock.
DacaRegs.DACCTL.bit.LOADMODE = 0;
• Now, any data can be loaded to DAC after it is being configured.
DacaRegs.DACVALS.all = < data >;
7.4
Conclusion
A clear and brief method of using DAC was explained in this experiment. A signal generated
digitally was viewed on an oscilloscope using a DAC.
23
Chapter 8
Use ADC to sense external signal
8.1
Aim of the exercise
• To learn how to configure an ADC to sense a signal.
• To use the sensed signal to vary frequency of sine triangle PWM pulses.
8.2
Device support files to be included
• Once a project is created, the ”include” folders from both, common and header folders
of device support folder are to be included using include option. This will have all the
necessary header files.
• F2837xS GlobalVariableDefs.c, F2837xS CodeStartBranch.asm,
F2837xS Headers nonBIOS.cmd and F2837xS SysCtrl.c files from source files must be
added as these will be common to all the projects.
• Based on the modules that are being used in the program, the corresponding initialization
C-files must be added from the \common\source folder of device support. GPIO module as
well as interrupt module are used in this exercise. Also ADC and ePWM modules are used.
Add F2837xS Gpio.c, F2837xS CpuTimers.c, F2837xS DefaultISR.c, F2837xS PieCtrl.c,
F2837xS PieVect.c, F2837xS EPwm.c, F2837xS Adc.c files as will be used for interrupt
generation.
8.3
Configuring ADC to sense an external signal
• There are 2 types of ADC available in the board: single ended 12 bit and differential 16
bit. For this experiment, single channel ADC is used.
• Following things need to be specified while configuring an ADC:
– Channel select
– Start of conversion (SOC)
– Action qualifier
• ADC channel is selected based on the priority of the corresponding interrupt. This can
be found from the PIE channel mapping given in the technical reference manual. Having
a lower number means higher priority (See Fig. 8.1). This ADC A1 has a higher priority
than ADC B1.
24
Figure 8.1: PIE Channel Mapping
Figure 8.2: Configuring ADC B
• SOC of an ADC can be synchronised with many signals available internally and externally.
For example, SOC can be triggered with an ePWM pulse, or at end of ADC conversion.
In this exercise, ePWM8 will be used as SOC trigger.
• Channel 0 of ADC B (ADCINB0) will be used in the experiment to sense voltage across a
potentiometer connected to the ‘J2’ connector of the control card.
• Following things need to be configured for taking data from an ADC (as shown in Fig.
8.2):
– Use ADC control register 2 (ADCCTL2) to select SIGNALMODE, which is ‘0’ for
single ended.
– Use the same register to select ‘RESOLUTION=0’ for 12 bit.
– There are a lot of options for selecting the trigger for start of conversion (SOC) for an
ADC, as already mentioned. To accomodate so many options, there are 16 different
register each containing 29 to 32 options. For this experiment, we’ll use the clock of
ePWM 8 as trigger source. Hence ‘TRIGSEL’ of ‘ADCSOC0CTL’ register is set as
13 h.
– We are using channel ‘0’ of ADC B and hence ‘CHSEL’ is set 0. Refer to the technical
reference manual for details about the registers used here.
25
– How much time you want to give for sampling is decided by the acquisition prescaler
(‘ACQPS’) bit. If ACQPS=9; it means the ADC is given 10× system clock cycle.
– ADC clock frequency is selected from ‘PRESCALE’ bit of ‘ADCCTL2’ register.
– ‘ADCPWDNZ=1’ means ADC B powered up.
– Selecting ‘INTPULSEPOS’ as ‘1’ will position the interrupt generation at the end
of conversion. This interrupt is the cue for the main program to the corresponding
interrupt subroutine.
8.4
Observation
• Connect a potentiometer to the ‘J2’ connector on the board (Fig. 10.1). Varying the pot
will change the voltage appearing across pin 2 and 3 of the ‘J2’ connector. The ADC
output should also change because of this.
Figure 8.3: PIN diagram for ’J2’
• To see the ADC B output, put the register ‘AdcbResultRegs.ADCRESULT0’ in the expression window of CCS. Now, turnin the pot will change the hexadecimal data in ‘AdcbResultRegs.ADCRESULT0’ register. Note that the maximum value for the 12 bit ADC
is 4096 h.
• Now, to change the frequency of the ePWM 8 output using the potentiometer, simplyuse
the ADC B result register to update the modulation signal for the ePWM. The following
line is an example.
del theta = (3.14*AdcbResultRegs.ADCRESULT0*0.2)/SW Freq;
• Using a DAC, the modulating signal can be seen in an oscilloscope and the change the
frequency can be observed. Don’t forget to scale up the modulating signal to see it in
clearly using DAC. See the code below:
DacbRegs.DACVALS.bit.DACVALS = (1 + m A)*2040;
Refer to the experiment on three phase PWM for more details.
8.5
Conclusion
A clear and brief method of using ADC is explained in this chapter. Even though the configuration can be diffrent for diffrent applications, the basic concepts remain the same.
8.6
Exercise
Generate a variable voltage variable frequency (v/f) signal from the lessons learned above.
26
Chapter 9
Implementation of a Low Pass Filter
9.1
Aim of the exercise
• To Implement a digital low pass filter
9.2
Transfer Function of a Low-Pass Filter
• Let the input to the Low Pass filter(LPF) be X(t) and output of the LPF be Y(t).
• Cut off frequency for the LPF be ωc
Y (s)
• The Transfer function of the LPF filter would be: X(s)
= (1+1 s )
ωc
ωc .Ts
• Discrete output function for the LPF will be Y [k] = 1+ω1c .Ts Y [k − 1] + 1+ω
X[k] ,where
c .Ts
Ts is the Sampling time
9.3
Implementation in DSP
• Generate a variable frequency sinusoidal waveform X(t) as explained in the previous chapter.
• Generate the output signal of LPF from the above transfer function. Declare and initialize
the variables required.
Figure 9.1: Implementation of Low Pass Filter
• Configure the DAC register so as to view the input and output signal on the DAC pin on
the microprocessor
9.4
Result
Observe the Input and output of LPF in a oscilloscope for different frequency by varying the
POT. Also note phase difference generated between the input an output.
27
Chapter 10
Implementation of a High Pass Filter
10.1
Aim of the exercise
• To Implement a digital high pass filter
10.2
Transfer Function of a Low-Pass Filter
• Let the input to the High Pass filter(HPF) be X(t) and output of the LPF be Z(t).
• Cut off frequency for the HPF be ωc
• The discrete output function of the HPF filter would be: Z(s) = (1+1ωc )
s
• Discrete transfer function for the HPF will be Z[k] = 1+ω1c .Ts .(X[k] − X[k − 1] + Z[k − 1])
,where Ts is the Sampling time
10.3
Implementation in DSP
• Generate a variable frequency sinusoidal waveform X(t) as explained in the previous chapter.
• Generate the output signal of HPF from the above transfer function. Declare and initialize
the variables required.
Figure 10.1: Implementation of High Pass Filter
• Configure the DAC register so as to view the input and output signal on the DAC pin on
the microprocessor
10.4
Result
Observe the Input and output of HPF in a oscilloscope for different frequency by varying the
POT. Also note phase difference generated between the input an output.
28