1.5 How can multiple interrupts be serviced by setting priorities?
1.6 What characteristics are observed while going up the memory hierarchy?
1.7 What are the trade-offs that determine the size of the cache memory?
1.5
Multiple interrupts can be handled by giving each interrupt a priority level. If two or more interrupts
happen at the same time, the processor first services the one with the highest priority. While a
higher-priority interrupt is being processed, lower-priority ones must wait. After the higher-priority
interrupt is finished, the processor returns to handle the others in order. This method makes sure
that more important tasks are done first.
1.6
As we move up the memory hierarchy (from secondary storage to cache and registers), memory
becomes faster, smaller in size, and more expensive per bit. At the same time, the frequency of
access increases because the processor uses the upper levels more often. In contrast, lower levels
are larger, cheaper, and slower, used mainly for storing data that is not needed immediately.
1.7
The size of the cache memory depends on a balance between cost, speed, and performance. A larger
cache can store more data and increase the chance of finding needed information quickly, but it is
more expensive and slower. A smaller cache is cheaper and faster but may cause more delays if the
data is not found there. The goal is to choose a size that gives good performance at a reasonable
cost.