Arithmetic Circuits
EN1803 Basic Electronics for Engineering Applications
Samiru Gayan
Department of Electronic and Telecommunication Engineering
University of Moratuwa
Semester 3, 2022
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You will learn
This module provides an introduction to the basic arithmetic circuits such as half adder, full
adder and multipliers.
Learning Objectives
• Explain the number representation in digital circuits.
• Design simple arithmetic logic circuits.
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Half Adder
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Half Adder
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Addition of Multibit Numbers
• A more interesting case is when larger numbers that have multiple bits are involved.
• Then it is still necessary to add each pair of bits, but for each bit position i, the addition
operation may include a carry-in from bit position i − 1.
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Full Adder
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Full Adder
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Decomposed Full Adder
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Ripple Carry Adder
Figure: An n-bit ripple-carry adder.
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Example
• Suppose that we need a circuit that multiplies an eight-bit unsigned number by 3. Let
A = a7 a6 · · · a1 a0 denote the number and P = p9 p8 · · · p1 p0 denote the product P = 3A.
Note that 10 bits are needed to represent the product.
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Design Approach 1
• A simple approach to design the required circuit is to use two ripple-carry adders to add
three copies of the number A.
Figure: Naive approach.
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Design Approach 2
• Because 3A = 2A + A, we can observe that 2A can be generated by shifting the bits of A
one bit-position to the left, which gives the bit pattern a7 a6 a5 a4 a3 a2 a1 a0 0.
Figure: Efficient design.
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Number Representation
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Signed and Unsigned Numbers
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Negative Numbers
• Positive numbers are represented using the positional number representation as explained
in the previous section.
• Negative numbers can be represented in three different ways:
• sign-and-magnitude
• 1’s complement
• 2’s complement
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Sign-and-Magnitude Representation
• The sign symbol distinguishes a number as being positive or negative.
• The sign bit is 0 or 1 for positive or negative numbers, respectively.
• For example, if we use four-bit numbers, then +5 = 0101 and -5 = 1101.
• Because of its similarity to decimal sign-and-magnitude numbers, this representation is
easy to understand.
• However, this representation is not well suited for use in computers.
• More suitable representations are based on complementary systems.
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1’s Complement Representation
• In the 1’s complement scheme, an n-bit negative number K is obtained by subtracting its
equivalent positive number P from 2n − 1.
K = (2n − 1) − P
• For example, if n = 4
K = 24 − 1 − P = (15)10 − P = (1111)2 − P
• If we convert +5 to a negative, we get 1111 − 0101 = 1010.
• If we convert +3 to a negative, we get 1111 − 0011 = 1100.
• The 1’s complement can be obtained simply by complementing each bit of the number,
including the sign bit.
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2’s Complement Representation
• In the 2’s complement scheme, a negative number K is obtained by subtracting its
equivalent positive number P from 2n ;
K = 2n − P
• For example, -5 = 10000 - 0101 = 1011
• For example, -3 = 10000 - 0011 = 1101
• A simpler way of finding a 2’s complement of a number is to add 1 to its 1’s complement
because finding a 1’s complement is trivial.
• This is how 2’s complement numbers are obtained in logic circuits that perform
arithmetic operations.
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Interpretation of Four-Bit Signed Integers
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1’s Complement Addition
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2’s Complement Addition
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2’s Complement Subtraction
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Adder and Subtractor Unit
• The only difference between performing addition and subtraction is that for subtraction it
is necessary to use the 2’s complement of one operand.
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Arithmetic Overflow
• The result of addition or subtraction is supposed to fit within the significant bits used to
represent the numbers.
• If n bits are used to represent signed numbers, then the result must be in the range
−2n−1 to 2n−1 − 1.
• If the result does not fit in this range, then we say that arithmetic overflow has occurred.
• To ensure the correct operation of an arithmetic circuit, it is important to be able to
detect the occurrence of overflow.
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Arithmetic Overflow
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Arithmetic Overflow
• The key to determining whether overflow occurs is the carry-out from the MSB position,
called c3 , and from the sign-bit position, called c4 .
• An overflow occurs when these carry-outs have different values, and a correct sum is
produced when they have the same value.
• Indeed, this is true in general for both addition and subtraction of 2’s-complement
numbers.
Overflow = c3 c̄4 + c̄3 c4 = c3 ⊕ c4
• For n-bit numbers we have
Overflow = cn−1 ⊕ cn
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Carry-Lookahead Adder
• Study on this by yourself.
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Multipliers
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Multiplication
• A binary number B = bn−1 bn−2 · · · b1 b0 multiplied by 2
B × 2 = bn−1 bn−2 · · · b1 b0 0 (B is shifted left by one bit position.)
• Similarly, a number is multiplied by 2k by shifting it left by k bit positions. This is true
for both unsigned and signed numbers.
• A binary number B = bn−1 bn−2 · · · b1 b0 divided by 2
• if B is an unsigned number, B ÷ 2 = 0bn−1 bn−2 · · · b1
• if B is a signed number, B ÷ 2 = bn−1 bn−2 · · · b1
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Array Multiplier for Unsigned Numbers
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A 4 × 4 Multiplier Circuit
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References
• Fundamentals of Digital Logic, Third Edition, Stephen Brown and Zvonko Vranesic.
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The End
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