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Frequency Domain Interpretation of Basic Control Structures X

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TYPICAL CONTROL STRUCTURES IN OUR STUDY
1.
2.
3.
4.
5.
6.
7.
Proportional Control P
Proportional-Integral Control PI
Proportional-Derivative Control PD
Proportional-Integral-Derivative Control PID
Phase Lag Control (Lag control)
Phase Lead Control (Lead Control)
Lead-Lag Control
Proportional Control
15
Consider the system shown in Figure 1, where 𝐺(𝑠) = (𝑠+2)(𝑠2 +2𝑠+5)
R
𝐺(𝑠)
Y
𝐺𝑐 (𝑠) = 𝐾
R
Figure 1.a Uncontrolled
G(s)
Y
Figure 1.b P-controlled system
The Bode plot of the uncontrolled system is shown in Figure 2. Figure 3 shows the Bode plot when
8
proportional controller 𝐺𝐢 (𝑠) = 10 is used. In Figure 4, 𝐺𝐢 (𝑠) = 15.
Bode Diagram
Gm = 4.78 dB (at 3 rad/sec) , Pm = 31.8 deg (at 2.38 rad/sec)
20
Magnitude (dB)
0
-20
-40
-60
-80
Phase (deg)
-100
0
-90
-180
-270
-2
10
-1
10
0
10
1
10
Frequency (rad/sec)
Figure 2: Bode plot of uncontrolled system
2
10
Bode Diagram
Gm = 10.2 dB (at 3 rad/sec) , Pm = Inf
Bode Diagram
Gm = -15.2 dB (at 3 rad/sec) , Pm = -45.3 deg (at 5.37 rad/sec)
0
40
-20
Magnitude (dB)
Magnitude (dB)
20
0
-20
-40
-40
-60
-80
-100
-60
-120
0
Phase (deg)
Phase (deg)
-80
0
-90
-180
-90
-180
-270
-270
-2
-1
10
0
10
1
10
-2
2
10
10
10
-1
10
0
10
1
10
2
10
Frequency (rad/sec)
Frequency (rad/sec)
Figure 3: Proportional control 𝐺𝐢 (𝑠) = 10
Figure 4: Proportional control 𝐺𝐢 (𝑠) =
8
15
SUMMARY:
Figures 3 and 4 show that the use of proportional control affects both the gain margin and the phase
margin, and thus affecting both the steady-state behaviour of the system through the error constant,
and the dynamic performance through the phase margin. It is thus not easy to achieve separate
control objectives using proportional control. Therefore, the main use of proportional control in the
frequency domain is in the adjustment of the overall system gain for the purpose of achieving a desired
steady state error performance. Targeted use of proportional control in single objective design such
as in the improvement of the gain margin, or the improvement of the phase margin or in the use of
proportional control to meet a specific resonant peak requirement may also be carried out.
Example : Select the proportional gain K for the system 𝐺(𝑠) =
𝐾(𝑠+2)
𝑠(𝑠+10)(𝑠+12)
to yield a steady state
error of 0.04.
Solution:
𝐾(𝑠+2)
2𝐾
𝐾
Recall, 𝐾𝑣 = lim(𝑠)𝑠 𝑠(𝑠+10)(𝑠+12) = 120 = 60
𝑠→0
1
Now, 𝑒𝑣 = 𝐾 = 0.04 =
𝑣
60
𝐾
60
. Hence, 𝐾 = 0.04 = 1500.0
With proportional control added, the system transfer function becomes
1500(𝑠+2)
𝑠(𝑠+10)(𝑠+12)
𝐾(𝑠+2)
Practice: Evaluate the proportional gain required for the system 𝐺(𝑠) = 𝑠2 (𝑠+10)(𝑠+15) to have a
steady-state error of 0.08.
PD Control in the Frequency Domain
𝐾
For the PD controller 𝐺𝐢 (𝑠) = 𝐾𝑃 + 𝐾𝑑 𝑠 = 𝐾𝑃 (1 + 𝐾𝐷 𝑠)
𝑃
𝐾
In the frequency domain 𝐺𝐢 (π‘—πœ”) = 𝐾𝑃 + 𝐾𝑑 𝑠 = 𝐾𝑃 (1 + 𝐾𝐷 π‘—πœ”)
𝑃
2
𝐾
𝐾
Hence, |𝐺𝐢 (π‘—πœ”)| = 𝐾𝑃 √1 + (𝐾𝐷 πœ”) ; πœ‘(π‘—πœ”) = π‘‘π‘Žπ‘›−1 {𝐾𝐷 πœ”}
𝑃
𝑃
As explained in the proportional controller design, the value of KP would probably be determined
from the steady-state error performance requirements. So, it is normal to set KP=1 when making the
Bode plot. Figure 5 shows the Bode plot of the transfer function of the PD Controller.
2
𝐾𝐷
πœ”)
𝐾𝑃
With KP set at unity, |𝐺𝐢 (π‘—πœ”)| = 𝐾𝑃 √1 + (
𝐾
= 0 𝑑𝐡 π‘Žπ‘›π‘‘ πœ‘(π‘—πœ”) = 0; π‘€β„Žπ‘’π‘› πœ” = 0 . When
2
𝐾
𝐾
πœ” = 𝐾𝑃 , |𝐺𝐢 (π‘—πœ”)| = 𝐾𝑃 √1 + (𝐾𝐷 πœ”) = √2 𝑑𝐡 π‘Žπ‘›π‘‘ πœ‘(π‘—πœ”) = 450 . πœ” = 𝐾𝑃 is called the critical
𝐷
𝑃
𝐷
frequency of the PD controller.
2
𝐾
As πœ” → ∞ , 𝐾𝑃 √1 + (𝐾𝐷 πœ”) → ∞ . Also, π‘Žπ‘›π‘‘ πœ‘(π‘—πœ”) → 900.
𝑃
Hence, the PD controller always contribute a positive phase angle to the phase margin of the
controlled system.
Figure 5. The Bode plot of a PD controller with KP=1
From the Bode plot, the PD controller is a high pass filer, with a resultant positive phase. The
positive phase can be used to improve the phase margin of the given system. The positive
magnitude can also be used to improve system bandwidth.
The frequency based design approach with the PD controller is to set the corner frequency of the
𝐾
controller at πœ” = 𝐾𝑃 such that an effective improvement in the phase margin is realised at the new
𝐷
gain cross-over frequency. Some trial and error is required.
The use of the PD controller:
1.
2.
3.
4.
5.
6.
Improves damping, reducing the maximum overshoot.
Reduces the rise time and the settling time
Increases the bandwidth
Improve The Gain margin, Phase margin and the Resonant peak.
Worsens the problems of high frequency noise.
May require a large capacitor for the implementation of the controller.
PI Control in the Frequency Domain
For the PI controller 𝐺𝐢 (𝑠) =
𝐾
𝐾𝑃 + 𝑠𝐼
=
𝐾𝐼 +𝐾𝑃 𝑠
𝑠
𝐾
1+ 𝐾𝑃 𝑠
= 𝐾𝐼 (
𝐼
𝑠
)
𝐾
1+ 𝐾𝑃 π‘—πœ”
In the frequency domain 𝐺𝐢 (π‘—πœ”) = 𝐾𝐼 (
2
πœ”πΎπ‘ƒ
)
𝐾𝐼
𝐾𝐼 √1+(
Hence, |𝐺𝐢 (π‘—πœ”)| =
πœ”
𝐼
π‘—πœ”
)
𝐾𝑃 πœ”
}−
𝐾𝐼
; πœ‘(π‘—πœ”) = π‘‘π‘Žπ‘›−1 {
900
Note: as πœ” → 0, |𝐺𝐢 (π‘—πœ”)| → ∞. This infinite DC gain ensures that the PI controller will eliminate all
steady state error. Moreover, because of this infinite magnitude at the DC or zero frequency value,
the proportional gain does not need to be adjusted to a very high value in meeting the steady-state
𝐾
error requirement of the given system. As πœ” → ∞, 20π‘™π‘œπ‘” |𝐺𝐢 (π‘—πœ”)| → 20 log10 𝐾 𝐼 and πœ‘(π‘—πœ”) → 0 .
𝑃
A Bode plot of the PI controller is shown in Figure 6.
Figure 6: Bode plot of PI control.
Phase Lead Control
𝑠+π‘Ž
The lead compensator has the transfer function 𝐺𝐢 (𝑠) = 𝑠+𝑏 ; 𝑏 > π‘Ž
In the frequency domain, 𝐺𝐢 (π‘—πœ”) =
π‘Ž+π‘—πœ”
.
𝑏+π‘—πœ”
The frequency response yields:
a magnitude response |𝐺𝐢 (π‘—πœ”)| =
(i)
10log(𝑏 2 + πœ”2 ).
|𝐺𝐢 (π‘—πœ”)| =
√π‘Ž 2
√𝑏2
√π‘Ž 2 +πœ”2
√𝑏 2 +πœ”2
or 20 log10|𝐺𝐢 (π‘—πœ”)| = 10 log(π‘Ž2 + πœ”2 ) −
When πœ” = 0, the DC gain of the compensator is obtained to be
=
π‘Ž
𝑏
< 1 a DC attenuation; equivalently, the lead control network
introduces a negative dB gain in the frequency ranges πœ” ≈ 0 . Hence, the lead controller
reduces the DC gain of the system, and worsens the steady-state error of the system.
(ii)
The phase-frequency response of the lead controller is obtained to be
πœ”
πœ”
πœ‘(π‘—πœ”) = π‘‘π‘Žπ‘›−1 { π‘Ž } − π‘‘π‘Žπ‘›−1 { 𝑏 }. When πœ” = 0, πœ‘(π‘—πœ”) = 0. The value of the phase angle
of the lead controller increases until it reaches a maximum value of πœ‘π‘šπ‘Žπ‘₯ at a frequency
When πœ”π‘šπ‘Žπ‘₯ . After the frequency πœ”π‘šπ‘Žπ‘₯ , the phase angle of the lead controller begins to
reduce, and as lim πœ‘(π‘—πœ”) = 0. However, because the operating frequency of the
πœ”→∞
controller never reaches infinity, a non-zero phase angle value subsists at the high
frequency values.
Bode Diagram
0
Bode Diagram
Magnitude (dB)
Magnitude (dB)
0
-2
-4
-0.5
-1
-1.5
-6
-2
8
-8
20
Phase (deg)
6
Phase (deg)
15
10
4
2
5
0
0
-1
0
10
1
10
2
10
10
0
1
10
2
10
10
Frequency (rad/sec)
Frequency (rad/sec)
Figure 7: The Bode plot of two generic lead controllers
(iii)
To compensate for the DC attenuation of the lead controller on the steady-state error, a
factor
1
𝛽
=
𝑏
π‘Ž
> 1 is added to the controller gain. For the lead compensators shown in
Figure 7, the gain-adjusted equivalent frequency responses are shown in Figure 8. For the
gain adjusted lead controller, the magnitude of the frequency response at πœ”π‘šπ‘Žπ‘₯ is known
to be |𝐺𝐢 (π‘—πœ”π‘šπ‘Žπ‘₯ )| =
1
√𝛽
, which may be expressed in dB. The idealisation of the design
parameters of the lead controller is shown in Figure 9. The transfer function of lead
1
controller with the DC gain adjustment is given by 𝐺𝐢 (π‘—πœ”) =
1 𝑠+𝑇
𝛽 𝑠+ 1
𝛽𝑇
.
Bode Diagram
8
2
4
1.5
Magnitude (dB)
Magnitude (dB)
Bode Diagram
6
2
1
0.5
0
20
0
8
6
Phase (deg)
Phase (deg)
15
10
5
4
2
0
-1
10
0
1
10
10
0
2
0
10
1
10
10
Frequency (rad/sec)
2
10
Frequency (rad/sec)
Figure 8: The Bode plot of two lead controllers with DC gain adjustments.
1
√𝛽
1
𝑇
1
𝛽𝑇
1
𝑇
1
𝛽𝑇
Figure 9: Idealisation of the design parameters of the lead controller
Supposed that a given system has a phase margin value of πœ‘π‘€ , and the design objective is to improve
the phase margin to a higher value πœ‘π‘‘ using a lead controller. Then, for the implementation of the
lead controller for the given phase margin requirement, let the additional phase angle required to be
provided by the controller be πœ‘ ( determined by subtracting the existing phase margin of the given
system from πœ‘π‘€ from the desired (or given) phase margin πœ‘π‘‘ ). Then, πœ‘ = πœ‘π‘‘ − πœ‘π‘€ . Usually, a
random number 50 < πœ€ < 120 is the added to the πœ‘ to determine the maximum phase angle
πœ‘π‘šπ‘Žπ‘₯ = πœ‘π‘‘ − πœ‘π‘€ + πœ€ that the lead controller may provide. The rest of the design steps for the lead
controller are as follows:
1−π‘ π‘–π‘›πœ‘
1. Determine the value of 𝛽 using : 𝛽 = 1+π‘ π‘–π‘›πœ‘π‘šπ‘Žπ‘₯
π‘šπ‘Žπ‘₯
2. Evaluate the dB gain of the controller at the πœ”π‘š using |𝐺𝐢 (π‘—πœ”π‘šπ‘Žπ‘₯ )| = 20 log10
1
√𝛽
3. Find on the magnitude plot of the given system where the gain of the given system is
−20 log10
1
√𝛽
. Then record the frequency where such negative gain is obtained. That
particular value of frequency is πœ”π‘šπ‘Žπ‘₯
4. Evaluate 𝑇 =
1
πœ”π‘šπ‘Žπ‘₯ √𝛽
5. With the values of 𝛽 and T determined, the transfer function of the lead controller is then
1
1 𝑠+𝑇
1
𝑠+
written to be 𝐺𝐢 (π‘—πœ”) = 𝛽
.
𝛽𝑇
1
NOTE: moving − 𝛽𝑇 further from the origin and from the zero of the lead controller should reduce
1
the maximum overshoot. However, if the value of T is so small, making − 𝛽𝑇 very large, then, the
rise time and settling time will increase instead. Setting −
1
𝑇
towards the origin improves the rise
time and the settling time. On the other hand, the maximum overshoot begins to increase once
−
1
𝑇
is too close the origin.
In summary, the lead controller may increase damping, improve the rise time and the settling time.
Phase lead control does not affect the steady state performance. Also, where the phase margin
improvement required is very large, it might be better to use two lead control networks instead of
one.
Phase Lag Control in the Frequency Domain
𝑠+π‘Ž
The leg compensator has the transfer function 𝐺𝐢 (𝑠) = 𝑠+𝑏 ; π‘Ž > 𝑏
π‘Ž+π‘—πœ”
In the frequency domain, 𝐺𝐢 (π‘—πœ”) = 𝑏+π‘—πœ”. The frequency response yields:
(i)
A magnitude response
|𝐺𝐢 (π‘—πœ”)| =
√π‘Ž 2 +πœ”2
√𝑏2 +πœ”2
(π‘Ž 2 +πœ”2 )
or 20 log10|𝐺𝐢 (π‘—πœ”)| = 10 log (𝑏2 +πœ”2 ) .
When πœ” = 0, the DC gain of the compensator is obtained to be |𝐺𝐢 (π‘—πœ”)| =
√π‘Ž 2
√𝑏2
π‘Ž
=𝑏>1
a DC amplification; equivalently, the lag control network introduces a positive dB gain in
the frequency ranges πœ” ≈ 0 .
(ii)
The phase-frequency response of the lag controller is obtained to be
πœ”
πœ”
πœ‘(π‘—πœ”) = π‘‘π‘Žπ‘›−1 { π‘Ž } − π‘‘π‘Žπ‘›−1 { 𝑏 }.
When
πœ” = 0, πœ‘(π‘—πœ”) = 0.
For
0<
πœ”, πœ‘(π‘—πœ”) becomes more negative. When πœ” → ∞, πœ‘(π‘—πœ”) → 0 . Hence, the value of the
phase angle of the lag controller decreases from zero, reaches a minimum in the midfrequencies, and then increasing towards zero at high frequencies, as shown in Figure 10.
(iii)
To eliminate the for DC gain introduced by the lag controller, on the steady-state error,
π‘Ž
a factor 𝛼 = 𝑏 > 1 is usually added to the controller gain. Typical frequency
characteristics of two DC-gain adjusted lag controllers are shown in Figure 11. The
1
1 𝑠+𝑇
1
𝑠+
transfer function of a gain-adjusted lag controller is given by 𝐺𝑐 (𝑠) = 𝛼
.
𝛼𝑇
In the gain-adjusted lag controller, controller magnitude reaches a final negative dB
magnitude. The phase angle turns to zero, and is usually restricted in the range −120 <
πœ€ < −50 . In the lag controller design, a random angular value in the range of
50 < πœ€ < 120 is added the desired phase margin value.
Bode Diagram
Bode Diagram
1
8
Magnitude (dB)
Magnitude (dB)
0.8
6
4
2
0.4
0.2
0
-1
0
0
-1.5
Phase (deg)
-5
Phase (deg)
0.6
-10
-15
-2
-2.5
-3
-3.5
-20
-1
10
0
1
10
0
2
10
1
10
10
10
Frequency (rad/sec)
Frequency (rad/sec)
Figure 10: Characteristics of two basic lag controllers.
Bode Diagram
0
Bode Diagram
-0.2
Magnitude (dB)
Magnitude (dB)
0
-2
-4
-6
-8
0
-0.6
-0.8
-1
-5
-1.5
Phase (deg)
Phase (deg)
-0.4
-10
-15
-2
-2.5
-3
-20
-1
10
0
1
10
10
Frequency (rad/sec)
2
10
-3.5
0
1
10
10
Frequency (rad/sec)
Figure 11. Characteristics of lag controllers with DC gain adjustment.
Consequently, the phase contribution of the lag controller in compensation is not significant. The
negative dB magnitude of the controller is the main factor used in compensating system dynamics.
To better understand the lag controller design process, the frequency characteristics of the
1
1
controller are idealised as shown in Figure 12, showing the frequencies 𝑇 and 𝛼𝑇 , and the negative
gain. This controller can be used to improve the phase margin (transient characteristics) of a given
system, without modifying the existing steady state behaviour.
Figure 12: Idealisation of lag frequency characteristics in system compensation.
To design a lag controller to meet a given transient performance:
1. Evaluate the value of the system gain required to achieve the desired steady-state.
2. Convert the given performance specification into an equivalent phase margin πœ‘π‘€ value based on
the second-order system approximation. Then add a random angle value in the range 50 < πœ€ < 120
to cancel the small lagging phase of controller. The resultant phase margin to compensate with the
lag controller is πœ‘π‘šπ‘Žπ‘₯ = πœ‘π‘€ + πœ€.
3. Make the Bode plot or Nichols plot of the uncompensated given system with the steady-state error
constant as determined in step (1).
4. Check on the phase characteristics of the uncompensated system, and determine the frequency
where the uncompensated system has an actual phase angle of πœ‘(π‘—πœ”) = −1800 + πœ‘π‘šπ‘Žπ‘₯ . Record
the frequency πœ”π‘šπ‘Žπ‘₯ corresponding this the calculated phase angle value πœ‘(π‘—πœ”) .
5. At the corresponding frequency value of πœ”π‘šπ‘Žπ‘₯ , record the value of the gain of the uncompensated
system |𝐺(π‘—πœ”π‘šπ‘Žπ‘₯ | . It is usually easier to work with the dB gain 𝑀(𝑑𝐡) = 20 log10|𝐺(π‘—πœ”π‘šπ‘Žπ‘₯ | .
6. The lag controller must introduce −20 log10|𝐺(π‘—πœ”π‘šπ‘Žπ‘₯ | = −𝑀 𝑑𝐡 at the frequency π‘šπ‘Žπ‘₯ to make
the resultant magnitude on the frequency plot of the uncontrolled system to become zero.
7. The pole of the lag controller is then located at
1
𝛼𝑇
=
πœ”π‘šπ‘Žπ‘₯
10
.
1
of the lag controller, a line of −20𝑑𝐡/π·π‘’π‘π‘Žπ‘‘π‘’ is drawn from −𝑀 𝑑𝐡 ,
𝑇
1
starting from the pole 𝛼𝑇 until the line reaches the zero dB level. The frequency point where this line
1
touches the 0dB line is the value of 𝑇 .
8. To locate the zero
9. Mathematically,
𝑀
Alternatively, log
10 𝛼
1
𝑇
is evaluated using the slope value of -20dB. Hence,
𝑀
= −20 → log10 𝛼 = − 20 ; → 𝛼 = 10−𝑀⁄20
0−(𝑀)
1
𝑇
log10 −log10
1
π‘Žπ‘‡
= −20
. Hence, all the parameters of the
lag controller are determined.
The lag control: Improves relative stability, decreases the bandwidth, increases both the settling time
and the rise time, and worsens the sensitivity performance of the given system.
The Lead-Lag Control
The lag controller always reduces the bandwidth of the controlled system. So, to meet very stringent
transient performance requirements, sometimes it is necessary to combine lead and lag controllers
for the control of the given system. In general, the phase lead controller improves the bandwidth and
yields a shorter rise time; the phase lag controller is then used to improve the damping: that is, a part
of the design objective is achieved by the lead controller, and the remaining of the objective is then
achieved using lag control.
1
1 𝑠+𝑇1
The basic transfer function of the lead-lag controller would be given by 𝐺𝐢 (π‘—πœ”) = 𝛽
𝑠+
1
𝛽𝑇1
π‘₯
1
𝑇2
1
𝑠+
𝛼𝑇2
𝑠+
Such a lead-lad controller has four separate parameters (𝛼, 𝛽, 𝑇1 , 𝑇2 ) to design for, creating a
significant difficulty in the controller design procedure. Simplified structures of the lead-lag controller
are often preferred. Note that lead-lag controller effectively consists of two second-order transfer
𝑠2 +𝑏 𝑠+𝑏
function, one in the numerator, and the second in the denominator 𝐺𝑐 (𝑠) = 𝐾 𝑠2 +π‘Ž1 𝑠+π‘Ž2 .
1
2
One form of the simplified lead-lag controller is given by:
𝐺𝐢 (𝑠) = πΊπΏπ‘’π‘Žπ‘‘ (𝑠)πΊπ‘™π‘Žπ‘” (𝑠) =
1
𝑇1
𝛾
𝑠+
𝑇1
𝑠+
.
1
𝑇2
1
𝑠+
𝛾𝑇2
𝑠+
; 𝛾 > 1 and has only three parameters to determine.
Lead-Lag Controller design by Pole-Cancellation:
The transfer functions of most systems contain one or more complex poles. The dynamic performance
problems of transfer functions could always be traced to the poor location of some of these complex
poles in the s-plane. For a given control system 𝐺(𝑠) with a pair of poorly-located poles , when
𝑠2 +𝑏 𝑠+𝑏
subjected to lead-lag control, the resultant transfer function becomes 𝐾𝐺(𝑠)π‘₯ 𝑠2 +π‘Ž1 𝑠+π‘Ž2 . An
appropriate choice of the numerator polynomial 𝑠 2 + 𝑏1 𝑠 + 𝑏2 , it is possible to
1
2
cancel the
problematic poles of G(s), and then replace the cancelled poles them with the poles of the lead-lag
controller, where these new poles are chosen to guarantee the desired performance improvement.
Much more, if we set 𝐾1 = 1, π‘Ž2 = 𝑏2 = πœ”π‘›2 , the transfer function of the lead-lag controller becomes
𝐺𝑐 (𝑠) =
𝑠 2 + 𝑏1 𝑠 + πœ”π‘›2 𝑠 2 + 2πœ‰π‘ πœ”π‘› 𝑠 + πœ”π‘›2
=
𝑠 2 + π‘Ž1 𝑠 + πœ”π‘›2 𝑠 2 + 2πœ‰π‘Ž πœ”π‘› 𝑠 + πœ”π‘›2
Then,
𝐺𝑐 (π‘—πœ”) =
πœ”π‘›2 − πœ”2 + 𝑗2πœ‰π‘ πœ”π‘› πœ”
πœ”π‘›2 − πœ” 2 + 𝑗2πœ‰π‘Ž πœ”π‘› πœ”
Yielding
|𝐺𝑐 (π‘—πœ”)| =
2πœ‰ πœ” πœ”
√(πœ”π‘›2 − πœ” 2 )2 + 4πœ‰π‘2 πœ”π‘›2 πœ” 2
√(πœ”π‘›2 − πœ” 2 )2 + 4πœ‰π‘Ž2 πœ”π‘›2 πœ” 2
2πœ‰ πœ” πœ”
𝑛
And πœ‘(π‘—πœ”) = π‘‘π‘Žπ‘›−1 { πœ”2𝑏−πœ”π‘› 2 } − π‘‘π‘Žπ‘›−1 { πœ”2π‘Ž−πœ”
2}
𝑛
𝑛
And it can be shown that: |𝐺𝑐 (πœ” = 0)| = 1; |𝐺𝑐 (πœ” = πœ”π‘› )| =
πœ‰π‘
;
πœ‰π‘Ž
|𝐺𝑐 (πœ” → ∞)| = 1
πœ‘(πœ” = 0) = 00 ; πœ‘(πœ” = πœ”π‘› ) = 0; πœ‘(πœ” → ∞) = 0
This specific structure of the lead-lag controller is called the Notch Filter, and it has the frequency
characteristics shown in Figure 13.
Figure 13: The frequency characteristics of the Notch Filter.
RECALL: The lead controller design for a phase margin of 600.
1
Lead controller transfer function 𝐺𝐢 (𝑠) =
1 𝑠+𝑇
𝛽 𝑠+ 1
𝛽𝑇
For the gain margin πœ‘π‘šπ‘Žπ‘₯ = 600 ,
𝛽=
1 − π‘ π‘–π‘›πœ‘π‘šπ‘Žπ‘₯ 1 − sin 60
=
= 0.0718
1 + π‘ π‘–π‘›πœ‘π‘šπ‘Žπ‘₯ 1 + sin 60
The lead controller introduces a gain:
[𝐺𝑐 (π‘—πœ”)] = 20 log10
1
√𝛽
= 20 log10
1
0.0718
= 11.439𝑑𝐡
Location for the maximum angle of the lead controller
Bode Diagram
Gm = 6.02 dB (at 1.73 rad/sec) , Pm = 18.3 deg (at 1.19 rad/sec)
0
Magnitude (dB)
-10
System: untitled1
Frequency (rad/sec): 2.34
Magnitude (dB): -11.4
-20
-30
-40
-50
Phase (deg)
-90
-135
-180
-225
0
10
Frequency (rad/sec)
Now, from the Bode plot, πœ”π‘šπ‘Žπ‘₯ = 2.34 π‘Ÿπ‘Žπ‘‘/𝑠
1
1
𝑇
𝛽𝑇
Hence, = πœ”π‘šπ‘Žπ‘₯ √𝐡 = 0.627 π‘Ÿπ‘Žπ‘‘/𝑠;
𝐺𝐢 (𝑠) = 13.9282
= 8.7326 π‘Ÿπ‘Žπ‘‘/𝑠
𝑠 + 0.627
13.9281𝑠 + 8.733
=
𝑠 + 8.7326
𝑠 + 8.7326
The Bode plot of the lead controller is shown below.
Bode Diagram
Magnitude (dB)
20
System: untitled1
Frequency (rad/sec): 2.32
Magnitude (dB): 11.4
15
10
5
0
Phase (deg)
60
System: untitled1
Frequency (rad/sec): 2.37
Phase (deg): 60
30
0
-2
10
-1
0
10
10
Frequency (rad/sec)
BODE plot of Controlled System
The controlled system becomes:
𝐺 ∗ (𝑠) =
6(13.9281𝑠+8.733)
𝑠(𝑠+1)(𝑠+3)(𝑠+8.7326)
=
83.5692𝑠+52.398
𝑠(𝑠+1)(𝑠+3)(𝑠+8.7326)
1
10
2
10
Bode Diagram
Gm = 12.7 dB (at 5.52 rad/sec) , Pm = 45.6 deg (at 2.32 rad/sec)
Magnitude (dB)
50
0
-50
-100
-150
-45
Phase (deg)
-90
-135
-180
-225
-270
-1
0
10
1
10
2
10
3
10
10
Frequency (rad/sec)
Step response of controlled system
Step Response
1.4
1.2
Amplitude
1
0.8
0.6
0.4
0.2
0
0
1
2
3
4
5
6
7
Time (sec)
EXAMPLE LAG CONTROLLER DESIGN FOR THE GIVEN SYSTEM 𝐺(𝑠) =
6
𝑠(𝑠+1)(𝑠+3)
Design a lag controller to achieve a steady-state error 0f o,02 and a phase
margin of 600 .
For the steady-state error: 𝐾𝑉 = lim 𝑠
𝑠→0
0.01
6
𝑠(𝑠+1)(𝑠+3)
=
6
1π‘₯3
1
= 2; 𝑒𝑣 = = 0.5 ≫
2
For the steady-sate error of 0.01, 𝐾𝑣𝑛𝑒𝑀 =
1
0.01
= 100 → 𝐾𝑝 =
With the steady state requirement achieved, 𝐺 ∗ (𝑠) =
100
6
100
𝑠(𝑠+1)(𝑠+3)
Bode Diagram
Gm = -18.4 dB (at 1.73 rad/sec) , Pm = -42.1 deg (at 4.31 rad/sec)
Magnitude (dB)
100
50
0
-50
-100
-90
Phase (deg)
-135
-180
-225
-270
-2
10
-1
10
0
10
1
10
2
10
Frequency (rad/sec)
Step response with gain adjustment for a steady state error of 0.01
6
Step Response
x 10
2.5
2
Amplitude
1.5
1
0.5
0
-0.5
-1
0
2
4
6
8
10
12
14
Time (sec)
Bode Diagram
Gm = -18.4 dB (at 1.73 rad/sec) , Pm = -42.1 deg (at 4.31 rad/sec)
System: untitled1
Frequency (rad/sec): 0.263
Magnitude (dB): 41.8
Magnitude (dB)
100
50
0
-50
-100
-90
System: untitled1
Frequency (rad/sec): 0.263
Phase (deg): -110
Phase (deg)
-135
-180
-225
-270
-2
10
-1
10
0
10
Frequency (rad/sec)
Lag controller
1
10
2
10
1
1 𝑠+𝑇
𝐺𝐢 (𝑠) =
;𝛼 > 1
𝛼𝑠+ 1
𝛼𝑇
41.8
Now, 𝛼 = 10 20 = 123.0269 →
1
Also, 𝑇 = 0.0263;
1
𝛼𝑇
1
𝛼
= 0.0081
= 0.0002137;
𝐺𝐢 (𝑠) = 0.0081
𝑠 + 0.0263
;𝛼 > 1
𝑠 + 0.0002137
Bode Diagram
50
Magnitude (dB)
40
30
20
10
Phase (deg)
0
0
-45
-90
-5
10
-4
10
-3
10
-2
10
Frequency (rad/sec)
Lag controller with a gain adjustment
-1
10
0
10
Bode Diagram
10
Magnitude (dB)
0
-10
-20
-30
-40
Phase (deg)
-50
0
-45
-90
-5
-4
10
-3
10
-2
10
-1
10
10
0
10
Frequency (rad/sec)
Lag Controlled system
Bode Diagram
Gm = 23.1 dB (at 1.7 rad/sec) , Pm = 64.7 deg (at 0.262 rad/sec)
150
Magnitude (dB)
100
50
0
-50
-100
-150
-90
Phase (deg)
-135
-180
-225
-270
-5
10
-4
10
-3
10
-2
10
-1
10
Frequency (rad/sec)
0
10
1
10
2
10
Step Response
1.4
1.2
Amplitude
1
0.8
0.6
0.4
0.2
0
0
20
40
60
Time (sec)
80
100
120
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