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ICC2 —Usefull commands. 1. Get the count of Clock buffers… | by Agnathavasi | Medium
ICC2 —Usefull commands
Agnathavasi · Follow
4 min read · Nov 20, 2023
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1. Get the count of Clock buffers?
report_device_group -detailed clock_network
2. llx lly urx ury all four coordinate of an instance
get_attribute [get_cells ctmTdsLR_1_31388] bbox
3. Get all the NDR used in the design
report_routing_rules
4. Get the routing status of a net
get_attribute [get_nets net_name ] physical status
5. Find the name of all the CTS clock nets
get_flat_nets -all -filter “net_type==clock”
6. Find the net name connected to a pin of an instance
get_nets -of_objects AES_core_keymem/key_mem_reg_9__90_/CP
7. Find the name of all the nets with a particular pattern in net name
get_nets <net_pattern*>
8. Get all the signal nets only (except clock, power and ground)
get_attribute [get_flat_nets -all -filter “net_type==signal”] name
9. Get the name of all the nets in the design
get_nets
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ICC2 —Usefull commands. 1. Get the count of Clock buffers… | by Agnathavasi | Medium
10. Find the placement status of an instance
get_attribute [get_cells <cell_name>] physical_status
11. Get all nets having max fanout greater than specified number
report_net_fanout -threshold 50
12. Find the width and height of a cell
get_attribute [get_cells ctmTdsLR_1_31388] height
get_attribute [get_cells ctmTdsLR_1_31388] width
13. Get the temperature and delay corners of design
report_corners
14. Get the name of all the instance in your design which has fixed placement status
get_cells -filter “physical_status == fixed”
15. Find the name of all the don’t touch instance
report_dont_touch –all
16. Find the name of all sequential elements (registers/flip flops) in the design
get_attribute [ get_flat_cells -filter is_sequential ] name
17. Find the name of all the macro’s in your design
get_cells -filter “is_soft_macro == TRUE”
get_cells -filter “is_hard_macro == TRUE”
18. Find total numbers of well tap instances used in the design
sizeof_collection [get_cells *TAP*]
19. Find all the instances which have only one pins (like tie cells, antenna cells)
get_pins -of_objects [get_cells -filter “number_of_pins == 1” ]
20. Find the total number of physical cell instances used in the design
sizeof_collection [get_flat_cells -filter “is_physical_only == true”]
21. Get the clock skew and latency reports
report_clock_timing -type skew
report_clock_timing -type latency
report_clock_timing -type latency -nworst 20
22. Get the edge number where a port is placed
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ICC2 —Usefull commands. 1. Get the count of Clock buffers… | by Agnathavasi | Medium
23. Get all clock and scan clock pins
get_clock_tree_pins
24. Get all input and output ports
get_ports [all_inputs]
get_ports [all_outputs]
25. * Find the metal layers used in block level IO ports*
get_attribute [get_flat_cells *PAD*] layer_names
26. Get all the power domains available in the design
get_attribute [get_power_domains] name
27. Get the area and size of your block
get_attribute [current_block ] bbox
28. Get all the inverter and buffer cells available in the library
get_lib_cells -filter “is_buffer”
get_lib_cells -filter “is_inverter”
28(a). get all input ports exclude all clock ports
get_ports [remove_from_collection [all_inputs ] clk]
28(b). get all input ports excluding in specific pattern in the name
get_ports [remove_from_collection [all_inputs ] din* ]
29. *Get the information of a cell which is present in std. cell library but not in design. *
get_lib_cells -of_objects [get_cells $cell_name ]
30. *Get the parameters of any particular routing layer (like Masks, Directions, pitch,
min-width, min-spacing etc )*
report_design –floorplan
31. Get all the routing layers name
get_attribute [get_layers ] name
32. Get all the layers name
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get_attribute [get_layers *] name
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33. Get all the pins of a selected Instance.
get_pins -of_objects [get_selection]
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ICC2 —Usefull commands. 1. Get the count of Clock buffers… | by Agnathavasi | Medium
34. Get the cell name of a selected Instance.
get_selection [selected instance]
35. Find the top name of the design
current_design
36. Get the name of the selected object (instance, net, ports or any other objects).
get_attribute [get_selection ] name
37. Report the top worst failing 100 late timing paths with the endpoint and slack
values
report_timing -path_type end -max_paths 100 -delay_type max
report_constraints –all_violators
38. Report the count of the unique lib cell types of all buffers/inverters in the data path
of a timing path.
get_lib_cells -of_objects <instance_name>
39.Find the CPPR value and CPPR branch point of a timing path. Report the
skew between the launch clock and capture clock of a timing path,
considering CPPR.
40. * Find the flops receiving no clocks*
check_timing
41. Find the number of logic depth (combinational) in a timing path.
/agnathavasi/procs/Synopsys/get_logic_depth.tcl
Source this proc and give timing path as arguments
*****************Get_logic_depths.tcl*******
proc get_logic_depth {my_path {exclude_unary “”} } {
set my_cells [get_cells -quiet -of \
[get_pins -quiet \
[get_attr -quiet \
[get_attr $my_path points] object] \
-f “pin_direction==in”] \
-f “is_combinational==true && defined (lib_cell)”]
if {$exclude_unary == “-exclude_unary”} {
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ICC2 —Usefull commands. 1. Get the count of Clock buffers… | by Agnathavasi | Medium
set my_cells [filter_collection $my_cells “number_of_pins!=2”] }
return [sizeof_collection $my_cells]
}
define_proc_attributes get_logic_depth -info “Find Logic Depth of a Timing
Path” \
-define_args {
{path “A single path collection” path list required} \
{-exclude_unary “Exclude Buffers/Inverters along the path” \
“\b” string optional}
}
#get_logic_depth [get_timing_paths -from AES_init_reg_reg -to
AES_core_keymem/key_mem_reg_7__10_]
*************************************************************
42. Get drivers and receivers (loads) of a net.
get_cells -of_objects [get_pins -of_objects [get_nets so_out[42]]]
43. Query if a net is a clock net.
get_nets -hierarchical -filter “net_type == clk”
44. Check if a net is marked as dont_touch
get_attribute $net_name don’t_touch
45. Get the library name and base cell name of an instance.
get_lib_cells -of_objects [get_cells < cell_name >]
46. Get the maximum transition and maximum capacitance of a pin.
get_attribute [get_pins wn_PAD_3/C] min_capacitance
get_attribute [get_pins wn_PAD_3/C] max_capacitance
47. Find the clock period of a clock in a particular analysis view.
report_clocks -modes func
report_clocks -modes test
48. command to check unconnected pins & nets?
check_netlist
49. command to set analysis mode?
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ICC2 —Usefull commands. 1. Get the count of Clock buffers… | by Agnathavasi | Medium
50. command to get all signal nets only and whose fanout / pin count > 4 ?
get_pins -of_objects [get_fanets -filter “number_of_pins > 4” -filter “net_type ==signal”]
51. Get the count of ULVT cells in the design (excluding physical only cells)
get_flat_cells -hierarchical -filter “ref_name =~ *ULVT*”
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