2021 IEEE Applied Power Electronics Conference and Exposition (APEC) | 978-1-7281-8949-9/21/$31.00 ©2021 IEEE | DOI: 10.1109/APEC42165.2021.9487101
Design and Analysis of a High-frequency CLLC
Resonant Converter with Medium Voltage insulation
for Solid-State-Transformer
Chunyang Zhao
Center for Power Electronics
Systems
Virginia Polytechnic Institute and
State University
Blacksburg, USA
chunyangz@vt.edu
Yi-Hsun Hsieh
Center for Power Electronics
Systems
Virginia Polytechnic Institute and
State University
Blacksburg, USA
yhhsieh@vt.edu
Abstract— The isolated DC/DC converter is the key
component in high-frequency medium-voltage solid-state
transformer. This paper presents a comprehensive design of a
CLLC converter, including the design of transformer and
resonant tank. The transformer insulation is designed to pass the
partial discharge and applied voltage test. And its impact on
transformer leakage inductance, as well as the resonant
converter characteristic is discussed. Also, the transformer is
optimized based on loss and volume trade-off. Then the relation
of zero voltage switching (ZVS) condition and circuit parameters
and load condition is derived from equivalent circuit. The impact
of magnetizing inductance, leakage inductance, MOSFETs
junction cap, and characteristic factor Q on ZVS condition is
revealed. Finally, this paper provides a guidance to select deadtime appropriately and demonstrates the design on a 200kHz
converter with 1.6kV input and 1.1kV output, and achieves a
peak efficiency of 98.9%.
Keywords—medium voltage insulation, resonant converter,
ZVS commutation,
I. INTRODUCTION
Solid-State Transformer (SST) is gaining more and more
interest in unconventional electrical applications, where loads
and sources are directly connected to medium voltage utility
grid. As shown in Fig. 1, High-power fast chargers for
Electrical Vehicles (EV) and large data centers are examples
that may benefit from direct isolated power conversion
between medium voltage AC and low voltage DC [1].
Compared to a line-frequency transformer-based solution, the
SST-based solution, especially the modularized SST system, is
more suitable for these applications considering its size and
weight advantage, flexible control and configuration, as well as
easy installation and expansion [2]. Because of the high
efficiency, simple structure achieved by magnetic integration,
soft switching on both primary and secondary switches, the
CLLC resonant converter topology has been widely employed
as an isolated DC/DC converter [1]. In the DC/DC converter,
Fred C. Lee
Center for Power Electronics
Systems
Virginia Polytechnic Institute and
State University
Blacksburg, USA
fclee@vt.edu
Qiang Li
Center for Power Electronics
Systems
Virginia Polytechnic Institute and
State University
Blacksburg, USA
lqvt@vt.edu
since the core of the transformer is grounded for safety
consideration, there will be high voltage potential between the
primary-side winding and the core, as well as the secondaryside winding, which is connected to the low voltage output.
Thus, the insulation of the primary-side needs to be carefully
designed. In paper [3][4], the insulation design of high
frequency, medium voltage transformer is introduced.
However, the impact of the insulation on transformer leakage
inductance is not analyzed. To achieve Zero Voltage Switching
(ZVS) in LLC or CLLC converters, the magnetizing
inductance and dead-time selection usually follows a simplified
equation [5][6][7]. However, this equation is based on some
assumptions, which is not valid in every application, and
cannot explain why the converter has a risk to lose ZVS when
selecting a large magnetizing inductance and large dead-time.
In this paper, the first section introduces an insulation
design and analyzes its impact on transformer leakage
inductance, as well as the impact on resonant converter
characteristics. In the second section, the equivalent circuit
model during the commutation is analyzed. The solution
reveals the relationship between ZVS condition and many
other circuit parameters, and provides a guide to select deadtime appropriately. At last, the design is demonstrated on a
200-kHz CLLC converter with 98.9% efficiency.
Fig. 1. Examples of SST application
This research is supported by the U.S. Department of Energy, Office of
Energy Efficiency and Renewable Energy, under the project of HighEfficiency, Medium-Voltage-Input, Solid-State-Transformer-Based 400kW/1000V/400A Extreme Fast Charger for Electric Vehicles, under contract
number DE-EE0008361.
978-1-7281-8949-9/21/$31.00 ©2021 IEEE
1638
Authorized licensed use limited to: Infineon Technologies AG. Downloaded on March 06,2023 at 08:58:09 UTC from IEEE Xplore. Restrictions apply.
frequency and core loss density, calculated transformer core
loss, winding loss, and volume are plotted in Fig. 5. Since the
litz wire is capsuled by the insulation material and it’s more
difficult to dissipate the heat from the winding loss compared
to core loss, a smaller winding loss is preferred, as the blue
zone indicates in Fig. 5. Fig. 6 shows the trade-off between
transformer volume and loss, as well as the preference of
smaller winding loss for given fs and Pv. Fig. 7 shows the same
trade-off with swept Pv. Finally, fs is swept from 100kHz to
300kHz and a design point is selected based on loss-volume
tradeoff.
Fig. 2. System structure of a fast EV charger
II. MEDIUM VOLTAGE HIGH FREQUENCY TRANSFORMER
DESIGN AND OPTIMIZATION
A. Insulation Design
Referring to previous study on high-frequency transformer
design with high voltage insulation for SST, UI core is selected
and both primary and secondary windings on the two legs are
connected in series, as shown in Fig. 3 [8]. To avoid Partial
discharge (PD) between the high voltage primary-side winding
and the grounded core, as well as the secondary side winding
which is connected to the low voltage output, the primary-side
winding is encapsulated by silicon, and then coated by a
grounded shielding layer. In this way, all the electric field
around the high voltage winding will be constrained within the
shielding layer and the high dielectric constant silicon will
handle the E-field. Besides partial discharge, the applied
voltage test is another requirement according to the standard
[9]. And the thickness of the silicon capsule is determined by
the highest voltage required by the applied voltage test. For
given silicon material, the thickness can be calculated using
(1):
E/Eref = (Dref /d)0.4
Fig. 3. Medium voltage transformer structure
Fig. 4. Simulation of E-field
(1)
Where E is the E-field strength in the insulation material,
Eref is the dielectric strength at given thickness Dref, and d is the
design parameter, the thickness of the insulation. Considering
the viscosity, thermal conductivity, and dielectric strength,
silicone material Wacker SilGel 612 is selected [8]. Fig. 4
shows the simulation result of the E-field. The peak E-field
inside the insulation material of the primary side winding is
less than 9 kilo volts per millimeter, which is below the
dielectric strength of the selected material with enough margin.
B. Optimization of Transformer Design
According to previous analysis [8], and considering the
frequency range of interest, 100kHz to 300kHz, ML27D is
selected as the transformer core material. The litz wire strand
AWG is selected according to the switching frequency and
manufacture recommendation as well. After the insulation
dimensions are determined, the transformer core loss, winding
loss, and volume can be calculated for selected core material
and litz wire [10]. By sweeping the primary side turns number
N1, core loss density Pv, and switching frequency fs, an
optimized design region is determined and design point is
selected considering the tradeoff between loss and volume, as
well as winding loss and core loss. For given switching
Fig. 5. Transformer loss and volume with swept N1
Fig. 6. Transformer loss and volume tradeoff
1639
Authorized licensed use limited to: Infineon Technologies AG. Downloaded on March 06,2023 at 08:58:09 UTC from IEEE Xplore. Restrictions apply.
such applications where bi-directional operation is required,
whereas only forward operation mode needs regulation.
According to the preference of the forward gain curve while
still leaving margin for the resonant cap voltage stress, the
transformer and resonant tank design is finalized. The design
parameters are summarized and shown in TABLE I.
Fig. 7. Transformer loss and volume tradeoff with swept N1 and Pv
Fig. 9. Schematic of a CLLC resonant converter for the dc-dc module
Fig. 8. Switching frequency impact on loss and volume trade-off
C. Impact of Insulation on Leakage Inductance
Fig. 9 illustrates the schematic of the CLLC resonant
converter for the dc/dc stage. Serial half bridge topology is
adopted on the primary side to handle high input voltage, and
thus reducing the number of modules in the Solid-state
transformer. The input is 1.6kV and output is 1.1kV. The
transformer turns ration, n is 8:11. Lp and Ls represent the
primary side and secondary side leakage inductance
respectively. Due to the insulation on the primary side, the
transformer has an asymmetrical structure of the primary and
secondary side winding. As a result, the leakage inductance is
not evenly distributed. The resonant caps of the CLLC
converter are designed to match the primary side leakage and
secondary side leakage inductance individually, as shown in
(2).
Fig. 10. Bidirectional gain curve of the CLLC resonant converter
TABLE I.
Parameter
(2)
The asymmetrical distribution of the leakage inductance
has two significant impacts on the CLLC resonant converter.
One is the voltage stress on the resonant caps and the other is
the bidirectional gain curve. The voltage stress on each of the
resonant caps is proportional to the capacitance, which means
there will be huge difference of voltage stress between primary
and secondary side resonant caps when the leakage inductances
differ significantly. Also, due to the characteristic impedance
on both sides are not equal, it will lead to different gain curves
when the resonant converter is operating bi-directionally, as
shown in Fig. 10. Such a characteristic could be beneficial in
TRANSFORMER DESIGN RESULT
Design Values
Turns number
16:22
Core material
ML27D
Core loss density
300W/m3
Strands AWG
42
Equvialent AWG
15
Switching frequency
200kHz
Core loss
39W
Winding Loss
36W
Transformer Volume
1.4L
Primary side leakage inductance
16.8µH
Secondary side leakage inductance
6.1µH
III. ANALYSIS OF COMMUTATION
For simplification, the analysis begins with a simple case
of ZVS commutation, where primary-side and secondary-side
MOSFETs Q1, Q4, SR1, and SR4 turn off simultaneously
when the secondary side current reaches zero, as shown in Fig.
11. In this case, the equivalent circuit during the commutation
period is shown in Fig. 12. CjQ is the junction cap of the
primary side switch and CjSR’ is the junction cap of the
secondary side switch reflected to the primary side.
1640
Authorized licensed use limited to: Infineon Technologies AG. Downloaded on March 06,2023 at 08:58:09 UTC from IEEE Xplore. Restrictions apply.
the primary-side to achieve ZVS, and the easier for the
secondary-side to achieve ZVS. Besides these dc components
mentioned above, there is also a high frequency oscillation,
which is determined by the two junction caps and two leakage
inductances on each side. This oscillation will further reduce
the primary side current after t1. From mathematics point of
view, once the primary side current is reduced to zero, the
primary side junction cap voltage reaches its valley point. This
valley point has to be negative to guarantee ZVS of the primary
side. Vice versa, primary side will lose ZVS. Equations (5) and
(6) show the solution of the drain-source voltage of Q2 and
SR2 respectively.
Fig. 11. Gate signals and current waveform
(5)
Fig. 12. Equivalent circuit during commutation
Ls’ is the secondary side leakage inductance reflected to the
primary side. nVo is the output voltage reflected to the primary
side. During the commutation period, since the resonant caps
are much larger than the junction caps, they can be regarded as
constant voltage sources, VCp and nVCs, and can be estimated
by (3).
(6)
where ω is the resonant frequency of junction caps and
leakage inductances defined by (7).
(7)
(3)
Besides, since the magnetizing current im is almost constant
during the commutation period, Lm can be replaced with a
constant current source Ioff, which equals to the magnetizing
current at t1, as shown in (4).
(4)
If consider the current source and voltage sources
separately with superposition, the current source tends to
discharge both primary and secondary side junction caps. And
the equilibrium state would be the Ioff distributed on two sides
proportional to the impedance of each branch. So the primary
side current will begin to drop from t1. While the polarity of the
voltage over the resonant cap, as shown in the equivalent
circuit, indicates that it is against the primary-side ZVS
commutation, and in favor of the secondary-side ZVS. Besides,
this voltage is proportional to Q, which represents the load
condition. Thus, the heavier the load is, the more difficult for
The equivalent circuit and its solution also show that the
commutation process is a combination of a linear term and two
sinusoidal terms. The linear term is driven by the magnetizing
current, and the sinusoidal terms represent the resonance
between junction caps and leakage inductances, driven by both
the voltage and current excitations. And the minimum value of
the solved drain-source voltage will predict whether ZVS can
be achieved or not. To be specific, the minimum value needs to
be negative to guarantee ZVS. According to numerical study,
the minimum value exists approximately at a quarter of the
resonant period. Thus, it’s appropriate to select deadtime
smaller than π/4ω, and the maximum Lm to realize ZVS while
minimizing the circulating energy in resonant tank.
IV. EXPERIMENTAL RESULT
Fig. 13 shows the insulation test of the transformer
prototype. It passed both the Applied Voltage test and the
Applied Potential Partial Discharge test, for both primary side
and secondary side. The transformer achieves an isolation level
of 13.2kV. Then A 15 kW/200 kHz converter prototype is
developed based on the high frequency isolated transformer, as
shown in Fig. 14. The converter is tested from 30% to full load.
In the whole range, ZVS can be achieved with a peak
efficiency of 98.9%, as shown in Fig. 15 and Fig. 16.
1641
Authorized licensed use limited to: Infineon Technologies AG. Downloaded on March 06,2023 at 08:58:09 UTC from IEEE Xplore. Restrictions apply.
V. CONCLUSION
Fig. 13. Transformer insulation test
CLLC resonant converter works as the most crucial
element in the SST applications. The insulation design and
transformer optimization are introduced. The impact on
leakage inductance and resonant converter characteristics is
discussed based on the transformer design. Then the ZVS
commutation is analyzed with equivalent circuit. The derived
equation shows the impact of magnetizing inductance, leakage
inductance, junction cap and load condition, and also helps to
select appropriate deadtime to achieve ZVS. Finally, a 15-kW
200-kHz CLLC resonant converter prototype is realized. A
peak efficiency of 98.9% is achieved.
REFERENCES
[1]
Fig. 14. CLLC resonant converter prototype
Fig. 15. Key waveforms at full load operation
Fig. 16. Measured efficiency at different load conditions
Y. Jiao and M. M. Jovanović, "Topology Evaluation and Comparison
for Isolated Multilevel DC/DC Converter for Power Cell in Solid State
Transformer," 2019 IEEE Applied Power Electronics Conference and
Exposition (APEC), 2019, pp. 802-809.
[2] X. She, A. Q. Huang, R. Burgos, “Review of Solid-State Transformer
Technologies and Their Application in Power Distribution Systems,”
IEEE Journal of Emerging and Selected Topics in Power Electronics,
vol. 1, no. 3, pp. 186-198, Sept. 2013.
[3] Q. Chen, R. Raju, D. Dong and M. Agamy, "High Frequency
Transformer Insulation in Medium Voltage SiC enabled Air-cooled
Solid-State Transformers," 2018 IEEE Energy Conversion Congress and
Exposition (ECCE), 2018, pp. 2436-2443.
[4] T. Guillod, F. Krismer and J. W. Kolar, "Electrical shielding of MV/MF
transformers subjected to high dv/dt PWM voltages," 2017 IEEE
Applied Power Electronics Conference and Exposition (APEC), 2017,
pp. 2502-2510.
[5] Q. Zhu, L. Wang, L. Zhang and A. Q. Huang, "A 10 kV DC transformer
(DCX) based on current fed SRC and 15 kV SiC MOSFETs," 2018
IEEE Applied Power Electronics Conference and Exposition (APEC),
2018, pp. 149-155.
[6] S. Zhao, Q. Li, F. C. Lee and B. Li, "High-Frequency Transformer
Design for Modular Power Conversion from Medium-Voltage AC to
400 VDC," in IEEE Transactions on Power Electronics, vol. 33, no. 9,
pp. 7545-7557, Sept. 2018.
[7] Z. U. Zahid, Z. M. Dalala, R. Chen, B. Chen and J. Lai, "Design of
Bidirectional DC–DC Resonant Converter for Vehicle-to-Grid (V2G)
Applications," in IEEE Transactions on Transportation Electrification,
vol. 1, no. 3, pp. 232-244, Oct. 2015.
[8] Z. Li, Y. Hsieh, Q. Li, F. Lee and M. Ahmed, "High-Frequency
Transformer Design with High- Voltage Insulation for Modular Power
Conversion from Medium-Voltage AC to 400-V DC," 2020 IEEE
Energy Conversion Congress and Exposition (ECCE), 2020, to be
published.
[9] IEEE Standard for General Requirements for Dry-Type Distribution and
Power Transformers, IEEE Standard C57.12.01-2015 (Revision of IEEE
Standard C57.12.01-2005), 2015.
[10] C. R. Sullivan, "Optimal choice for number of strands in a litz-wire
transformer winding," IEEE Transactions on Power Electronics, vol. 14,
no. 2, pp. 283-291, 1999.
1642
Authorized licensed use limited to: Infineon Technologies AG. Downloaded on March 06,2023 at 08:58:09 UTC from IEEE Xplore. Restrictions apply.