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simple diode cheat sheet

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𝑖 = 𝐼 (𝑒
∗
∗
− 1) where 𝑉 =
≅ 25π‘šπ‘‰ π‘Žπ‘‘ π‘Ÿπ‘œπ‘œπ‘š 𝑇
valid states: 𝑉 ≤ 0 & 𝑖 = 0, 𝑉 = 0 & 𝑖 ≥ 0
π‘Ÿ =
Hole diffusion current: 𝐽
Electron diffusion current: 𝐽
=π‘ž∗𝐷 ∗
𝐷 ≅ 12
for intrinsic Si
incremental resistance of a Zener
𝑉 ≅ 𝑉 + π‘Ÿ ∗ 𝐼 ,𝑉 = 𝑉
linear model for Zener
, 𝐷 ≅ 34
+π‘Ÿ ∗𝑖
=
=
=𝑉
∗
𝑉 = 𝑉 ∗ ln
𝐼
= −π‘ž ∗ 𝐷 ∗
=
=
π‘ŸπΌ
𝑖 =𝐼 ∗𝑒
=
→ the lower eq
∗
+𝑉 𝐼
≅ 𝐼 ∗ (1 +
−𝑃
π‘Š = 𝑋 + 𝑋 : Deple on region width
=0
) small sig valid for
, 𝑋 /𝑋 : thickness of depleted region of n/p side
At equilibrium/steady-state in the open cct pn junc on
β‰ͺ1
∗ 𝑉 , where πœ– ≅ 11.7πœ–
π‘Š=π‘Š =
+
To solve small sigs remove ac sources and solve for
𝑽𝑫 & 𝑰𝑫 . Make a linear model for each non-linear
element i.e. replace diode with resistor 𝒓𝒅 then solve
normally
Junc on charge: 𝑄
= 𝐴 2πœ– π‘ž
Δ𝑉 = π‘Ÿ ∗ 𝐼 , Δ𝑉 = 𝑉 + (π‘Ÿ + 𝑅)𝐼
𝐼 = 𝐼 (𝑒
Line regula on:
𝐼 =
𝑖 =
,π‘Ÿ =
small sig valid for |𝑣 | < 5 [π‘šπ‘‰]
=
Load regula on:
[
[
],
] Voltage ripple:
, 𝑛 ≅ 1.5𝐸10 [π‘π‘š
] for Si at room T
𝑛 ∗ 𝑝 = 𝑛 true for both extrinsic and intrinsic Si
N-type: 𝑛
≅𝑁 →𝑃
≅
P-type: 𝑝
≅𝑁 →𝑛
≅
𝑉 π‘‘π‘Ÿπ‘–π‘“π‘‘ = πœ‡ ∗ 𝐸,
Where E is electric field and πœ‡
/
is β„Ž /𝑒 dri velocity
Total dri current density:
𝐽 = π‘ž 𝑝 ∗ πœ‡ + 𝑛 ∗ πœ‡ 𝐸[
Resis vity 𝜌 =
=
=
( ∗
] - p/n is β„Ž /𝑒 conc
∗
)
− 1), 𝑰𝒔 = 𝑨 ∗ 𝒒 ∗ π’πŸπ’Š (
1+
𝑫𝒑
𝑳𝒑 ∗𝑡𝑫
∗ ∗
𝑖 =
∗
𝑒
𝑛 𝑝𝑛 ∢ 𝑉
𝑖 =𝐼 ∗𝑒
=
,𝑖 =
∗ ∗
∗
∗
=
≥ −.4[𝑉],
+
𝑫𝑡
)
𝑳𝒏 ∗𝑡𝑨
, 𝐴 is x-sect area of EBJ
∗𝑒
,𝑖 =𝐼 ∗𝑒
𝑝 𝑛𝑝: 𝑉
(𝑛 𝑝𝑛) 𝑖 = 𝐼 ∗ 𝑒
≥ −.4[𝑉]
(𝑝 𝑛𝑝)
𝑉 (𝐸𝑂𝑆) ≅ 𝑉 (𝐸𝑂𝑆) + 0.7[𝑉] = 0.3 [𝑉],
𝑉
𝑉 π‘‘π‘Ÿπ‘–π‘“π‘‘ = πœ‡ ∗ 𝐸
∗ 𝑉 [𝑐] A is area
𝐼 = , 𝐼 = 𝐼 + 𝐼 = 𝐼 (β + 1) = I
Intrinsic S.C.: 𝑛 = 𝑝 = 𝑛 , 𝑛 is the intrinsic carrier conc
𝑛 = 𝐡𝑇 𝑒
∗
= 𝑉 −𝑉 , 𝑉 = 𝑉 −𝑉
→ 𝑉 = 𝑉 − (𝑉 − 𝑉 )
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