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83 WAYS SDS ENHANCES AUTOCAD
ELECTRICAL FOR SUBSTATION P&C DESIGN
Providing Better, Faster, Smoother Substation P&C Design
Date: 4/21/2023
1890 West Littleton Blvd, Littleton, CO 80120
Phone: (303) 847-4200 Fax: (303) 996-2673 www.spatialbiz.com
Table of Contents
Table of Contents .................................................................................................................................................................... 2
Reason 1 – Seamless Surfing ................................................................................................................................................... 5
Reason 2 – Richer Surfer Display ............................................................................................................................................ 6
Reason 3 – Surf on Component ‘Pin’ Number ........................................................................................................................ 6
Reason 4 – Surf on Item Number ............................................................................................................................................ 8
Reason 5 – Surf on Wire Network Connections ...................................................................................................................... 9
Reason 6 – Surf to Annotation References ........................................................................................................................... 11
Reason 7 – Improved Surf Continue ..................................................................................................................................... 12
Reason 8 – Manual Window Copy TAG/INST/LOC Assignments .......................................................................................... 13
Reason 9 – Selective ‘Child’ Update Option.......................................................................................................................... 13
Reason 10 – Show PINLIST Tool ............................................................................................................................................ 16
Reason 11 – Rollover - Smart Cursor Data Display ............................................................................................................... 17
Reason 12 – Wiring Diagram Terminal Strips ....................................................................................................................... 21
Reason 13 – Schematic Terminal Strips ................................................................................................................................ 23
Reason 14 – Renumber Terminals by Pick Sequence ........................................................................................................... 26
Reason 15 – Term Strips showing both Wire no. and Term no. ........................................................................................... 26
Reason 16 – Multi-Level Term Strips .................................................................................................................................... 27
Reason 17 – Auto-annotation of Wiring Diagrams from Schematics ................................................................................... 27
Reason 18 – Auto Leaders for Annotation ............................................................................................................................ 29
Reason 19 – Annotation Format Flexibility ........................................................................................................................... 29
Reason 20 – Annotation Format Overrides .......................................................................................................................... 29
Reason 21 – Anno Update Single Pick Mode ........................................................................................................................ 30
Reason 22 – Swap Annotations............................................................................................................................................. 30
Reason 23 – Component Tag Alias Option in Annotation..................................................................................................... 31
Reason 24– Audit WD Annotation vs. Schematics................................................................................................................ 33
Reason 25 – Surf on Audit Wiring Diagram........................................................................................................................... 35
Reason 26 – Annotation-sensitive Jumpers .......................................................................................................................... 36
Reason 27 – Jumper Collision Avoidance.............................................................................................................................. 37
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Reason 28 – Smart PLine Annotation Jumpers ..................................................................................................................... 37
Reason 29 – Circuit Subsets per Block Name........................................................................................................................ 37
Reason 30 – Auto-detected Jumpers during Reannotation.................................................................................................. 39
Reason 31 – Internal Pin-to-Pin Jumpers Option .................................................................................................................. 39
Reason 32 – Windowed Int/Ext Assignments for Term Strips .............................................................................................. 40
Reason 33 – Smart Cable Fan-ins for Wiring Diagrams ........................................................................................................ 41
Reason 34 – Cable Fan-in Leaders- Graphical Turn Options ................................................................................................. 42
Reason 35 – Automatically generate Cable Fan-ins on Wiring Diagrams ............................................................................. 43
Reason 36 – ‘No Fan-in’ Support for Stand-alone Cable Tags .............................................................................................. 45
Reason 37 – Cable Fan-ins ‘Scootable’.................................................................................................................................. 45
Reason 38 – Cable Fan-ins Display Available Spares............................................................................................................. 45
Reason 39 – Cable Fan-in Labels DREF-aware ...................................................................................................................... 46
Reason 40 – Schematic Cable QA Report for Core ID Repeats ............................................................................................. 46
Reason 41 – Schematic Cable Fan-in Tool ............................................................................................................................ 46
Reason 42 – Schematic Cable Fan-in User Customization – ................................................................................................. 48
Reason 43 – Schematic Cable Fan-in MOVE Connections .................................................................................................... 48
Reason 44 – Toggle Symbol Tool .......................................................................................................................................... 49
Reason 45 – Persistent ‘Show Signals’ Tool .......................................................................................................................... 49
Reason 46 – Show Phase Tool............................................................................................................................................... 50
Reason 47 – Find/Display Attached Grounds ....................................................................................................................... 52
Reason 48 – Show Phase / Surf Connections Project-Wide.................................................................................................. 52
Reason 49 – Test Switch Assignment Manager .................................................................................................................... 53
Reason 50 – Annunciator I/O and Faceplate Manager ......................................................................................................... 53
Reason 51 – Relay 1-Line Symbol Builder ............................................................................................................................. 54
Reason 52 – CT Ratio Annotation Tool ................................................................................................................................. 54
Reason 53 – CT Ground Out Tool .......................................................................................................................................... 55
Reason 54 – Battery Bank Report ......................................................................................................................................... 55
Reason 55 – Tie-Link - Connect New/Smart to Dumb/Existing ............................................................................................ 55
Reason 56 – Tie-Link Array Mode ......................................................................................................................................... 57
Reason 57 – Cable Schedules ................................................................................................................................................ 58
Reason 58 – Duct and Conduit Fill/Cable Tag Reports.......................................................................................................... 60
Reason 59 – Totalized Cable BOM / Cable Tag Reports........................................................................................................ 61
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Reason 60 – Show Wires Tool for Schematic QA .................................................................................................................. 61
Reason 61 – Recalc Wire Size ................................................................................................................................................ 63
Reason 62 – Job/WorkOrder Status Toolset ......................................................................................................................... 64
Reason 63 – Automatically Add Job/WO Revision Clouds and Hatches ............................................................................... 66
Reason 64 – Manually Draw ‘Smart’ Job/WO Revision Clouds............................................................................................. 66
Reason 65 – Job/WO Utilities ............................................................................................................................................... 66
Reason 66 – Quick Match Job/WO & Status from Source Pick to Many .............................................................................. 67
Reason 67 – Multiple, Simultaneous Job/WO Support ........................................................................................................ 68
Reason 68 – Job/WO and Status Report ............................................................................................................................... 68
Reason 69 – Support for Job/WO and STATUS fields to display in stock AcadE reports ...................................................... 69
Reason 70 – Job/WO Change Notes ..................................................................................................................................... 69
Reason 71 – Improved Wire Sequence Tool ......................................................................................................................... 69
Reason 72 – Wire Numbering ‘By LOC’ Option ..................................................................................................................... 70
Reason 73 – ‘Master’ → ‘Ref-only’ Update Feature ............................................................................................................. 70
Reason 74 – Super-flexible DREF Cross-ref Attribute ........................................................................................................... 71
Reason 75 – Configurable ‘Smart’ Tables ............................................................................................................................. 76
Reason 76 – Edit SIGCODES for Source & Destination Arrows ............................................................................................. 78
Reason 77 – Block Swap for Schematic Terminal Symbols ................................................................................................... 79
Reason 78 – Bracket Note Tool ............................................................................................................................................. 79
Reason 79 – Stand-alone smart Cable Tag and Wire Number labels ................................................................................... 79
Reason 80 – Title Block Revision ........................................................................................................................................... 80
Reason 81 – Wild Card-Delimited Data Editor ...................................................................................................................... 80
Reason 82 – Parameter Settings Tool – ................................................................................................................................ 84
Reason 83 – SDS_AUDIT – ..................................................................................................................................................... 85
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83 ways SDS Tools enhances AutoCAD Electrical to provide Better,
Faster, Smoother Substation P&C Design
(rev 21-Apr-2023 nate.holt@holtdesignco.com)
The Autodesk® AutoCAD® Electrical software (AcadE) is great for plant, machine, and substation electrical
controls design. But enhanced with Spatial Business Systems Substation Design Suite™ of powerful, purposebuilt tools riding on top of AcadE, it becomes even better! Welcome to SDS Tools for electrical controls design
(intro video here). Hello to many things you wish Autodesk would have included or fixed in AutoCAD Electrical
by now!
Here are 83 reasons to consider this add-on. It is fully compatible with AutoCAD Electrical 2018, 2019, 2020,
2021, 2022, 2023, 2024 and beyond:
Reason 1 – Seamless Surfing – The awkwardness in AutoCAD Electrical’s Surfer tool is gone! You are no
longer required to save / close the existing drawing before surfing on to the next reference! Surfer, under SDS
Tools, now operates smoothly and seamlessly as if in a normal AutoCAD “multi-document” mode instead of
the old technology single document mode. (Note: Autodesk fixed this limitation starting with their 2024
release.)
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Reason 2 – Richer Surfer Display - Surfer display is much richer, enhanced with extra key data. Additional
attribute information is pulled in from the symbols and appended to the display’s right-hand column:
Reason 3 – Surf on Component ‘Pin’ Number – There are new Surfer modes included with SDS Tools.
One of them gives you the ability to Surf on just a selected “pin” number of a component or terminal strip.
Surfer zeros in on that one component connection pin number or terminal pin number and just returns the
direct references to it (instead of all references to the component or terminal strip).
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The example below shows user picking on pin “B02” of relay’s wiring diagram representation.
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The normal AutoCAD Electrical Surf results above show ALL references for the whole relay. It includes “B02”
references somewhere in that long list.
But using the SDS “Surf COMP Pin” and carefully picking on “B02”, the much cleaner Surfer list displays below.
It includes only the picked wiring diagram’s overall reference, a schematic I/O point that includes “B02”, and a
SDS Tools “reference-only” copy of this schematic I/O point. Everything else is filtered out!
The Surf COMP Pin results below, “B02” referenced only, clean and neat:
Reason 4 – Surf on Item Number – Another new Surfer mode provided by SDS Tools include Surf on “item
number” assignment.
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Pick on item number in a BOM table. Surfer launches into a “Surf on ITEM number” mode.
Reason 5 – Surf on Wire Network Connections – Surf on all component and terminal connections tied
to a picked segment of a wire network – both “on page” and beyond.
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Below is an example of a common wire starting at the left and jumping to two other drawings on the right.
Selecting any segment on this wire network follows it through terminals and source/destination arrows in
order to continue on to the other two drawings.
All components that this picked “trace phase” wiring touches on any of the three interconnected drawings are
listed in the Surf window:
Note: The value displayed in the 3rd column (between columns "Type" and "Tag") for schematic components
is the component's non-blank CONTACT attribute value or, if blank, the component's non-blank PINLIST_TYPE
value (if present on the component).
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Reason 6 – Surf to Annotation References - Surf on existing wiring diagram symbol ANNOTATION
attribute text (updated by SDS_ANNO or SDS_ANNO1) to jump to the far-end wiring diagram or schematic
reference. Launch the tool and pick on a panel wiring diagram ANNOTATION attribute. The tool reads the
picked annotation's Xdata, finds the far end wiring diagram component or terminal connection along with the
schematic representation. These are listed in a "Surf" dialog for easy navigation.
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Reason 7 – Improved Surf Continue – provides an enhanced sorting of the current Surfer data. Especially
useful for complex devices with many child references.
Example
The left-hand display is the initial Surfer display when pick on a complex protection and control relay. Note
that the child I/O points are randomly displayed in the Surfer dialog. Extra reference copies of I/O points,
manually marked with trailing (*) character on the pin number values to avoid confusing PINLIST functions, are
also randomly displayed. Exiting Surfer and then restarting it with SDS_SURFCONT (instead of the default
AcadE AESURFCONT command) will neatly rearrange the displayed data with the schematic parent(s) at the
top, the panel-related items at the bottom, and all the children in the middle neatly sorted by the pin number
text held in the “Location” column.
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Reason 8 – Manual Window Copy TAG/INST/LOC Assignments – SDS_COPYTAGINSTLOC - Useful for a
quick, first pass set up of standard circuits that are being added to a new or existing project drawing set.
Reason 9 – Selective ‘Child’ Update Option – AcadE triggers an option to update all related/child
component instances when a parent symbol’s attribute value is edited. SDS Tools provides a second choice – a
“Selective” child update mode. In this new Selective Update mode, each related child or panel symbol’s
attribute values is displayed, one-component-at-a-time.
Example shown below is user needing to edit two values on a parent SEL relay symbol having over three dozen
child contacts spread throughout the drawing set. With stock AcadE it’s ALL or NONE. But SDS provides this
new Selective update option:
The user edits the parent DESC2 and CAT attributes, hits OK.
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The user does not want to blindly have all children update. User picks the new SDS Selective update mode.
The first of the edit parent's 42 child components displays.
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The dot symbol in the left-hand column identifies the attribute or attributes changed on the parent and now
candidates to be changed on this related child instance.
Selecting OK will update both attributes and then display symbol 2 of 42.
Selecting Skip will not do any update on the displayed child. It will move on to the next.
Alternately, user can deselect an attribute to be updated (highlight and hit the “No button), and/or cut and
paste or manually edit or type in a new value in the lower Optional Edit box to be pushed into the selected
attribute.
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Reason 10 – Show PINLIST Tool – SHOW PINLIST tool provides a total-project listing of all protection relay
pin list assignments, both used and available.
User can browse the left-hand list of all PINLIST populated devices found in the active project. User picks on an
entry and gets a sub-dialog giving an inventory of what assignments have been made for the selected device
(project-wide). The left-hand side of the sub-dialog lists what is still available on the picked parent for
assignment to new child devices.
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Reason 11 – Rollover - Smart Cursor Data Display - Smart cursor Rollover tool supports quick display of
wire numbers, Source/Destination info and persistent drawn links when both ends on drawing, cable tags, and
end connections, add/remove/existing assignments.
Types of data displayed (based upon what is under the cursor while the command is active):
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Project/Job/Work-order ID and Status – displays any assigned Job/Work-order ID, and Status (ex: AddRemove-AsBuilt) assignment, and optional status description note held as Xdata on the underlying
wire, component, terminal, text, Mtext, or any other non-intelligent graphical object that has been
marked with the SDS_WIREMODS tool or the Track Add/Remove SDS_STATUS tool.
LINE wire – displays wire number carried on underlying LINE wire entity. If rolled-over line wire
segment carries "gap pointers" to other wire line segment(s), the tool "blinks" them.
Wire numbers – displays wire number value and any hidden WnnUSER attribute values tied to the wire
number. If wire number is an AcadE “Wire number COPY”, then ROLLOVER temporarily displays a
dashed line leading back to the main wire number.
Wire number QA check – detects if wire number is a “floater”.
Component information – displays TAG, non-blank INST, LOC, DESC1-3, CAT, MFG, RATING1,
CONTACT, PINLIST_TYPE, and other key information for a quick check/confirmation.
Cable information – displays underlying cable tag ID and the “from” and “to” end connection
information, CAT and MFG and cable color code, if present. If cable schedule data present, it will
display cable length, routing path, and estimated voltage drop.
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Dumb extra cable marker symbols are identified. These special symbols with block name HT0_* or
VT0_* and attribute “_TAG2” can be used to re-identify a cable’s tag on the other side of a
source/destination jump.
Source/Destination arrow symbols – displays SIGCODE value and key information for the far end of
the pair. Draws temporary graphics arrows to the far end arrow symbol if on current drawing or
stubbed to a floating symbol if far end if off-drawing.
Fan-in Cable markers – displays any non-blank EXPORT$<attribute name>$ values held on the rolledover fan-in cable marker symbol (these values can auto-populate the “other end” with use of the
SDS_DREF tool)
Schematic Fan-in Cable Marker - Rolling over a schematic fan-in cable marker will trigger its linked inline Source or Destination wire marker symbols on the fanned-in wire representations to display
temporary graphic hexagons -- Red if "source" or Blue if "destination". It draws temporary graphics
arrow-font lines from the cable marker to the fanned-in Src/Dest in-line symbols (if on dwg). It also
does a QA check on the links held on the label symbol to verify that they all point to valid src/dest inline symbols and to display a short help message if they do not then use the SDS_SIGFAN_REPAIR tool.
Panel Fan-in Cable Marker - Rolling over a panel fan-in cable marker will trigger its linked annotation
attribute fan-ins to display temporary graphics "hexagons" on the hexagons and dashed arrow line
pointing from the rolled-over cable marker.
Terminals – ROLLOVER uses temporary graphics to show “I” and “E” assignments, terminal tag,
terminal number, and non-blank INST and LOC values. Reports if schematic terminal is a “break wire
number” type terminal with a special message. Pass-through vs. Break wire number is controlled from
the third char of schematic terminal symbol’s block name: =0 for pass through, =1 for break –
examples “HT01_CIRCLE” vs. “HT11_CIRCLE”.
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ROLLOVER of Schematic Terminal Strips is similar to the "Panel" version example above, but it also
reports if schematic terminal is a “break wire number” type terminal with a special message.
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Dumb terminal copy symbols identified. These special terminal symbols with block name HT0_* or
VT0_* and attribute “_TAGSTRIP” can be used to re-identify a terminal connection on the other side of
a source/destination jump.
Wiring Diagram annotation – gives terminal or device connection pin number, cable and/or wire
number, and far end connection information
Annotation Override is identified when present on a wiring diagram annotation attribute. This
override value is used when “Honor format overrides” is checked in the SDS_ANNO wiring diagram
annotation setup dialog.
Job/Work-order marked items (marked with SDS_WIREMODS tool with a Job/WO number and status
value such as Add, Remove, Abandon, Reconnect, or As-built).
Master / Ref-only marked items (marked with SDS_REFONLY tool). Insert a ref-only version of a
component and have it update to follow the real “master” version of the component.
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Cable Schedule Work-points – enable SDS Tools to calculate cable lengths and routing paths from a
scale plan layout populated with special, encoded Workpoint block inserts. This enables detailed cable
schedules to be auto-generated. The ROLLOVER tool is used to provide a visual check on Workpoint
relationships on an AutoCAD plan view of a station layout including control house, trench network,
major equipment, panels, junction boxes, and optional connecting conduits.
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The rollover display WORKPOINT links using this default temp graphics color scheme:
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Trench end to Trench end – red
Trench end or Panel/Equip TAG or LOC to Conduit Entry – cyan
Trench end or Conduit end to Panel/Equipment LOC or TAG – green
Conduit vertex to vertex – cyan
Panel/Equp TAG/LOC to TAG/LOC – white or black
Note: The graphical path display does not necessarily identify the exact routing between workpoints. The cable
length between workpoints is calculated by the SDS_CBLSCHED tool as orthogonal dX + dY + dZ sum of distances
between adjacent workpoints in a routing path sequence. This calculated distance honors workpoint z-value UP
or DN modifiers to simplify cable length calculations via routing through overhead or under floor trays.
Reason 12 – Wiring Diagram Terminal Strips – Provides a quick, easy-to-use alternative to AcadE’s
Terminal Strip Editor for single-level, graphical wiring diagram generation of a terminal strip.
Each terminal inserted is a separate, stand-alone terminal symbol. The “strip” is just an array of contiguously
inserted terminal symbols. These terminal strips are completely compatible with the SDS_ANNO autoannotation and the SDS_ANNOFAN cable fan-in annotation tools (described later in this listing)
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Smart wiring diagram terminal strip representations can be inserted horizontally, vertically, and in normal or
reverse numbering order.
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Enable special “First” and “Last” terminal block symbols to automatically give special start/ending block
representations to the inserted “smart” connection wiring diagram terminal strips.
Reason 13 – Schematic Terminal Strips – Insert a smart schematic terminal strip, similar to the panel
wiring diagram version but consisting of individual schematic terminal symbols with incrementing terminal
numbers. Great for situations where you need a wiring diagram terminal strip “look alike” but inserted on a
schematic drawing.
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Terminal Strip ID - set the terminal strip tag and location values and the starting terminal number and
total terminal count for the terminal strip.
Terminal Type – select the more common Pass-thru type (no wire number change through the
terminal) or Break wire num if an assigned wire number changes to a different number on the other
side of the terminal strip.
Orientation – set horizontal or vertical orientation, set normal or reverse order terminal strip build
direction
Internal / External assignment – choose which “side” of terminals should map to the optional “I/E” flag
assignments. This can then drive which side of an equivalent panel connection wiring diagram terminal
strip will have schematic external connections and which side will show schematic internal
connections.
Terminal Symbol to use – browse to the schematic symbol library for selection. Note that the four
radio-button column selections will drive key parts of the schematic symbol name.
Option to drive schematic terminal strip symbol selection from catalog part number assignment.
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Reason 14 – Renumber Terminals by Pick Sequence – Renumber terminals in the order that you “pick”
on them. Works great for both schematic terminals and wiring diagram terminal symbols. Tool can also be
used to change all, picked, or windowed terminals to give LOC, INST, and/or terminal strip TAGSTRIP value
assignment. Great tool for copying a finished terminal strip junction box drawing and relabeling it for a second
panel instance.
Reason 15 – Term Strips showing both Wire no. and Term no. – Supports terminal strip wiring
diagram representations that need to carry both visible terminal number and a wire number assignment (a
not uncommon standard, especially for substation protection and controls design).
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Reason 16 – Multi-Level Term Strips – Supports a way of representing multi-level terminal strips. A
horizontal version is illustrated below.
Here is how to push a suffix value to the terminal number based upon lower or upper terminal:
Or reverse the order:
Reason 17 – Auto-annotation of Wiring Diagrams from Schematics – Great flexibility in creating fully
annotated connection wiring diagrams, automatically driven from connection information defined in the
schematics – far more options than the stock TSEditor’s “Graphical” representation or the AcadE’s “Wire
Annotation” tool.
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Choose connection wiring diagram annotation options from this SDS Tools dialog.
Select or window select the blank wiring diagram smart symbols. Schematic connection information is
immediately formatted per the above dialog’s settings and pushed on to the wiring diagram symbols.
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Reason 18 – Auto Leaders for Annotation – Automatically inserts little leader lines, as needed, between
wiring diagram terminal pin text and the non-blank annotation text. Two separate pieces of annotation text is
supported per connection pin (automatically delimited when there are more connections). Annotation and
little leaders are “Scootable” with the enhanced SDS Tools version of the AcadE standard “Scoot” tool.
Reason 19 – Annotation Format Flexibility – Include or exclude cable tags and cable core color codes in
the displayed annotation. Include or exclude far end connected Device and LOC code in the displayed
annotation.
Reason 20 – Annotation Format Overrides – Set individual annotation attribute to carry an annotation format
override value. This can then be optionally honored by the overall WD Annotation tool. This override feature can be very
useful when the internal and external sides of a connection wiring diagram terminal strip need to display different
annotation formats.
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Reason 21 – Anno Update Single Pick Mode – With SDS Tools, wiring diagram annotation can be
updated on a per component, per terminal, or per single connection basis. This means that a finished /
checked drawing can have a single annotation value updated without affecting or touching anything else on
that drawing. Great for last minute changes after project-wide QA checks are already complete.
Reason 22 – Swap Annotations – Clean-up of Wiring Diagram Annotation tool’s -- allow annotation
swapping between a pair of connection point attributes.
Example 1 – dual wire annotations on a wiring diagram “Test Switch” symbol
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Example 2 – Swapping Annotation on Tabular Wiring Diagram Symbol
Reason 23 – Component Tag Alias Option in Annotation – With SDS Tools, the AcadE MOUNT or
GROUPWITH attribute can be used to carry a short panel grid reference “alias” to be substituted for the full
panel symbol’s tag ID value wherever that tag ID shows up in wiring diagram annotation. In the example
below, any connection annotation that ties into relay carrying tag value “11/T1BU” can have shorthand “Q”
automatically substituted for “11/T1BU” in the wiring diagram’s annotation string. Any test switch component
carrying tag value “RTS-3” can have the shorthand alias “QC” grid reference substituted. Here is how the
MOUNT value is linked to the tag value on each panel component:
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Now, in the non-alias mode, the full tag value is included in all of the annotation:
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But, when the SDS Annotation tool is instructed to substitute any non-blank MOUNT value for the component
tag names, the result is much cleaner and easier to follow.
Reason 24– Audit WD Annotation vs. Schematics – Compare current state of smart schematic
connections with current state of wiring diagram annotation. Flag differences as Add/New and Remove/Old.
This tool compares the current state of the schematic wiring against the current state of the wiring depicted
by the annotation held on the wiring diagram symbols. It detects added and removed wire connections now
shown on the schematics that are not depicted on the wiring diagrams. It detects wire connections that
change -- that now come from some other source or through some other cable on the schematics but not
shown the same way on the wiring diagrams. It can optionally show “visually” the differences on the wiring
diagrams – this by flipping the annotation to Red or Green layers for a new wire connection or for a removed
wire connection respectively. It will show both Red and Green annotation on top of one another for a wire
connection that has changed (Red for the new schematic wire connection and a Green “text” lying on top of
the Red attribute holding the original WD value.
Example: Wiring connection changes, additions, and deletions can be sensed, displayed, surfed, and reported
in the smart SDS wiring diagrams. This example shows how a change in two test switch assignments on the
schematic / elementary drawing is detected and displayed in the wiring diagram using the AuditWD tool.
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On the wiring diagram, this tool displays the previous connection annotation in light green and the new in
bright red. These are on separate layers to enable one or the other or both to be displayed.
Alternately, the old/new differences can be displayed in a report, output to a file (various formats), and/or
Surfed.
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Reason 25 – Surf on Audit Wiring Diagram - Surf on exceptions flagged by a previous run of the
SDS_AUDITWD tool's audit of connection wiring diagram vs. schematics. In example shown here, four
mismatches with what is currently defined in the AcadE project’s schematic drawings are identified:
Leaving the SDS_AUDITWD command (with Exit) will automatically launch the WD Audit Surf tool. It will list
the differences and enable the user to quickly Surf to each wiring diagram mismatch.
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Reason 26 – Annotation-sensitive Jumpers – Wiring diagram annotation can be set to specially mark
annotation that appears to be a “jumper”. User can then use a special “Jumper” tool to replace a pair of
“jumpered” terminal pins with a jumper symbol.
Note: In the example above, when the physical jumper symbol replaces the jumper text annotation it also
removes the now redundant annotation. This is done automatically by the Terminal Jumpers tool and any
unused annotation is automatically removed.
If the physical jumper symbol is already in place prior to the SDS_ANNO wiring diagram annotation tool
applying the wire connection annotation, then the jumper text annotation also gets suppressed automatically
as the WD_ANNO tool processes the symbols.
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Reason 27 – Jumper Collision Avoidance – Jumpers inserted with the tool are “smart” dynamic blocks in
that they do an automatic collision check and offset adjustment as needed.
Reason 28 – Smart PLine Annotation Jumpers – Free-hand drawn “polyline” jumpers, drawn from
wiring diagram wire connection to wire connection, are fully supported. The SDS annotation tool recognizes
them and auto-suppresses the now unneeded jumper annotation at the connection points.
Reason 29 – Circuit Subsets per Block Name – Groups of standard polyline jumpers or other circuit
components can be created and pushed into the AcadE libraries so that they can be quickly applied to specific
wiring diagram block inserts on a moment’s notice. For example, different combinations of polyline jumpers
appropriate for a given protection relay.
Using the SDS ‘Add Circuit’ tool, pick on the symbol and the tool will search the AcadE panel or schematic
libraries and display the available sets of jumper circuits found in the library that can go with the picked
symbol’s block name.
Here is a portion of a wiring diagram with an inserted block representation of a SEL-311C relay. The symbol
block name is “WD_SEL-311C”. Launching the SDS ‘Add Circuit’ command and picking on this block finds two
circuits in the symbol libraries that are appropriate for this block.
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Selecting the one marked “All jumpers” and hitting OK inserts it into the drawing at the insertion point,
rotation, and scale of the underlying WD_SEL-311C block insert. Now, when the SDS Annotation tool is run
against this relay, annotation will be appropriately suppressed for the polyline jumper connections.
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Reason 30 – Auto-detected Jumpers during Reannotation – Running or rerunning the SDS Wiring
diagram annotation tool automatically detects existing jumpers on a given symbol and suppresses that visible
annotation.
Reason 31 – Internal Pin-to-Pin Jumpers Option – SDS Tools support out-board jumper representations
by default. But it also supports auto insertion of “pin-to-pin” straight jumpers on wiring diagram terminal
strips when it detects that adjacent terminals are defined as electrically jumpered on the schematics.
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Reason 32 – Windowed Int/Ext Assignments for Term Strips – The “Internal/External” sides of a
wiring diagram terminal strip are easily controlled by use of standard AcadE I/E manual assignments to hidden
attributes on each wiring diagram terminal representation. These I/E assignments quickly verified with the SDS
Rollover tool. Mass flipping of a terminal strip’s Internal / External connection sides is made easy with the
SDS_FLIPIE tool.
If you determine that the marked “Internal/External” sides of a wiring diagram terminal strip are reversed,
mass flipping is made easy with the SDS_FLIPIE tool. Window select and hit Return.
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Reason 33 – Smart Cable Fan-ins for Wiring Diagrams – Wiring diagram annotation tied to a given
cable can be quickly “fanned-in” to a single, smart cable symbol.
This tool starts with smart schematic wire connection annotation deposited on wiring diagram terminal strip
representations by the WD Annotation tool. User picks a group of wire connections that are identified as
belonging together in a “cable”. User pulls the connections over and up or down to merge into a single “fan in”
representation and identifies the fanned-in end point where the tool finishes by attaching an appropriately
labeled cable tag. These cable labels are even “Surfable” from one end to the other.
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Reason 34 – Cable Fan-in Leaders- Graphical Turn Options – Fan-in supports automatic chamfer, fillet,
or sharp corners.
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Reason 35 – Automatically generate Cable Fan-ins on Wiring Diagrams – Processes smart wiring
diagram terminal strip annotation and auto-insert Cable Fan-ins. This is driven from where smart annotation
indicates cable connections. This automatic cable fan-in operates in any mode: Drawing-wide, Project-wide, or
window select.
For setup, the user enters the desired fan-in “distance” defaults into the lower left-hand part of the dialog
shown above. These drive how the fan-ins will be drawn as they auto-insert project-wide, drawing-wide, or
window selected.
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Distance settings also provide collision detection and adjustment when the cable fan-ins potentially overlay
one another.
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Reason 36 – ‘No Fan-in’ Support for Stand-alone Cable Tags – Fan-in can be suppressed “No fan-in
option” leaving a stand-alone cable marker placed anywhere on the drawing with a visual cross-reference
code back to the grouped annotation. These can even work across different drawings – for example, all standalone cable markers for a panel might be placed on their own drawing but each links back to the cable
connections on the actual wiring diagrams.
Before
After
Reason 37 – Cable Fan-ins ‘Scootable’ – Fan-in parts and pieces, including fillets and chamfers, neatly
“Scootable” with the enhanced version of the SDS Scoot tool. Helps you clean up the fan-in geometry in
congested areas.
Reason 38 – Cable Fan-ins Display Available Spares – Cable fan-in marker symbol can automatically
display number of “spares” remaining for the given cable tag if the schematic parent cable marker carries a
part number assignment with core conductor assignments (to define the number of conductors for the cable
part number).
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Reason 39 – Cable Fan-in Labels DREF-aware – Cable fan-in tool can include in-line cable color code,
wire number assignment, and/or far-end’s cross-reference destination information text (using SDS Tool’s
special attribute DREF described below).
Reason 40 – Schematic Cable QA Report for Core ID Repeats – Leverage AcadE’s Cable From/To
Report with “User Post” post-processing to detect any cables with duplicated wire/core color assignments.
Reason 41 – Schematic Cable Fan-in Tool – Schematic wiring related to a cable can be “fanned-in” to a
smart cable label symbol at one end of the cable and then again wherever the other end of the cable's wiring
attaches to. These two fan-in labels are “Surfable” between each other and can interact with SDS_DREF crossreferencing. This tool is similar to the SDS_ANNOFAN for panel wiring diagrams but works on schematics, not
wiring diagrams. It uses small, in-line source/destination symbols to fully link the two ends of each wire
represented in the "from" and "to" fanned-in ends of the cable.
A cable fan-in from multiple conductors to a single cable element is provided by the SDS_SIGFAN tool. Here is
an example showing the insertion of a cable fan-in consisting of four separate wires at the “destination” end
that matches with a “source” end elsewhere in the project set (in this example it’s on the same drawing).
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This example also shows inserting a set of smart cable markers into one end of the fanned wires. This is a
separate operation.
Two things this Schematic Cable Fan-in tool does:
1. It works with AcadE to enable a “continuous connection” of each of the four separate conductors tying
between the CTs on the left and the test switch and SEL relay inputs on the right. The tool does this by
inserting matched pairs of tiny, in-line AcadE Source/Destination wire signal symbols into the wire segments at
each end of the fan-in/fan-out.
2. As a result of the "continuous connection", the wire numbering and cable and conductor color
assignments are maintained across the gap between the source on the left and the destination on the right.
This also works when “the gap” is from one drawing to another in the project set.
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Reason 42 – Schematic Cable Fan-in User Customization – Supports creating your own custom
AutoLISP function to customize this tool. One function, if present in memory, will execute just after the cable
fan-in label pops in and before the AcadE EDIT COMPONENT dialog opens. A different one will execute just
after the EDIT COMPONENT dialog closes and any Source/Destination in-line SIGNAL symbols have been
inserted. An example AutoLISP program template is provided for each.
Reason 43 – Schematic Cable Fan-in MOVE Connections – Quickly change schematic cable fan-in
connections.
Example: Here is a schematic fan-in cable inserted with the Schematic cable fan-in tool (not the Wiring
Diagram version). The cable tag C-45 is assigned a part number for a 25 pair telecom cable and the fan-in
connections auto-mark with the default color sequence defined for that part number on the smart
Source/Destination in-line markers. Later on in the design process, it is determined that the pair of wires on
input #5 need to be connected to input #9 but WITHOUT disturbing the existing wire connections and color
assignments already in place.
Use this SDS tool, window the two alarm #5 connections, and slide them down to alarm #9:
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And that’s it!
Reason 44 – Toggle Symbol Tool – Use SDS “Toggle Symbol” tool to instantly flip signal arrow symbols
between Source and Destination types or flip a schematic cable marker between parent and child instantly. It
can even flip a schematic terminal between its H and V versions – solving an often frustrating problem with
stock AcadE.
Reason 45 – Persistent ‘Show Signals’ Tool – Unlike AcadE, the SDS Tools version of the “Show Signals”
tool is persistent! The user can zoom and pan and the temp graphics remains visible until the command is
exited.
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Reason 46 – Show Phase Tool – Show Phase tool traces picked wire segment and follows it through the
project set (not just the active drawing)
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Show Phase on active drawing is persistent… user can zoom in, pan and the highlight remains visible. Pick in
multiple phases, each highlighted a different color.
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Reason 47 – Find/Display Attached Grounds – Show Phase tool tracks and lists each “ground”
connection found on the picked phase in the project-wide search. This list is surfable.
Reason 48 – Show Phase / Surf Connections Project-Wide – Show Phase tool provides a surfable list
of ALL component connections, project-wide, tied to a picked wire segment.
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Reason 49 – Test Switch Assignment Manager – Edit Test Switch tool displays and enables
reassignments on complex test switches project-wide
This utility displays current test switch pin assignments project-wide in a left-hand pick list. It finds and lists
groups of unused / spare switch positions on a per-switch basis. It allows a picked test switch’s pin
assignments to be moved to a different part of the switch or even assigned to a different test switch.
Reason 50 – Annunciator I/O and Faceplate Manager – Update “window” descriptions shown in a
panel layout annunciator faceplate L/O symbol with each window’s linked I/O point parent or child symbol
found in the schematics. This update is selectively bi-directional … update faceplate L/O with descriptions
carried on the schematic I/O points, or drive faceplate window description edits back out to the parent or child
I/O points scattered throughout the schematics.
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Reason 51 – Relay 1-Line Symbol Builder – Easy insertion and adjustment of “bubble” type 1-Line relay
and transformer internal protection representations. Adjust options from pick list. Add or remove will length
or shorten the representation.
Reason 52 – CT Ratio Annotation Tool – Annotate schematic CT with terminal pin number per selected
CT max and ratio selection. Supports single-pole, three single-poles grouped together, and CT groups
embedded into an overall schematic symbol.
Select from standard set of CT Ratio sets of annotation and push appropriate CT connection point terminal
assignments out to the CTs based upon the ratio selected and which CT group is being processed.
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Reason 53 – CT Ground Out Tool – Insert predefined wiring circuit to “Ground out” 1-line or 3-line groups
of CTs. This tool pops in a saved DWG “circuit” at the picked CT’s closest wire connection point. The file name of the
circuit is in this format:
“CIRC(“ + block_name +”)_” + closest_wire_connection_direction_code
Example below is for inserting a ground-out AcadE “circuit” when picking on a “2 direction” wire connection point on
symbol named VCB11_PWR3_C-C-X-C-C.
Reason 54 – Battery Bank Report – Sum kW load assignments per battery bank and display results in both
an on-screen summary and as a detailed report displayable from AcadE’s report display, format, and print
dialog.
Assign battery bank number or tag ID and kW load value to schematic or panel components as a value on any
DESC1-3 or RATING1-12 attribute in this format: BANK=<battery bank ID>;KW=<kW load>. If this battery bank
info is combined on a single attribute with other data, delimit the BANK and KW value with beginning and/or
ending “;” character.
Reason 55 – Tie-Link - Connect New/Smart to Dumb/Existing - Purpose-built commands and support
library for inserting smart schematic and/or panel wiring diagram “Tie-Link” connection points on dumb
“brownfield” CAD or raster drawings.
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This tool is used to insert tiny, AcadE-smart connection symbols over the top of existing graphics on
“brownfield” raster or dumb AutoCAD drawings. These Tie-Link symbols include a “wire” connection point and
the attributes appropriate for a component or a terminal, either schematic or panel W/D.
The advantage of using Tie-Links is that it avoids having to convert the entire symbol to be an AcadE-smart
symbol. Tie-links allow AcadE to generate various wire and cable point-to-point From/To Report that include
what is connected to each end of the wire, even when an end “connects” to a dumb CAD or raster image
representation.
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Reason 56 – Tie-Link Array Mode – Quickly populate a dumb CAD or raster image of a terminal strip with
smart incrementing Tie-Links in an “array” insertion mode.
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Reason 57 – Cable Schedules – A path “Workpoint” list of equipment and panel XY and optional Z location
coordinates along with trench and conduit start/end XYZ coordinate points can be leveraged by SDS Tools to
create detailed cable schedules, duct/conduit schedules, and totalized BOM reports by cable type. It can
calculate cable lengths and optionally calculate potential inrush voltage drops, conduit fill, and generate
duct/conduit reports. It does not require modeling cables or conduits (or even trenches). It is driven only upon
strategic placement and naming of “Workpoints” on an Inventor 3D model or on an AutoCAD plan view (2D or
3D) of the overall position layout of power and control enclosures and connected equipment.
Here is a plan view of a substation control house, trench, and major equipment. Uniquely name
“WORKPOINTS” are inserted marking the XY (and optionally Z) positions of control enclosures and junction
boxes in the control house, beginning and ending points of trench sections.
The WORKPOINTs are inserted, named, and special encoding added using this tool:
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With WORKPOINTs shown on a plan view layout with control panels, junction boxes, equipment, and wiring
paths such as ducts, trenches, conduits identified, SDS Tools can now generate a detailed cable schedule. This
is done by combining schematic cable from/to location pairs with corresponding WORKPOINTs on the plan
layout. Cable lengths, routing paths, and even estimated voltage drops can be formatted into a detailed
project cable schedule report. Example below.
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Reason 58 – Duct and Conduit Fill/Cable Tag Reports – Similar to above but generates a trench/duct
and conduit list, determines cables and cable size within each entry, and calculates conduit fill. Also includes a
cable list running through each trench, duct, and conduit.
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Reason 59 – Totalized Cable BOM / Cable Tag Reports – Using ‘Workpoint’ data from ‘41’ above,
generates a totalized cable BOM by cable type. Includes a listing of cable tags per cable type.
Reason 60 – Show Wires Tool for Schematic QA – SHOW WIRES tools provides quick, visual QA check
on schematic wires by LAYER name.
It is persistent in that user can zoom and pan across the drawing, carefully examining wire connections.
Display all wire layers or one at a time.
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The tool also detects and displays “zero length wires” which can be a problem with AcadE.
It can visually display wire number pointer-to-segment links and help you diagnose issues. The tool lets you
scroll around and zoom in and out, all without losing the temp graphics display.
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Reason 61 – Recalc Wire Size – This is an alternate, easy link into the standard AcadE “Re-calculate Wire
Size” tool. This launches the tool immediately upon a pick on a cable marker, schematic wire, or other AcadE
symbol. There is no “motor size selection” prerequisite to get the tool to launch and display.
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Reason 62 – Job/WorkOrder Status Toolset – Job/WO Status Assignment tool provides means to mark
and show or hide a given “Work order” number and status assignment. Mark selected symbols, wiring, and
general non-AcadE geometry of active project with a Job/Work-order number and a status assignment such as
“New” or “Remove” or “Revise” or “Abandon”. Each of these status levels can have its own layer and color
assignment. The marked entities are moved to these layers but their original layers are remembered. Tool
then enables Job/Work-orders to be turned on and off (by flipping marked entities between their saved
original layers and their picked status layers). Tool allows specific Status levels to be turned on and off (by
manipulation of the status layers’ visibility).
•
Job/Work-order and Status marking of components, devices, wires, and any geometry across all
drawings in the AcadE “active” project.
•
An AcadE project can have one or many simultaneous Job/Work-orders in progress, each with Status
levels from an unlimited, user-defined status name list. An example Status levels list might be “New”,
“Removed”, “Existing”, “Revised”, “Reconnected”, “Abandoned”. Components and entities can be marked
with just one Job/WO and status combination at a time.
•
All Job/Work-order and status assignments are maintained in the native AcadE project drawing set.
These assignments persist on the drawings of the AcadE project after closing and become re-accessible
upon reopening the project. There is no external database involved.
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•
Any visible entity type – lines, arcs, text, wires, components, labels, text, rev clouds, dimensions – can
be marked as tied to a specific Job/Work-order and a selected Status level of that Job/Work-order.
•
Running totals of marked entities are stored inside a table in the project scratch database, so when
changes are made to the drawing set using the Job/WO tool, users will have to use the Update
Counts button to ensure that the most up-to-date information is stored in that database table.
•
Marking or Unmarking a parent symbol gives the user the option to automatically update some or all
child and related symbols (including panel symbols) to match the parent's new Job/WO and status.
•
Impacted annotation attributes on wiring diagram symbols are automatically marked with the correct
Job/WO and status. For example, if schematic terminal TA:1 is marked for "Remove" on a Job/WO,
everywhere terminal TA:1 appears in annotation on the associated wiring diagram, that annotation
attribute will be marked with the same color and layer information as the schematic symbol TA:1 was
marked.
•
Close out a Job/WO with the Rename, Reassign, Erase, and Normalize utilities.
•
Automatically add Revision Clouds and Hatches to marked entities in Pick, Drawing Wide, and Project
Wide modes. Also add Revision Clouds and Hatches to impacted annotation attributes in Project
Wide mode.
•
For a drawing with marked entities related to different Job/Work-order assignments, each Job/Workorder along with all of its marked entities can be turned on and off. Its marked Status level state can be
individually turned on and off.
Each of the specific Job/Work-order can be individually turned on and off.
•
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Reason 63 – Automatically Add Job/WO Revision Clouds and Hatches – Automatically add revision
clouds with or without hatches to selected Job/WO and Status combinations. Pick, Active Drawing, and
Project-wide options supported. This function includes an option to remove revision clouds from selected
Job/WO and Status combinations.
Reason 64 – Manually Draw ‘Smart’ Job/WO Revision Clouds – Manually drawing fully compatible
smart revision clouds for a given Job/WO and Status combination and mark items inside the cloud to carry the
cloud’s Job/WO and Status assignment.
Reason 65 – Job/WO Utilities – Manually pick, Drawing-wide, or Project-wide manipulation of existing
marked Job/WO and Status items. Options include:
•
Rename/Move to a different Job/Work-order – Enables the user to move selected entities from one
Job/WO to another, or even move entities to a new Job/WO. Entities will maintain their current status
assignment, but the Job/WO to which they are assigned will change.
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•
•
•
The Reassign selected status function allows users to move selected entities from one status to
another within the same Job/WO. The user must first select a Job/WO from within the Select
Job/Workorder window, and then select one or more statuses from the status list. Multiple statuses
can be reassigned to a single status with this function. After clicking the Reassign selected
statuses radio button, the user must select a status from the dropdown menu. This means that entities
on the selected status in the Select Statuses list will be moved to the status chosen from the dropdown
list.
The Erase Marked Entities function allows the user to erase some or all entities that have been marked
for a specific Job/WO and status combination. The user must first select a Job/WO from the Select
Job/Workorder window, and then select one or more statuses from the Select Statuses list. Marked
entities from multiple statuses can be erased with this function. Once one or more statuses have been
chosen, the user must then pick the Erase Marked Entities radio button from the list. This activates the
three selection options: Project Wide, Active DWG, and Pick.
The Normalize Marked Entities function allows the user to return a selection of marked entities to
their original, or normal, state. Normalized entities have all of their Job/WO and status information
removed (this data is carried as xdata on each entity), and they are restored to their original layer and
color. A normalized state may reflect a new standard or revision of the active drawing and/or project.
Reason 66 – Quick Match Job/WO & Status from Source Pick to Many - Like AutoCAD's MATCH
PROPERTY command but for JobWO and Status assignments. Select a "source" object that carries an existing
JobWO/Status assignment and then select or window select other objects to match. Appropriate permission
prompting if the “copy to” objects are already assigned.
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Reason 67 – Multiple, Simultaneous Job/WO Support – Support to mark and track and Surf on multiple
work orders on a single AutoCAD Electrical project drawing set.
Reason 68 – Job/WO and Status Report – Support to track and report a given Work-order with its status
assignments. This Report function allows users to generate reports for a given Job/WO and one, some, or all
of the statuses for which entities have been marked on that Job/WO. User can optionally filter the entity types
to report:
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The tool compiles a list of drawings that contain marked entities for the selected Job/WO, and users can select
one or more drawings from which to generate the desired report.
The normal AcadE report dialog displays documenting the selected Job/WO assignments. Reformat the report
using the normal AcadE supported options on this report display dialog. Then select “Save” to file or “Put on
Drawing” as a table.
Reason 69 – Support for Job/WO and STATUS fields to display in stock AcadE reports – SDS Tools
JobWO and STATUS values are compatible with AcadE’s “User defined attribute” and default.wda or
<project>.wda configuration file feature. Example: get JobWO and Status assignments showing up in your
standard AcadE Component List reports.
Reason 70 – Job/WO Change Notes – Support for marking any entity marked with Job/WO and status
assignment with additional hidden descriptions that can then be included in the reporting for a specific work
order’s listing of components, wire, cables, dumb geometry tied to the specific Job/WO.
Reason 71 – Improved Wire Sequence Tool – SDS Tools enhanced version of AcadE’s Edit Wire
Connection Sequence tool, a “Quick” version, is smarter in avoiding needless and lengthy rebuilds of the wire
connection tables in the project database.
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Reason 72 – Wire Numbering ‘By LOC’ Option – SDS Tools enables AcadE to handle inserting / editing /
tracking wiring numbering “By LOC” (but current AcadE auditing function does flag these as wire number
repeats)
Reason 73 – ‘Master’ → ‘Ref-only’ Update Feature – Enable a component marked as “Master” to
trigger semi-automatic attribute value updating of matched tag attributes on a block insert that has been
marked as “Reference-only”.
Once this link is established, user edits the master component and, if a reference-only symbol for that master
is found in the AcadE project set, user is prompted for permission to update matching attribute tags on the
reference-only whose values don’t match the current value found on the master. The tool also supports
checking symbols and non-AcadE block instances for reference-only links back to a master and then prompts
user for permission to update the reference-only symbol’s mismatched values.
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When a reference-only symbol instance is linked to a master, the user can trigger a check and selective
update. This dialog shows the tool comparing attribute values carried on a linked pair of symbols. It shows that
there are three common attributes between the linked master / ref-only symbols that have value mismatches
(highlighted in red below). The attributes are TERM01, TERM02, and TERM03.
When drawings containing legacy Master/Ref-only marked items are added to the current project, the
SDS_UTIL_REFONLY_CLEAN tool is provided to reconcile the copied Master/Ref-only pairs into its new project
drawing set.
Reason 74 – Super-flexible DREF Cross-ref Attribute – New, configurable cross-reference update
feature in the form of a new symbol attribute named “DREF”. Update a symbol’s DREF attribute with crossreference annotation based upon a paired “far-end” component. The DREF annotation can include data pulled
from the far-end symbol’s drawing properties, its attributes, or its connection values. This is all encoded per a
format string held in the DREF attribute “Prompt” value or defined in an attribute value held on a hidden,
companion FORMAT_DREF attribute.
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A DREF attribute can be defined as single-line or a multi-line attribute. For example, the first line might be
encoded with destination LOC value and the second line with the destination’s drawing name.
There is DREF annotation referencing support for these types of symbol-to-symbol relationships:
•Schematic Src/Dest arrows - Paired set of Schematic Src/Dest signal arrow symbols.
•Schematic Cable Fan-in symbols - Paired set of Schematic Cable Fan-in symbols.
•Panel WD Cable Fan-in symbols - Paired set of Wiring diagram Cable fan-in label symbols.
•Master/Ref-only pairs - Master / Ref-only paired symbols.
•Panel symbol to Schematic symbol - Panel symbol attribute values pushing up to its paired schematic
symbol(s) - this works one-way only, from Panel --> Schem).
Limitation: SDS_DREF does NOT support schematic parent/child cross-referencing. This is covered by
an AcadE cross-referencing tool using the "XREF" attributes.
DREF Annotation Format String
The DREF format is user-defined as a text string value containing text and DREF annotation codes. The
resulting format string definition is held either on the DREF attribute as a “Prompt” value or defined on a
companion FORMAT_DREF attribute. The format string is flexible. It can have just a single Annotation Code,
multiple codes, or a mixture of text, punctuation, and codes.
Any Component Attribute can be set up to behave like a DREF Attribute
Any symbol attribute <attr_name> with a corresponding non-blank FORMAT_<attr_name> will trigger
SDS_DREF to update the <attr_name> attribute per the DREF-compatible format carried on invisible attribute
FORMAT_<attr_name> (ex: attributes 'ANYNAME' and 'FORMAT_ANYNAME'). Wow.
DREF Annotation Codes
There are cross-reference annotation options available for each DREF attribute’s format string, but not all
options are available for every relationship. Here is the breakdown:
1. DREF support for Schematic Source/Destination arrows
·%S = Far-end connection - Sheet assignment (if target sheet value is same as source, %S defaults to
“THIS DWG” unless overridden as described in “LISP globals” below
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·%D = Far-end connection - Drawing name assignment (Drawing Properties, not the drawing file name)
·%Z = Far-end connection - Drawing file name (no path, no extension)
·%A = Far-end connection - Section assignment (Drawing Properties)
·%B = Far-end connection - Sub-section assignment (Drawing Properties)
·%P = Far-end connection - Project assignment (Drawing Properties)
·%I = Far-end connection - Installation assignment (Drawing Properties or non-blank INST attribute
value)
·%L = Far-end connection - Location assignment (Drawing Properties or non-blank LOC attribute value)
·%N = Far-end connection - Component’s Grid/Zone or Ladder Line Reference value
•^V$attrname$ = Far-end component or terminal non-blank attribute value (ex: ^V$DESC3$ would pull
in the far-end component/terminal’s DESC3 value. Any attribute name can be used and multiple
^V$attrname$ can be encoded together within the format string. Attribute names used in this format
string are not limited to just the AcadE standard attribute names. Important: this ^V$<attrname$
option requires that the Src/Dest wire network component connections are "Wire Sequenced".
•^$attrname$ = Attribute name or Xdata name (text only value) held on the arrow symbol at the other
end of a linked Src/Dest pair. For example, a wired Src arrow leaving a power supply symbol could
carry an invisible attribute on the Src arrow named "END_DESC" with a value of "CAB2-PS". The Dest
arrow at the other end of the wire (in the same or different drawing) could be set up with a
FORMAT_DREF value including the substring "From ^$END_DESC$". In operation, the SDS_DREF would
then automatically mark the Dest arrow's DREF with substring "From CAB2-PS". Likewise the Dest
arrow could be set up with an invisible attribute "END_DESC" and marked with a user-assigned value of
"RACK 20 (Bottom)". Now, if the Src arrow's FORMAT_DREF includes the substring "To ^$END_DESC$",
then SDS_DREF will automatically mark the Src arrow's DREF with substring "To RACK 20 (Bottom)".
Note: any attribute name can be used, or multiple used in a single format string. Xdata text values are
also supported.
Summarizing difference between Source/Destination usage of ^$attrname$ vs. ^V$attrname$
Both can be used on a Source or Destination arrow symbol, but
o
^$attrname$ - limited to transfer of Attrib/Xdata values only between the Source and
Destination symbols themselves
o
^V$attrname$ - transfer of Attrib/Xdata values between 1) a Source arrow and the first
(via wire sequence assignment) far-end connected symbol or terminal beyond the Destination
arrow, or 2) a Destination arrow and the last far-end connected symbol (via wire sequence
assignment) just before the Source arrow.
2. DREF support for Schematic Cable Fan-in symbols
·%S = Far-end connection - Sheet assignment (if target sheet value is same as source, %S defaults to
“THIS DWG” unless overridden as described in “LISP globals” below
·%D = Far-end connection - Drawing name assignment (Drawing Properties, not the drawing file name)
·%Z = Far-end connection - Drawing file name (no path, no extension)
·%A = Far-end connection - Section assignment (Drawing Properties)
·%B = Far-end connection - Sub-section assignment (Drawing Properties)
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·%P = Far-end connection - Project assignment (Drawing Properties)
·%I = Far-end connection - Installation assignment (Drawing Properties or non-blank INST attribute
value)
·%L = Far-end connection – Location assignment (Drawing Properties or non-blank LOC attribute value)
·%N = Far-end connection - Component’s Grid / Zone or Ladder Line Reference value
•%T = Far-end connection - Component tag or terminal strip tag value
·%Y = Far-end connection - TERMxx pin number or terminal number
·%Q = Far-end connection - TERMDESCxx value (corresponding to %Y TERMxx pin) – Note: for
schematic terminals this currently only returns the “I” or “E” or blank internal/external assignment
flags.
·^V$attrname$ = Far-end component or terminal non-blank attribute value (ex: ^V$DESC3$ would pull
in the far-end component/terminal’s DESC3 value). Any attribute name can be used, and multiple
^V$attrname$ flags can be encoded into a single DREF format string. The names are not limited to just
AcadE standard attribute names.
•^$attrname$ = Near-end component or terminal non-blank attribute value (ex: ^$DESC3$ would pull
in the near-end component/terminal's DESC3 value). Any attribute name can be used, and multiple
^$attrname$ flags can be encoded into a single DREF format string. The names are not limited to just
AcadE standard attribute names.
3. DREF support for Panel Wiring Diagram Cable Fan-in symbols
·%S = Far-end connection - Sheet assignment (if target sheet value is same as source, %S defaults to
“THIS DWG” unless overridden as described in “LISP globals” below
·%D = Far-end connection - Drawing name assignment (Drawing Properties, not the drawing file name)
·%Z = Far-end connection - Drawing file name (no path, no extension)
·%A = Far-end connection - Section assignment (Drawing Properties)
·%B = Far-end connection - Sub-section assignment (Drawing Properties)
·%P = Far-end connection - Project assignment (Drawing Properties)
·%I = Far-end connection - Installation assignment (Drawing Properties or non-blank INST attribute
value)
·%L = Far-end connection - Location assignment (Drawing Properties or non-blank LOC attribute value)
·%N = Far-end connection - Component’s Grid / Zone or Ladder Line Reference value
•%T = Far-end connection - Component tag or terminal strip tag value
·%M = Far-end connected panel symbol's MOUNT attribute value (for FAN-IN to panel terminal strips,
all fanned-in terminals should have a non-blank MOUNT attribute to guarantee a non-blank far-end
connection value is returned)
·%U = Far-end connected panel symbol's GROUPWITH attribute value (for FAN-IN to panel terminal
strips, all fanned-in terminals should have a non-blank GROUPWITH attribute to guarantee a non-blank
far-end connection value is returned)
•%Y = Far-end connection - TERMxx pin number or terminal number
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·%Q = Far-end connection - TERMDESCxx value (corresponding to %Y TERMxx pin) – Note: for
schematic terminals this currently only returns the “I” or “E” or blank internal/external assignment
flags.
·^V$attrname$ = Far-end component or terminal non-blank attribute value (ex: ^V$DESC3$ would pull
in the far-end component/terminal’s DESC3 value). Any attribute name can be used, and multiple
^V$attrname$ flags can be encoded into a single DREF format string. The names are not limited to just
AcadE standard attribute names.
•^$attrname$ = Near-end component or terminal non-blank attribute value (ex: ^$DESC3$ would pull
in the near-end component/terminal's DESC3 value). Any attribute name can be used, and multiple
^$attrname$ flags can be encoded into a single DREF format string. The names are not limited to just
AcadE standard attribute names.
4. DREF support for paired symbols marked as Master and Ref-only
•%S = Far-end connection - Sheet assignment (if target sheet value is same as source, %S defaults to
“THIS DWG” unless overridden as described in “LISP globals” below
·%D = Far-end connection - Drawing name assignment (Drawing Properties, not the drawing file name)
·%Z = Far-end connection - Drawing file name (no path, no extension)
·%A = Far-end connection - Section assignment (Drawing Properties)
·%B = Far-end connection - Sub-section assignment (Drawing Properties)
·%P = Far-end connection - Project assignment (Drawing Properties)
·%I = Far-end connection - Installation assignment (Drawing Properties or non-blank INST attribute
value)
·%L = Far-end connection - Location assignment (Drawing Properties or non-blank LOC attribute value)
·%N = Far-end connection - Component’s Grid/Zone or Ladder Line Reference value
5. DREF support for Panel symbol --> Schematic symbol
The following annotation codes are applied to DREFs on Schematic symbols meant to pull in specific attribute
values from their related Panel symbols (Panel --> Schematic only)
·%M = Far-end panel symbol - Panel symbol’s MOUNT attribute value
·%U = Far-end panel symbol - Panel symbol’s GROUPWITH attribute value
·^V$attrname$ = Far-end component or terminal non-blank attribute value (ex: ^V$DESC3$ would pull
in the far-end component/terminal’s DESC3 value). Any attribute name can be used, and multiple
^V$attrname$ flags can be encoded into a single DREF format string. The names are not limited to just
AcadE standard attribute names.
Annotation Format String - Example
Here is an example of a panel wiring diagram cable fan-in label symbol (cable #42). This symbol includes a
visible DREF right-justified attribute and a small, hidden FORMAT_DREF attribute. The visible DREF attribute is
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defined with a default prompt string of “%L (%S)” and the symbol’s FORMAT_DREF has a user-entered value of
“%T %L(%Z)”.
When the SDS_DREF tool operates on this symbol, it ignores the DREF prompt format string and defers to the
FORMAT_DREF override attribute’s format string value. It pushes out cross-reference annotation based upon
this non-blank FORMAT_DREF format string.
Reason 75 – Configurable ‘Smart’ Tables – Ability to set up smart tables to automatically list, row by
row, the I/O points of protective relays, switches, and other complex schematic devices.
The table looks like a “panel layout” child of the schematic parent device (carries parent’s TAG as a link). As
the design progresses, the tables can be automatically freshened with the current states of the tracked
devices. For example, each complex protection relay can be set up with its own smart table to track / display a
tabular list of I/O points – what is assigned and what is still available. Amazing.
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Example: BEFORE
Moments later: AFTER
Table Customization – column attribute suffixes that drive the column’s displayed data:
•
A, B (attribute columns RxxA and RxxB) - Carry contact pin number assignment for the row. This is the
only required code or codes. The pin numbers are in either column “A” or column “B”, or split between
columns A and B.
Note: If only a single column (either A or B) is defined in the table and there are multiple pins to define
for a row’s I/O point, the pin numbers are entered on to the single A or B attribute as a comma-
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delimited character string. For example, if the table is set up to only use column B attributes for the pin
number definition (attribute SDS_TBL_ROW_FORMAT includes substring value of “PINS=B”) and the
I/O point is a two-pin output with pins A11 and A12, then it would be encoded as text value “A11,A12”
on the row’s RxxB column attribute. If it is a Form-C contact with three pins B01, B02, and B03, then it
would be “B01,B02,B03” on the row’s RxxB column attribute.
If the table is set up so that the first pin is in column “A” and the second pin of the pair is given in
column “B”, then the SDS_TBL_ROW_FORMAT attribute value includes a substring value of “PINS=A,B”.
•
•
•
•
•
•
•
•
•
•
•
•
•
•
D – Drawing file name location of the row’s contact (path and extension suppressed).
E – Contact description (default is its RATING2 attribute value. Attribute CA_E provided for
customizable override).
F – Contact description (default is DESC2+DESC3 and then RATING1 previous is blank. Attribute
CA_F provides customizable override).
G – Contact description (default is DESC1. Attribute CA_G provided for customizable override).
H – Contact description (default is PINLIST_TYPE. Attribute CA_H provided for customizable override).
J – Contact description (default is non-blank wire connection TERMDESCxx value. If blank, then
RATING2).
K – Contact description (default is non-blank TERMDESCxx value. If blank, then DESC2+DESC3. If still
blank, then RATING1).
L – Contact description (default is non-blank wire connection TERMDESCxx value. If blank, then DESC1).
M – Connected cable tag.
S – Connected test switches (Tag + wire connection pin numbers).
T – Connected terminals (Tag + terminal number) if test switch is “outboard” of terminals.
U – First connection, whether terminal or test switch or other.
Z – Contact drawing reference value calculated by AcadE based upon Grid location or ladder line
reference number (whichever is set up in Drawing Properties > Drawing Format tab > Format
Referencing).
•
%Z - Same as Z above but reference value is formatted per the "Same Drawing" or "Between Drawings" settings
found on Drawing Properties > Cross-References tab > Cross-Reference
Format.%D – Value contained in “Drawing” field from the Drawing Properties menu of the target
•
•
•
drawing.
%S – Value contained in “Sheet” field from the Drawing Properties menu of the target drawing.
%A – Value contained in “Section” field from the Drawing Properties menu of the target drawing.
%B – Value contained in “Sub-Section” field from the Drawing Properties menu of the target drawing.
Reason 76 – Edit SIGCODES for Source & Destination Arrows - Edit signal codes of either source or
destination arrows and automatically update signal codes of orphaned arrows. Orphaned signal codes can be
updated on closed drawings (without first having to open them).
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Reason 77 – Block Swap for Schematic Terminal Symbols - work-around for limitation of AcadE’s Block
Swap tool when dealing with schematic terminal swaps – problem with maintaining the original symbol’s “H”
or “V” prefix even though you want to force the new terminal to the opposite.
Reason 78 – Bracket Note Tool – Assists in neatly placing bracketed notes on terminal strips.
Reason 79 – Stand-alone smart Cable Tag and Wire Number labels – Insert smart wire number and
leader to supplement a selected piece of wiring diagram annotation. If wire number assignment is changed on
the schematics, a re-run of the Annotation tool or the Single pick Annotation tool will update this WNLABELinserted version of a smart wire number to match it. In short, this is a wiring diagram copy of a smart
schematic wire number.
The wiring diagram example shown below has wire numbers “4CN” and “4CP” pulled across from the
schematics.
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Reason 80 – Title Block Revision – SDS Tools can be configured to automatically add the next “revision
line” to your title block, update title blocks rev level attribute value, and provide means to generate a projectwide report listing current revision level and revision description plus optional date, drawn by, approved by,
etc. for each drawing in the AcadE project set. Retro-fit existing title block with a handful of invisible attributes
and create a smart revision “row” block/attributes to drive this feature:
Reason 81 – Wild Card-Delimited Data Editor – Search and replace nearly any kind of text value in the
active drawing or across a subset or all drawings in the active AcadE project drawing set. There are three
Search/Replace modes provided.
Mode 1 - Simple Text Search/Replace
The Data Editor tool includes an option for a Simple Text Search/Replace (no wild card-delimiters) that
operates in either a Substring match mode or Match whole value mode (controlled by the Match whole value
toggle value). It will process block attribute values and multi-line attribute values and optionally operate on
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regular Text and MText (controlled by the Include Text and MText toggle). It will process either the active
drawing in the active project or all drawings in the active project or a selected subset of those drawings.
Mode 2 – Wild Card-Delimited Search/Replace
This Search/Replace is accomplished by placing a “Search value” between a set of “wild-card” delimiter
characters such as “$” or “&” and embedding these into attribute/Text/Mtext values throughout the project
template set. Then, using the Data Editor’s Wild Card-Delimited mode and selecting Update Search button, all
delimited substrings found in the active project are extracted and pushed into the “Search Value” column of
the dialog’s grid. Now just enter a “Replace with value” appropriate for each specific wild-carded “Search
value”. With a few more keystrokes, the drawing set updates with the Replace value substituted for the search
value its wild card characters (see Example 2 below for illustrated step-by-step sequence).
Mode 3 – RegEx Search/Replace
The Data Editor tool also has an option that supports a “RegEx” search expression mode.
Example - Wild Card-Delimited Search/Replace
You can quickly turn a copied template project set into a new project-specific drawing set by finding and
replacing Wild Card-delimited character strings embedded within attribute text, multi-line attribute text,
regular Text, and Mtext. This search/replace can be operated drawing-wide or project wide on the
copied/renamed drawing set.
For this example, you have an AcadE/SDS substation template set that has hundreds of places where the
incoming and outgoing kV voltage levels need to display on Text/Mtext notes and on attribute values. You
want to automate this template set to allow quick update when it is copied and renamed to start a new AcadE
project.
You decide that the “code” substring for the incoming kV voltage level will be “HSVOLT”. For the outgoing
voltage you choose “LSVOLT”. Now you go through the template set and manually substitute “$HSVOLT$” for
every place that the incoming kV voltage value shows up in any Text/Mtext or attribute value. If your template
has a piece of text that currently says “TO HV 345KV OPERATING BUS”, you change it to be “TO HV
$HSVOLT$kV OPERATING BUS”.
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The AcadE/SDS template set is now ready when you are!
Scenario: New substation design is needed… 128kV in high side, 12kV feeder low side.
1. You use AcadE’s COPY PROJECT tool to make a copy your above template set and push into a new
AcadE project name (ex: “BIG OAKS” substation project)
2. With this new project the “active” AcadE project, launch the SDS Project Data Editor tool as shown
below. Stretch out the dialog, if necessary, to display as shown below. Select the “Find Wild Cards”
button.
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3. The dialog displays a grid list of all “$-delimited” codes found in the active project set. Scroll down to
find “$HSVOLT$” and “$LSVOLT$” entries. There are over 4000 instances found scattered throughout
the drawing set.
4. Type “12” for $LSVOLT$ and “128” for $HSVOLT$ into the “Replace” column. Now you’re almost ready
to quickly update four thousand pieces of text across your new project drawing set. Select “Update
Project.”
5. Since not every line has a “Replace with Value” but is blank, make sure you turn on the “Default Skip
Blanks” option.
6. With “Default Skip Blanks” toggled “ON”, select “Update Project” button to move to the next dialog.
7. Select drawings to process and then Review Final Selections. If all looks good, hit OK. The >4000 value
replacements will be made throughout the drawing set.
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Reason 82 – Parameter Settings Tool – Define and manage default parameters for several dozen of the most
commonly-used tools in the SDS Toolkit. These can be defined/managed either on a system-wide basis or on a projectname specific basis which simplifies the support for differing standards among multiple clients.
The SDS Settings tool has a dialog (shown above) where users can make and process changes to one or more
of the tools. In the left-hand column is a list of all of the Settings-optimized tools in the SDS toolkit. Users can
modify the parameters of one of these tools by selecting it ["1" below], and then clicking on the Edit Settings
button ["2" below]. This will bring up a dialog very similar to the tool's standard dialog, but with certain parts
of it deactivated ["3" below].
Once changes have been made to the parameters, the tool will appear in the column on the right ["4" below].
From this column, one or more tools can be selected and then the user can process the selected tools on the
active drawing, project wide, or export those settings to the CSV file ["5" below]. When choosing active
drawing or project wide mode, the Xdata on the WD_M blocks on those selected drawings will be updated
with the new settings for those selected tools. (Note: If a WD_M block is on a locked layer it will still be
updated on the active drawing only, but it cannot be updated on a non-active drawing.)
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Reason 83 – Drafting Errors / Omissions – SDS_AUDIT scans the active drawing or project for certain
types of possible drafting / design omissions or errors. Launching the tool displays this dialog with selectable
audit options:
Audit category options:
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•
SDS_AUDIT will search for polylines that are on a layer meant to be for LINE "wire segments". AcadE
expects "wires" to be drawn with graphically connected LINE entities on a layer marked for "WIRES".
Polylines on wire layers will not be recognized as wires. A solution is to locate and manually EXPLODE
polylines on a wire layer back to LINE segments on the wire layer.
•
Find missing or unused symbol block representations - Scan electrical components and group them by
INST/LOC/TAG assignments. List the INST/LOC/TAG groupings that do not include all three possible
symbol-type representations: Schematic, Panel Footprint (i.e. front-view footprint), and Panel wiring
diagram footprint (ex: rear-view footprint).
•
Audit annotation on wiring diagrams - SDS_AUDIT will flag a wiring diagram connection as an issue if it
doesn't match up with the connection information defined in the schematic.
•
Audit wire source/destination signal codes on schematics (all drawings, project-wide only) - checks for
and reports issues with missing or multiple Source arrows, orphan Destination arrows, blank SIGCODE
attribute values.
•
Audit DREF attributes on active drawing only - check for blank or missing DREF_FORMAT attributes or
DREF attributes that appear to not be updated.
Example Audit Report display
Report dialog options include “Go To” which will “surf” the the drawing and the locatin of the detected issue.
=====================================================
There’s a lot more. Any interest? Contact Spatial Business Systems directly at sales@spatialbiz.com.
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