Uploaded by Nailah Baharuddin

1 FLIP FLOP REVISION 1

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REVISON 3 : TEST 1
QUESTION 1
The circuit in Figure Q1(i) consists of two flip-flops. Analyze and complete the timing diagram by
drawing the waveforms of signal Q1 and Q2 in Figure Q1(ii). Assume both outputs are initially
zero. Show all methods involved.
‘0’
J1
X
SET
Q1
K 1 CLR Q1
Q1
‘1’
J2
SET
Q2
Q2
K 2 CLR Q2
‘0’
CLK
Figure Q1(i)
CLK
1
2
3
4
5
6
7
X
Q1
Q2
Figure Q1(ii)
(10 marks)
pg. 1
REVISON 3 : TEST 1
SOLUTION
pg. 2
REVISON 3 : TEST 1
pg. 3
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