Journal Pre-proof
Improved reduction of contact resistance in NiSi/Si junction using
Holmium interlayer
Sunil Babu Eadi, Hyeong-Sub Song, Hyun-dong Song, Jungwoo
Oh, Hi-Deok Lee
PII:
S0167-9317(19)30309-0
DOI:
https://doi.org/10.1016/j.mee.2019.111153
Reference:
MEE 111153
To appear in:
Microelectronic Engineering
Received date:
3 June 2019
Revised date:
17 September 2019
Accepted date:
4 October 2019
Please cite this article as: S.B. Eadi, H.-S. Song, H.-d. Song, et al., Improved reduction
of contact resistance in NiSi/Si junction using Holmium interlayer, Microelectronic
Engineering (2018), https://doi.org/10.1016/j.mee.2019.111153
This is a PDF file of an article that has undergone enhancements after acceptance, such
as the addition of a cover page and metadata, and formatting for readability, but it is
not yet the definitive version of record. This version will undergo additional copyediting,
typesetting and review before it is published in its final form, but we are providing this
version to give early visibility of the article. Please note that, during the production
process, errors may be discovered which could affect the content, and all legal disclaimers
that apply to the journal pertain.
© 2018 Published by Elsevier.
Journal Pre-proof
Improved reduction of contact resistance in NiSi/Si
junction using Holmium interlayer
Sunil Babu Eadi1, Hyeong-Sub Song1, Hyun-dong Song1, Jungwoo Oh2, and Hi-Deok Lee1*
1
Department of Electronics Engineering, Chungnam National University, Daejeon, Korea.
2
School of Integrated Technology, Yonsei Institute of Convergence Technology, Yonsei University, Incheon.
*Correspondence author: hdlee@cnu.ac.kr; Tel.: (+82-042-821-7702)
Abstract: In this study, effect of Ho interlayer was investigated in nickel silicide (NiSi)/Si
of
junction for contact resistance reduction. A thin Holmium (Ho) interlayer was applied to
Ni/(p/n)-Si contact to reduce contact resistance between NiSi and Si. Thickness of 5 nm Ho
ro
layer was first deposited on As-doped n-type Si layer and BF2-doped p-type Si layer,
-p
followed by in situ deposition of a 15 nm-thick Ni film and 10 nm-thick TiN film. After the
formation of the NiSi by rapid thermal annealing (RTA) at 450 °C for 30 s, specific contact
re
resistivity (ρc) between Ni-silicide and doped silicon region is extracted. There is a great
reduction of the ρc, that is, from 9.84 x 10-5 Ω·cm2 to 1.16 × 10-5 Ω·cm2 for n-Si and 6.24 ×
lP
10-5 Ω·cm2 to 1.84 × 10-5 Ω·cm2 for p-Si substrates, respectively. The improved interface
na
morphology by introducing of Ho interlayer could be responsible for the ρc reduction.
point probe
1. Introduction
Jo
ur
Keywords: Contact Resistance; Nickel Silicide; Rapid Thermal Annealing; Ho Interlayer; Kelvin four-
The performances of sub-5nm MOSFET’s are highly dominated by contact resistance
(Rsc) at Source/Drain (S/D) junctions and gate electrodes [1,2]. Hence, various new
approaches like heavy doping S/D, New channel materials (InGaAs, Ge) and Metal-Silicide
techniques are pursued to improve the device performance as well as controlling the contact
resistance [3-5]. Self–aligned metal silicide contacts have generated a great interest among
the scientific world for reducing the contact resistance by forming Ohmic contacts at the
metal-semiconductor junctions. Metal-Silicides such as, TiSi2, COSi2, NiSi, PtSi2 etc., are
been widely reported [6,7]. Among this silicides, Nickel silicide (NiSi) remains the best metal
silicide material for the future Source/Drain (S/D) contacts. The main advantages of using
NiSi are low temperature processing, low silicon consumption, and low resistivity phase
compare to other metal silicides [8,9]. However, obtaining low contact resistance below 10-6
Journal Pre-proof
still faces many challenges. Therefore, a new approach of introducing a new metal interlayer
beneath the NiSi junction to reduce the junction resistance has been reported in recent years.
Agrawal et al., reported the contact resistivity reduction using a titania interlayer in n-silicon
[10]. Wong et al., studied the contact resistance reduction using selenium segregation (SeS)
technology in the silicide contact of strained n-MOSFETs, their report the enhancement in the
drive current [11]. Ok et al., introduced Mo interlayer system in Ni-Silicided for the
improvement of electrical properties [12]. Zhao et al., studied Schottky barrier heights
modulation by Sulfur segregation in Ni-silicide [13]. Liu et al., studied the thermal stability
of
of NiSi films by applying Pt interlayer and reported the enhanced stability in NiSi [14].
However, to obtain the ultra-low contact resistance, still extensive research on interlayer
ro
effect has to be established. In this study, first time Holmium (Ho) metal interlayer is
introduced to NiSi and reduction of contact resistance at NiSi/Si junctions are studied. Ho
-p
metal belongs to Rare Earth Metal Series (REMs), which are widely known to be low work
re
function metals and having similar crystal lattice properties to that of Silicon [15,16].
Eremenko et al., studied the holmium–silicon binary system and their electro resistivity
lP
properties [17]. Sakho et al., reported the Ho-silicide formation by depositing on Si (111) and
crystal lattice properties were probed [18]. Woffinden et.al., reported top silicon bi-layer
na
effect the electronic properties of Holmium silicide [19]. However, no reports of Ho
interlayer effect on Nickel-Silicide/Si junctions are investigated. Therefore, the effect of Ho
Jo
ur
interlayer on NiSi were systematically investigated for specific contact resistivity (ρc), using
Circular Transfer Length measurement (CTLM) pattern procedure and thermal stability
during rapid annealing process are discussed.
2. Experimental Methods
The surface morphology and structural properties were characterized by using Field
emission scanning electron microscope (FESEM, Hitachi 4800) and X-ray diffractometer
(XRD, XRD, D/MAX 2500PC, Rigaku, Japan) with CuKα (λ = 1.5418 Å) radiation. Depth
profiles of the chemical elements were analysed using a secondary ion mass spectroscope
(SIMS, SIM (IMS7F, CAMCEA). Arsenic (As) and Boron fluoride (BF2) were used as a n
and p dopant by ion implantation with a dose of 5 × 1015 cm−2 at 50 keV to make n/p-Si
substrates respectively. Initially, substrates were cleaned in dilute hydro fluoric acid (DHF)
for 150 s. The chamber pressure was maintained to 2.5 millTorr using Argon gas flow rate of
1.8 SCCM and sputtering power of 100 W and 80 W were used to deposit Nickel (Ni) and
Holmium (Ho) and Titanium nitride (TiN) respectively. The Ho/Ni/TiN (5/15/10 nm) layers
Journal Pre-proof
were deposited in situ using radio frequency (RF) sputtering on the Si substrates. Ni/TiN
(15/10 nm) structure without Ho is also formed as a reference sample for comparison. The
main process flow of the sample fabrication and CTLM pattern are shown in Fig. 1. The
contact resistance was measured using Kelvin four-point probe. The specific contact
resisitivity (ρc) was obtained by using this following two equations [20,21]:
R 𝑇𝑜𝑡𝑎𝑙 =
𝑅𝑠ℎ
2𝜋𝑟
(1)
(𝑑 + 2𝐿 𝑇 )𝑆
(2)
𝜌𝑐 = 𝑅𝑠ℎ 𝐿2𝑇
Where, RTotal = Total Resistance with different gap space, Rsh is the sheet resistance, LT is
of
the effective transfer length and r is the fixed radius of the inner circle (80 µm) and d is the
ro
gap space with split distance of 8, 12, 16, 20, 24, 32, 40, and 48 µm. Sheet resistance and
-p
Transfer length are obtained by plotting Total resistance verses gap space values via liner fit.
re
3. Results and Discussion
The structural properties of NiSi films with and without Ho interlayer are shown in Fig.
lP
2(a-d). After in-situ deposition of the Ho/Ni/TiN and Ni/TiN, the samples were annealed
using Rapid Thermal Annealing (RTA) process at 400 and 450 °C respectively for 30 s. The
na
selection of the RTA temperature was done by plotting the RTA temperature versus Sheet
Jo
ur
resistance with temperature range from RT - 600 °C and choosing the lowest Rsh values.
After RTA, we can notice the formation of NiSi with corresponding peaks at 34.25°, 47.33°,
55.4°, 62.4° with (200), (211), (212), (203), [PDF 00-038-0844] respectively [22,23] as
shown in Fig. 2 (a, b) for NiSi and NiSi-Ho samples for n-Si substrate respectively. It is
observed that corresponding peaks intensity reduced with introducing Ho interlayer. Also
similar trend was seen with the XRD plot of NiSi and NiSi-Ho samples from p-Si substrates
as shown in Fig. 2 (c, d). The reduction in peaks intensity of NiSi-Ho samples could be due to,
a new alloy phase formation which may have led to decrease in the peaks intensities.
Further to confirm the NiSi formation during RTA process, Raman spectra was measured.
The Raman spectrum of a Ni-silicides with/without Ho interlayer on n/p-Si substrates at
varying RTA temperatures are shown in Fig. 3. The reference samples characteristic Raman
peaks of NiSi at 219, 199, and 377 cm-1 respectively in accordance with the previous reported
results [24-26]. Based on the observation, it can be conformed that Ni-silicide formation
reaction starts at 300 °C and mono NiSi metastable phase dominates in the temperature range
Journal Pre-proof
of 300-450 °C. Above this RTA temperature, the intensity of NiSi decrease and disappears
above 550 °C. The NiSi reference samples show similar trends as shown in Fig. 3 (a) & (c).
However, it’s interesting to note that, by introducing the Ho interlayer, NiSi phase appears to
be stable at higher temperature until 600 °C as shown in Fig. 3 (b) & (d) even though the
intensities of NiSi peaks decreased. It could that, by using Ho interlayer, thermal stability of
NiSi can be enhanced and phase transformation temperature from NiSi to NiSi2 can be
increased. Geenen et. al., in their report highlights the alloying of Ni could lead to controlled
of
phase formation with annealing temperature and addition of interlayer will also alter the
ro
critical thickness of NiSi [27].
The surface morphology of NiSi and NiSi with Ho on n-Si substrates were characterized
-p
using FESEM as shown in Fig. 4. The average thickness of NiSi formed after RTA annealing
temperature of 450 °C was measured to be 46 nm as shown in Fig.4 (a) and the surface seems
re
to be smooth and uniform. Fig. 4(b) shows the images of NiSi-Ho film on the substrate and
lP
the average thickness of 55 nm was measured. In both the cases, thickness of formed nickelsilicide agrees with the previous reports, the formation ratio of NiSi using Ni layer always in
1:3 ratios (Ni: Si), irrespective of Ni thickness [28, 29].
na
To study, electrical properties of Ni-silicides formation with annealing temperature, sheet
resistance was measured with varying RTA temperature. Plot of sheet resistance versus RTA
Jo
ur
temperature is shown in Fig. 5. It has been noticed that, increasing in the RTA temperature,
Rsh gradually decreased. Lowest Rsh values of 3~4 Ω/Sq. are obtained in temperature range
between 400-450 °C. Indicating full consumption of Ni film and formation of mono NiSi
phase in this temperature region. With further increase in the RTA temperature the Rsh values
increase drastically above 500 °C. The Rsh values were 66.84, 19.88, 41.69 and 30.79 Ω/sq.
for Ni/TiN (p-Si), Ni/TiN (n-Si), Ho/Ni/TiN (p-Si), and Ho/Ni/TiN (n-Si) respectively. This
results are according to the previous reports of phase transformation of Ni-Silicide from
Nickel rich silicide (Ni2Si) which occur until 350 °C and then phase transformation to low
resistance NiSi phase and at higher temperature phase transformation to silicon rich silicide
(NiSi2) occurs.
Journal Pre-proof
Kelvin four-point probe was used for extracting specific contact resistance (ρc) between
NiSi and n/p-Si with and without Ho interlayer to determine the Ho effect on contact
resistance.
The ρc was obtained by plotting total resistance (Rtotal) measured as a function of gap space (d)
between the inner and outer rings of the Ni-Si layers as shown in Fig. 6(a, b). The interface
resistance, ρc of NiSi without and with Ho Interlayer are 9.84 x 10-5 Ω·cm2 to 1.16 × 10-5
Ω·cm2 for n-Si and 6.24 × 10-5 Ω·cm2 to 1.84 × 10-5 Ω·cm2 for p-Si, respectively. The results
show, contact resistance reduced by 82% in p-Si and 71% in n-Si compared to the reference
of
samples. The decrease in ρc could be understood as the Ho interlayer deposited underneath
the Ni film controls the Ni diffusion during the RTA process and hinders the formation of
ro
high resistivity NiSi2 phase [30-32]. Indicating, Ho could enhance the interlayer properties.
Table 1 shows the values of Sheet resistance, Transfer length and Specific contact resisvity of
-p
NiSi with and without Ho interlayer.
re
To investigate, mechanism involving the reduction of contact resistance by
introducing Ho interlayer of 5nm thickness and reference samples. Depth profile
lP
measurements of the elements were taken using SIMS analysis as shown in Fig. 7. Fig. 7(a, b)
shows the SIMS depth profile analysis of the reference NiSi and NiSi/Ho samples on p-Si
na
substrate. Fig. 7(a) confirms the presence of Nickel (Ni), and Silicon (Si) and doped Boron (B)
atoms. The intensity of Ni decreased approximately around depth of 50 nm from the surface.
Jo
ur
Fig. 7(b). shows the SIMS depth profile in presence of Ho in the NiSi. However, it is noticed
that the distribution of doped B becomes relatively different in presence of the Ho interlayer,
that is, the concentration of B dopants at the junction of NiSi and Si enhances as shown in Fig.
7(b). Similar trend was observed in the n-Si substrate sample. In this case, dopant Arsenic
(As) pile up increase at the NiSi/Si junction by using Ho interlayer as shown in Fig. 7(c) and
Fig. (d) respectively. Although, in both n/p-Si substrate samples Ho intensity decreases
sharply in the NiSi layer. In presence of Ho interlayer, controlled diffusion of Ni into Si
substrate takes place. Interlayer helps in piling up of dopant atoms (B & As) at the interface
of NiSi/Si junction thereby helping in decrease in the contact resistance. Thus, Ho interlayer
facilitates the lowering of resistance at NiSi/Si system junctions and could by promising idea
for application in future MOSFET devices.
4. Conclusions
Holmium (Ho) interlayer was successfully applied to Ni/(p/n)-Si junction and low contact
resistance was achieved. The low specific contact resistivity values of 1.16 × 10-5 Ω·cm2 for
Journal Pre-proof
n-Si and 1.84 × 10-5 Ω·cm2 for p-Si, respectively was extracted using 5 nm Ho interlayer. The
improved NiSi/Si interface and controlled NiSi phase formation by introducing of Ho
interlayer could be responsible for ρc reduction.
Acknowledgments
This research was supported by the MOTIE (Ministry of Trade, Industry & Energy
(10048536) and the KSRC (Korea Semiconductor Research Consortium) support program for
of
the development of future semiconductor devices. This research was also supported by
Nano·Material Technology Development Program through the National Research Foundation
ro
of Korea(NRF) funded by the Ministry of Science, ICT and Future Planning. (2009-
-p
0082580).
S. Datta, Recent Advances in High Performance CMOS Transistors: From Planar to
lP
[1]
re
References
Non-Planar, Electrochem. Soc. Interface Spring 22 (2013) 1, 41-46.
P.M. Zeitzoff, H.R. Huff, MOSFET scaling trends, challenges, and key associated
na
[2]
metrology issues through the end of the roadmap, AIP Conf. Proc. 788 (2005) 203–213.
K. Suzuki, Ion implantation dose in scaled-down metal-oxide-semiconductor field
Jo
ur
[3]
effect transistor’s gate, Jpn. J. Appl. Phys. 48 (2009).
[4]
L.J. Chen, Metal silicides: An integral part of microelectronics, Jom. 57 (2005) 24–30.
[5]
A. H. Reader, A. H. van Ommen, P. J. W. Weijs, R. A. M. Wolters and D. J. Oostra,
Transition metal silicides in silicon technology, Rep. Prog. Phys. 56 (1993) 1397.
[6]
P. Taylor, S. Zhang, M. Östling, Critical Reviews in Solid State and Materials
Sciences Metal Silicides in CMOS Technology : Past , Present , and Future Trends
Metal Silicides in CMOS Technology : Past , Present , and Future Trends, (2010) 37–
41.
[7]
K. Yamada, K. Tomita, T. Ohmi, Formation of metal silicide-silicon contact with
ultralow contact resistance by silicon-capping silicidation technique, Appl. Phys. Lett.
64 (1994) 3449–3451.
[8]
K. Funk, X. Pages, V.I. Kuznetsov, E.H.A. Granneman, NiSi contact formation process integration advantages with partial Ni conversion, 12th IEEE International
Journal Pre-proof
Conference on Advanced Therman Processing of Semiconductors, RTP (2004) 94-98.
[9]
J. Colinge, TiSi2 , CoSi2 , and, J. Electrochem. Soc., 144 (1997) 2437-2442.
[10] A. Agrawal, J. Lin, M. Barth, R. White, B. Zheng, S. Chopra, S. Gupta, K. Wang, J.
Gelatos, S.E. Mohney, S. Datta, Fermi level depinning and contact resistivity reduction
using a reduced titania interlayer in n-silicon metal-insulator-semiconductor ohmic
contacts, Appl. Phys. Lett. 104 (2014) 8–12.
[11] H.S. Wong, K.W. Ang, L. Chan, G. Samudra, Y.C. Yeo, Contact resistance reduction
technology using selenium egregation for N-MOSFETs with silicon-carbon
of
source/drain, IEEE Trans. Electron Devices. 56 (2009) 1128–1134.
[12] Y.-W. Ok, D. Kim, C.-J. Choi, S. Baek, H. Yang, T.-Y. Seong, Effect of a Mo
ro
Interlayer on the Electrical Properties of Ni-Silicided n[sup +]∕p Diode and n[sup +]
Poly-Si Gate Electrode, J. Electrochem. Soc. 154 (2007) H822.
-p
[13] Q.T. Zhao, U. Breuer, E. Rije, S. Lenk, S. Mantl, Tuning of NiSiSi Schottky barrier
re
heights by sulfur segregation during Ni silicidation, Appl. Phys. Lett. 86 (2005) 1–3.
[14] J.F. Liu, H.B. Chen, J.Y. Feng, J. Zhu, Improvement of the thermal stability of NiSi
[15]
lP
films by using a thin Pt interlayer, Appl. Phys. Lett. 77 (2000) 2177–2179.
Koleshko, V. M.; Belitsky, V. F. and Khoddin, , A. A.; THIN FILMS OF RARE
[16]
na
EARTH METAL SILICIDES, Thin Solid Films, 141 (1986) 277-285.
Dmitry, V. A.; Andrey, M. T., Karateeva, C. G.; Igor A. K.; Lobanovich, E. F.;
Jo
ur
Prutskov, G. V.; Parfenov, O, E.; Taldenkov, A. N.; Vasiliev, A. L.; and Storchak, V.
G., Europium Silicide – a Prospective Material for Contacts with Silicon, Scientific
Reports, 5 (23) (2016) 25980.
[17]
V.N. Eremenko, V.E. Listovnichii, S.P. Luzan, Yu.I. Buyanov, P.S. Martsenyuk,
Journal of Alloys and Compounds 219 (1995) 181-184.
[18]
O. Sakho, F. Sirotli, M. DuSantis, M. Sacehi, and G. Rossi, Applied Surlace Science
56-58 (1992) 568- 571.
[19] Charles Woffinden, Christopher Eames, Hervé Ménard, and Steve P. Tear, Physical
Review B 79 (2009) 245406.
[20]
D. K. Schroder, MATERIAL AND DEVICE SEMICONDUCTOR MATERIAL AND
DEVICE Third Edition, 2006.
[21]
H. Yu et al., A Simplified Method for (Circular) Transmission Line Model Simulation
and Ultralow Contact Resistivity Extraction," in IEEE Electron Device Lett. 2014, 35
(9) 957-959.
Journal Pre-proof
[22] X. Guo, H. Yu, Y.L. Jiang, G.P. Ru, D.W. Zhang, B.Z. Li, Study of nickel silicide
formation on Si(1 1 0) substrate, Appl. Surf. Sci. 257 (2011) 10571–10575.
[23] W.-R. Liu, N.-L. Wu, D.-T. Shieh, H.-C. Wu, M.-H. Yang, C. Korepp, J.O. Besenhard,
M. Winter, Synthesis and Characterization of Nanoporous NiSi-Si Composite Anode
for Lithium-Ion Batteries, J. Electrochem. Soc. 154 (2007) A97.
[24] S.K. Donthu, D.Z. Chi, S. Tripathy, A.S.W. Wong, S.J. Chua, Micro-Raman
spectroscopic investigation of NiSi films formed on BF2+-, B+- and non-implanted
(100)Si substrates, Appl. Phys. A Mater. Sci. Process. 79 (2004) 637–642.
M. Bhaskaran, S. Sriram, T.S. Perova, V. Ermakov, G.J. Thorogood, K.T. Short, A.S.
of
[25]
films on silicon, Micron. 40 (2009) 89–93.
[26]
ro
Holland, In situ micro-Raman analysis and X-ray diffraction of nickel silicide thin
V.A. Solodukha, A.S. Turtsevich, Y.A. Solovyev, O.E. Sarychev, S. V. Gaponenko, O.
-p
V. Milchanin, Identification of nickel silicide phases on a silicon surface from Raman
[27]
re
spectra, J. Appl. Spectrosc. 79 (2013) 1002–1005.
F. A. Geenen, K. van Stiphout, A. Nanakoudis, S. Bals, A. Vantomme, J. Jordan-
lP
Sweet, C. Lavoie, and C. Detavernier, Controlling the formation and stability of ultrathin nickel silicides – An alloying strategy for preventing agglomeration, J. Appl. Phys.
na
123 (2018) 075303.
[28] A. Alberti, C. Bongiorno, E. Rimini, M.G. Grimaldi, Critical nickel thickness to form
[29]
Jo
ur
silicide transrotational structures on [001] silicon, Appl. Phys. Lett. 89 (2006) 1–4.
O. Chamirian, J.A. Kittla , A. Lauwersa, O. Richarda, M. van Dalc, K. Maexa,
Thickness scaling issues of Ni silicide, Microelectron. Eng. 70 (2003) 201–208.
[30] A. Derafa, G. Tellouche, K. Hoummada, A. Bouabellou, D. Mangelinck, Effect of
alloying elements Mo and W on Ni silicides formation, Microelectron. Eng. 120 (2014)
150–156.
[31] R. A. Levy, Microelectronic Materials and Processes, 1986.
[32] B. Zhang, C. Hou, Y. Ping, W. Yu, Z. Xue, X. Wei, Z. Di, M. Zhang, X. Wang, Q.
Zhao, Impact of an ultra-thin Ti interlayer on the formation of NiSiGe/SiGe,
Microelectron. Eng. 137 (2015) 92–95.
Journal Pre-proof
(a)
lP
re
-p
ro
of
Figures
(b)
na
[a] Cleaning to remove native oxide ( DHF )
r
Jo
ur
[b] Photo lithography, CTLM pattern
(c)
[c] Deposition : Ni/TiN [15/10nm]
Ho/Ni/TiN [5/15/10nm]
[c-i] PR Lift off (CH3COCH3)
[c-ii] RTA (350°C, 30sec)
(d)
s
(e)
r
r
r
(f)
NiSi
n-Si
[d] Selective etch (H2SO4:H2O2)
[d-i] Resistance measurement
p-Si
Fig. 1 (a-f). The CTLM pattern fabrication flow chart and Schematic diagram of NiSi on n-Si
substrate.
Jo
ur
na
lP
re
-p
ro
of
Journal Pre-proof
Fig.2 (a-d) X-ray diffraction plot of NiSi and NiSi-Ho films on various Si substrates (a) NiSi,
(b) NiSi-Ho on n-Si substrate and (c) NiSi, (d) NiSi-Ho on p-Si substrate respectively.
Jo
ur
na
lP
re
-p
ro
of
Journal Pre-proof
Fig.3 (a-d) Raman spectra plot of NiSi and NiSi-Ho films on various Si substrates (a) NiSi, (b)
NiSi-Ho on n-Si substrate and (c) NiSi, (d) NiSi-Ho on p-Si substrate respectively.
Jo
ur
na
lP
re
-p
ro
of
Journal Pre-proof
Fig.4. FESEM images of NiSi formed after RTA process on n-Si substrate, (a-1, a-2) NiSi and
(b-a, b-2) NiSi-Ho respectively.
Reference [Ni/TiN] [15/10 nm]
NiSi/n-Si
NiSi/p-Si
Metal [Ho/Ni/TiN] [5/15/10 nm]
NiSi/n-Si
NiSi/p-Si
Jo
ur
Sheet resistance [/sq.]
25
na
30
lP
re
-p
ro
of
Journal Pre-proof
20
15
10
5
0
0
100
Preapred
200
300
400
500
600
RTA Temperature [oC]
Fig. 5. Plot of Sheet Resistance verses RTA temperature of reference NiSi and with Ho
interlayer samples.
na
Jo
ur
Total Resistance []
100
NiSi/n-Si Schottky contact
90
Ni/TiN [15/10 nm]
80
Ho/Ni/TiN [5/15/10 nm]
70
60
50
40
30
20
10
0
0 4 8 12 16 20 24 28 32 36 40 44 48 52 56
Gap space [m]
(a)
Total Resistance []
lP
re
-p
ro
of
Journal Pre-proof
100
90
80
70
60
50
40
30
20
10
0
NiSi/p-Si Schottky contact
Ni/TiN [15/10 nm]
Ho/Ni/TiN [5/15/10 nm]
(b)
0 4 8 12 16 20 24 28 32 36 40 44 48 52 56
Gap space [m]
Fig. 6. Plot of total resistance verses gap space of CTLM pattern for extraction of specific
contact resistivity between NiSi and n/p-Si with and without Ho interlayer.
lP
re
-p
ro
of
Journal Pre-proof
n-Si
Ho
interlayer
thickness
[nm]
RSh [Ω/sq.]
LT [μm]
ρC [Ω-cm2]
0
729.36
3.673
9.84×10-5
5
720.04
1.272
1.16×10-5
0
747.59
2.890
6.24×10-5
5
759.19
1.558
1.84×10-5
Jo
ur
Substrate
na
Table 1. Contact resistance characteristics of NiSi with and without Ho interlayer on n/p-Si
substrates.
p-Si
Jo
ur
na
lP
re
-p
ro
of
Journal Pre-proof
Fig. 7. SIMS profile of ingredients for (a,b) NiSi/p-Si and NiSi-Ho/p-Si and Fig.3 (c,d)
NiSi/n-Si and NiSi-Ho/n-Si respectively.
Journal Pre-proof
Declaration of interests
☒
The authors declare that they have no known competing
financial interests or personal relationships that could have
of
appeared to influence the work reported in this paper.
Jo
ur
na
lP
re
-p
ro
Date: September 17, 2019
Journal Pre-proof
Highlights
 Contact resistance obtained in this study is significantly lower than that for NiSi/Si
junctions with Holmium interlayer.
 Specific contact resistivity values reduced by 70% by using Ho Interlayer in n/p-Si.
 New alloy Ho/NiSi could lower work function and enhance dopant pile-up near
interface of NiSi/Si.
 Introducing Ho interlayer aids in controlled formation of NiSi and makes the
Jo
ur
na
lP
re
-p
ro
of
interface of NiSi/Si smooth.