Uploaded by Chandramohan Velupillai

Boolean Algebra & Logic Circuit Minimization

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1. Minimize the logic function
map.
Use Karnaugh
Draw logic circuit for the simplified function.
2. Prove the following Boolean identities
(i) XY + YZ + Y Z = XY + Z
(ii) A.B + A.B + A.B = A + B
3. For F A.B.C B.C.D A.B.C , write the truth table. Simplify using Karnaugh map and
realize the function using NAND gates only.
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