PCS-902
Line Distance Relay
Instruction Manual
NR Electric Co., Ltd.
Preface
Preface
Introduction
This guide and the relevant operating or service manual documentation for the equipment provide
full information on safe handling, commissioning and testing of this equipment.
Documentation for equipment ordered from NR is dispatched separately from manufactured goods
and may not be received at the same time. Therefore, this guide is provided to ensure that printed
information normally present on equipment is fully understood by the recipient.
Before carrying out any work on the equipment, the user should be familiar with the contents of
this manual, and read relevant chapter carefully.
This chapter describes the safety precautions recommended when using the equipment. Before
installing and using the equipment, this chapter must be thoroughly read and understood.
Health and Safety
The information in this chapter of the equipment documentation is intended to ensure that
equipment is properly installed and handled in order to maintain it in a safe condition.
When electrical equipment is in operation, dangerous voltages will be present in certain parts of
the equipment. Failure to observe warning notices, incorrect use, or improper use may endanger
personnel and equipment and cause personal injury or physical damage.
Before working in the terminal strip area, the equipment must be isolated.
Proper and safe operation of the equipment depends on appropriate shipping and handling,
proper storage, installation and commissioning, and on careful operation, maintenance and
servicing. For this reason, only qualified personnel may work on or operate the equipment.
Qualified personnel are individuals who:




Are familiar with the installation, commissioning, and operation of the equipment and of the
system to which it is being connected;
Are able to safely perform switching operations in accordance with accepted safety
engineering practices and are authorized to energize and de-energize equipment and to
isolate, ground, and label it;
Are trained in the care and use of safety apparatus in accordance with safety engineering
practices;
Are trained in emergency procedures (first aid).
Instructions and Warnings
The following indicators and standard definitions are used:
i
PCS-902 Line Distance Relay
Date: 2011-12-23
Preface
DANGER!
It means that death, severe personal injury, or considerable equipment damage will occur if safety
precautions are disregarded.
WARNING!
It means that death, severe personal, or considerable equipment damage could occur if safety
precautions are disregarded.
CAUTION!
It means that light personal injury or equipment damage may occur if safety precautions are
disregarded. This particularly applies to damage to the device and to resulting damage of the
protected equipment.
WARNING!
The firmware may be upgraded to add new features or enhance/modify existing features, please
make sure that the version of this manual is compatible with the product in your hand.
WARNING!
During operation of electrical equipment, certain parts of these devices are under high voltage.
Severe personal injury or significant equipment damage could result from improper behavior.
Only qualified personnel should work on this equipment or in the vicinity of this equipment. These
personnel must be familiar with all warnings and service procedures described in this manual, as
well as safety regulations.
In particular, the general facility and safety regulations for work with high-voltage equipment must
be observed. Noncompliance may result in death, injury, or significant equipment damage.
DANGER!
Never allow the current transformer (CT) secondary circuit connected to this equipment to be
opened while the primary system is live. Opening the CT circuit will produce a dangerously high
voltage.
WARNING!

Exposed terminals
Do not touch the exposed terminals of this equipment while the power is on, as the high voltage
generated is dangerous
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PCS-902 Line Distance Relay
Date: 2011-12-23
Preface

Residual voltage
Hazardous voltage can be present in the DC circuit just after switching off the DC power supply. It
takes a few seconds for the voltage to discharge.
CAUTION!

Earth
The earthing terminal of the equipment must be securely earthed

Operating environment
The equipment must only be used within the range of ambient environment detailed in the
specification and in an environment free of abnormal vibration.

Ratings
Before applying AC voltage and current or the DC power supply to the equipment, check that they
conform to the equipment ratings.

Printed circuit board
Do not attach and remove printed circuit boards when DC power to the equipment is on, as this
may cause the equipment to malfunction.

External circuit
When connecting the output contacts of the equipment to an external circuit, carefully check the
supply voltage used in order to prevent the connected circuit from overheating.

Connection cable
Carefully handle the connection cable without applying excessive force.
Copyright
Version: R1.05
NR ELECTRIC CO., LTD.
69 Suyuan Avenue. Jiangning, Nanjing 211102, China
P/N: EN_XLBH5102.0086.0016
Tel: +86-25-87178185,
Fax: +86-25-87178208
Website: www.nrelect.com, www.nari-relays.com
Copyright © NR 2012. All rights reserved
Email: nr_techsupport@nari-relays.com
We reserve all rights to this document and to the information contained herein. Improper use in particular reproduction and dissemination
to third parties is strictly forbidden except where expressly authorized.
The information in this manual is carefully checked periodically, and necessary corrections will be included in future editions. If
nevertheless any errors are detected, suggestions for correction or improvement are greatly appreciated.
We reserve the rights to make technical improvements without notice.
iii
PCS-902 Line Distance Relay
Date: 2011-12-23
Preface
Documentation Structure
The manual provides a functional and technical description of this relay and a comprehensive set
of instructions for the relay’s use and application.
All contents provided by this manual are summarized as below:
1 Introduction
Briefly introduce the application, functions and features about this relay.
2 Technical Data
Introduce the technical data about this relay, such as electrical specifications, mechanical
specifications, ambient temperature and humidity range, communication port parameters, type
tests, setting ranges and accuracy limits and the certifications that our products have passed.
3 Operation Theory
Introduce a comprehensive and detailed functional description of all protective elements.
4 Supervision
Introduce the automatic self-supervision function of this relay.
5 Management
Introduce the management function (measurment, recording and remote control) of this relay.
6 Hardware
Introduce the main function carried out by each plug-in module of this relay and providing the
definition of pins of each plug-in module.
7 Settings
List settings including system settings, communication settings, label settings, logic links and etc.,
and some notes about the setting application.
8 Human Machine Interface
Introduce the hardware of the human machine interface (HMI) module and a detailed guide for the
user how to use this relay through HMI. It also lists all the information which can be view through
HMI, such as settings, measurements, all kinds of reports etc.
9 Configurable Function
Introduce configurable function of the device and all configurable signals are listed.
10 Communication
Introduce the communication port and protocol which this relay can support, IEC60970-5-103,
IEC61850 and DNP3.0 protocols are introduced in details.
11 Installation
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PCS-902 Line Distance Relay
Date: 2011-12-23
Preface
Introduce the recommendations on unpacking, handling, inspection and storage of this relay. A
guide to the mechanical and electrical installation of this relay is also provided, incorporating
earthing recommendations. A typical wiring connection to this relay is indicated.
12 Commissioning
Introduce how to commission this relay, comprising checks on the calibration and functionality of
this relay.
13 Maintenance
A general maintenance policy for this relay is outlined.
14 Decommissioning and Disposal
A general decommissioning and disposal policy for this relay is outlined.
15 Manual Version History
List the instruction manual version and the modification history records.
Typographic and Graphical Conventions
Deviations may be permitted in drawings and tables when the type of designator can be obviously
derived from the illustration.
The following symbols are used in drawings:
&
AND gate
≥1
OR gate
Comparator
BI
SET
EN
Binary signal via opto-coupler
I>
Input signal from comparator with setting
Input signal of logic setting for function enabling
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PCS-902 Line Distance Relay
Date: 2011-12-23
Preface
SIG
Input of binary signal except those signals via opto-coupler
XXX
Output signal
Timer
t
t
Timer (optional definite-time or inverse-time characteristic)
10ms
0ms
Timer [delay pickup (10ms), delay dropoff (0ms), non-settable]
[XXX]
0ms
Timer (delay pickup, settable)
0ms
[XXX]
Timer (delay dropoff, settable)
[XXX]
[XXX]
Timer (delay pickup, delay dropoff, settable)
IDMT
Timer (inverse-time characteristic)
---xxx is the symbol
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PCS-902 Line Distance Relay
Date: 2011-12-23
1 Introduction
1 Introduction
Table of Contents
1 Introduction ...................................................................................... 1-a
1.1 Application....................................................................................................... 1-1
1.2 Function ........................................................................................................... 1-3
1.3 Features ........................................................................................................... 1-6
List of Figures
Figure 1.1-1 Typical application of PCS-902 ............................................................................1-1
Figure 1.1-2 Functional diagram of PCS-902...........................................................................1-2
PCS-902 Line Distance Relay
1-a
Date: 2012-08-14
1 Introduction
PCS-902 Line Distance Relay
1-b
Date: 2012-08-14
1 Introduction
1.1 Application
PCS-902 is a digital line distance protection with the main and back-up protection functions, which
is designed for overhead line or cables and hybrid transmission lines of various voltage levels.
PCS-902
Optical fibre channel or PLC channel
PCS-902
Communication channel via direct dedicated fibre, MUX or PLC
Figure 1.1-1 Typical application of PCS-902
Main protection of PCS-902 comprises of pilot distance protection (PUTT, POTT, blocking and
unblocking) and pilot directional earth-fault protection (selectable for independent communication
channel or sharing channel with POTT), which can clear any internal fault instantaneously for the
whole line with the aid of protection signalling. DPFC distance protection can perform extremely
high speed operation for close-up faults. There is direct transfer trip (DTT) feature incorporated in
the relay.
PCS-902 also includes distance protection (3 forward zones, 1 reverse zone and 1 settable
forward or reverse zone distance protection with selectable mho or quadrilateral characteristic), 4
stages directional earth fault protection, 4 stages directional phase overcurrent protection, 2
stages voltage protection (under/over voltage protection), broken conductor protection, pole
discrepancy protection, breaker failure protection, frequency protection, thermal overload
protection, and dead zone protection etc. Moreover, a backup overcurrent and earth fault
protection will be automatically enabled when VT circuit is failure. In addition, stub overcurrent
protection is provided for one and a half breakers arrangement when transmission line is put into
maintenance.
PCS-902 has selectable mode of single-phase tripping or three-phase tripping and configurable
auto-reclosing mode for 1-pole, 3-poles and 1/3-pole operation.
PCS-902 with appropriate selection of integrated protection functions can be applied for various
voltage levels and primary equipment such as cables, overhead lines, interconnectors and
transformer feeder, etc. It also supports configurable binary inputs, binary outputs, LEDs and IEC
61850 protocol.
PCS-902 Line Distance Relay
1-1
Date: 2012-08-14
1 Introduction
BUS
52
81
85
21
21D
67G
67P
50G
50P
51GVT
51PVT
50BF
49
46BC
62PD
FR
59
FL
Data Transmitt/Receive
51G
50DZ
27
51P
50STB (Only for one and a half breakers arrangement)
SOTF
25
79
LINE
Figure 1.1-2 Functional diagram of PCS-902
No.
Function
ANSI
1
Pilot protection
85
2
DPFC distance protection
21D
3
Distance protection
21
4
Earth fault protection
67G
5
Definite-time earth-fault protection
50G
6
Inverse-time earth-fault protection
51G
8
Phase overcurrent protection
67P
9
Definite-time phase overcurrent protection
50P
10
Inverse-time phase overcurrent protection
51P
11
Overvoltage protection
59
12
Undervoltage protection
27
13
Frequency protection
81
14
Broken conductor protection
46BC
15
Breaker failure protection
50BF
16
Thermal overload protection
49
17
Stub overcurrent protection
50STB
18
Dead zone protection
50DZ
19
Pole discrepancy protection
62PD
20
Switch onto fault
SOTF
21
Phase overcurrent protection when VT circuit failure
51PVT
22
Earth fault protection when VT circuit failure
51GVT
23
Synchronism check
25
24
Automatic reclosure
79
25
Fault recorder
FR
PCS-902 Line Distance Relay
1-2
Date: 2012-08-14
1 Introduction
26
Fault location
FL
1.2 Function
1.
Protection Function

Distance protection










Three zones forward phase-to-ground distance elements (mho or quadrilateral
characteristic)
One pilot zone phase-to-ground distance element (mho or quadrilateral characteristic)
with weakinfeed distance element
One zone reverse phase-to-ground distance element (mho or quadrilateral characteristic)
One zone settable forward or reverse phase-to-ground distance element (mho or
quadrilateral characteristic)
Three zones forward phase-to-phase distance elements (mho or quadrilateral
characteristic)
One pilot zone phase-to-phase distance element (mho or quadrilateral characteristic)
with weakinfeed distance element
One zone reverse phase-to-phase distance element (mho or quadrilateral characteristic)
One zone settable forward or reverse phase-to-phase distance element (mho or
quadrilateral characteristic)
Blinder for mho characteristic distance element
Power swing blocking releasing, selectable for each of above mentioned zones

Deviation of Power Frequency Component (DPFC) distance protection

Current protection



Four stages phase overcurrent protection, selectable time characteristic (definite-time or
inverse-time) and directionality (forward direction, reverse direction or non-directional)
Four stages directional earth fault protection, selectable time characteristic (definite-time
or inverse-time) and directionality (forward direction, reverse direction or non-directional)
Breaker failure protection


Optional instantaneously re-tripping
One stage with two delay timers

Thermal overload protection

Stub overcurrent protection

Dead zone protection
PCS-902 Line Distance Relay
1-3
Date: 2012-08-14
1 Introduction

Pole discrepancy protection

Broken conductor protection

Switch onto fault (SOTF)








Two stages undervoltage protection
Four stages overfrequency protection
Four stages underfrequency protection
f/dt block criterion for underfrequency protection
Synchro-checking
Automatic reclosure (single shot or multi-shot (max. 4) for 1-pole AR and 3-pole AR)
Pilot scheme logic




Two stages overvoltage protection
Control function


Earth fault protection when VT circuit failure
Frequency protection


Phase overcurrent protection when VT circuit failure
Voltage protection


Via dedicated earth fault element
Backup protection when VT circuit failure


Via distance measurement elements
Phase-segregated communication logic of distance protection
Weak infeed logic of pilot distance protection
Weak infeed logic of pilot directional earth fault protection
Communication scheme of optical pilot channel (Optional)



Direct optical link
Connection to a communication network, support G.703 and C37.94 protocol
Dual-channels redundancy
2.
Measurement and control function

Remote control (open and closing)

Synchronism check for remote and manual closing (only for one circuit breaker)

Energy metering (active and reactive energy are calculated in import respectively export
PCS-902 Line Distance Relay
1-4
Date: 2012-08-14
1 Introduction
direction)
3.
Logic

User programmable logic
4.
Additional function

Fault location

Fault phase selection

Parallel line compensation for fault location

VT circuit supervision

CT circuit supervision

Self diagnostic

DC power supply supervision



Event Recorder including 1024 disturbance records, 1024 binary events, 1024 supervision
events, 256 control logs and 1024 device logs.
Disturbance recorder including 64 disturbance records with waveforms (The file format of
disturbance recorder is compatible with international COMTRADE file.)
Clock synchronization
– PPS(RS-485)
– IRIG-B(RS-485)
– PPM(DIN)
– SNTP(PTP)
– IEEE1588
– SNTP(BC)
– PPS(DIN)
5.

Monitoring
Number of circuit breaker operation (single-phase tripping, three-phase tripping and
reclosing)

Channel status

Frequency
6.
Communication

2 RS-485 communication rear ports conform to IEC 60870-5-103 protocol or DNP3.0 protocol

1 RS-485 communication rear ports for clock synchronization
PCS-902 Line Distance Relay
1-5
Date: 2012-08-14
1 Introduction


Up to 4 Ethernet ports (depend on the chosen type of MON plug-in module) conform to IEC
61850 protocol, DNP3.0 protocol or IEC 60870-5-103 protocol over TCP/IP
Up to 2 Ethernet ports via optic fiber (ST interface or SC interface, depend on the chosen type
of MON plug-in module) conform to IEC 61850 protocol, DNP3.0 protocol or IEC 60870-5-103
protocol over TCP/IP

GOOSE communication function (optional NET-DSP plug-in module)
7.
User Interface

Friendly HMI interface with LCD and 9-button keypad on the front panel.

1 front multiplex RJ45 port for testing and setting

1 RS-232 or RS-485 rear ports for printer

Language switchover – English+ selected language

Auxiliary software - PCS-Explorer
1.3 Features







The intelligent device integrated with protection, control and monitor provides powerful
protection function, flexible protection configuration, user programmable logic and
configurable binary input and binary output, which can meet with various application
requirements.
High-performance hardware platform and modularized design, MCU (management control
unit)＋DSP (digital signal processor). MCU manages general fault detector element and DSP
manages protection and metering. Their data acquisition system is completely independent in
electronic circuit. DC power supply of output relay is controlled by the operation of fault
detector element operates, this prevents maloperation due to error from ADC or damage of
any apparatus.
Fast fault clearance for faults within the protected line, the operating time is less than 10 ms
for close-up faults, less than 15ms for faults in the middle portion of protected line and less
than 25ms for remote end faults.
The unique DPFC distance element integrated in the protective device provides extremely
high speed operation and insensitive to power swing.
Self-adaptive floating threshold which only reflects deviation of power frequency component
improves the protection sensitivity and stability under the condition of load fluctuation and
system disturbance.
Advanced and reliable ‘power swing blocking releasing′ feature which ensure distance
protection operate correctly for internal fault during power swing and prevent distance
protection from maloperation during power swing
Flexible automatic reclosure supports various initiation modes and check modes
PCS-902 Line Distance Relay
1-6
Date: 2012-08-14
1 Introduction


Multiple setting groups with password protection and setting value saved permanently before
modification
Powerful PC tool software can fulfill protection function configuration, modify setting and
waveform analysis.
PCS-902 Line Distance Relay
1-7
Date: 2012-08-14
1 Introduction
PCS-902 Line Distance Relay
1-8
Date: 2012-08-14
2 Technical Data
2 Technical Data
Table of Contents
2 Technical Data .................................................................................. 2-a
2.1 Electrical Specifications ................................................................................. 2-1
2.1.1 AC Current Input ................................................................................................................ 2-1
2.1.2 AC Voltage Input ................................................................................................................ 2-1
2.1.3 Power Supply ..................................................................................................................... 2-1
2.1.4 Binary Input ........................................................................................................................ 2-1
2.1.5 Binary Output ..................................................................................................................... 2-2
2.2 Mechanical Specifications ............................................................................. 2-3
2.3 Ambient Temperature and Humidity Range .................................................. 2-3
2.4 Communication Port ....................................................................................... 2-3
2.4.1 EIA-485 Port ...................................................................................................................... 2-3
2.4.2 Ethernet Port ...................................................................................................................... 2-3
2.4.3 Optical Fibre Port ............................................................................................................... 2-4
2.4.4 Print Port ............................................................................................................................ 2-5
2.4.5 Clock Synchronization Port ................................................................................................ 2-5
2.5 Type Tests ........................................................................................................ 2-5
2.5.1 Environmental Tests ........................................................................................................... 2-5
2.5.2 Mechanical Tests................................................................................................................ 2-5
2.5.3 Electrical Tests ................................................................................................................... 2-5
2.5.4 Electromagnetic Compatibility ............................................................................................ 2-5
2.6 Certifications ................................................................................................... 2-6
2.7 Protective Functions....................................................................................... 2-7
2.7.1 Fault Detector .................................................................................................................... 2-7
2.7.2 Distance Protection ............................................................................................................ 2-7
2.7.3 Phase Overcurrent Protection ............................................................................................ 2-7
PCS-902 Line Distance Relay
2-a
Date: 2012-06-25
2 Technical Data
2.7.4 Earth Fault Protection ........................................................................................................ 2-7
2.7.5 Overvoltage Protection ...................................................................................................... 2-7
2.7.6 Undervoltage Protection..................................................................................................... 2-8
2.7.7 Overfrequency Protection .................................................................................................. 2-8
2.7.8 Underfrequency Protection ................................................................................................ 2-8
2.7.9 Breaker Failure Protection ................................................................................................. 2-8
2.7.10 Thermal Overload Protection ........................................................................................... 2-9
2.7.11 Stub Overcurrent Protection ............................................................................................. 2-9
2.7.12 Dead Zone Protection ...................................................................................................... 2-9
2.7.13 Pole Discrepancy Protection ............................................................................................ 2-9
2.7.14 Broken Conductor Protection ........................................................................................... 2-9
2.7.15 Auto-reclosing .................................................................................................................. 2-9
2.7.16 Transient Overreach ...................................................................................................... 2-10
2.7.17 Fault Locator .................................................................................................................. 2-10
PCS-902 Line Distance Relay
2-b
Date: 2012-06-25
2 Technical Data
2.1 Electrical Specifications
2.1.1 AC Current Input
Phase rotation
ABC
Nominal frequency (fn)
50±5Hz, 60±5Hz
Rated current (In)
1A
Linear to
0.05In~40In (It should measure current without beyond full scale
5A
against 20 times of related current and value of DC offset by 100%.)
Thermal withstand
-continuously
4In
-for 10s
30In
-for 1s
100In
-for half a cycle
250In
Burden
< 0.15VA/phase @In
Number
Up to 7 current input according to various applications
< 0.25VA/phase @In
2.1.2 AC Voltage Input
Phase rotation
ABC
Nominal frequency (fn)
50±5Hz, 60±5Hz
Rated voltage (Un)
100V~130V
Linear to
1V~170V
Thermal withstand
-continuously
200V
-10s
260V
-1s
300V
Burden at rated
< 0.20VA/phase @Un
Number
Up to 6 voltage input according to various applications
2.1.3 Power Supply
Standard
IEC 60255-11:2008
Rated voltage
110Vdc/125Vdc/220Vdc/250Vdc
Permissible voltage range
88~300Vdc
Permissible AC ripple voltage
≤15% of the nominal auxiliary voltage
Burden
Quiescent condition
<30W
Operating condition
<35W
2.1.4 Binary Input
Rated voltage
24V
48V
Rated current drain
1.2mA
2.4mA
Pickup voltage
13~17V
26~34V
Dropoff voltage
50% of pickup voltage
PCS-902 Line Distance Relay
2-1
Date: 2012-06-25
2 Technical Data
Maximum permissible voltage
100Vdc
Withstand voltage
2000Vac, 2800Vdc (continuously )
Response time for logic input
≤1ms
Number
Up to 36 binary input according to various hardware configurations
Rated voltage
110V
125V
220V
250V
Rated current drain
1.1mA
1.25mA
2.2mA
2.5mA
Pickup voltage
60.5~77V
70~87.5V
121~154V
Dropoff voltage
50% of pickup voltage
Maximum permissible voltage
300Vdc
Withstand voltage
2000Vac, 2800Vdc (continuously )
Response time for logic input
≤1ms
Number
Up to 36 binary input according to various hardware configurations
2.1.5 Binary Output
1.
Tripping/signaling contact
Output mode
Continuous carry
Potential free contact
5A@380Vac
5A@250Vdc
Pickup time
<8ms (typical 5ms)
Dropoff time
<5ms
0.6A@48Vdc
Breaking capacity (L/R=40ms)
0.2A@110Vdc
0.1A@220Vdc
Burden
Maximal system voltage
Test voltage across open contact
300mW
380Vac
250Vdc
1000V RMS for 1min
6A@3s
Short duration current
15A@0.5s
30A@0.2s
Number
2.
Up to 55 binary output according to various hardware configurations
Fast signaling contact
Output mode
Continuous carry
Potential free contact
5A@380Vac
5A@250Vdc
Pickup time
<1ms
Dropoff time
<5ms
1.0A@48Vdc
Breaking capacity (L/R=0ms)
0.9A@110Vdc
0.4A@220Vdc
Maximal system voltage
380Vac
PCS-902 Line Distance Relay
2-2
Date: 2012-06-25
2 Technical Data
250Vdc
Test voltage across open contact
1000V RMS for 1min
2.2 Mechanical Specifications
Enclosure dimensions (W×H×D)
482.6mm×177.0mm×291.0mm
Mounting Way
Flush mounted
Trepanning dimensions (W×H)
450.0mm×179.0mm, M6 screw
Chassis color
Silver grey
Weight per device
Approx. 15kg
Chassis material
Aluminum alloy
Location of terminal
Rear panel of the device
Device structure
Plug-in modular type @ rear side, integrated frontplate
Protection class
Standard
IEC 60255-1:2009
Front side
IP40, up to IP51 (With cover)
Other sides
IP30
Rear side, connection terminals
IP20
2.3 Ambient Temperature and Humidity Range
Standard
IEC 60255-1:2009
Operating temperature
-40°C to +70°C (Readability of disaply may be impaired below -20°C)
Transport and storage temperature
range
-40°C to +70°C
Permissible humidity
5%-95%, without condensation
Pollution degree
2
Altitude
<3000m
2.4 Communication Port
2.4.1 EIA-485 Port
Baud rate
4.8kbit/s, 9.6kbit/s, 19.2kbit/s, 38.4kbit/s, 57.6kbit/s, 115.2kbit/s
Protocol
IEC 60870-5-103:1997
Maximal capacity
32
Transmission distance
<500m
Safety level
Isolation to ELV level
Twisted pair
Screened twisted pair cable
2.4.2 Ethernet Port
Connector type
RJ-45
ST, SC (Multi mode)
Transmission rate
100Mbits/s
Transmission standard
100Base-TX
100Base-FX
Transmission distance
<100m
<2km (1310nm)
PCS-902 Line Distance Relay
2-3
Date: 2012-06-25
2 Technical Data
Protocol
IEC 60870-5-103:1997, DNP 3.0 or IEC 61850
Safety level
Isolation to ELV level
2.4.3 Optical Fibre Port
2.4.3.1 For Station Level
Characteristic
Glass optical fiber
Connector type
ST, SC
Fibre type
Multi mode
Transmission distance
<2km
Wave length
1310nm
Transmission power
Min. -20.0dBm
Minimum receiving power
Min. -30.0dBm
Margin
Min +3.0dB
2.4.3.2 For Process Level
Characteristic
Glass optical fiber
Connector type
LC
Fibre type
Multi mode
Transmission distance
<2km
Wave length
1310nm
Transmission power
Min. -20.0dBm
Minimum receiving power
Min. -30.0dBm
Margin
Min +3.0dB
2.4.3.3 For Pilot Channel
Characteristic
Glass optical fiber
Connector type
FC
ST
Fibre type
Single mode
Multi mode
Wave length
1310nm
1550nm
850nm
Transmission distance
Max.40km
Max.100km
Max.2km
Transmission power
-13.0±3.0 dBm
-5.0 dBm±3.0 dBm
-12dBm~-20 dBm
Minimum receiving power
Min.-37 dBm
Min.-36 dBm
Min. -30.0dBm
Optical overload point
Min.-3 dBm
Min.-3 dBm
Min.-8 dBm
2.4.3.4 For Synchronization Port
Characteristic
Glass optical fiber
Connector type
ST
Fibre type
Multi mode
Wave length
820nm
Minimum receiving power
Min. -25.0dBm
Margin
Min +3.0dB
PCS-902 Line Distance Relay
2-4
Date: 2012-06-25
2 Technical Data
2.4.4 Print Port
Type
RS-232
Baud Rate
4.8kbit/s, 9.6kbit/s, 19.2kbit/s, 38.4kbit/s, 57.6kbit/s, 115.2kbit/s
Printer type
EPSON 300K printer
Safety level
Isolation to ELV level
®
2.4.5 Clock Synchronization Port
Type
RS-485
Transmission distance
<500m
Maximal capacity
32
Timing standard
PPS, IRIG-B
Safety level
Isolation to ELV level
2.5 Type Tests
2.5.1 Environmental Tests
Dry cold test
IEC60068-2-1:2007
Dry heat test
IEC60068-2-2:2007
Damp heat test, cyclic
IEC60068-2-30:2005
2.5.2 Mechanical Tests
Vibration
IEC 60255-21-1:1988 Class I
Shock and bump
IEC 60255-21-2:1988 Class I
2.5.3 Electrical Tests
Standard
IEC 60255-27:2005
Dielectric tests
Test voltage 2kV, 50Hz, 1min
Standard
IEC 60255-5:2000
Impulse voltage tests
Test voltage 5kV
Ⅲ
Overvoltage category
Insulation
resistance
measurements
Isolation resistance >100MΩ@500VDC
2.5.4 Electromagnetic Compatibility
IEC 60255-22-1:2007
1MHz burst disturbance test
Common mode: class III 2.5kV
Differential mode: class III 1.0kV
IEC60255-22-2:2008 class IV
Electrostatic discharge test
For contact discharge: 8kV
For air discharge: 15kV
IEC 60255-22-3:2007 class III
Radio frequency interference tests
Frequency sweep
Radiated amplitude-modulated
PCS-902 Line Distance Relay
2-5
Date: 2012-06-25
2 Technical Data
10V/m (rms), f=80~1000MHz
Spot frequency
Radiated amplitude-modulated
10V/m (rms), f=80MHz/160MHz/450MHz/900MHz
Radiated pulse-modulated
10V/m (rms), f=900MHz
IEC 60255-22-4:2008
Fast transient disturbance tests
Power supply, I/O, Earth: class IV, 4kV, 2.5kHz, 5/50ns
Communication terminals: class IV, 2kV, 5kHz, 5/50ns
IEC 60255-22-5:2008
Surge immunity test
Power supply, AC input, I/O port: class IV, 1.2/50us
Common mode: 4kV
Differential mode: 2kV
Conducted
RF
Electromagnetic
Disturbance
IEC 60255-22-6:2001
Power supply, AC, I/O, Comm. Terminal: Class III, 10Vrms, 150
kHz~80MHz
Power Frequency Magnetic Field
IEC 61000-4-8:2001
Immunity
class V, 100A/m for 1min, 1000A/m for 3s
Pulse Magnetic Field Immunity
IEC 61000-4-9:2001
class V, 6.4/16μs, 1000A/m for 3s
Damped oscillatory magnetic field
IEC 61000-4-10:2001
immunity
class V, 100kHz & 1MHz–100A/m
Auxiliary power supply performance
IEC60255-11: 2008
- Voltage dips
Up to 500ms for dips to 40% of rated voltage without reset
-Voltage short interruptions
100ms for interruption without rebooting
2.6 Certifications







ISO9001:2008
ISO14001:2004
OHSAS18001:2007
ISO10012:2003
CMMI L4
EMC: 2004/108/EC, EN50263:1999
Products safety(PS): 2006/95/EC, EN61010-1:2001
PCS-902 Line Distance Relay
2-6
Date: 2012-06-25
2 Technical Data
2.7 Protective Functions
2.7.1 Fault Detector
2.7.1.1 DPFC Current Element
Setting range
0.050In~30.000In (A)
Accuracy
≤2.5% of setting or 0.02In whichever is greater
2.7.1.2 Residual Current Element
Setting range
0.050In~30.000In (A)
Accuracy
≤2.5% of setting or 0.02In whichever is greater
2.7.1.3 Overvoltage Element
Setting range
Un~2Unn (V)
Accuracy
≤2.5% of setting or 0.01Un, whichever is greater
2.7.2 Distance Protection
Setting range
(0.000~4Unn)/In (ohm)
Accuracy
≤2.5% of setting or 0.1Ω/In whichever is greater
Resetting ratio
105%
Time delay
0.000~10.000 (s)
Accuracy
≤1%Setting+30ms
2.7.3 Phase Overcurrent Protection
Setting range
0.050In~30.000In (A)
Accuracy
≤2.5% of setting or 0.02In whichever is greater
Resetting ratio
95%
Time delay
0.000~20.000 (s)
Accuracy (definite-time characteristic)
≤1% of Setting+30ms (at 2 times current setting)
Accuracy (inverse-time characteristic)
≤2.5% operating time or 30ms, whichever is greater
(for current between 1.2 and 20 multiples of pickup)
2.7.4 Earth Fault Protection
Setting range
0.050In~30.000In (A)
Accuracy
≤2.5% of setting or 0.02In whichever is greater
Resetting ratio
95%
Time delay
0.000~20.000 (s)
Accuracy (definite-time characteristic)
≤1% of Setting+30ms (at 2 times current setting)
Accuracy (inverse-time characteristic)
≤2.5% operating time or 30ms, whichever is greater
(for current between 1.2 and 20 multiples of pickup)
2.7.5 Overvoltage Protection
Setting range
Un~2Unn (V)
PCS-902 Line Distance Relay
2-7
Date: 2012-06-25
2 Technical Data
Accuracy
≤2.5% of setting or 0.01Un, whichever is greater
Resetting ratio
95%
Time delay
0.000~30.000 (s)
Accuracy (definite-time characteristic)
≤1% of Setting+30ms (at 1.2 times voltage setting)
Accuracy (inverse-time characteristic)
≤2.5% operating time or 30ms, whichever is greater
(for voltage between 1.2 and 2 multiples of pickup)
2.7.6 Undervoltage Protection
Setting range
0~Unn (V)
Accuracy
≤2.5% of setting or 0.01Un, whichever is greater
Resetting ratio
105%
Time delay
0.000~30.000 (s)
Accuracy (definite-time characteristic)
≤1%Setting+30ms (at 1.2 times voltage setting)
Accuracy (inverse-time characteristic)
≤2.5% operating time or 30ms, whichever is greater
(for voltage between 0.5 and 0.8 multiples of pickup)
2.7.7 Overfrequency Protection
Setting range
50.00~65.00 (Hz)
Accuracy
≤ 0.02Hz
Resetting ratio
95%
Time delay
0.000~100.000 (s)
Accuracy
≤1%Setting+30ms (at 1.2 times frequency setting)
2.7.8 Underfrequency Protection
Setting range
45.00~ 60.00 (Hz)
Accuracy
≤ 0.02Hz
Resetting ratio
105%
Time delay
0.000s ~ 100.000 (s)
Accuracy
≤1%Setting+30ms (at 0.8 times frequency setting)
df/dt blocking setting range
0.200~20.000 (Hz/s)
Accuracy
≤ 0.02Hz/s
2.7.9 Breaker Failure Protection
Pick-up time
<20ms
Drop-off time
<20ms
Setting range of phase current
0.050In~30.000In (A)
Setting range of zero-sequence current
0.050In~30.000In (A)
Setting range of negative-sequence current
0.050In~30.000In (A)
Accuracy
≤2.5% of setting or 0.02In whichever is greater
Time delay (first)
0.000~10.000 (s)
Time delay (second)
0.000~10.000 (s)
PCS-902 Line Distance Relay
2-8
Date: 2012-06-25
2 Technical Data
2.7.10 Thermal Overload Protection
Base current setting range
0.050In~30.000In (A)
Accuracy
≤2.5% of setting or 0.02In whichever is greater
Line thermal time constant
0.100~100.000 (min)
Thermal overload coefficient for trip
1.000~3.000
Thermal overload coefficient for alarm
1.000~3.000
Resetting ratio
95%
Drop-off time
<30ms
Time accuracy
≤2.5% operating time or 30ms, whichever is greater
(for current between 1.2 and 20 multiples of pickup)
2.7.11 Stub Overcurrent Protection
Setting range
0.050In~30.000In (A)
Accuracy
≤2.5% of setting or 0.02In whichever is greater
Resetting ratio
95%
Time delay
0.000~10.000 (s)
Accuracy
≤1% of Setting+30ms (at 2 times current setting)
2.7.12 Dead Zone Protection
Setting range
0.050In~30.000In
Accuracy
≤2.5% or 0.02In whichever is greater
Time delay
0.000~10.000s
Accuracy
≤1%Setting+30ms
2.7.13 Pole Discrepancy Protection
Setting range (zero-sequence current)
0.050In~30.000In (A)
Setting range (negative-sequence current)
0.050In~30.000In (A)
Accuracy
≤2.5% of setting 0.02In whichever is greater
Resetting ratio
95%
Time delay
0.000~10.000 (s)
Accuracy
≤1% of Setting+30ms (at 2 times current setting)
2.7.14 Broken Conductor Protection
Setting range (I2/I1)
0.20~1.00
Accuracy
≤2.5% of setting
Resetting ratio
95%
Time delay
0.000~600.000 (s)
Accuracy
≤1% of Setting+30ms
2.7.15 Auto-reclosing
Phase difference setting range
0~89 (Deg)
Accuracy
2.0Deg
PCS-902 Line Distance Relay
2-9
Date: 2012-06-25
2 Technical Data
Voltage difference setting range
0.02Un~0.8Un (V)
Accuracy
Max(0.01Un, 2.5%)
Frequency difference setting range
0.02~1 (Hz)
Accuracy
0.01Hz
Operating time of synchronism check
≤1%Setting+20ms
Operating time of energizing check
≤1%Setting+20ms
Operating time of auto-reclosing
≤1%Setting+20ms
2.7.16 Transient Overreach
≤2%
Tolerance for all high-speed protection
2.7.17 Fault Locator
Accuracy for multi-phase faults with single end feed
< ±2.5%
Tolerance will be higher in case of single-phase fault with high ground resistance.
PCS-902 Line Distance Relay
2-10
Date: 2012-06-25
3 Operation Theory
3 Operation Theory
Table of Contents
3 Operation Theory ............................................................................. 3-a
3.1 System Parameters ......................................................................................... 3-1
3.1.1 General Application ............................................................................................................ 3-1
3.1.2 Function Description .......................................................................................................... 3-1
3.1.3 Settings .............................................................................................................................. 3-1
3.2 Line Parameters .............................................................................................. 3-1
3.2.1 General Application ............................................................................................................ 3-1
3.2.2 Function Description .......................................................................................................... 3-1
3.2.3 Settings .............................................................................................................................. 3-2
3.3 Circuit Breaker Position Supervision ............................................................ 3-2
3.3.1 General Application ............................................................................................................ 3-2
3.3.2 Function Description .......................................................................................................... 3-2
3.3.3 Function Block Diagram ..................................................................................................... 3-3
3.3.4 I/O Signals ......................................................................................................................... 3-3
3.3.5 Logic .................................................................................................................................. 3-4
3.3.6 Settings .............................................................................................................................. 3-5
3.4 Fault Detector (FD) .......................................................................................... 3-5
3.4.1 Application.......................................................................................................................... 3-5
3.4.2 Fault Detector in Fault Detector DSP ................................................................................. 3-5
3.4.3 Protection Fault Detector in Protection Calculation DSP ................................................... 3-8
3.4.4 Function Block Diagram ..................................................................................................... 3-9
3.4.5 I/O Signals ....................................................................................................................... 3-10
3.4.6 Logic ................................................................................................................................ 3-10
3.4.7 Settings ............................................................................................................................ 3-10
3.5 Auxiliary Element .......................................................................................... 3-10
3-a
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
3.5.1 General Application .......................................................................................................... 3-10
3.5.2 Function Description ........................................................................................................ 3-11
3.5.3 Function Block Diagram ................................................................................................... 3-13
3.5.4 I/O Signals ....................................................................................................................... 3-13
3.5.5 Logic ................................................................................................................................ 3-15
3.5.6 Settings ............................................................................................................................ 3-18
3.6 Distance Protection ...................................................................................... 3-19
3.6.1 General Application .......................................................................................................... 3-19
3.6.2 Function Description ........................................................................................................ 3-19
3.6.3 DPFC Distance Protection ............................................................................................... 3-28
3.6.4 Load Encroachment ......................................................................................................... 3-32
3.6.5 Mho Distance Protection .................................................................................................. 3-33
3.6.6 Quadrilateral Distance Element ....................................................................................... 3-50
3.6.7 Pilot Distance Zone .......................................................................................................... 3-62
3.6.8 Power Swing Detection .................................................................................................... 3-65
3.6.9 Power Swing Blocking Releasing..................................................................................... 3-66
3.6.10 Distance SOTF Protection ............................................................................................. 3-72
3.7 Optical Pilot Channel (Option) ..................................................................... 3-77
3.7.1 General Application .......................................................................................................... 3-77
3.7.2 Function Description ........................................................................................................ 3-77
3.7.3 Function Block Diagram ................................................................................................... 3-82
3.7.4 I/O Signals ....................................................................................................................... 3-82
3.7.5 Logic ................................................................................................................................ 3-84
3.7.6 Settings ............................................................................................................................ 3-84
3.8 Pilot Distance Protection .............................................................................. 3-84
3.8.1 General Application .......................................................................................................... 3-84
3.8.2 Function Description ........................................................................................................ 3-84
3.8.3 Function Block Diagram ................................................................................................... 3-95
3.8.4 I/O Signals ....................................................................................................................... 3-95
3.8.5 Settings ............................................................................................................................ 3-96
3-b
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
3.9 Pilot Directional Earth-fault Protection ....................................................... 3-97
3.9.1 General Application .......................................................................................................... 3-97
3.9.2 Function Description ........................................................................................................ 3-98
3.9.3 Function Block Diagram ................................................................................................. 3-103
3.9.4 I/O Signals ..................................................................................................................... 3-103
3.9.5 Settings .......................................................................................................................... 3-104
3.10 Current Direction....................................................................................... 3-105
3.10.1 General Application ...................................................................................................... 3-105
3.10.2 Function Description .................................................................................................... 3-105
3.10.3 I/O Signals ................................................................................................................... 3-109
3.10.4 Settings ........................................................................................................................ 3-110
3.11 Phase Overcurrent Protection .................................................................. 3-110
3.11.1 General Application ...................................................................................................... 3-110
3.11.2 Function Description..................................................................................................... 3-110
3.11.3 Function Block Diagram ............................................................................................... 3-113
3.11.4 I/O Signals.................................................................................................................... 3-113
3.11.5 Logic............................................................................................................................. 3-114
3.11.6 Settings ........................................................................................................................ 3-114
3.12 Earth Fault Protection................................................................................ 3-118
3.12.1 General Application ...................................................................................................... 3-118
3.12.2 Function Description .................................................................................................... 3-118
3.12.3 Function Block Diagram ............................................................................................... 3-120
3.12.4 I/O Signals ................................................................................................................... 3-121
3.12.5 Logic ............................................................................................................................ 3-121
3.12.6 Settings ........................................................................................................................ 3-122
3.13 Overcurrent Protection for VT Circuit Failure ........................................ 3-126
3.13.1 General Application ...................................................................................................... 3-126
3.13.2 Function Block Diagram ............................................................................................... 3-127
3.13.3 I/O Signals ................................................................................................................... 3-127
3.13.4 Logic ............................................................................................................................ 3-128
3-c
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
3.13.5 Settings ........................................................................................................................ 3-128
3.14 Residual Current SOTF Protection .......................................................... 3-129
3.14.1 General Application ...................................................................................................... 3-129
3.14.2 Function Description .................................................................................................... 3-129
3.14.3 Function Block Diagram ............................................................................................... 3-129
3.14.4 I/O Signals ................................................................................................................... 3-129
3.14.5 Logic ............................................................................................................................ 3-130
3.14.6 Settings ........................................................................................................................ 3-130
3.15 Voltage Protection ..................................................................................... 3-130
3.15.1 Overvoltage Protection................................................................................................. 3-130
3.15.2 Undervoltage Protection............................................................................................... 3-136
3.16 Frequency Protection ............................................................................... 3-143
3.16.1 General Application ...................................................................................................... 3-143
3.16.2 Function Description .................................................................................................... 3-143
3.16.3 Function Block Diagram ............................................................................................... 3-144
3.16.4 I/O Signals ................................................................................................................... 3-144
3.16.5 Logic ............................................................................................................................ 3-146
3.16.6 Settings ........................................................................................................................ 3-147
3.17 Breaker Failure Protection ....................................................................... 3-149
3.17.1 General Application ...................................................................................................... 3-149
3.17.2 Function Description .................................................................................................... 3-150
3.17.3 Function Block Diagram ............................................................................................... 3-151
3.17.4 I/O Signals ................................................................................................................... 3-151
3.17.5 Logic ............................................................................................................................ 3-152
3.17.6 Settings ........................................................................................................................ 3-153
3.18 Thermal Overload Protection ................................................................... 3-153
3.18.1 General Application ...................................................................................................... 3-153
3.18.2 Function Description .................................................................................................... 3-154
3.18.3 Function Block Diagram ............................................................................................... 3-155
3.18.4 I/O Signals ................................................................................................................... 3-155
3-d
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
3.18.5 Logic ............................................................................................................................ 3-156
3.18.6 Settings ........................................................................................................................ 3-156
3.19 Stub Overcurrent Protection .................................................................... 3-157
3.19.1 General Application ...................................................................................................... 3-157
3.19.2 Function Block Diagram ............................................................................................... 3-158
3.19.3 I/O Signals ................................................................................................................... 3-158
3.19.4 Logic ............................................................................................................................ 3-158
3.19.5 Settings ........................................................................................................................ 3-159
3.20 Dead Zone Protection ............................................................................... 3-159
3.20.1 General Application ...................................................................................................... 3-159
3.20.2 Function Description .................................................................................................... 3-159
3.20.3 Function Block Diagram ............................................................................................... 3-159
3.20.4 I/O Signal ..................................................................................................................... 3-160
3.20.5 Logic ............................................................................................................................ 3-160
3.20.6 Settings ........................................................................................................................ 3-160
3.21 Pole Discrepancy Protection.................................................................... 3-161
3.21.1 General Application ...................................................................................................... 3-161
3.21.2 Function Description .................................................................................................... 3-161
3.21.3 Function Block Diagram ............................................................................................... 3-161
3.21.4 I/O Signals ................................................................................................................... 3-161
3.21.5 Logic ............................................................................................................................ 3-162
3.21.6 Settings ........................................................................................................................ 3-163
3.22 Broken Conductor Protection .................................................................. 3-163
3.22.1 General Application ...................................................................................................... 3-163
3.22.2 Function Description .................................................................................................... 3-164
3.22.3 Function Block Diagram ............................................................................................... 3-164
3.22.4 I/O Signals ................................................................................................................... 3-164
3.22.5 Logic ............................................................................................................................ 3-165
3.22.6 Settings ........................................................................................................................ 3-165
3.23 Synchrocheck ........................................................................................... 3-165
3-e
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
3.23.1 General Application ...................................................................................................... 3-165
3.23.2 Function Description .................................................................................................... 3-165
3.23.3 I/O Signals ................................................................................................................... 3-172
3.23.4 Logic ............................................................................................................................ 3-173
3.23.5 Settings ........................................................................................................................ 3-174
3.24 Automatic Reclosure ................................................................................ 3-176
3.24.1 General Application ...................................................................................................... 3-176
3.24.2 Function Description .................................................................................................... 3-176
3.24.3 Function Block Diagram ............................................................................................... 3-178
3.24.4 I/O Signals ................................................................................................................... 3-178
3.24.5 Logic ............................................................................................................................ 3-180
3.24.6 Settings ........................................................................................................................ 3-191
3.25 Transfer Trip .............................................................................................. 3-193
3.25.1 General Application ...................................................................................................... 3-193
3.25.2 Function Description .................................................................................................... 3-193
3.25.3 Function Block Diagram ............................................................................................... 3-194
3.25.4 I/O Signals ................................................................................................................... 3-194
3.25.5 Logic ............................................................................................................................ 3-194
3.25.6 Settings ........................................................................................................................ 3-195
3.26 Trip Logic ................................................................................................... 3-195
3.26.1 General Application ...................................................................................................... 3-195
3.26.2 Function Description .................................................................................................... 3-195
3.26.3 I/O Signals ................................................................................................................... 3-195
3.26.4 Logic ............................................................................................................................ 3-196
3.26.5 Settings ........................................................................................................................ 3-199
3.27 VT Circuit Supervision.............................................................................. 3-199
3.27.1 General Application ...................................................................................................... 3-199
3.27.2 Function Description .................................................................................................... 3-199
3.27.3 Function Block Diagram ............................................................................................... 3-200
3.27.4 I/O Signals ................................................................................................................... 3-200
3-f
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
3.27.5 Logic ............................................................................................................................ 3-201
3.27.6 Settings ........................................................................................................................ 3-201
3.28 CT Circuit Supervision ............................................................................. 3-202
3.28.1 General Application ...................................................................................................... 3-202
3.28.2 Function Description .................................................................................................... 3-202
3.28.3 Function Block Diagram ............................................................................................... 3-202
3.28.4 I/O Signals ................................................................................................................... 3-202
3.28.5 Logic ............................................................................................................................ 3-203
3.29 Control and Synchrocheck for Manual Closing ..................................... 3-203
3.29.1 General Application ...................................................................................................... 3-203
3.29.2 Function Description .................................................................................................... 3-203
3.29.3 Function Block Diagram ............................................................................................... 3-206
3.29.4 I/O Signals ................................................................................................................... 3-206
3.29.5 Settings ........................................................................................................................ 3-207
3.30 Faulty Phase Selection ............................................................................. 3-209
3.30.1 General Application ...................................................................................................... 3-209
3.30.2 Function Description .................................................................................................... 3-209
3.30.3 I/O Signals ................................................................................................................... 3-211
3.31 Fault Location ............................................................................................ 3-211
3.31.1 Application.................................................................................................................... 3-211
3.31.2 Function Description .................................................................................................... 3-211
3.31.3 Mutual Compensation .................................................................................................. 3-211
3.31.4 I/O Signals ................................................................................................................... 3-214
List of Figures
Figure 3.3-1 Logic diagram of CB position supervision.........................................................3-4
Figure 3.3-2 Logic diagram of trip&closing circuit supervision ............................................3-5
Figure 3.4-1 Flow chart of protection program .......................................................................3-9
Figure 3.4-2 Logic diagram of fault detector .........................................................................3-10
Figure 3.5-1 Logic diagram of auxiliary element ...................................................................3-17
3-g
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
Figure 3.6-1 Protected reach of distance protection for each zone ....................................3-21
Figure 3.6-2 Operating time of single-phase fault (50Hz, SIR=1) .........................................3-22
Figure 3.6-3 Operating time of single-phase fault (60Hz, SIR=1) .........................................3-23
Figure 3.6-4 Operating time of two-phase fault (50Hz, SIR=1) .............................................3-23
Figure 3.6-5 Operating time of two-phase fault (60Hz, SIR=1) .............................................3-24
Figure 3.6-6 Operating time of three-phase fault (50Hz, SIR=1) ..........................................3-24
Figure 3.6-7 Operating time of three-phase fault (60Hz, SIR=1) ..........................................3-25
Figure 3.6-8 Operating time of single-phase fault (50Hz, SIR=30) .......................................3-25
Figure 3.6-9 Operating time of single-phase fault (60Hz, SIR=30) .......................................3-26
Figure 3.6-10 Operating time of two-phase fault (50Hz, SIR=30) .........................................3-26
Figure 3.6-11 Operating time of two-phase fault (60Hz, SIR=30) .........................................3-27
Figure 3.6-12 Operating time of three-phase fault (50Hz, SIR=30) ......................................3-27
Figure 3.6-13 Operating time of three-phase fault (60Hz, SIR=30) ......................................3-28
Figure 3.6-14 Operation characteristic for forward fault ......................................................3-29
Figure 3.6-15 Operation characteristic for reverse fault ......................................................3-30
Figure 3.6-16 Logic diagram of DPFC distance protection ..................................................3-31
Figure 3.6-17 Distance element with load trapezoid .............................................................3-32
Figure 3.6-18 Phase-to-ground operation characteristic for forward fault .........................3-34
Figure 3.6-19 Phase-to-phase operation characteristic for forward fault ...........................3-35
Figure 3.6-20 Operation characteristic for reverse fault ......................................................3-37
Figure 3.6-21 Steady-state characteristic of three-phase short-circuit fault ......................3-37
Figure 3.6-22 Operation characteristic of three-phase close up short-circuit fault ...........3-38
Figure 3.6-23 Shift impedance characteristic of zone 1 and zone 2 ....................................3-39
Figure 3.6-24 Operation characteristic of reverse Z4 distance protection .........................3-40
Figure 3.6-25 Logic diagram of enabling distance protection (Mho) ..................................3-42
Figure 3.6-26 Logic diagram of distance protection (Mho zone 1) ......................................3-42
Figure 3.6-27 Logic diagram of distance protection (Mho zone 2) ......................................3-43
Figure 3.6-28 Logic diagram of distance protection (Mho zone 3) ......................................3-44
Figure 3.6-29 Logic diagram of distance protection (Mho zone 4) ......................................3-45
Figure 3.6-30 Logic diagram of distance protection (Mho zone 5) ......................................3-46
3-h
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
Figure 3.6-30 Quadrilateral forward distance element characteristics ...............................3-51
Figure 3.6-31 Zone 4 reverse quadrilateral distance element characteristic ......................3-51
Figure 3.6-32 Logic diagram of enabling distance protection (Quad) .................................3-53
Figure 3.6-33 Logic diagram of distance protection (Quad zone 1) ....................................3-54
Figure 3.6-34 Logic diagram of distance protection (Quad zone 2) ....................................3-55
Figure 3.6-35 Logic diagram of distance protection (Quad zone 3) ....................................3-56
Figure 3.6-36 Logic diagram of distance protection (Quad zone 4) ....................................3-57
Figure 3.6-38 Logic diagram of distance protection (Quad zone 5) ....................................3-58
Figure 3.6-37 Protected zone of pilot distance protection ...................................................3-63
Figure 3.6-38 Pilot reverse weak infeed element ..................................................................3-63
Figure 3.6-39 Logic diagram of pilot distance zone (Quad characteristic) .........................3-64
Figure 3.6-40 Logic diagram of pilot distance zone (Mho characteristic) ...........................3-64
Figure 3.6-41 Logic diagram of power swing detection .......................................................3-66
Figure 3.6-44 Logic diagram of PSBR ....................................................................................3-70
Figure 3.6-43 Logic diagram of enabling distance SOTF protection ...................................3-73
Figure 3.6-44 Logic diagram of distance SOTF protection ..................................................3-74
Figure 3.7-1 Direct optical link up to 2km with 850nm .........................................................3-78
Figure 3.7-2 Direct optical link up to 40km with 1310nm or up to 100km with 1550nm ....3-78
Figure 3.7-3 Connect to a communication network via communication convertor ...........3-78
Figure 3.7-4 Connect to a communication network via MUX-64 ..........................................3-79
Figure 3.7-5 Connect to a communication network via MUX-2M .........................................3-79
Figure 3.7-6 Schematic diagram of communication channel time ......................................3-81
Figure 3.7-7 Logic diagram of receiving signal n .................................................................3-84
Figure 3.8-1 Enabling/disabling logic of pilot distance protection......................................3-85
Figure 3.8-2 Logic diagram of receiving signal.....................................................................3-85
Figure 3.8-3 Zone extension ...................................................................................................3-86
Figure 3.8-4 Simple schematic of PUTT ................................................................................3-87
Figure 3.8-5 Logic diagram of pilot distance protection (PUTT)..........................................3-87
Figure 3.8-6 Simple schematic of POTT ................................................................................3-88
Figure 3.8-7 Logic diagram of pilot distance protection (POTT) .........................................3-88
3-i
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
Figure 3.8-8 Simple schematic of system fault .....................................................................3-89
Figure 3.8-9 Simple schematic of blocking ...........................................................................3-90
Figure 3.8-10 Logic diagram of pilot distance protection (Blocking) ..................................3-90
Figure 3.8-11 Logic diagram of pilot distance protection (Unblocking) ..............................3-91
Figure 3.8-12 Current reversal ................................................................................................3-91
Figure 3.8-13 Logic diagram of current reversal blocking ...................................................3-92
Figure 3.8-14 Line fault description .......................................................................................3-93
Figure 3.8-15 Weak infeed logic during pickup .....................................................................3-93
Figure 3.8-16 Weak infeed logic without pickup ...................................................................3-94
Figure 3.8-17 Simplified CB Echo logic for POTT .................................................................3-94
Figure 3.9-1 Enabling/disabling logic of pilot directional earth-fault protection ...............3-98
Figure 3.9-2 Logic diagram of receiving signal.....................................................................3-98
Figure 3.9-3 Forward/reverse direction of zero-sequence power........................................3-99
Figure 3.9-4 Simple schematic of DEF (permissive scheme) ..............................................3-99
Figure 3.9-5 Logic diagram of DEF (permissive scheme) ..................................................3-100
Figure 3.9-6 Simple schematic of blocking .........................................................................3-101
Figure 3.9-7 Logic diagram of DEF (Blocking scheme) ......................................................3-101
Figure 3.9-8 Logic diagram for unblocking .........................................................................3-102
Figure 3.10-1 Line fault description .....................................................................................3-105
Figure 3.10-2 Vector diagram of current and voltage .........................................................3-106
Figure 3.10-3 Vector diagram of zero-sequence power ......................................................3-108
Figure 3.11-1 Logic diagram of phase overcurrent protection .......................................... 3-114
Figure 3.12-1 Logic diagram of earth fault protection ........................................................3-121
Figure 3.13-1 Logic diagram of overcurrent protection for VT circuit failure...................3-128
Figure 3.14-1 Logic diagram of residual current SOTF protection ....................................3-130
Figure 3.15-1 Logic diagram of stage x of overvoltage protection ....................................3-134
Figure 3.15-2 Blocking logic of undervoltage protection ...................................................3-140
Figure 3.15-3 Logic diagram of stage x of undervoltage protection .................................3-141
Figure 3.16-1 Logic diagram of underfrequency protection ..............................................3-146
Figure 3.16-2 Logic diagram of overfrequency protection.................................................3-147
3-j
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
Figure 3.17-1 Logic diagram of breaker failure protection.................................................3-152
Figure 3.18-1 Characteristic curve of the thermal overload model ...................................3-155
Figure 3.18-2 Logic diagram of thermal overload protection ............................................3-156
Figure 3.19-1 3/2 breakers arrangement ..............................................................................3-157
Figure 3.19-2 Logic diagram of stub overcurrent protection .............................................3-158
Figure 3.20-1 Dead zone protection .....................................................................................3-160
Figure 3.21-1 Pole discrepancy ............................................................................................3-162
Figure 3.21-2 Logic diagram of pole discrepancy protection ............................................3-163
Figure 3.22-1 Logic diagram of broken conductor protection ...........................................3-165
Figure 3.23-1 Relationship between reference voltage and synchronous voltage ..........3-166
Figure 3.23-2 Voltage connection for single busbar arrangement ....................................3-167
Figure 3.23-3 Voltage connection for single busbar arrangement ....................................3-167
Figure 3.23-4 Voltage connection for double busbars arrangement .................................3-168
Figure 3.23-5 Voltage selection for double busbars arrangement ....................................3-168
Figure 3.23-6 Voltage connection for one and a half breakers arrangement....................3-169
Figure 3.23-7 Voltage selection for one and a half breakers arrangement .......................3-170
Figure 3.23-8 Voltage selection for one and a half breakers arrangement .......................3-171
Figure 3.23-9 Synchronism check ........................................................................................3-173
Figure 3.23-10 Dead charge check logic..............................................................................3-174
Figure 3.23-11 Synchrocheck logic ......................................................................................3-174
Figure 3.24-1 Logic diagram of AR ready ............................................................................3-181
Figure 3.24-2 Single-phase tripping initiating AR ...............................................................3-183
Figure 3.24-3 Three-phase tripping initiating AR ................................................................3-183
Figure 3.24-4 1-pole AR initiation .........................................................................................3-184
Figure 3.24-5 3-pole AR initiation .........................................................................................3-184
Figure 3.24-6 One-shot AR ....................................................................................................3-185
Figure 3.24-7 Extra time delay and blocking logic of AR ...................................................3-185
Figure 3.24-8 Reclosing output logic ...................................................................................3-186
Figure 3.24-9 Reclosing failure and success ......................................................................3-187
Figure 3.24-10 Single-phase transient fault.........................................................................3-190
3-k
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
Figure 3.24-11 Single-phase permanent fault ([79.N_Rcls]=2) ...........................................3-191
Figure 3.25-1 Logic diagram of transfer trip........................................................................3-194
Figure 3.26-1 Tripping logic ..................................................................................................3-197
Figure 3.26-2 Blocking AR logic ...........................................................................................3-198
Figure 3.27-1 Logic of VT circuit supervision .....................................................................3-201
Figure 3.27-2 Logic of VT neutral point supervision ..........................................................3-201
Figure 3.28-1 Logic diagram of CT circuit failure ...............................................................3-203
Figure 3.29-1 Logic diagram of closing primary equipment ..............................................3-204
Figure 3.29-2 Logic diagram of open primary equipment ..................................................3-205
Figure 3.30-1 The region of faulty phase selection ............................................................3-210
Figure 3.31-1 Equivalent sequence network .......................................................................3-212
List of Tables
Table 3.1-1 System parameters ................................................................................................3-1
Table 3.2-1 Line parameters ......................................................................................................3-2
Table 3.3-1 I/O signals of CB position supervision .................................................................3-3
Table 3.3-2 Internal settings of CB position supervision .......................................................3-5
Table 3.4-1 I/O signals of fault detector .................................................................................3-10
Table 3.4-2 Settings of fault detector .....................................................................................3-10
Table 3.5-1 I/O signals of auxiliary element ...........................................................................3-13
Table 3.5-2 Settings of auxiliary element ...............................................................................3-18
Table 3.6-1 I/O signals of DPFC distance protection ............................................................3-31
Table 3.6-2 Settings of DPFC distance protection ................................................................3-31
Table 3.6-3 I/O signals of load encroachment .......................................................................3-33
Table 3.6-4 Settings of load encroachment ...........................................................................3-33
Table 3.6-5 I/O signals of distance protection (Mho) ............................................................3-41
Table 3.6-6 Settings of distance protection (Mho) ................................................................3-46
Table 3.6-7 I/O signals of distance protection (Quad) ..........................................................3-52
Table 3.6-8 Settings of distance protection (Quad) ..............................................................3-58
Table 3.6-9 Settings of pilot distance zone ............................................................................3-65
3-l
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
Table 3.6-10 I/O signals of power swing detection ...............................................................3-65
Table 3.6-11 Settings of power swing detection ...................................................................3-66
Table 3.6-12 I/O signals of PSBR ............................................................................................3-69
Table 3.6-13 Settings of PSBR ................................................................................................3-70
Table 3.6-14 I/O signals of distance SOTF protection ..........................................................3-72
Table 3.6-15 Settings of distance SOTF protection ..............................................................3-75
Table 3.6-16 Internal settings of distance SOTF protection .................................................3-77
Table 3.7-1 I/O signals of pilot channel ..................................................................................3-82
Table 3.7-2 Settings of pilot channel ......................................................................................3-84
Table 3.8-1 I/O signals of pilot distance protection ..............................................................3-95
Table 3.8-2 Settings of pilot distance protection ..................................................................3-96
Table 3.8-3 Internal settings of pilot distance protection .....................................................3-97
Table 3.9-1 I/O signals of pilot directional earth-fault protection ......................................3-103
Table 3.9-2 Settings of pilot directional earth-fault protection ..........................................3-104
Table 3.9-3 Internal settings of pilot distance protection ...................................................3-104
Table 3.10-1 Direction description .......................................................................................3-107
Table 3.10-2 I/O signals of current direction .......................................................................3-109
Table 3.10-3 Settings of current direction ........................................................................... 3-110
Table 3.11-1 Inverse-time curve parameters ........................................................................ 3-112
Table 3.11-2 I/O signals of phase overcurrent protection .................................................. 3-113
Table 3.11-3 Settings of phase overcurrent protection ...................................................... 3-114
Table 3.12-1 Inverse-time curve parameters........................................................................3-120
Table 3.12-2 I/O signals of earth fault protection ................................................................3-121
Table 3.12-3 Settings of earth fault protection ....................................................................3-122
Table 3.13-1 I/O signals of overcurrent protection for VT circuit failure ...........................3-127
Table 3.13-2 Settings of overcurrent protection for VT circuit failure ...............................3-128
Table 3.14-1 I/O signals of residual SOTF protection .........................................................3-129
Table 3.14-2 Settings of residual current SOTF protection ................................................3-130
Table 3.15-1 Inverse-time curve parameters........................................................................3-132
Table 3.15-2 I/O signals of overvoltage protection .............................................................3-133
3-m
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
Table 3.15-3 Settings of overvoltage protection .................................................................3-135
Table 3.15-4 Inverse-time curve parameters of phase undervoltage protection ..............3-138
Table 3.15-5 I/O signals of undervoltage protection ...........................................................3-139
Table 3.15-6 Settings of undervoltage protection ...............................................................3-141
Table 3.16-1 I/O signals of underfrequency protection ......................................................3-144
Table 3.16-2 I/O signals of overfrequency protection .........................................................3-145
Table 3.16-3 Settings of frequency protection ....................................................................3-147
Table 3.17-1 I/O signals of breaker failure protection .........................................................3-151
Table 3.17-2 Settings of breaker failure protection .............................................................3-153
Table 3.18-1 I/O signals of thermal overload protection.....................................................3-155
Table 3.18-2 Settings of thermal overload protection.........................................................3-156
Table 3.19-1 I/O signals of stub overcurrent protection .....................................................3-158
Table 3.19-2 Settings of stub overcurrent protection .........................................................3-159
Table 3.20-1 I/O signals of dead zone protection ................................................................3-160
Table 3.20-2 Settings of dead zone protection ....................................................................3-160
Table 3.21-1 I/O signals of pole discrepancy protection ....................................................3-161
Table 3.21-2 Settings of pole discrepancy protection ........................................................3-163
Table 3.22-1 I/O signals of broken conductor protection ...................................................3-164
Table 3.22-2 Settings of broken conductor protection .......................................................3-165
Table 3.23-1 I/O signals of synchrocheck ............................................................................3-172
Table 3.23-2 Settings of synchrocheck ................................................................................3-174
Table 3.24-1 I/O signals of auto-reclosing ...........................................................................3-178
Table 3.24-2 Reclosing number ............................................................................................3-188
Table 3.24-3 Settings of auto-reclosing ...............................................................................3-191
Table 3.25-1 I/O signals of transfer trip ................................................................................3-194
Table 3.25-2 Settings of Transfer trip ...................................................................................3-195
Table 3.26-1 I/O signals of trip logic .....................................................................................3-195
Table 3.26-2 Settings of trip logic .........................................................................................3-199
Table 3.27-1 I/O signals of VT circuit supervision ..............................................................3-200
Table 3.27-2 VTS Settings .....................................................................................................3-201
3-n
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
Table 3.28-1 I/O signals of CT circuit supervision ..............................................................3-202
Table 3.29-1 I/O signals of control ........................................................................................3-206
Table 3.29-2 Control Settings ...............................................................................................3-207
Table 3.29-3 Synchrocheck Settings ....................................................................................3-208
Table 3.30-1 Relation between ΔUOΦMAX and faulty phase .............................................3-210
Table 3.30-2 I/O signals of faulty phase selection .............................................................. 3-211
Table 3.31-1 I/O signals of fault location..............................................................................3-214
3-o
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
3-p
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
3.1 System Parameters
3.1.1 General Application
The device performs various protection functions by respective algorithms with the information
(currents and voltages) acquired from primary system through current transformer and voltage
transformer, so it is important to configure analog input channels correctly.
Further to correct configuration of analog input channels, other protected system information, such
as the parameters of voltage transformer and current transformer are also required.
3.1.2 Function Description
The device generally considers transmission line as its protected object, current flows from busbar
to line is considered as the forward direction.
3.1.3 Settings
Table 3.1-1 System parameters
No.
Name
Range
Step
Unit
1
Remark
1
Active_Grp
1~10
Active setting group
2
Opt_SysFreq
50 or 60
3
PrimaryEquip_ID
4
U1n
33~65500
1
kV
Primary rated value of VT (phase to phase)
5
I1n
100~65500
1
A
Primary rated value of CT
6
U2n
80~220
1
V
Secondary rated value of VT (phase to phase)
7
I2n
1 or 5
A
Secondary rated value of CT
Hz
System frequency
ID of primary equipment
3.2 Line Parameters
3.2.1 General Application
When the device equips with line protection functions, line parameters of protected line are
required, especially for fault location, precise line parameters are the basic criterion for accurate
fault location.
3.2.2 Function Description
Line parameters mainly include positive-sequence reactance, positive-sequence resistance,
zero-sequence reactance, zero-sequence resistance, mutual zero-sequence reactance, mutual
zero-sequence resistance and line length.
The positive-sequence reactance, zero-sequence reactance, positive-sequence resistance and
zero-sequence resistance are the reactance and resistance value of the whole line. In general, the
device locates the fault through calculating the impedance value from the location of the device to
fault point.
3-1
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
3.2.3 Settings
Table 3.2-1 Line parameters
No.
Name
Range
Step
Unit
Remark
Positive-sequence reactance of the whole
line (secondary value)
Positive-sequence resistance of the whole
line (secondary value)
1
X1L
(0.000~4Unn)/In
0.001
ohm
2
R1L
(0.000~4Unn)/In
0.001
ohm
3
X0L
(0.000~4Unn)/In
0.001
ohm
4
R0L
(0.000~4Unn)/In
0.010
ohm
5
X0M
(0.000~4Unn)/In
0.001
ohm
6
R0M
(0.000~4Unn)/In
0.01
ohm
7
LineLength
0.00~655.35
0.01
km
Total length of the whole line
8
phi1_Reach
30.00~89.00
0.01
Deg
Phase angle of line positive-sequence
impedance
9
phi0_Reach
30.00~89.00
0.01
Deg
Phase angle
impedance
10
Real_K0
-4.000~4.000
0.001
11
Imag_K0
-4.000~4.000
0.001
Zero-sequence reactance of the whole line
(secondary value)
Zero-sequence resistance of the whole line
(secondary value)
Zero-sequence
mutual
reactance
(secondary value)
Zero-sequence mutual resistance of the
whole line (secondary value)
Real
of
line
zero-sequence
component
of
zero-sequence
compensation coefficient
Imaginary component of zero-sequence
compensation coefficient
3.3 Circuit Breaker Position Supervision
3.3.1 General Application
The status of circuit breaker (CB) position is applied for protection and control functions in this
device, such as, SOTF protection, auto-reclose and VT circuit supervision, etc. The status of CB
position can be applied as input signals for other features configured by user.
3.3.2 Function Description
The signal reflecting CB position is acquired via opto-coupler with settable delay pickup and
dropoff, and forms digital signal used by protection functions. CB position can reflect the status of
each phase by means of phase-segregated inputs.
In order to prevent that wrong status of CB position is input into the device via binary input,
appropriate monitor method is used to check the rationality of the binary input. When the binary
input of CB open position is detected, the status of CB position will be thought as incorrect and an
alarm [Alm_52b] will be issued if there is current detected in the line.
Together with the status of circuit breaker and the information of external circuit, this function can
be used to supervise control circuit of circuit breaker.
3-2
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
3.3.3 Function Block Diagram
1.
For phase-segregated circuit breaker
CB Position Supervision
52b_PhA
Alm_52b
52b_PhB
52b_PhC
2.
For non-phase segregated circuit breaker
CB Position Supervision
52b
3.
Alm_52b
Trip&closing circuit supervision (TCCS)
TCCS
52a
TCCS.Alm
52b
TCCS.Input
TCCS will be disabled automatically when it is used for phase-segregated circuit breaker.
3.3.4 I/O Signals
Table 3.3-1 I/O signals of CB position supervision
No.
Input Signal
Description
1
I3P
Three-phase current input
2
52b_PhA
Normally closed contact of A-phase of circuit breaker
3
52b_PhB
Normally closed contact of B-phase of circuit breaker
4
52b_PhC
Normally closed contact of C-phase of circuit breaker
5
52b
Normally closed contact of three-phase of circuit breaker
6
52a
Normally open contact of three-phase of circuit breaker
3-3
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
Control circuit failure (normally closed contact and normally open contact of
7
TCCS.Input
three-phase circuit breaker are all de-energized due to DC power loss of control
circuit)
No.
Output Signal
Description
1
Alm_52b
CB position is abnormal
2
TCCS.Alm
Control circuit of circuit breaker is abnormal
3.3.5 Logic
BI
52b_PhA
&
>=1
52b_A_CB
BI
52b_PhB
&
>=1
52b_B_CB
BI
52b_PhC
&
>=1
52b_C_CB
EN
[En_3PhCB]
BI
52b
SIG
52b_A_CB
&
&
&
SIG
52b_B_CB
&
SIG
52b_C_CB
&
&
>=1
&
&
10s
>=1
SIG
10s
Alm_52b
Ia>I_Line
&
SIG
Ib>I_Line
&
SIG
Ic>I_Line
Figure 3.3-1 Logic diagram of CB position supervision
3-4
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
BI
[52a]
BI
[52b]
BI
[TCCS.Input]
>=1
>=1
[TCCS.t_DPU]
[TCCS.t_DDO]
TCCS.Alm
Figure 3.3-2 Logic diagram of trip&closing circuit supervision
Where:
1.
TCCS.t_DPU is pickup delay time of control circuit failure alarm. Default value is 500ms.
2.
TCCS.t_DDO is dropoff delay time of control circuit failure alarm. Default value is 500ms.
3.
I_Line is threshold value used to determine whether line is on-load or no-load. Default value
0.06In.
3.3.6 Settings
Table 3.3-2 Internal settings of CB position supervision
No.
Name
Default Value
Unit
Remark
1
TCCS.t_DPU
0.5
s
Pickup delay time of control circuit failure alarm
2
TCCS.t_DDO
0.5
s
Dropoff delay time of control circuit failure alarm
3
En_3PhCB
0
This setting is used to determine whether CB position
is determined by phase-segregated auxiliary contact
or three-phase auxiliary contact
0: phase-segregated contact ([52b_PhA], [52b_PhB],
[52b_PhC])
1: three-phase contact ([52b])
3.4 Fault Detector (FD)
3.4.1 Application
The device has one DSP module with fault detector DSP and protection DSP for fault detector and
protection calculation respectively. Protection DSP with protection fault detector element is
responsible for calculation of protection elements, and fault detector DSP is responsible to
determine fault appearance on the protected power system. Fault detector in fault detector DSP
picks up to provide positive supply to output relays. The output relays can only operate when both
the fault detector in fault detector DSP and a protection element operate simultaneously.
Otherwise, the output relays would not operate. An alarm message will be issued with blocking
outputs if a protection element operates while the fault detector does not operate.
3.4.2 Fault Detector in Fault Detector DSP
Main part of FD is DPFC current detector element that detects the change of phase-to-phase
power frequency current, and residual current fault detector element that calculates the vector
sum of 3 phase currents as supplementary. They are continuously calculating the analog input
signals.
3-5
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
The FD pickup condition in this device includes:
1.
Pickup condition 1: DPFC current is greater than the setting value
2.
Pickup condition 2: Residual current is greater than the setting value
3.
Pickup condition 3: Phase voltage or phase-to-phase voltage is greater than the voltage
setting of overvoltage protection
4.
Pickup condition 4: Circuit breaker position discrepancy
Pickup condition 3 and 4 are only available when respective protection elements are enabled.
If any of the above conditions is complied, the FD will operate to activate the output circuit
providing DC power supply to the output relays.
DPFC current fault detector element (pickup condition 1) and residual current fault detector
element (pickup condition 2) are always enabled, and all protection functions are permitted to
operate when they operate.
3.4.2.1 Fault Detector Based on DPFC Current (pickup condition 1)
DPFC phase-to-phase current is obtained by subtracting the phase-to-phase current from that of a
cycle before.
I(k) is the sampling value at a point.
I(k-24) is the value of a sampling point before a cycle, 24 is the sampling points in one cycle.
200
100
0
-100
-200
0
20
40
60
Original Current
80
100
120
0
20
40
60
DPFC current
80
100
120
100
50
0
-50
-100
From above figures, it is concluded that DPFC can reflect the sudden change of current at the
initial stage of a fault and has a perfect performance of fault detection.
It is used to determine whether this pickup condition is met according to Equation 3.4-1.
3-6
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
For multi-phase short-circuit fault, the DPFC phase-to-phase current has high sensitivity to ensure
the pickup of protection device. For usual single phase to earth fault, it also has sufficient
sensitivity to pick up except the earth fault with very large fault resistance. Under this condition the
DPFC current is relative small, however, residual current is also used to judge pickup condition
(pickup condition 2).
This element adopts adaptive floating threshold varied with the change of load current
continuously. The change of load current is small and steadily under normal or power swing
condition, the adaptive floating threshold with the ΔISet is higher than the change of current under
these conditions and hence maintains the element stability.
The criterion is:
ΔIΦΦMAX>1.25ΔITh+ΔISet
Equation 3.4-1
Where:
ΔIΦΦMAX: The maximum half-wave integration value of phase-to-phase current (ΦΦ=AB, BC, CA)
ΔISet: The fixed threshold value (i.e. the setting [FD.DPFC.I_Set])
ΔITh: The floating threshold value
The coefficient, 1.25, is an empirical value which ensures the threshold always higher than the
unbalance output value of the system.
If operating condition is met, DPFC current element will pickup and trigger FD to provide DC power
supply for output relays, the FD operation signal will maintain 7 seconds after DPFC current
element drops off.
3.4.2.2 Fault Detector Based on Residual Current (pickup condition 2)
This pickup condition will be met when 3I0 is greater than the setting [FD.ROC.3I0_Set].
Where:
3I0: residual current calculates from the vector sum of Ia, Ib and Ic
When residual current FD element operates and lasts for longer than 10 seconds, an alarm
[Alm_PersistI0] will be issued.
If operating condition is met, the residual current FD element will pickup and trigger FD to provide
DC power supply for output relay, and pickup signal will be kept for 7 seconds after the residual
current FD element drops off.
3.4.2.3 Fault Detector Based on Overvoltage (pickup condition 3)
Overvoltage fault detector will be automatically effective when overvoltage protection is enabled.
If the logic setting [59Px.Opt_1P/3P] is set as “1” (x=1 or 2), i.e. the protective device adopts
1-out-of-3 mode, when any phase voltage is greater than the setting [59Px.U_Set] (x=1 or 2), the
overvoltage fault detector element will pickup and trigger FD to provide DC power supply for
output relays, the FD operation signal will maintain 7 seconds after overvoltage fault detector
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3 Operation Theory
element drops off.
If the logic setting [59Px.Opt_1P/3P] is set as “0” (x=1 or 2), i.e. the protective device adopts
3-out-of-3 mode, when all three phase voltages are greater than the setting [59Px.U_Set] (x=1 or
2), the overvoltage fault detector element will pickup and trigger FD to provide DC power supply
for output relays, the FD operation signal will maintain 7 seconds after overvoltage fault detector
element drops off.
3.4.2.4 Fault Detector Based on Circuit Breaker Position Discrepancy (pickup condition 4)
When pole discrepancy protection is enabled, i.e. the logic setting [62PD.En] is set as “1”, and if
three phases of circuit breaker are not in the same status, pole discrepancy FD element will
operate to provide DC power supply for output relays, and pickup signal will maintain 7 seconds
after pole discrepancy FD element drops out.
3.4.3 Protection Fault Detector in Protection Calculation DSP
The protection device is running either of the two programs: one is “Regular program” for normal
state, and the other is “Fault calculation program” after protection fault detector picks up.
Under the normal state, the protection device will perform the following tasks:
1.
Calculate analog quantity
2.
Read binary input
3.
Hardware self-check
4.
Circuit breaker position supervision
5.
Analog quantity input supervision
6.
Channel supervision
Once the protection fault detector element in protection calculation DSP picks up, the protection
device will switch to fault calculation program, for example the calculation of distance protection,
and to determine logic. If the fault is within the protected zone, the protection device will send
tripping command.
The protection program flow chart is shown as Figure 3.4-1.
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3 Operation Theory
Main program
Sampling program
No
Yes
Pickup?
Regular program
Fault calculation program
Figure 3.4-1 Flow chart of protection program
The protection FD pickup conditions are the same as the FD in fault detector DSP as shown below.
The operation criteria for the conditions are also the same as that in fault detector DSP. Please
refer to section 3.4.2 for details.
1.
Pickup condition 1: DPFC current is greater than the setting value
2.
Pickup condition 2: Residual current is greater than the setting value
3.
Pickup condition 3: Phase voltage or phase-to-phase voltage is greater than the setting value
4.
Pickup condition 4: Circuit breaker position discrepancy
When any pickup condition mentioned above is met, the protection device will go to fault
calculation state.
Pickup condition 3 and 4 are not common fault detector elements, only used for respective
protection element. Please refer to section 3.15.1 and section 3.20 for details.
3.4.4 Function Block Diagram
FD
FD.Pkp
FD.DPFC.Pkp
FD.ROC.Pkp
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3.4.5 I/O Signals
Table 3.4-1 I/O signals of fault detector
No.
Input Signal
Description
1
I3P
Three-phase current input
2
U3P
Three-phase voltage input
No.
Output Signal
Description
1
FD.Pkp
The device picks up
2
FD.DPFC.Pkp
DPFC current fault detector element operates.
3
FD.ROC.Pkp
Residual current fault detector element operates.
3.4.6 Logic
SIG
Ia
SIG
Ib
SIG
Ic
Calculate DPFC phase-tophase current:
฀ Iab=฀ (Ia-Ib)
฀ Ibc=฀ (Ib-Ic)
฀ Ica=฀ (Ic-Ia)
ΔIab>[FD.DPFC.I_Set]
>=1
ΔIbc>[FD.DPFC.I_Set]
FD.DPFC.Pkp
ΔIca>[FD.DPFC.I_Set]
>=1
0s
Calculate residual current:
3I0=Ia+Ib+Ic
7s
FD.Pkp
FD.ROC.Pkp
3I0>[FD.ROC.3I0_Set]
Figure 3.4-2 Logic diagram of fault detector
3.4.7 Settings
Table 3.4-2 Settings of fault detector
No.
Name
Range
Step
Unit
1
FD.DPFC.I_Set
(0.050~30.000)×In
0.001
A
2
FD.ROC.3I0_Set
(0.050~30.000)×In
0.001
A
Remark
Current setting of DPFC current fault
detector element
Current setting of residual current fault
detector element
3.5 Auxiliary Element
3.5.1 General Application
Auxiliary element (AuxE) is mainly used to program logics to meet users’ applications or further
improve operating reliability of protection elements. Reliability of protective elements (such as
distance element or current differential element) is assured, auxiliary element is usually not
required to configure. Auxiliary elements including current change auxiliary element (AuxE.OCD),
residual current auxiliary element (AuxE.ROC), phase current auxiliary element (AuxE.OC),
voltage change auxiliary element (AuxE.UVD), phase under voltage auxiliary element (AuxE.UVG),
phase-to-phase under voltage auxiliary element (AuxE.UVS) and residual voltage auxiliary
element (AuxE.ROV), and they can be enabled or disabled by corresponding logic setting or
binary inputs. Users can configure them according to applications via PCS-Explorer software.
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3 Operation Theory
3.5.2 Function Description
1.
Current change auxiliary element AuxE.OCD
It shares DPFC current element of DPFC fault detector. If DPFC fault detector operates
(FD.DPFC.Pkp=1) and current change auxiliary element is enabled, current change auxiliary
element operates.
2.
Residual current auxiliary element AuxE.ROC
There are 3 stages for residual current auxiliary element (AuxE.ROC1, AuxE.ROC2 and
AuxE.ROC3). Each residual current auxiliary element will operate instantly if calculated residual
current amplitude is larger than corresponding current setting
The criteria are:
AuxE.ROC1: 3I0>[AuxE.ROC1.3I0_Set]
AuxE.ROC2: 3I0>[AuxE.ROC2.3I0_Set]
AuxE.ROC3: 3I0>[AuxE.ROC3.3I0_Set]
Where:
3I0: The calculated residual current
3.
Phase current auxiliary element AuxE.OC
There are 3 stages for phase current auxiliary element (AuxE.OC1, AuxE.OC2 and AuxE.OC3).
Each phase current auxiliary element will operate instantly if phase current amplitude is larger than
corresponding current setting.
The criteria are:
AuxE.OC1: IΦMAX>[AuxE.OC1.I_Set]
AuxE.OC2: IΦMAX>[AuxE.OC2.I_Set]
AuxE.OC3: IΦMAX>[AuxE.OC3.I_Set]
Where:
IΦMAX: The maximum phase current among three phases
4.
Voltage change auxiliary element AuxE.UVD
AuxE.UVD detects phase-to-ground voltage change and adopts floating threshold. Under normal
conditions or power swing conditions, voltage change is very small, so it has a high reliability and
does not operate under these conditions.
The criterion is:
Δ UΦMAX>1.25ΔUTh+[AuxE.UVD.U_Set]
Where:
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ΔUΦMAX: The maximum phase-to-ground voltage change among three phases
ΔUTh: The floating threshold
The coefficient, 1.25, is an empirical value which ensures no operation under normal conditions or
power swing conditions.
5.
Phase under voltage auxiliary element AuxE.UVG
AuxE.UVG will operate instantly if any phase-to-ground voltage is lower than corresponding
voltage setting.
The criterion is:
UΦMIN<[ AuxE.UVG.U_Set]
Where:
UΦMIN: The minimum value among three phase-to-ground voltages
6.
Phase-to-phase under voltage auxiliary element AuxE.UVS
AuxE.UVS will operate instantly if any phase-to-phase voltage is lower than corresponding voltage
setting.
The criterion is:
UΦΦMIN<[ AuxE.UVS.U_Set]
Where:
UΦΦMIN: The minimum value among three phase-to-phase voltages
7.
Residual voltage auxiliary element AuxE.ROV
AuxE.ROV will operate instantly if calculated residual voltage is larger than corresponding voltage
setting.
The criterion is:
3U0>[ AuxE.ROV.3U0_Set]
Where:
3U0: The calculated residual voltage
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3.5.3 Function Block Diagram
AuxE
AuxE.OCD.En
AuxE.St
AuxE.OCD.Blk
AuxE.OCD.St
AuxE.ROC1.En
AuxE.OCD.St_Ext
AuxE.ROC1.Blk
AuxE.OCD.On
AuxE.ROC2.En
AuxE.ROC1.St
AuxE.ROC2.Blk
AuxE.ROC1.On
AuxE.ROC3.En
AuxE.ROC2.St
AuxE.ROC3.Blk
AuxE.ROC2.On
AuxE.OC1.En
AuxE.ROC3.St
AuxE.OC1.Blk
AuxE.ROC3.On
AuxE.OC2.En
AuxE.OC1.St
AuxE.OC2.Blk
AuxE.OC1.On
AuxE.OC3.En
AuxE.OC2.St
AuxE.OC3.Blk
AuxE.OC2.On
AuxE.UVD.En
AuxE.OC3.St
AuxE.UVD.Blk
AuxE.OC3.On
AuxE.UVG.En
AuxE.UVD.St
AuxE.UVG.Blk
AuxE.UVD.St_Ext
AuxE.UVS.En
AuxE.UVD.On
AuxE.UVS.Blk
AuxE.UVG.St
AuxE.ROV.En
AuxE.UVG.On
AuxE.ROV.Blk
AuxE.UVS.St
AuxE.UVS.On
AuxE.ROV.St
AuxE.ROV.On
3.5.4 I/O Signals
Table 3.5-1 I/O signals of auxiliary element
No.
1
Input Signal
AuxE.OCD.En
Description
Current change auxiliary element enabling input, it is triggered from binary input or
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programmable logic etc.
2
AuxE.OCD.Blk
3
AuxE.ROC1.En
4
AuxE.ROC1.Blk
5
AuxE.ROC2.En
6
AuxE.ROC2.Blk
7
AuxE.ROC3.En
8
AuxE.ROC3.Blk
9
AuxE.OC1.En
10
AuxE.OC1.Blk
11
AuxE.OC2.En
12
AuxE.OC2.Blk
13
AuxE.OC3.En
14
AuxE.OC3.Blk
15
AuxE.UVD.En
16
AuxE.UVD.Blk
17
AuxE.UVG.En
18
AuxE.UVG.Blk
19
AuxE.UVS.En
20
AuxE.UVS.Blk
21
AuxE.ROV.En
22
AuxE.ROV.Blk
Current change auxiliary element blocking input, it is triggered from binary input or
programmable logic etc.
Stage 1 of residual current auxiliary element enabling input, it is triggered from
binary input or programmable logic etc.
Stage 1 of residual current auxiliary element blocking input, it is triggered from
binary input or programmable logic etc.
Stage 2 of residual current auxiliary element enabling input, it is triggered from
binary input or programmable logic etc.
Stage 2 of residual current auxiliary element blocking input, it is triggered from
binary input or programmable logic etc.
Stage 3 of residual current auxiliary element enabling input, it is triggered from
binary input or programmable logic etc.
Stage 3 of residual current auxiliary element blocking input, it is triggered from
binary input or programmable logic etc.
Stage 1 of phase current auxiliary element enabling input, it is triggered from
binary input or programmable logic etc.
Stage 1 of phase current auxiliary element blocking input, it is triggered from
binary input or programmable logic etc.
Stage 2 of phase current auxiliary element enabling input, it is triggered from
binary input or programmable logic etc.
Stage 2 of phase current auxiliary element blocking input, it is triggered from
binary input or programmable logic etc.
Stage 3 of phase current auxiliary element enabling input, it is triggered from
binary input or programmable logic etc.
Stage 3 of phase current auxiliary element blocking input, it is triggered from
binary input or programmable logic etc.
Voltage change auxiliary element enabling input, it is triggered from binary input or
programmable logic etc.
Voltage change auxiliary element blocking input, it is triggered from binary input or
programmable logic etc.
Phase-to-ground under voltage auxiliary element enabling input, it is triggered
from binary input or programmable logic etc.
Phase-to-ground under voltage auxiliary element blocking input, it is triggered
from binary input or programmable logic etc.
Phase-to-phase under voltage auxiliary element enabling input, it is triggered from
binary input or programmable logic etc.
Phase-to-phase under voltage auxiliary element blocking input, it is triggered from
binary input or programmable logic etc.
Residual voltage auxiliary element enabling input, it is triggered from binary input
or programmable logic etc.
Residual voltage auxiliary element blocking input, it is triggered from binary input
or programmable logic etc.
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3 Operation Theory
23
I3P
Three-phase current input
24
U3P
Three-phase voltage input
No.
Output Signal
Description
1
AuxE.St
Any auxiliary element of the device operates
2
AuxE.OCD.St
Current change auxiliary element operates.
3
AuxE.OCD.St_Ext
Current change auxiliary element operates (7s delayed drop off).
4
AuxE.OCD.On
Current change auxiliary element is enabled
5
AuxE.ROC1.St
Stage 1 of residual current auxiliary element operates.
6
AuxE.ROC1.On
Stage 1 of residual current auxiliary element is enabled
7
AuxE.ROC2.St
Stage 2 of residual current auxiliary element operates.
8
AuxE.ROC2.On
Stage 2 of residual current auxiliary element is enabled
9
AuxE.ROC3.St
Stage 3 of residual current auxiliary element operates.
10
AuxE.ROC3.On
Stage 3 of residual current auxiliary element is enabled
11
AuxE.OC1.St
Stage 1 of phase current auxiliary element operates.
12
AuxE.OC1.On
Stage 1 of phase current auxiliary element is enabled
13
AuxE.OC2.St
Stage 2 of phase current auxiliary element operates.
14
AuxE.OC2.On
Stage 2 of phase current auxiliary element is enabled
15
AuxE.OC3.St
Stage 3 of phase current auxiliary element operates.
16
AuxE.OC3.On
Stage 3 of phase current auxiliary element is enabled
17
AuxE.UVD.St
Voltage change auxiliary element operates.
18
AuxE.UVD.St_Ext
Voltage change auxiliary element operates (7s delayed drop off).
19
AuxE.UVD.On
Voltage change auxiliary element is enabled
20
AuxE.UVG.St
Phase-to-ground under voltage auxiliary element operates.
21
AuxE.UVG.On
Phase-to-ground under voltage auxiliary element is enabled
22
AuxE.UVS.St
Phase-to-phase under voltage auxiliary element operates.
23
AuxE.UVS.On
Phase-to-phase under voltage auxiliary element is enabled
24
AuxE.ROV.St
Residual voltage auxiliary element operates.
25
AuxE.ROV.On
Residual voltage auxiliary element is enabled
3.5.5 Logic
SIG
FD.DPFC.Pkp
SIG
AuxE.OCD.En
SIG
AuxE.OCD.Blk
En
AuxE.OCD.En
AuxE.OCD.St
&
&
0s
[AuxE.OCD.t_Ext]
AuxE.OCD.St_Ext
AuxE.OCD.On
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3 Operation Theory
SIG
Ia
SIG
Ib
SIG
Ic
SIG
AuxE.ROC1.En
SIG
AuxE.ROC1.Blk
En
AuxE.ROC1.En
SIG
AuxE.ROC2.En
SIG
AuxE.ROC2.Blk
En
AuxE.ROC2.En
SIG
AuxE.ROC3.En
SIG
AuxE.ROC3.Blk
En
AuxE.ROC3.En
Calculate residual
current:
3I0=Ia+Ib+Ic
3I0>[AuxE.ROC1.3I0_Set]
AuxE.ROC1.On
3I0>[AuxE.ROC2.3I0_Set]
3I0>[AuxE.ROC3.3I0_Set]
&
AuxE.ROC3.St
&
AuxE.ROC3.On
SIG
Ib
Ib>[AuxE.OC1.I_Set]
SIG
Ic
Ic>[AuxE.OC1.I_Set]
SIG
AuxE.OC1.En
>=1
&
AuxE.OC1.St
&
SIG
AuxE.OC1.Blk
En
AuxE.OC1.En
SIG
Ia
Ia>[AuxE.OC2.I_Set]
SIG
Ib
Ib>[AuxE.OC2.I_Set]
SIG
Ic
Ic>[AuxE.OC2.I_Set]
SIG
AuxE.OC2.En
AuxE.OC1.On
>=1
&
AuxE.OC2.St
&
SIG
AuxE.OC2.Blk
En
AuxE.OC2.En
SIG
Ia
Ia>[AuxE.OC3.I_Set]
SIG
Ib
Ib>[AuxE.OC3.I_Set]
SIG
Ic
Ic>[AuxE.OC3.I_Set]
SIG
AuxE.OC3.En
AuxE.OC3.En
AuxE.ROC2.St
AuxE.ROC2.On
Ia>[AuxE.OC1.I_Set]
En
&
&
Ia
AuxE.OC3.Blk
AuxE.ROC1.St
&
SIG
SIG
&
AuxE.OC2.On
>=1
&
AuxE.OC3.St
&
AuxE.OC3.On
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3 Operation Theory
SIG
Ua
SIG
Ub
SIG
Uc
Calculate DPFC phase
voltage
△Ua=△(Ua-Ufa)
△Ub=△(Ub-Ufb)
△Uc=△(Uc-Ufc)
ΔUa>[AuxE.UVD.U_Set]
>=1
ΔUb>[AuxE.UVD.U_Set]
&
AuxE.UVD.St
ΔUc>[AuxE.UVD.U_Set]
0s
SIG
AuxE.UVD.En
SIG
AuxE.UVD.Blk
En
AuxE.UVD.En
SET
UA<[AuxE.UVG.U_Set]
SET
UB<[AuxE.UVG.U_Set]
SET
UC<[AuxE.UVG.U_Set]
[AuxE.UVD.t_Ext]
AuxE.UVD.St_Ext
&
AuxE.UVD.On
>=1
SIG
AuxE.UVG.En
SIG
AuxE.UVG.Blk
En
AuxE.UVG.En
SET
UAB<[AuxE.UVS.U_Set]
SET
UBC<[AuxE.UVS.U_Set]
SET
UCA<[AuxE.UVS.U_Set]
&
AuxE.UVG.St
&
AuxE.UVG.On
>=1
SIG
AuxE.UVS.En
SIG
AuxE.UVS.Blk
En
AuxE.UVS.En
SIG
&
AuxE.UVS.St
&
AuxE.UVS.On
Ua
SIG
Ub
SIG
Uc
SIG
AuxE.ROV.En
SIG
AuxE.ROV.Blk
En
AuxE.ROV.En
SIG
AuxE.OCD.St_Ext
SIG
AuxE.ROC1.St
SIG
AuxE.ROC2.St
SIG
AuxE.ROC3.St
SIG
AuxE.OC1.St
3U0>[AuxE.ROV.3U0_Set]
&
AuxE.ROV.St
Calculate residual voltage
3U0=Ua+Ub+Uc
&
AuxE.ROV.On
>=1
>=1
AuxE.St
>=1
SIG
AuxE.OC2.St
SIG
AuxE.OC3.St
SIG
AuxE.UVD.St_Ext
SIG
AuxE.UVG.St
SIG
AuxE.UVS.St
SIG
AuxE.ROV.St
>=1
>=1
>=1
Figure 3.5-1 Logic diagram of auxiliary element
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3 Operation Theory
3.5.6 Settings
Table 3.5-2 Settings of auxiliary element
No.
1
Name
AuxE.OCD.t_Ext
Range
0.000~10.000
Step
0.001
Unit
s
Remark
Extended time delay of current change
auxiliary element
Enabling/disabling current change
2
AuxE.OCD.En
auxiliary element
0 or 1
0: disable
1: enable
3
AuxE.ROC1.3I0_Set
(0.050~30.000)×In
0.001
A
Current setting of stage 1 residual
current auxiliary element
Enabling/disabling stage 1 residual
4
AuxE.ROC1.En
current auxiliary element
0 or 1
0: disable
1: enable
5
AuxE.ROC2.3I0_Set
(0.050~30.000)×In
0.001
A
Current setting of stage 2 residual
current auxiliary element
Enabling/disabling stage 2 residual
6
AuxE.ROC2.En
current auxiliary element
0 or 1
0: disable
1: enable
7
AuxE.ROC3.3I0_Set
(0.050~30.000)×In
0.001
A
Current setting of stage 3 residual
current auxiliary element
Enabling/disabling stage 3 residual
8
AuxE.ROC3.En
current auxiliary element
0 or 1
0: disable
1: enable
9
AuxE.OC1.I_Set
Current setting of stage 1 phase current
(0.050~30.000)×In
auxiliary element
Enabling/disabling stage 1 phase
10
AuxE.OC1.En
current auxiliary element
0 or 1
0: disable
1: enable
11
AuxE.OC2.I_Set
Current setting of stage 2 phase current
(0.050~30.000)×In
auxiliary element
Enabling/disabling stage 2 phase
12
AuxE.OC2.En
current auxiliary element
0 or 1
0: disable
1: enable
13
AuxE.OC3.I_Set
(0.050~30.000)×In
14
AuxE.OC3.En
0 or 1
Current setting of stage 3 phase current
auxiliary element
Enabling/disabling stage 3 phase
current auxiliary element
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0: disable
1: enable
15
AuxE.UVD.U_Set
0~Un
0.001
V
16
AuxE.UVD.t_Ext
0.000~10.000
0.001
s
Voltage setting for voltage change
auxiliary element
Extended time delay of voltage change
auxiliary element
Enabling/disabling voltage change
17
AuxE.UVD.En
auxiliary element
0 or 1
0: disable
1: enable
18
AuxE.UVG.U_Set
0~Un
0.001
V
Voltage setting for phase-to-ground
under voltage auxiliary element
Enabling/disabling phase-to-ground
19
AuxE.UVG.En
under voltage auxiliary element
0 or 1
0: disable
1: enable
20
AuxE.UVS.U_Set
0~Unn
0.001
V
Voltage setting for phase-to-phase
under voltage auxiliary element
Enabling/disabling phase-to-phase
21
AuxE.UVS.En
under voltage auxiliary element
0 or 1
0: disable
1: enable
22
AuxE.ROV.3U0_Set
0~Un
0.001
V
Voltage setting for residual voltage
auxiliary element
Enabling/disabling residual voltage
23
AuxE.ROV.En
auxiliary element
0 or 1
0: disable
1: enable
3.6 Distance Protection
3.6.1 General Application
When a fault happens on a power system, distance protection will trip circuit breaker to isolate the
fault from power system with its specific time delay if the fault is within the protected zone of
distance protection.
3.6.2 Function Description
The device comprises 3 forward zones, 1 reverse zone, 1 settable forward or reverse zone and 1
pilot zone. For each independent distance element zone, full scheme design provides continuous
measurement of impedance separately in three independent phase-to-phase measuring loops as
well as in three independent phase-to-ground measuring loops. Selection of zone characteristic
between mho and quadrilateral is available. Distance protection includes:
1.
DPFC distance protection
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3 Operation Theory
It is independent fast protection providing extremely fast speed to clear close up fault
especially on long line and thus improves system stability.
2.
Mho phase-to-phase distance protection
Zone1~3: forward direction
Zone 4: reverse direction including origin
Zone5: settable forward or reverse direction
3.
Mho phase-to-ground distance protection
Zone1~3: forward direction
Zone 4: reverse direction including origin
Zone5: settable forward or reverse direction
4.
Quadrilateral phase-to-phase distance protection
Zone1~3: forward direction
Zone 4: reverse direction
Zone5: settable forward or reverse direction
5.
Quadrilateral phase-to-ground distance protection
Zone1~3: forward direction
Zone 4: reverse direction
Zone5: settable forward or reverse direction
6.
Pilot distance protection
The pilot zone is for PUTT, POTT and blocking scheme. The forward direction element is for
sending signal for POTT and tripping upon receiving permissive signal for both PUTT and
POTT scheme. The forward direction element for blocking scheme is used to stop sending
blocking signal. The reverse direction element is only for POTT scheme with weak infeed
condition.
7.
Load encroachment
It is used to prevent all distance elements from undesired trip due to load encroachment
under heavy load condition especially for long lines.
8.
Power swing detection (PSD)
9.
Power swing blocking releasing (PSBR)
For power swing with external fault, distance protection is always blocked, but for power
swing with internal fault, PSBR will operate to release the blocking for distance protection.
10. SOTF distance protection
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PCS-902 Line Distance Relay
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For manual closing or automatic closing on to a fault, zone 2 or 3 of distance protection will
accelerate to trip.
When VT circuit fails, VT circuit supervision logic will output a blocking signal to block all distance
protection except DPFC distance protection. The operating threshold will be increased to 1.5UN to
enhance stability.
Distance protection can select line VT or bus VT for protection algorithm by a setting
[VTS.En_Line_VT]. When no VT is provided, logic setting [VTS.En_Out_VT] should be set as “1”,
all distance protection will be blocked automatically. The coordination among zones of distance
protection is shown in the following figure.
Z4
EM
M
A
B
P
C
D
N
EN
Z1、DZ
Z2
Z3
Figure 3.6-1 Protected reach of distance protection for each zone
Where:
Z1: forward direction zone 1
Z2: forward direction zone 2
Z3: forward direction zone 3
Z4: reverse direction zone 4
DZ: DPFC distance protection
The choice of impedance reach is as follow. (only for reference)
The zone 1 impedance reach setting should be set to cover as much the protected line as possible
but not to respond faults beyond the protected line. The accuracy of the relay distance elements is
±2.5% in general applications, however, the error could be much larger due to errors of current
transformer, voltage transformer and inaccuracies of line parameter from which the relay settings
are calculated. It is recommended the zone 1 reach is set to 80%~85% of the protected line in
consideration the aforesaid errors and safety margin to prevent instantaneously tripping for faults
on adjacent lines. The remaining 20% of the protected line relies on the zone 2 distance elements.
With the pilot scheme distance protection, fast fault clearance could also be achieved for end zone
faults at both ends of the protected line.
The general rule for zone 2 impedance reach setting is set to cover the protected line plus 20% of
the adjacent line. However, the coverage of adjacent line should be extended in the presence of
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additional infeed at the remote end of the protected line to ensure 20% coverage of adjacent line.
This assures the fast operation of zone 2 distance element for faults at the remote end of the
protected line since the fault is well within zone 2 reach. This is important for pilot protection as the
impedance reach of pilot zone is the same as that of zone 2 distance element. In a parallel line
situation, a fault cleared sequentially on a line may cause current reversal in the healthy line. If the
pilot zone settings are set to cover 50% of adjacent line and the POTT or Blocking scheme is used,
the current reversal in the healthy line could cause relay mal-operation. Therefore, current reversal
logic is required and explained in section 3.8.2.6.
The Z3 distance element acts as backup protection for protected line and adjacent line but not to
over the zone 2 setting of adjacent line. The zone 3 impedance reach is generally 2 times zone 1
reach, i.e. 160% of protected line.
For different system impedance ratio (SIR), the operating time of distance protection for different
fault location are shown as the following figures.
35
30
25
Operating Time (ms)
20
15
10
5
0
0
10%
20%
30%
40%
50%
60%
70%
80%
90%
100%
Fault Location (% of relay setting)
Figure 3.6-2 Operating time of single-phase fault (50Hz, SIR=1)
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30
25
Operating Time (ms)
20
15
10
5
0
0%
10%
20%
30%
40%
50%
60%
70%
80%
90%
100%
Fault Location (% of relay setting)
Figure 3.6-3 Operating time of single-phase fault (60Hz, SIR=1)
35
30
25
Operating Time (ms)
20
15
10
5
0
0
10%
20%
30%
40%
50%
60%
70%
80%
90%
100%
Fault Location (% of relay setting)
Figure 3.6-4 Operating time of two-phase fault (50Hz, SIR=1)
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30
25
Operating Time (ms)
20
15
10
5
0
0%
10%
20%
30%
40%
50%
60%
70%
80%
90%
100%
Fault Location (% of relay setting)
Figure 3.6-5 Operating time of two-phase fault (60Hz, SIR=1)
35
30
25
Operating Time (ms)
20
15
10
5
0
0
10%
20%
30%
40%
50%
60%
70%
80%
90%
100%
Fault Location (% of relay setting)
Figure 3.6-6 Operating time of three-phase fault (50Hz, SIR=1)
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3 Operation Theory
30
25
Operating Time (ms)
20
15
10
5
0
0%
10%
20%
30%
40%
50%
60%
70%
80%
90%
100%
Fault Location (% of relay setting)
Figure 3.6-7 Operating time of three-phase fault (60Hz, SIR=1)
33
32.5
32
Operating Time (ms)
31.5
31
30.5
30
29.5
29
0%
10%
20%
30%
40%
50%
60%
70%
80%
90% 100%
Fault Location (% of relay setting)
Figure 3.6-8 Operating time of single-phase fault (50Hz, SIR=30)
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27.5
27
Operating Time (ms)
26.5
26
25.5
25
24.5
24
0%
10%
20%
30%
40%
50%
60%
70%
80%
90% 100%
Fault Location (% of relay setting)
Figure 3.6-9 Operating time of single-phase fault (60Hz, SIR=30)
45
40
35
Operating Time (ms)
30
25
20
15
10
5
0
0
10%
20%
30%
40%
50%
60%
70%
80%
90%
100%
Fault Location (% of relay setting)
Figure 3.6-10 Operating time of two-phase fault (50Hz, SIR=30)
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35
30
Operating Time (ms)
25
20
15
10
5
0
0%
10%
20%
30%
40%
50%
60%
70%
80%
90%
100%
Fault Location (% of relay setting)
Figure 3.6-11 Operating time of two-phase fault (60Hz, SIR=30)
33
32
Operating Time (ms)
31
30
29
28
27
0
10%
20%
30%
40%
50%
60%
70%
80%
90%
100%
Fault Location (% of relay setting)
Figure 3.6-12 Operating time of three-phase fault (50Hz, SIR=30)
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3 Operation Theory
27.5
27
Operating Time (ms)
26.5
26
25.5
25
24.5
24
23.5
0%
10%
20%
30%
40%
50%
60%
70%
80%
90% 100%
Fault Location (% of relay setting)
Figure 3.6-13 Operating time of three-phase fault (60Hz, SIR=30)
3.6.3 DPFC Distance Protection
The power system is normally treated as a balanced symmetrical three-phase network. When a
fault occurs in the power system, by applying the principle of superposition, the load current and
voltage can be calculated in the system prior to the fault and the pure fault component can be
calculated by fault current or voltage subtracted by pre-fault load current or voltage. DPFC
distance protection concerns change of current and voltage at power frequency, therefore, DPFC
distance protection is not influenced by load current.
As an independent fast protection, DPFC distance protection is mainly used to clear close up fault
of long line quickly, its protected range can set as 80%~85% of the whole line.
Since DPFC distance protection only reflects fault component and is not influenced by current
change due to load variation and power swing, power swing blocking (PSB) is this not required.
Moreover, there is no transient overreaching due to infeed current from the remote power supply
because it is not influenced by load current.
DPFC distance protection may not overreach, and its protected zone will be inverse-proportion
reduced with system impedance behind it, i.e. the protected zone will be less than setting if the
system impedance is greater. The protected zone will be close to setting value if the system
impedance is smaller. Therefore, DPFC distance protection is usually used for long transmission
line with large power source and it is recommended to disable DPFC distance protection for short
line or the line with weak power source.
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3 Operation Theory
3.6.3.1 Impedance Characteristic
ZZD
M
EM
F
Z
N
EN
∆I
ZS
ZK
jX
Zzd
Zk
Φ
Zs+Zk
R
-Zs
Figure 3.6-14 Operation characteristic for forward fault
Where:
ZZD: the setting of DPFC distance protection
ZS: total impedance between local system and device location
ZK: measurement impedance
Φ: positive-sequence sensitive angle, i.e. [phi1_Reach]
Figure 3.6-14 shows the operation characteristic of DPFC distance protection on R-X plane when
a fault occurs in forward direction, which is the circle with the –Zs as the center and the│Zs+Zzd│ as
the radius. When measured impedance Zk is in the circle, DPFC distance protection will operate.
DPFC distance protection has a larger capability of enduring fault resistance than distance
protection using positive-sequence as polarized voltage.
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3 Operation Theory
ZZD
F
M
EM
N
Z
EN
∆I
ZK
Z′S
jX
Z's
Zzd
Φ
R
-Zk
Figure 3.6-15 Operation characteristic for reverse fault
Z'S total impedance between remote system and protective device location
Figure 3.6-15 shows the operation characteristic of the DPFC distance element on R-X plane
when a fault occurs in reverse direction, which is the circle with the Z′S as the center and
the│Z′S-Zzd│as the radius. The region of operation is in the quadrant 1 but the measured
impedance -Zk is always in the quadrant 3, the DPFC distance protection will not operate.
The DPFC distance protection can be enabled or disabled by logic setting and binary input.
3.6.3.2 Function Block Diagram
21D
21D.En_DPFC
21D.Op_DPFC
21D.Blk_DPFC
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3.6.3.3 I/O Signals
Table 3.6-1 I/O signals of DPFC distance protection
No.
Input Signal
1
21D.En_DPFC
2
21D.Blk_DPFC
No.
1
Description
DPFC distance protection enabling input, it is triggered from binary input or
programmable logic etc.
DPFC distance protection blocking input, it is triggered from binary input or
programmable logic etc.
Output Signal
Description
21D.Op_DPFC
DPFC distance protection operates.
3.6.3.4 Logic
EN
[21D.En_DPFC]
SIG
21D.En_DPFC
SIG
21D.Blk_DPFC
EN
[VTS.En_Out_VT]
SIG
Manual closing signal
SIG
3-pole reclosing signal
SET
[21D.Z_DPFC]<0.05Ω/In
SET
ZΦ<[21D.Z_DPFC]
SIG
UP<0.85Un
SET
ZΦΦ<[21D.Z_DPFC]
SIG
UPP<0.85Unn
SIG
PD signal
&
>=1
>=1
&
>=1
&
21D.Op_DPFC
&
&
Figure 3.6-16 Logic diagram of DPFC distance protection
Note!
PD signal only blocks DPFC distance element of corresponding phase (i.e. broken phase),
and healthy phases (operation phases) are not affected.
3.6.3.5 Settings
Table 3.6-2 Settings of DPFC distance protection
No.
Name
Range
Step
Unit
0.001
ohm
1
21D.Z_DPFC
(0.000~4Unn)/In
2
21D.En_DPFC
0 or 1
Remark
Impedance setting of DPFC distance
protection
Enabling/disabling
DPFC
distance
protection
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0: disable
1: enable
3.6.4 Load Encroachment
3.6.4.1 Impedance Characteristic
When distance protection is used to protect long, heavily loaded lines, the risk of encroachment of
the load impedance into the tripping characteristic of the distance protection may exist. A load
trapezoid characteristic for all zones is used to exclude the risk of unwanted fault detection by the
distance protection during heavy load flow.
As shown below, if the measured impedance into the load area, distance elements need to be
blocked.
jX
φLoad
φLoad
Load Area
Load Area
R
RLoad
RLoad
Figure 3.6-17 Distance element with load trapezoid
Two settings are equipped to exclude the encroachment of the load impedance:
RLoad: the minimum load resistance
φLoad: the load area angle
These values are common for all zones.
3.6.4.2 Function Block Diagram
LoadEnch
LoadEnch.En
LoadEnch.St
LoadEnch.Blk
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3.6.4.3 I/O Signals
Table 3.6-3 I/O signals of load encroachment
No.
Input Signal
1
LoadEnch.En
2
LoadEnch.Blk
No.
Description
Load trapezoid characteristic enabling input, it is triggered from binary input or
programmable logic etc.
Load trapezoid characteristic blocking input, it is triggered from binary input or
programmable logic etc.
Output Signal
Description
Measured impedance into the load area.
If load trapezoid characteristic is enabled and measured impedance into the load
1
LoadEnch.St
are, LoadEnch.St=1,
If measured impedance is out of the load are or load trapezoid characteristic is
disabled, LoadEnch.St=0
3.6.4.4 Settings
Table 3.6-4 Settings of load encroachment
No.
Name
Range
Step
Unit
Remark
Angle
setting
characteristic,
1
LoadEnch.phi_Blinder
0~45
1
Deg
of
it
load
should
trapezoid
be
set
according to the maximum load area
angle
(φLoad_Max),
φLoad_Max+5° is
recommended.
Resistance setting of load trapezoid
2
LoadEnch.R_Blinder
(0.05~200)/In
0.01
ohm
characteristic,
it
according
the
to
should
be
minimum
set
load
resistance, 70%~90% minimum load
resistance is recommended.
Enabling/disabling
3
LoadEnch.En
load
trapezoid
characteristic
0,1
0: disable
1: enable
3.6.5 Mho Distance Protection
3.6.5.1 Impedance Characteristic
1.
Zone 1, 2 and 3 of phase-to-ground distance element
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3 Operation Theory
ZZD
M
EM
F
Z
N
IN
EN
I
ZS
ZK
jX
ZZD
ZK
Φ
R
-2ZS/3
Figure 3.6-18 Phase-to-ground operation characteristic for forward fault
Where:
ZZD: the setting of distance protection
ZS: total impedance between local system and protective device location
ZK: measurement impedance
Φ: positive-sequence sensitive angle, i.e. [phi1_Reach]
Phase-to-neutral positive sequence voltage is used as polarized signal for phase-to-ground
distance protection.
For zone 1 and zone 2:
Operation voltage:
Polarized voltage:
In short line, phase shift θ1 could be applied to the polarized voltage to improve the performance
against high resistance fault. The device provides an angle-shift setting, [ZG.phi_Shift], to set
value of θ1 among 0°, 15° and 30°. Their impedance shift characteristics towards quadrant 1 are
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3 Operation Theory
respectively shown as the impedance circle A, B and C in Figure 3.6-23.
For zone 3:
Operation voltage:
Polarized voltage:
UPΦ uses phase positive-sequence voltage as polarized voltage. For earth fault, positive-sequence
voltage is mainly formed from healthy phases, basically retaining the phase of the
positive-sequence voltage before fault.
Phase comparison equation is:
The operation characteristic is shown in Figure 3.6-18. Operation characteristic of ZK on R-X plane
is a circle with line connecting ends of ZZD and -2ZS/3 as the diameter. The origin is enclosed in the
circle.
2.
Zone 1, 2 and 3 of phase-to-phase distance element
jX
ZZD
ZK
Φ
R
-ZS/2
Figure 3.6-19 Phase-to-phase operation characteristic for forward fault
Phase-to-phase positive sequence voltage is used as polarized signal for phase-to-phase
distance protection.
For zone 1 and zone 2:
Operation voltage:
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3 Operation Theory
Polarized voltage:
Phase shift θ2 could be applied to polarized voltage of zones 1 and 2 just like θ1 in
phase-to-ground distance element. It is also used for improving performance against high
resistance fault in short line. The device provides an angle-shift setting, [21M.ZP.phi_Shift], to set
value of θ2 among 0°, 15° and 30°. Their impedance shift characteristics towards quadrant 1 are
respectively shown as the impedance circle A, B and C in Figure 3.6-23.
For zone 3:
Operation voltage:
Polarized voltage:
Phase-to-phase positive-sequence voltage is applied as the polarized voltage of this element.
Phase comparison equation is:
The operation characteristic of phase-to-phase distance element is shown in Figure 3.6-19.
Operation characteristic of ZK on R-X plane is a circle with line connecting ends of ZZD and -ZS/2 as
the diameter. The origin is enclosed in the circle.
Figure 3.6-20 shows operation characteristic of measured impedance -ZK on R-X plane when an
asymmetric reverse fault occurs. This characteristic is a circle with line connecting ends of ZZD and
Z'S as the diameter. It will operate only when -ZK is in the circle. Therefore, directionality of the
distanced protection is achieved.
ZZD
F
EM
M
N
Z
EN
IΦ
ZK
Z′S
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jX
Z'S
ZZD
Φ
R
-ZK
Figure 3.6-20 Operation characteristic for reverse fault
Z'S: total impedance between remote system and protective device location
jX
ZZD
ZK
Φ
R
Figure 3.6-21 Steady-state characteristic of three-phase short-circuit fault
Phase-to-phase distance protection is also used for three-phase short-circuit fault. The operation
characteristic is shown in Figure 3.6-21. Operation characteristic of ZK on R-X plane is a circle with
setting impedance ZZD as the diameter.
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jX
ZZD
ZK
Φ
R
Circle C
-ZS
Circle B
Circle A
Figure 3.6-22 Operation characteristic of three-phase close up short-circuit fault
Where:
ZZD: the setting of distance protection (zone x)
ZS: total impedance between local system and protective device location
ZK: measured impedance
Φ: positive-sequence characteristic angle, i.e. [phi1_Reach]
Circle A: transient characteristic
Circle B: steady-state characteristic shifting towards quadrant Ⅲ
Circle C: steady-state characteristic shifting towards quadrant Ⅰ
As shown in Figure 3.6-22, the characteristic of the distance protection for a three-phase fault on a
system is an impedance circle cross the origin, and there is a voltage dead zone around the origin.
In order to eliminate the dead zone of the distance protection for a close up three-phase fault
memorized positive-sequence voltage is adopted as polarized voltage when the
positive-sequence voltage drops down to 15%Un or below.
The transient (during process of memory) operation characteristic is shown as the impedance
circle A in the above figure. The circle takes ZZD and -ZZS as diameter and thus the origin is within
the impedance circle. When three-phase fault happens in reverse direction, its transient
characteristic is shown in Figure 3.6-20, i.e. the distance protection has a clearly defined
directionality and no dead zone during the process of memory.
For zone 1, zone 2 and zone 3 of the phase-to-phase distance protection, if distance protection
operates with memorized polarizing voltage, this means a close up forward fault. When the
memory fades out, the operation characteristic will be reverse offset a little to enclose the origin as
impedance circle B shown in Figure 3.6-22 to ensure keeping operating of distance protection until
the fault being cleared. If distance protection does not operate with memorized polarizing voltage,
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it will be a close up reverse fault. When the memory fades out, the operation characteristic will be
forward offset not to enclose the origin as impedance circle C shown in Figure 3.6-22, and the
distance protection will not mal-operate even if voltage is zero.
The distance protection with such design thoroughly eliminates the dead zone when three-phase
close up fault occurs. It also has favorable directivity and will not operate for a reverse three-phase
fault at busbar.
When receiving manual closing signal or 3-pole reclosing signal, the operation characteristic of
phase to phase distance protection will always enclose the origin of impedance, with no dead zone,
i.e. the reverse offset impedance circle B shown in Figure 3.6-22.
jX
B: 15° C: 30°
ZZD
A: 0°
D
R
-ZS
Figure 3.6-23 Shift impedance characteristic of zone 1 and zone 2
The impedance characteristic of phase-to-ground distance protection is the circle with line
connecting ends of ZZD and -2ZS/3 as the diameter and that of phase-to-phase distance is the
circle with line connecting ends of ZZD and -ZS/2 as the diameter.
In order to prevent the transient overreach caused by the infeed power supply from the remote
end, the zero-sequence reactance line D is added. These measures have enhanced the capacity
against fault resistance when using distance protection in short lines.
3.
Zone 4
ZZDR
F
ZZDF
M
I
Z
EM
N
EN
ZK
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jX
ZZDF
Φ
R
ZK
ZZDR
Figure 3.6-24 Operation characteristic of reverse Z4 distance protection
Where:
ZZDF: impedance setting of zone 4 in forward direction, i.e. [21M.Z4.Z_Fwd]
ZZDR: impedance setting of zone 4 in reverse direction, i.e. [21M.Z4.Z_Rev]
Φ: positive-sequence characteristic angle, i.e. [phi1_Reach]
ZK: measurement impedance
When a fault occurs on the rear busbar, reverse distance element is provided to clear it with
definite time delay and is taken as backup protection for reverse busbar fault. Its operation
characteristic is shown in Figure 3.6-24.
4.
Zone 5
Zone 5 can be set as forward direction or reverse direction. When zone 5 is set as forward
direction, its operation characteristic is as similar as zone 1, 2. When zone is set as reverse
direction, its operation characteristic is similar with zone 4, but the difference is that the impedance
setting in forward direction can not set and is zero fixedly. In order to ensure that zone 5 reliably
operates for reverse three-phase fault and does not reliably operate for forward three-phase fault,
it adopts the same method as zone 1, 2. When positive-sequence voltage is smaller than 15%Un,
polarized voltage, forward threshold and reverse threshold improves the reliability of zone 5 of
distance protection.
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3 Operation Theory
3.6.5.2 Function Block Diagram
21M
21M.En
21M.Z1.On
21M.Blk
21M.Z2.On
21M.ZGx.En
21M.Z3.On
21M.ZPx.En
21M.Z4.On
21M.ZGx.Blk
21M.Z5.On
21M.ZPx.Blk
21M.Z1.Op
21M.Zx.En_ShortDly
21M.Z2.Op
21M.Zx.Blk_ShortDly
21M.Z3.Op
21M.Z1.En_Instant
21M.Z4.Op
21M.Z5.Op
3.6.5.3 I/O Signals
Table 3.6-5 I/O signals of distance protection (Mho)
No.
Input Signal
Description
Distance protection enabling input, it is triggered from binary input or
1
21M.En
2
21M.Blk
3
21M.ZGx.En
4
21M.ZGx.Blk
5
21M.ZPx.En
6
21M.ZPx.Blk
7
21M.Zx.En_ShortDly
Enable accelerating zone 2 of distance protection (x=2, 3)
8
21M.Zx.Blk_ShortDly
Accelerating zone 2 of distance protection is disabled (x=2, 3)
9
21M.Z1.En_Instant
Enable zone 1 of distance protection operates without time delay
No.
programmable logic etc.
Distance protection blocking input, it is triggered from binary input or
programmable logic etc.
Zone x of phase-to-ground distance protection enabling input, default value is
“1” (x=1, 2, 3, 4, 5)
Zone x of phase-to-ground distance protection blocking input, default value is
“0” (x=1, 2, 3, 4, 5)
Zone x of phase-to-phase distance protection enabling input, default value is
“1” (x=1, 2, 3, 4, 5)
Zone x of phase-to-phase distance protection blocking input, default value is
“0” (x=1, 2, 3, 4, 5)
Output Signal
Description
1
21M.Z1.On
Zone 1 of distance protection is enabled
2
21M.Z2.On
Zone 2 of distance protection is enabled
3
21M.Z3.On
Zone 3 of distance protection is enabled
4
21M.Z4.On
zone 4 of distance protection is enabled
5
21M.Z5.On
zone 5 of distance protection is enabled
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6
21M.Z1.Op
Zone 1 of distance protection operates
7
21M.Z2.Op
Zone 2 of distance protection operates
8
21M.Z3.Op
Zone 3 of distance protection operates
9
21M.Z4.Op
zone 4 of distance protection operates
10
21M.Z5.Op
zone 5 of distance protection operates
3.6.5.4 Logic
SIG
21M.En
SIG
21M.Blk
SIG
VTS.Alm
EN
[VTS.En_Out_VT]
&
&
21M.Enable
>=1
Figure 3.6-25 Logic diagram of enabling distance protection (Mho)
SIG
21M.Enable
SIG
21M.ZG1.En
SIG
21M.ZG1.Blk
SIG
21M.ZP1.En
SIG
21M.ZP1.Blk
SIG
21M.Z1.Rls_PSBR
SIG
21M.ZG1.Enable
&
&
Flag.21M.ZG1
SIG
LoadEnch.St (PG)
SET
3I0>[FD.ROC.3I0_Set]
SIG
Flag.21M.ZP1
SIG
LoadEnch.St (PP)
SIG
21M.ZP1.Enable
21M.Z1.En_Instant
SIG
21M.ZG1.Op
SIG
21M.ZP1.Op
[21M.ZG1.t_Op]
0
>=1
21M.ZG1.Op
&
SIG
SIG
21M.ZP1.Enable
&
[21M.ZG1.En]
[21M.ZP1.En]
21M.Z1.On
&
&
EN
EN
>=1
21M.ZG1.Enable
&
&
&
>=1
21M.Z1.Flg_PSBR
&
&
[21M.ZP1.t_Op]
&
0
>=1
21M.ZP1.Op
&
>=1
21M.Z1.Op
Figure 3.6-26 Logic diagram of distance protection (Mho zone 1)
Where:
3-42
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
21M.Z1.Rls_PSBR: Please refer to Figure 3.6-44.
Flag.21M.ZG1 means that measured impedance by zone 1 of phase-to-ground distance
protection is within the range determined by the setting [21M.ZG1.Z_Set].
Flag.21M.ZP1 means that measured impedance by zone 1 of phase-to-phase distance protection
is within the range determined by the setting [21M.ZP1.Z_Set].
LoadEnch.St (PG) means that load trapezoid characteristic for distance element is enabled and
measured phase-to-ground impedance into the load area.
LoadEnch.St (PP) means that load trapezoid characteristic for distance element is enabled and
measured phase-to-phase impedance into the load area.
SIG
21M.Enable
SIG
21M.ZG2.En
SIG
21M.ZG2.Blk
SIG
21M.ZP2.En
SIG
21M.ZP2.Blk
SIG
21M.Z2.En_ShortDly
SIG
21M.Z2.Blk_ShortDly
EN
[21M.Z2.En_ShortDly]
SIG
21M.ZP2.Enable_ShortDly
SIG
21M.Z2.Rls_PSBR
SIG
21M.ZG2.Enable
&
>=1
21M.ZG2.Enable
&
21M.Z2.On
&
21M.ZP2.Enable
&
&
&
21M.Z2.Enable_ShortDly
&
[21M.ZG2.t_ShortDly]
>=1
&
21M.ZG2.Op
&
[21M.ZG2.t_Op]
EN
[21M.ZG2.En]
SIG
Flag.21M.ZG2
SIG
LoadEnch.St (PG)
0
0
&
>=1
&
SET
3I0>[FD.ROC.3I0_Set]
SIG
Flag.21M.ZP2
SIG
LoadEnch.St (PP)
SIG
21M.ZP2.Enable
21M.Z2.Flg_PSBR
&
&
[21M.ZP2.t_Op]
0
&
>=1
21M.ZP2.Op
&
EN
[21M.ZP2.En]
SIG
21M.Z2.Enable_ShortDly
SIG
21M.ZG2.Op
SIG
21M.ZP2.Op
[21M.ZP2.t_ShortDly] 0
>=1
21M.Z2.Op
Figure 3.6-27 Logic diagram of distance protection (Mho zone 2)
Where:
3-43
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
21M.Z2.Rls_PSBR: Please refer to Figure 3.6-44.
Flag.21M.ZG2 means that measured impedance by zone 2 of phase-to-ground distance
protection is within the range determined by the setting [21M.ZG2.Z_Set].
Flag.21M.ZP2 means that measured impedance by zone 2 of phase-to-phase distance protection
is within the range determined by the setting [21M.ZP2.Z_Set].
SIG
21M.Enable
SIG
21M.ZG3.En
SIG
21M.ZG3.Blk
SIG
21M.ZP3.En
SIG
21M.ZP3.Blk
SIG
21M.Z3.En_ShortDly
SIG
21M.Z3.Blk_ShortDly
EN
[21M.Z3.En_ShortDly]
SIG
21M.Z3.Enable_ShortDly
SIG
21M.Z3.Rls_PSBR
SIG
21M.ZG3.Enable
EN
[21M.ZG3.En]
SIG
Flag.21M.ZG3
SET
3I0>[FD.ROC.3I0_Set]
SIG
LoadEnch.St (PG)
SIG
Flag.21M.ZP3
SIG
LoadEnch.St (PP)
SIG
21M.ZP3.Enable
&
>=1
21M.ZG3.Enable
&
21M.Z3.On
&
21M.ZP3.Enable
&
&
&
21M.Z3.Enable_ShortDly
&
[21M.ZG3.t_ShortDly]
0
>=1
21M.ZG3.Op
&
&
[21M.ZG3.t_Op]
0
&
>=1
21M.Z3.Flg_PSBR
&
&
[21M.ZP3.t_Op]
0
&
>=1
21M.ZP3.Op
&
EN
[21M.ZP3.En]
SIG
21M.ZP3.Enable_ShortDly
SIG
21M.ZG3.Op
SIG
21M.ZP3.Op
[21M.ZP3.t_ShortDly] 0
>=1
21M.Z3.Op
Figure 3.6-28 Logic diagram of distance protection (Mho zone 3)
Where:
21M.Z3.Rls_PSBR: Please refer to Figure 3.6-44.
Flag.21M.ZG3 means that measured impedance by zone 3 of phase-to-ground distance
protection is within the range determined by the setting [21M.ZG3.Z_Set].
3-44
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
Flag.21M.ZP3 means that measured impedance by zone 3 of phase-to-phase distance protection
is within the range determined by the setting [21M.ZP3.Z_Set].
SIG
21M.Enable
SIG
21M.ZG4.En
SIG
21M.Zp4.Blk
SIG
21M.ZP4.En
SIG
21M.ZP4.Blk
SIG
21M.ZG4.Enable
EN
[21M.ZG4.En]
SET
3I0>[FD.ROC.3I0_Set]
SIG
LoadEnch.St (PG)
SIG
Flag.21M.ZG4
SIG
Flag.21M.ZP4
SIG
LoadEnch.St (PP)
SIG
21M.ZP4.Enable
EN
[21M.ZP4.En]
SIG
21M.ZG4.Op
SIG
21M.ZP4.Op
&
>=1
21M.ZG4.Enable
&
21M.Z4.On
&
21M.ZP4.Enable
&
&
&
[21M.ZG4.t_Op]
0
21M.ZG4.Op
&
>=1
21M.Z4.Flg_PSBR
&
&
[21M.ZP4.t_Op]
0
21M.ZP4.Op
&
>=1
21M.Z4.Op
Figure 3.6-29 Logic diagram of distance protection (Mho zone 4)
Where:
Flag.21M.ZG4 means that measured impedance by zone 4 of phase-to-ground distance
protection is within the range determined by the settings [21M.Z4.Z_Fwd] and [21M.Z4.Z_Rev].
Flag.21M.ZP4 means that measured impedance by zone 4 of phase-to-phase distance protection
is within the range determined by the settings [21M.Z4.Z_Fwd] and [21M.Z4.Z_Rev].
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PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
SIG
21M.Enable
SIG
21M.ZG5.En
SIG
21M.ZG5.Blk
SIG
21M.ZP5.En
SIG
21M.ZP5.Blk
SIG
21M.Z5.Rls_PSBR
SIG
21M.ZG5.Enable
&
>=1
21M.ZG5.Enable
&
21M.Z5.On
&
21M.ZP5.Enable
&
&
&
[21M.ZG5.t_Op]
EN
[21M.ZG5.En]
SIG
Flag.21M.ZG5
SIG
LoadEnch.St (PG)
0
21M.ZG5.Op
&
SET
3I0>[FD.ROC.3I0_Set]
SIG
Flag.21M.ZP5
SIG
LoadEnch.St (PP)
SIG
21M.ZP5.Enable
EN
[21M.ZP5.En]
SIG
21M.ZG5.Op
SIG
21M.ZP5.Op
>=1
&
21M.Z5.Flg_PSBR
&
&
[21M.ZP5.t_Op]
0
21M.ZP5.Op
&
>=1
21M.Z5.Op
Figure 3.6-30 Logic diagram of distance protection (Mho zone 5)
Where:
21M.Z5.Rls_PSBR: Please refer to Figure 3.6-44.
Flag.21M.ZG5 means that measured impedance by zone 5 of phase-to-ground distance
protection is within the range determined by the settings [21M.ZG5.Z_Set].
Flag.21M.ZP5 means that measured impedance by zone 5 of phase-to-phase distance protection
is within the range determined by the settings [21M.ZP5.Z_Set].
3.6.5.5 Settings
Table 3.6-6 Settings of distance protection (Mho)
No.
Name
Range
Step
Unit
1
21M.ZG.phi_Shift
0, 15 or 30
Deg
2
21M.ZP.phi_Shift
0, 15 or 30
Deg
3-46
Remark
Phase
shift
of
zone
1,
2
of
phase-to-ground distance protection
Phase
shift
of
zone
1,
2
of
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
phase-to-phase distance protection
3
21M.ZG1.Z_Set
(0.000~4Unn)/In
0.001
ohm
4
21M.ZG1.t_Op
0.000~10.000
0.001
s
Impedance setting of zone 1 of
phase-to-ground distance protection
Time
delay
of
21M.ZG1.En
1
of
phase-to-ground distance protection
Enabling/disabling
5
zone
zone
1
of
phase-to-ground distance protection
0 or 1
0: disable
1: enable
Enabling/disabling
phase-to-ground
zone 1 of distance protection operation
6
21M.ZG1.En_BlkAR
0 or 1
to block AR
0: disable
1: enable
7
21M.ZP1.Z_Set
(0.000~4Unn)/In
0.001
ohm
8
21M.ZP1.t_Op
0.000~10.000
0.001
s
Impedance setting of zone 1 of
phase-to-phase distance protection
Time
delay
of
Enabling/disabling
9
21M.ZP1.En
zone
1
of
phase-to-phase distance protection
zone
1
of
phase-to-phase distance protection
0 or 1
0: disable
1: enable
Enabling/disabling
phase-to-phase
zone 1 of distance protection operation
10
21M.ZP1.En_BlkAR
0 or 1
to block AR
0: disable
1: enable
11
21M.ZG2.Z_Set
(0.000~4Unn)/In
0.001
ohm
12
21M.ZG2.t_Op
0.000~10.000
0.001
s
13
21M.ZG2.t_ShortDly
0.000~10.000
0.001
s
Impedance setting of zone 2 of
phase-to-ground distance protection
Time
delay
of
21M.ZG2.En
2
of
phase-to-ground distance protection
Short
time
delay
of
zone
2
of
phase-to-ground distance protection
Enabling/disabling
14
zone
zone
2
of
phase-to-ground distance protection
0 or 1
0: disable
1: enable
Enabling/disabling
phase-to-ground
zone 2 of distance protection operation
15
21M.ZG2.En_BlkAR
to block AR
0 or 1
0: disable
1: enable
16
21M.ZP2.Z_Set
(0.000~4Unn)/In
0.001
ohm
Impedance setting of zone 2 of
phase-to-phase distance protection
3-47
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
17
21M.ZP2.t_Op
0.000~10.000
0.001
s
18
21M.ZP2.t_ShortDly
0.000~10.000
0.001
s
Time
delay
of
21M.ZP2.En
2
of
phase-to-phase distance protection
Short
time
delay
of
zone
2
of
phase-to-phase distance protection
Enabling/disabling
19
zone
zone
2
of
phase-to-phase distance protection
0 or 1
0: disable
1: enable
Enabling/disabling
phase-to-phase
zone 2 of distance protection operation
20
21M.ZP2.En_BlkAR
0 or 1
to block AR
0: disable
1: enable
Fixed accelerate zone 2 of distance
21
21M.Z2.En_ShortDly
protection
0 or 1
0: disable
1: enable
22
21M.ZG3.Z_Set
(0.000~4Unn)/In
0.001
ohm
23
21M.ZG3.t_Op
0.000~10.000
0.001
s
24
21M.ZG3.t_ShortDly
0.000~10.000
0.001
s
Impedance setting of zone 3 of
phase-to-ground distance protection
Time
delay
of
21M.ZG3.En
3
of
phase-to-ground distance protection
Short
time
delay
of
zone
3
of
phase-to-ground distance protection
Enabling/disabling
25
zone
zone
3
of
phase-to-ground distance protection
0 or 1
0: disable
1: enable
Enabling/disabling
phase-to-ground
zone 3 of distance protection operation
26
21M.ZG3.En_BlkAR
0 or 1
to block AR
0: disable
1: enable
27
21M.ZP3.Z_Set
(0.000~4Unn)/In
0.001
ohm
28
21M.ZP3.t_Op
0.000~10.000
0.001
s
29
21M.ZP3.t_ShortDly
0.000~10.000
0.001
s
Impedance setting of zone 3 of
phase-to-phase distance protection
Time
delay
of
21M.ZP3.En
3
of
phase-to-phase distance protection
Short
time
delay
of
zone
3
of
phase-to-phase distance protection
Enabling/disabling
30
zone
zone
3
of
phase-to-phase distance protection
0 or 1
0: disable
1: enable
31
21M.ZP3.En_BlkAR
Enabling/disabling
0 or 1
phase-to-phase
zone 3 of distance protection operation
3-48
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
to block AR
0: disable
1: enable
Fixed accelerate zone 3 of distance
32
21M.Z3.En_ShortDly
protection
0 or 1
0: disable
1: enable
33
21M.Z4.Z_Fwd
(0.000~4Unn)/In
0.001
ohm
34
21M.Z4.Z_Rev
(0.000~4Unn)/In
0.001
ohm
35
21M.Z4.t_Op
0.000~10.000
0.001
s
Impedance setting of zone 4 of
distance protection in forward direction
Impedance setting of
distance protection in reverse direction
Time delay of zone 4 of distance
protection
Enabling/disabling
36
21M.ZG4.En
zone 4 of
zone
4
of
phase-to-ground distance protection
0 or 1
0: disable
1: enable
Enabling/disabling
phase-to-ground
zone 4 of distance protection operation
37
21M.ZG4.En_BlkAR
to block AR (Internal setting, its default
0 or 1
value is “1”)
0: disable
1: enable
Enabling/disabling
38
21M.ZP4.En
zone
4
of
phase-to-phase distance protection
0 or 1
0: disable
1: enable
Enabling/disabling
phase-to-phase
zone 4 of distance protection operation
39
21M.ZP4.En_BlkAR
to block AR (Internal setting, its default
0 or 1
value is “1”)
0: disable
1: enable
40
21M.ZG5.Z_Set
(0.000~4Unn)/In
0.001
ohm
41
21M.ZG5.t_Op
0.000~10.000
0.001
s
Impedance setting of
phase-to-ground distance protection
Time
delay
of
21M.ZG5.En
zone
5
of
phase-to-ground distance protection
Enabling/disabling
42
zone 5 of
zone
5
of
phase-to-ground distance protection
0 or 1
0: disable
1: enable
Enabling/disabling
43
21M.ZG5.En_BlkAR
0 or 1
phase-to-ground
zone 5 of distance protection operation
to block AR
3-49
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
0: disable
1: enable
44
21M.ZP5.Z_Set
(0.000~4Unn)/In
0.001
ohm
45
21M.ZP5.t_Op
0.000~10.000
0.001
s
Impedance setting of zone 5 of
phase-to-phase distance protection
Time
delay
of
21M.ZP5.En
5
of
phase-to-phase distance protection
Enabling/disabling
46
zone
zone
5
of
phase-to-phase distance protection
0 or 1
0: disable
1: enable
Enabling/disabling
phase-to-phase
zone 5 of distance protection operation
47
21M.ZP5.En_BlkAR
0 or 1
to block AR
0: disable
1: enable
Direction option for zone 5 of distance
48
21M.Z5.Opt_Dir
0 or 1
0
protection
0: forward direction
1: reverse direction
3.6.6 Quadrilateral Distance Element
3.6.6.1 Impedance Characteristic
Features available with quadrilateral distance protection include 3 forward zones (zone 1~3)
phase-to-ground or phase-to-phase distance elements, 1 reverse zone (zone 4) phase-to-ground
or phase-to-phase distance element, 1 settable forward or reverse zone (zone 5) phase-to-ground
or phase-to-phase distance element and 1 pilot zone distance protection. Each zone can
respectively enable or disable power swing blocking releasing. Quadrilateral distance protection
will be disabled when VT circuit fails.
1.
Zone 1, 2 and 3
Quadrilateral forward distance element characteristic for zone 1, 2 and 3 is shown as follows:
3-50
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
jX
ZZD
θ
α
φ
φ
O
β
R
RZD
Figure 3.6-31 Quadrilateral forward distance element characteristics
Where:
ZZD: impedance setting.
RZD: resistive setting range.
φ: line positive-sequence characteristic angle.
α: the angle of directional line in the second quadrant, fixed at 15 °.
β: the angle of directional line in the fourth quadrant, fixed at 15 °.
θ: downward angle of reactance line.
2.
Zone 4
When a fault occurs on the busbar at the back, reverse distance element zone 4 is provided to
clear it with definite time delay and is used as backup protection for reverse busbar fault.
jX
C
RZD
O
β
φ
R
φ
α
B
θ
ZZD
A
Figure 3.6-32 Zone 4 reverse quadrilateral distance element characteristic
3-51
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
Where:
ZZD: impedance setting of zone 4 in reverse direction
RZD: resistance setting of zone 4 in reverse direction
φ: positive-sequence characteristic angle,
α: the angle of directional line, fixed at 15°
β: the angle of directional line, fixed at 15°
θ: tilted angle of the reactance line AB, fixed at 12°
3.
Zone 5
Zone 5 can be set as forward direction or reverse direction. When zone 5 is set as forward
direction, its operation characteristic is as similar as zone 1, 2. When zone is set as reverse
direction, its operation characteristic is similar with zone 4.
3.6.6.2 Function Block Diagram
21Q
21Q.En
21Q.Z1.On
21Q.Blk
21Q.Z2.On
21Q.ZGx.En
21Q.Z3.On
21Q.ZPx.En
21Q.Z4.On
21Q.ZGx.Blk
21Q.Z5.On
21Q.ZPx.Blk
21Q.Z1.Op
21Q.Zx.En_ShortDly
21Q.Z2.Op
21Q.Zx.Blk_ShortDly
21Q.Z3.Op
21Q.Z1.En_Instant
21Q.Z4.Op
21Q.Z5.Op
3.6.6.3 I/O Signals
Table 3.6-7 I/O signals of distance protection (Quad)
No.
Input Signal
1
21Q.En
2
21Q.Blk
3
21Q.ZGx.En
Description
Distance protection enabling input, it is triggered from binary input or
programmable logic etc.
Distance protection blocking input, it is triggered from binary input or
programmable logic etc.
Zone x of phase-to-ground distance protection enabling input, default value is
“1” (x=1, 2, 3, 4, 5)
3-52
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
Zone x of phase-to-ground distance protection blocking input, default value is
4
21Q.ZGx.Blk
5
21Q.ZPx.En
6
21Q.ZPx.Blk
7
21Q.Zx.En_ShortDly
Enable accelerating zone 2 of distance protection (x=2, 3)
8
21Q.Zx.Blk_ShortDly
Accelerating zone 2 of distance protection is disabled (x=2, 3)
9
21Q.Z1.En_Instant
Enable zone 1 of distance protection operates without time delay
No.
“0” (x=1, 2, 3, 4, 5)
Zone x of phase-to-phase distance protection enabling input, default value is
“1” (x=1, 2, 3, 4, 5)
Zone x of phase-to-phase distance protection blocking input, default value is “0”
(x=1, 2, 3, 4, 5)
Output Signal
Description
1
21Q.Z1.On
Zone 1 of distance protection is enabled
2
21Q.Z2.On
Zone 2 of distance protection is enabled
3
21Q.Z3.On
Zone 3 of distance protection is enabled
4
21Q.Z4.On
zone 4 of distance protection is enabled
5
21Q.Z5.On
zone 5 of distance protection is enabled
6
21Q.Z1.Op
Zone 1 of distance protection operates
7
21Q.Z2.Op
Zone 2 of distance protection operates
8
21Q.Z3.Op
Zone 3 of distance protection operates
9
21Q.Z4.Op
zone 4 of distance protection operates
10
21Q.Z5.Op
zone 5 of distance protection operates
3.6.6.4 Logic
SIG
21Q.En
SIG
21Q.Blk
SIG
VTS.Alm
EN
[VTS.En_Out_VT]
&
&
21Q.Enable
>=1
Figure 3.6-33 Logic diagram of enabling distance protection (Quad)
3-53
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
SIG
21Q.Enable
EN
[21Q.ZG1.En]
SIG
21Q.ZG1.En
SIG
21Q.ZG1.Blk
EN
[21Q.ZP1.En]
SIG
21Q.ZP1.En
SIG
21Q.ZP1.Blk
SIG
21Q.ZG1.Enable
SIG
LoadEnch.St (PG)
SET
3I0>[FD.ROC.3I0_Set]
SIG
Flag.21Q.ZG1
SIG
21Q.Z1.Rls_PSBR
&
>=1
21Q.ZG1.Enable
&
21Q.Z1.On
&
21Q.ZP1.Enable
&
&
&
[21Q.ZG1.t_Op]
0
>=1
21Q.ZG1.Op
&
>=1
21Q.Z1.Flg_PSBR
SIG
21Q.ZP1.Enable
SIG
LoadEnch.St (PP)
SIG
Flag.21Q.ZP1
&
&
[21Q.ZP1.t_Op]
0
>=1
21Q.ZP1.Op
&
SIG
21Q.Z1.En_Instant
SIG
21Q.ZG1.Op
>=1
21Q.Z1.Op
SIG
21Q.ZP1.Op
Figure 3.6-34 Logic diagram of distance protection (Quad zone 1)
Where:
21Q.Z1.Rls_PSBR: Please refer to Figure 3.6-44.
Flag.21Q.ZG1 means that measured impedance by zone 1 of phase-to-ground distance protection
is within the range determined by the settings [21Q.ZG1.Z_Set] and [21Q.ZG1.R_Set].
Flag.21Q.ZP1 means that measured impedance by zone 1 of phase-to-phase distance protection
is within the range determined by the settings [21Q.ZP1.Z_Set] and [21Q.ZP1.R_Set].
LoadEnch.St (PG) means that load trapezoid characteristic for distance element is enabled and
measured phase-to-ground impedance into the load area.
LoadEnch.St (PP) means that load trapezoid characteristic for distance element is enabled and
measured phase-to-phase impedance into the load area.
3-54
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3 Operation Theory
SIG
21Q.Enable
EN
[21Q.ZG2.En]
SIG
21Q.ZG2.En
SIG
21Q.ZG2.Blk
EN
[21Q.ZP2.En]
&
>=1
21Q.ZG2.Enable
&
21Q.Z2.On
&
21Q.ZP2.Enable
&
SIG
21Q.ZP2.En
SIG
21Q.ZP2.Blk
SIG
21Q.Z2.En_ShortDly
SIG
21Q.Z2.Blk_ShortDly
EN
[21Q.Z2.En_ShortDly]
SIG
21Q.Z2.Enable_ShortDly
SIG
21Q.ZG2.Enable
SET
3I0>[FD.ROC.3I0_Set]
&
&
SIG
LoadEnch.St (PG)
SIG
Flag.21Q.ZG2
SIG
21Q.Z2.Rls_PSBR
SIG
21Q.ZP2.Enable
SIG
LoadEnch.St (PP)
SIG
Flag.21Q.ZP2
SIG
21Q.ZG2.Op
SIG
21Q.ZP2.Op
21Q.Z2.Enable_ShortDly
&
[21Q.ZG2.t_ShortDly] 0
&
>=1
21Q.ZG2.Op
&
[21Q.ZG2.t_Op]
0
>=1
21Q.Z2.Flg_PSBR
&
&
[21Q.ZP2.t_ShortDly] 0
&
>=1
21Q.ZP2.Op
[21Q.ZP2.t_Op]
0
>=1
21Q.Z2.Op
Figure 3.6-35 Logic diagram of distance protection (Quad zone 2)
Where:
21Q.Z2.Rls_PSBR: Please refer to Figure 3.6-44.
Flag.21Q.ZG2 means that measured impedance by zone 2 of phase-to-ground distance protection
is within the range determined by the settings [21Q.ZG2.Z_Set] and [21Q.ZG2.R_Set].
Flag.21Q.ZP2 means that measured impedance by zone 2 of phase-to-phase distance protection
is within the range determined by the settings [21Q.ZP2.Z_Set] and [21Q.ZP2.R_Set].
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3 Operation Theory
SIG
21Q.Enable
EN
[21Q.ZG3.En]
SIG
21Q.ZG3.En
SIG
21Q.ZG3.Blk
EN
[21Q.ZP3.En]
&
>=1
21Q.ZG3.Enable
&
21Q.Z3.On
&
21Q.ZP3.Enable
&
SIG
21Q.ZP3.En
SIG
21Q.ZP3.Blk
SIG
21Q.Z3.En_ShortDly
SIG
21Q.Z3.Blk_ShortDly
EN
[21Q.Z3.En_ShortDly]
SIG
21Q.Z3.Enable_ShortDly
SIG
21Q.ZG3.Enable
SET
3I0>[FD.ROC.3I0_Set]
&
&
SIG
LoadEnch.St (PG)
SIG
Flag.21Q.ZG3
SIG
21Q.Z3.Rls_PSBR
SIG
21Q.ZP3.Enable
SIG
LoadEnch.St (PP)
SIG
Flag.21Q.ZP3
SIG
21Q.ZG3.Op
SIG
21Q.ZP3.Op
21Q.Z3.Enable_ShortDly
&
[21Q.ZG3.t_ShortDly] 0
&
>=1
21Q.ZG3.Op
&
[21Q.ZG3.t_Op]
0
>=1
21Q.Z3.Flg_PSBR
&
&
[21Q.ZP3.t_ShortDly] 0
&
>=1
21Q.ZP3.Op
[21Q.ZP3.t_Op]
0
>=1
21Q.Z3.Op
Figure 3.6-36 Logic diagram of distance protection (Quad zone 3)
Where:
21Q.Z3.Rls_PSBR: Please refer to Figure 3.6-44.
Flag.21Q.ZG3 means that measured impedance by zone 3 of phase-to-ground distance protection
is within the range determined by the settings [21Q.ZG3.Z_Set] and [21Q.ZG3.R_Set].
Flag.21Q.ZP3 means that measured impedance by zone 3 of phase-to-phase distance protection
is within the range determined by the settings [21Q.ZP3.Z_Set] and [21Q.ZP3.R_Set].
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3 Operation Theory
SIG
21Q.Enable
EN
[21Q.ZG4.En]
SIG
21Q.ZG4.En
SIG
21Q.ZG4.Blk
EN
[21Q.ZP4.En]
&
>=1
21Q.ZG4.Enable
&
21Q.Z4.On
&
21Q.ZP4.Enable
&
SIG
21Q.ZP4.En
SIG
21Q.ZP4.Blk
SIG
21Q.ZG4.Enable
SET
3I0>[FD.ROC.3I0_Set]
SIG
LoadEnch.St (PG)
&
[21Q.ZG4.t_Op]
0
21Q.ZG4.Op
&
>=1
21Q.Z4.Flg_PSBR
SIG
Flag.21Q.ZG4
SIG
21Q.ZP4.Enable
SIG
LoadEnch.St (PP)
SIG
Flag.21Q.ZP4
SIG
21Q.ZG4.Op
&
[21Q.ZP4.t_Op]
0
21Q.ZP4.Op
>=1
21Q.Z4.Op
SIG
21Q.ZP4.Op
Figure 3.6-37 Logic diagram of distance protection (Quad zone 4)
Where:
Flag.21Q.ZG4 means that measured impedance by zone 4 of phase-to-ground distance protection
is within the range determined by the settings [21Q.ZG4.Z_Set] and [21Q.ZG4.R_Set].
Flag.21Q.ZP4 means that measured impedance by zone 4 of phase-to-phase distance protection
is within the range determined by the settings [21Q.ZP4.Z_Set] and [21Q.ZP4.R_Set].
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3 Operation Theory
SIG
21Q.Enable
EN
[21Q.ZG5.En]
SIG
21Q.ZG5.En
SIG
21Q.ZG5.Blk
EN
[21Q.ZP5.En]
&
>=1
21Q.ZG5.Enable
&
21Q.Z5.On
&
21Q.ZP5.Enable
&
SIG
21Q.ZP5.En
SIG
21Q.ZP5.Blk
SIG
21Q.ZG5.Enable
SET
3I0>[FD.ROC.3I0_Set]
SIG
LoadEnch.St (PG)
SIG
Flag.21Q.ZG5
SIG
21Q.Z5.Rls_PSBR
SIG
21Q.ZP5.Enable
SIG
LoadEnch.St (PP)
SIG
Flag.21Q.ZP5
SIG
21Q.ZG5.Op
SIG
21Q.ZP5.Op
&
[21Q.ZG5.t_Op]
&
0
21Q.ZG5.Op
0
21Q.ZP5.Op
&
>=1
21Q.Z5.Flg_PSBR
&
&
[21Q.ZP5.t_Op]
>=1
21Q.Z5.Op
Figure 3.6-38 Logic diagram of distance protection (Quad zone 5)
21Q.Z5.Rls_PSBR: Please refer to Figure 3.6-44.
Flag.21Q.ZG5 means that measured impedance by zone 5 of phase-to-ground distance protection
is within the range determined by the settings [21Q.ZG5.Z_Set] and [21Q.ZG5.R_Set].
Flag.21Q.ZP5 means that measured impedance by zone 4 of phase-to-phase distance protection
is within the range determined by the settings [21Q.ZP5.Z_Set] and [21Q.ZP5.R_Set].
3.6.6.5 Settings
Table 3.6-8 Settings of distance protection (Quad)
No.
Name
Range
Step
Unit
1
21Q.ZG1.Z_Set
(0.000~4Unn)/In
0.001
ohm
2
21Q.ZG1.R_Set
(0.000~4Unn)/In
0.001
ohm
3
21Q.ZG1.t_Op
0.000~10.000
0.001
s
4
21Q.ZG1.En
0 or 1
Remark
Impedance setting of zone 1 of
phase-to-ground distance protection
Resistance setting of zone 1
of
phase-to-ground distance protection
Time
delay
of
zone
1
of
phase-to-ground distance protection
Enabling/disabling
zone
1
of
phase-to-ground distance protection
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0: disable
1: enable
Enabling/disabling
phase-to-ground
zone 1 of distance protection operation
5
21Q.ZG1.En_BlkAR
to block AR
0 or 1
0: disable
1: enable
6
21Q.ZP1.Z_Set
(0.000~4Unn)/In
0.001
ohm
7
21Q.ZP1.R_Set
(0.000~4Unn)/In
0.001
ohm
8
21Q.ZP1.t_Op
0.000~10.000
0.001
s
Impedance setting of zone 1 of
phase-to-phase distance protection
Resistance setting of zone 1
phase-to-phase distance protection
Time
delay
of
21Q.ZP1.En
zone
1
of
phase-to-phase distance protection
Enabling/disabling
9
of
zone
1
of
phase-to-phase distance protection
0 or 1
0: disable
1: enable
Enabling/disabling
phase-to-phase
zone 1 of distance protection operation
10
21Q.ZP1.En_BlkAR
0 or 1
to block AR
0: disable
1: enable
11
21Q.ZG2.Z_Set
(0.000~4Unn)/In
0.001
ohm
12
21Q.ZG2.R_Set
(0.000~4Unn)/In
0.001
ohm
13
21Q.ZG2.t_Op
0.000~10.000
0.001
s
14
21Q.ZG2.t_ShortDly
0.000~10.000
0.001
s
Impedance setting of zone 2 of
phase-to-ground distance protection
Resistance setting of zone 2
phase-to-ground distance protection
Time
delay
of
21Q.ZG2.En
zone
2
of
phase-to-ground distance protection
Short
time
delay
of
zone
2
of
phase-to-ground distance protection
Enabling/disabling
15
of
zone
2
of
phase-to-ground distance protection
0 or 1
0: disable
1: enable
Enabling/disabling
phase-to-ground
zone 2 of distance protection operation
16
21Q.ZG2.En_BlkAR
0 or 1
to block AR
0: disable
1: enable
17
21Q.ZP2.Z_Set
(0.000~4Unn)/In
0.001
ohm
18
21Q.ZP2.R_Set
(0.000~4Unn)/In
0.001
ohm
19
21Q.ZP2.t_Op
0.000~10.000
0.001
s
Impedance setting of zone 2 of
phase-to-phase distance protection
Resistance setting of zone 2
of
phase-to-phase distance protection
Time
delay
of
zone
2
of
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3 Operation Theory
phase-to-phase distance protection
20
21Q.ZP2.t_ShortDly
0.000~10.000
0.001
s
Short time delay of zone 2 of phase-tophase distance protection
Enabling/disabling
21
21Q.ZP2.En
zone
2
of
phase-to-phase distance protection
0 or 1
0: disable
1: enable
Enabling/disabling
phase-to-phase
zone 2 of distance protection operation
22
21Q.ZP2.En_BlkAR
0 or 1
to block AR
0: disable
1: enable
Fixed accelerate zone 2 of distance
23
21Q.Z2. En_ShortDly
protection
0 or 1
0: disable
1: enable
24
21Q.ZG3.Z_Set
(0.000~4Unn)/In
0.001
ohm
25
21Q.ZG3.R_Set
(0.000~4Unn)/In
0.001
ohm
26
21Q.ZG3.t_Op
0.000~10.000
0.001
s
27
21Q.ZG3.t_ShortDly
0.000~10.000
0.001
s
Impedance setting of zone 3 of
phase-to-ground distance protection
Resistance setting of zone 3
phase-to-ground distance protection
Time
delay
of
21Q.ZG3.En
zone
3
of
phase-to-ground distance protection
Short
time
delay
of
zone
3
of
phase-to-ground distance protection
Enabling/disabling
28
of
zone
3
of
phase-to-ground distance protection
0 or 1
0: disable
1: enable
Enabling/disabling
phase-to-ground
zone 3 of distance protection operation
29
21Q.ZG3.En_BlkAR
0 or 1
to block AR
0: disable
1: enable
30
21Q.ZP3.Z_Set
(0.000~4Unn)/In
0.001
ohm
31
21Q.ZP3.R_Set
(0.000~4Unn)/In
0.001
ohm
32
21Q.ZP3.t_Op
0.000~10.000
0.001
s
33
21Q.ZP3.t_ShortDly
0.000~10.000
0.001
s
Impedance setting of zone 3 of
phase-to-phase distance protection
Resistance setting of zone 3
phase-to-phase distance protection
Time
delay
of
21Q.ZP3.En
0 or 1
zone
3
of
phase-to-phase distance protection
Short
time
delay
of
zone
3
of
phase-to-phase distance protection
Enabling/disabling
34
of
zone
3
of
phase-to-phase distance protection
0: disable
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3 Operation Theory
1: enable
Enabling/disabling
phase-to-phase
zone 3 of distance protection operation
35
21Q.ZP3.En_BlkAR
0 or 1
to block AR
0: disable
1: enable
Fixed accelerate zone 3 of distance
36
21Q.Z3. En_ShortDly
protection
0 or 1
0: disable
1: enable
37
21Q.ZG4.Z_Set
(0.000~4Unn)/In
0.001
ohm
38
21Q.ZG4.R_Set
(0.000~4Unn)/In
0.001
ohm
39
21Q.ZG4.t_Op
0.000~10.000
0.001
s
Impedance setting of zone 3 of
phase-to-ground distance protection
Resistance setting of zone 3
phase-to-ground distance protection
Time
delay
of
21Q.ZG4.En
zone
4
of
phase-to-ground distance protection
Enabling/disabling
40
of
zone
4
of
phase-to-ground distance protection
0 or 1
0: disable
1: enable
Enabling/disabling
phase-to-ground
zone 4 of distance protection operation
41
21Q.ZG4.En_BlkAR
to block AR (Internal setting, its default
0 or 1
value is “1”)
0: disable
1: enable
42
21Q.ZP4.Z_Set
(0.000~4Unn)/In
0.001
ohm
43
21Q.ZP4.R_Set
(0.000~4Unn)/In
0.001
ohm
44
21Q.ZP4.t_Op
0.000~10.000
0.001
s
Impedance setting of zone 3 of
phase-to-phase distance protection
Resistance setting of zone 3
phase-to-phase distance protection
Time
delay
of
21Q.ZP4.En
zone
4
of
phase-to-phase distance protection
Enabling/disabling
45
of
zone
4
of
phase-to-phase distance protection
0 or 1
0: disable
1: enable
Enabling/disabling
phase-to-phase
zone 4 of distance protection operation
46
21Q.ZP4.En_BlkAR
to block AR (Internal setting, its default
0 or 1
value is “1”)
0: disable
1: enable
47
21Q.ZG5.Z_Set
(0.000~4Unn)/In
0.001
ohm
Impedance setting of zone 5 of
phase-to-ground distance protection
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3 Operation Theory
48
21Q.ZG5.R_Set
(0.000~4Unn)/In
0.001
ohm
49
21Q.ZG5.t_Op
0.000~10.000
0.001
s
Resistance setting of zone 5
phase-to-ground distance protection
Time
delay
of
21Q.ZG5.En
zone
5
of
phase-to-ground distance protection
Enabling/disabling
50
of
zone
5
of
phase-to-ground distance protection
0 or 1
0: disable
1: enable
Enabling/disabling
phase-to-ground
zone 5 of distance protection operation
51
21Q.ZG5.En_BlkAR
0 or 1
to block AR
0: disable
1: enable
52
21Q.ZP5.Z_Set
(0.000~4Unn)/In
0.001
ohm
53
21Q.ZP5.R_Set
(0.000~4Unn)/In
0.001
ohm
54
21Q.ZP5.t_Op
0.000~10.000
0.001
s
Impedance setting of zone 5 of
phase-to-phase distance protection
Resistance setting of zone 5
Time
delay
of
21Q.ZP5.En
zone
5
of
phase-to-phase distance protection
Enabling/disabling
55
of
phase-to-phase distance protection
zone
5
of
phase-to-phase distance protection
0 or 1
0: disable
1: enable
Enabling/disabling
phase-to-phase
zone 5 of distance protection operation
56
21Q.ZP5.En_BlkAR
to block AR
0 or 1
0: disable
1: enable
Direction option for zone 5 of distance
57
21Q.Z5.Opt_Dir
0 or 1
0
protection
0: forward direction
1: reverse direction
3.6.7 Pilot Distance Zone
3.6.7.1 Impedance Characteristic
An independent pilot zone distance protection is used for PUTT and POTT scheme. There is also
a reverse pilot distance element available as an option for application of POTT on weak power
source system.
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3 Operation Theory
Pilot.Z_Rev_B
Pilot.Z_Set_B
M
EM
Pilot.Z_Rev_A
A
B
N
D
C
Pilot.Z_Set_A
Figure 3.6-39 Protected zone of pilot distance protection
The operation characteristic of pilot zone is same as that of zone 2, including mho and
quadrilateral characteristic.
When an internal fault occurs, distance protection at weak source end may not operate due to
small fault current. Thus, a reverse distance element is provided to coordinate with the
independent pilot distance protection to implement weak infeed logic, ensure pilot distance
protection can operate to send signal or trip in the weak end. The operation characteristic is shown
in Figure 3.6-40. The reverse weak infeed distance element is forward offset with 1/4 of the
reverse setting to enclose the origin.
Operation characteristics of pilot reverse weak infeed element distance are shown as below.
jX
jX
B
β
21Q.Z_Rev/4
21M.Z_Rev/4
o
21Q.R_Rev
Φ
R
φ
φ
C
21M.Z_Rev
R
α
θ
21Q.Z_Rev
A
Figure 3.6-40 Pilot reverse weak infeed element
Where:
Φ: positive-sequence characteristic angle, i.e. [phi1_Reach]
α: the angle of directional line, fixed at 15°
β: the angle of directional line, fixed at 15°
θ: tilted angle of the reactance line AC, fixed at 12°
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3 Operation Theory
3.6.7.2 Logic
SIG
Enable zone
SIG
21Q.Pilot.Rls_PSBR
SET
Flag.21Q.Pilot.Z (PG)
SIG
LoadEnch.St (PG)
SET
Flag.21Q.Pilot.Z (PP)
SIG
LoadEnch.St (PP)
&
&
ZPilotP
&
>=1
21Q.Zpilot.Flag_PSBR
&
Figure 3.6-41 Logic diagram of pilot distance zone (Quad characteristic)
SIG
Enable zone
SIG
21M.Pilot.Rls_PSBR
SET
Flag.21M.Pilot.Z (PG)
SIG
LoadEnch.St (PG)
SET
Flag.21M.Pilot.Z (PP)
SIG
LoadEnch.St (PP)
&
&
ZPilotP
&
>=1
21M.Zpilot.Flag_PSBR
&
Figure 3.6-42 Logic diagram of pilot distance zone (Mho characteristic)
Where:
21M.Pilot.Rls_PSBR, 21Q.Pilot.Rls_PSBR: Please refer to Figure 3.6-44.
LoadEnch.St (PG) means that load trapezoid characteristic for distance element is enabled and
measured phase-to-ground impedance into the load area.
LoadEnch.St (PP) means that load trapezoid characteristic for distance element is enabled and
measured phase-to-phase impedance into the load area.
Flag.21Q.Pilot.Z (PG) means that measured impedance by phase-to-ground distance element is
within the range determined by the setting [21Q.Pilot.Z_Set]. (Quad characteristic)
Flag.21Q.Pilot.Z (PP) means that measured impedance by phase-to-phase distance element is
within the range determined by the setting [21Q.Pilot.Z_Set]. (Quad characteristic)
Flag.21M.Pilot.Z (PG) means that measured impedance by phase-to-ground distance element is
within the range determined by the setting [21M.Pilot.Z_Set]. (Mho characteristic)
Flag.21M.Pilot.Z (PP) means that measured impedance by phase-to-phase distance element is
within the range determined by the setting [21M.Pilot.Z_Set]. (Mho characteristic)
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3 Operation Theory
3.6.7.3 Settings
Table 3.6-9 Settings of pilot distance zone
No.
Name
Range
Step
Unit
1
21M.Pilot.Z_Set
(0.000~4Unn)/In
0.001
ohm
2
21Q.Pilot.Z_Set
(0.000~4Unn)/In
0.001
ohm
Remark
Impedance
setting
21M.Pilot.Z_Rev
(0.000~4Unn)/In
0.001
ohm
pilot
distance
protection (Mho characteristic)
Impedance
setting
of
pilot
distance
protection (Quad characteristic)
Impedance
3
of
protection
setting
in
of
reverse
pilot
distance
direction
(Mho
characteristic)
Impedance
4
21Q.Pilot.Z_Rev
(0.000~4Unn)/In
0.001
ohm
setting
of
pilot
distance
protection in reverse direction (Quad
characteristic)
5
21Q.Pilot.R_Set
(0.000~4Unn)/In
0.001
ohm
6
21Q.Pilot.R_Rev
(0.000~4Unn)/In
0.001
ohm
Impedance
setting
of
pilot
distance
protection (Quad characteristic only)
Impedance
setting
of
pilot
distance
protection in reverse direction (Quad
characteristic only)
3.6.8 Power Swing Detection
Power swing is generally a dynamic process when power system is disturbed. When power swing
occurs, the angle between the generators in parallel operation, the frequency of the system, the
voltage on the bus, the current and power of the branch lines are all fluctuating. Power swing may
destroy the normal operation of power systems and even damage electrical equipment, causing
the system to collapse.
3.6.8.1 Function Block Diagram
68
68.En
68.St
68.Blk
3.6.8.2 I/O Signals
Table 3.6-10 I/O signals of power swing detection
No.
1
Input Signal
68.En
Description
Power swing detection enabling input, it is triggered from binary input or
programmable logic etc.
3-65
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3 Operation Theory
Power swing detection blocking input, it is triggered from binary input or
2
68.Blk
3
21.St
Any element of distance protection picks up.
4
FD.ROC.Pkp
Residual current FD element operates.
5
52b
Circuit breaker is in closed position.
6
52a
Circuit breaker is in open position.
No.
1
programmable logic etc.
Output Signal
68.St
Description
Power swing detection takes into effect.
3.6.8.3 Logic
EN
[68.En]
SIG
68.En
SIG
68.Blk
SIG
I1>[Y.I_PSBR]
SIG
21.St
SIG
FD.ROC.Pkp
SIG
3 CB Closed
SIG
3 CB open
SIG
Unblocking for SF
SIG
Unblocking for UF
&
&
&
&
&
t1
t2
&
68.St
&
>=1
>=1
Figure 3.6-43 Logic diagram of power swing detection
Y: 21M or 21Q
3.6.8.4 Settings
Table 3.6-11 Settings of power swing detection
No.
Name
Range
Step
Unit
Remark
Enabling/disabling power swing detection
1
68.En
0 or 1
0: disable
1: enable
3.6.9 Power Swing Blocking Releasing
When power swing occurs on the power system, the impedance measured by the distance
measuring element may vary from the load impedance area into the operating zone of the
distance element. The distance measuring element may operate due to the power swing occurs in
many points of interconnected power systems. To keep the stability of whole power system,
tripping due to operation of the distance measuring element during a power swing is generally not
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allowed. Our distance protection adopts power swing blocking releasing to avoid maloperation
resulting from power swing. In another word, distance protection is blocked all along under the
normal condition and power swing when the respective logic settings are enabled. Only when fault
(internal fault or power swing with internal fault) is detected, power swing blocking for distance
protection is released by PSBR element.
Power swing blocking for distance element will be released if any of the following PSBR elements
operates. Each distance zone elements has respective setting for selection this function.

Fault detector PSBR element (FD PSBR)

Unsymmetrical fault PSBR element (UF PSBR)

Symmetrical fault PSBR element (SF PSBR)
1.
Fault detector PSBR element
If any of the following condition is matched, FD PSBR will operate for 160ms.
1)
Positive sequence current is lower than the setting [I_PSBR] before general fault detector
element operates.
2)
Positive sequence current is higher than the setting [I_PSBR] before general fault detector
element operates, but the duration is less than 10ms.
As shown in figure below, assume normal load impedance locates at position 1, and the
impedance under current “I_PSBR” locates at position 2, if the condition for FD PSBR mentioned
above operates, it means FD operates between point 1, point 2 and point 3 as example, then FD
PSBR will operate for 160ms.
[I_PSBR]
FD
Normal load
impedance
Point 1
Point 3
Point 2
2.
Unsymmetrical fault PSBR element
The operation criterion:
I0+I2>m×I1
The “m”, an empirical value, is internal fixed coefficient which can ensure UF PSBR operation
during power swing with internal unsymmetrical fault, while no operation during power swing or
power swing with external fault.
This decision mainly utilizes the "discrepancy" that there is no negative-sequence or
zero-sequence current during power swing, and there are negative-sequence and zero-sequence
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currents in case of asymmetric fault. In addition, value of m is used to differentiate internal
asymmetric fault and external asymmetric fault in case of power swing.
 In case of power swing or both power swing and external fault, asymmetric fault discriminating
element will not operate and distance protection will be blocked:
In case of power swing but no fault, I0 and I2 are near zero, but I1 is very large. Asymmetric fault
discriminating element will not operate.
In case of both power swing and external fault, if center of power swing is in scope of protection,
both phase-to-phase and grounding impedance relays may operate. At this time, selection of
value of m is used to ensure no operation of asymmetric fault discriminating element, blocking of
distance protection, and no incorrect operation without selectivity. If power swing center is not on
this line, distance protection will not operate incorrectly without selectivity due to power swing.
 In case of internal asymmetric fault, asymmetric fault discriminating element operates and
distance protection will be release to clear internal fault:
In case of both power swing and internal fault, if at the instant of short circuit, system electric
potential angle is not laid out, asymmetric fault discriminating element will operate at once. If at the
instant of short circuit, system electric potential angle is laid out, asymmetric fault discriminating
element will operate when system angle gradually decreases, or local side tripping may be
activated after immediate operation of opposite side asymmetric fault discriminating element and
releasing of distance protection tripping. In case of normal internal asymmetric phase-to-phase or
grounding fault in the system, relatively large zero-sequence or negative-sequence component will
exist. At this time, the above equation is true and distance protection will be released.
3.
Symmetrical fault PSBR element
If a three-phase fault occurs and FD PSBR is invalid (160ms after FD operates), neither FD PSBR
nor UF PSBR will be able to release the distance protection. Thus, SF PSBR is provided for this
case specially. This detection is based on measuring the voltage at power swing center, during
power swing, U1cosΦ will constantly change periodically.
UOS=U1×COSΦ
Where:
Φ: the angle between positive sequence voltage and current
U1: the positive sequence voltage
As shown in the figure below, assume system connection impedance angle of 90°, current vector
will be perpendicular to the line connecting EM and EN, and have the same phase as power swing
center voltage. During normal operation of system or power swing, U1cosΦ just reflects
positive-sequence voltage of power swing center. In case of 3-phase short circuit, U1cosΦ is
voltage drop on arc resistor, transition resistance is arc resistance, and voltage drop on arc resistor
is less than 5%UN. In actual system, line impedance angle is not 90°. Through compensation of
angle Φ, power swing center voltage can be measured accurately. After compensation, power
swing center voltage is U1cos(Φ＋90o－ΦL), where ΦL is line impedance angle.
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EM
I
U
EN
UOS
Φ
During power swing, power swing center voltage U1cosΦ has the following characteristics: When
electric potential phase angle difference between power supplies at two sides is 180o, U1cosΦ 0
and change rate dU1cosΦ/dt is the maximum. When this phase angle difference is near 0o, power
swing center voltage change rate dU1cosΦ/dt is the minimum. During short circuit, U1cosΦ
remains unchanged and dU1cosΦ/dt 0. However, in early stage of short circuit when normal state
enters short circuit state, dU1cosΦ/dt is very large. Therefore, use of dU1cosΦ/dt solely to
differentiate power swing and short circuit is not complete.
For these reasons, the method to release distance protection on condition that power swing center
voltage U1cosΦ is less than a setting and after a short delay can be used as symmetric fault
discriminating element. This element can accurately differentiate power swing and 3-phase short
circuit fault, and constitute a complete power swing blocking scheme with other elements. The
element to open distance protection if U1cosΦ is less than a certain setting and after a delay is
easy to realize and has short delay, and can trip fault more quickly and accurately trip 3-phase
short circuit fault during power swing.
The criterion of SF PSBR element comprises the following two parts:

when -0.03UN<UOS<0.08UN, the SF PSBR element will operate after 150ms.

when -0.1UN<UOS<0.25UN, the SF PSBR element will operate after 500ms.
The second criterion is a backup of the first criterion allowing longer monitoring period of voltage
variation.
To reduce the time delay for SF PSBR element during power swing, the change rate of voltage at
power swing center is also used which can release SF PSBR element quickly for the fault occurred
during power swing. The typical release time is less than 60ms.
3.6.9.1 I/O Signals
Table 3.6-12 I/O signals of PSBR
No.
Input Signal
Description
1
21M.En_PSBR
Enabling power swing blocking releasing (Mho characteristic)
2
21Q.En_PSBR
Enabling power swing blocking releasing (Quad characteristic)
3
21M.Blk_PSBR
Blocking power swing blocking releasing (Mho characteristic)
4
21Q.Blk_PSBR
Blocking power swing blocking releasing (Quad characteristic)
No.
1
Output Signal
21M.Z1.Rls_PSBR
Description
PSBR operates to release zone 1 (Mho characteristic)
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2
21Q.Z1.Rls_PSBR
PSBR operates to release zone 1 (Quad characteristic)
3
21M.Z2.Rls_PSBR
PSBR operates to release zone 2 (Mho characteristic)
4
21Q.Z2.Rls_PSBR
PSBR operates to release zone 2 (Quad characteristic)
5
21M.Z3.Rls_PSBR
PSBR operates to release zone 3 (Mho characteristic)
6
21Q.Z3.Rls_PSBR
PSBR operates to release zone 3 (Quad characteristic)
7
21M.Z5.Rls_PSBR
PSBR operates to release zone 5 (Mho characteristic)
8
21Q.Z5.Rls_PSBR
PSBR operates to release zone 5 (Quad characteristic)
9
21M.Pilot.Rls_PSBR
PSBR operates to release pilot distance protection (Mho characteristic)
10
21Q.Pilot.Rls_PSBR
PSBR operates to release pilot distance protection (Quad characteristic)
3.6.9.2 Logic
SIG
Y.En_PSBR
SIG
Y.Blk_PSBR
SIG
Y.Enable_PSBR
EN
[Y.Zx .En_PSBR]
&
Y.Enable_PSBR
&
Unblocking for UF
SIG
Unsymmetrical |I0|+|I2|>
>=1
>=1
&
Y.Zx.Rls_PSBR
>=1
SIG
symmetrical |U1cosΦ|<
t
0ms
Unblocking for SF
SET
I1>[Y.I_PSBR]
10ms
0ms
&
0
SIG
FD.Pkp
SIG
Zx.Flg_PSBR
160ms
Figure 3.6-44 Logic diagram of PSBR
Y: 21M or 21Q
x: 1, 2, 3, 5 or pilot
Y.Zx.Flg_PSBR: Please refer to Figure 3.6-26~Figure 3.6-30, Figure 3.6-34~Figure 3.6-38, Figure
3.6-41 and Figure 3.6-42.
3.6.9.3 Settings
Table 3.6-13 Settings of PSBR
No.
Name
Range
Step
Unit
1
21M.I_PSBR
(0.050~30.000)×In
0.001
A
2
21Q.I_PSBR
(0.050~30.000)×In
0.001
A
3
21M.Z1.En_PSBR
0 or 1
Remark
Current setting for power swing
blocking (Mho characteristic)
Current setting for power swing
blocking (Quad characteristic)
Enabling/disabling zone 1 of distance
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protection controlled by PSBR (Mho
characteristic)
0: disable
1: enable
Enabling/disabling zone 1 of distance
protection controlled by PSBR (Quad
4
21Q.Z1.En_PSBR
0 or 1
characteristic)
0: disable
1: enable
Enabling/disabling zone 2 of distance
protection controlled by PSBR (Mho
5
21M.Z2.En_PSBR
0 or 1
characteristic)
0: disable
1: enable
Enabling/disabling zone 2 of distance
protection controlled by PSBR (Quad
6
21Q.Z2.En_PSBR
0 or 1
characteristic)
0: disable
1: enable
Enabling/disabling zone 3 of distance
protection controlled by PSBR (Mho
7
21M.Z3.En_PSBR
characteristic)
0 or 1
0: disable
1: enable
Enabling/disabling zone 3 of distance
protection controlled by PSBR (Quad
8
21Q.Z3.En_PSBR
0 or 1
characteristic)
0: disable
1: enable
Enabling/disabling zone 5 of distance
protection controlled by PSBR (Mho
9
21M.Z5.En_PSBR
0 or 1
characteristic)
0: disable
1: enable
Enabling/disabling zone 5 of distance
protection controlled by PSBR (Quad
10
21Q.Z5.En_PSBR
characteristic)
0 or 1
0: disable
1: enable
Enabling/disabling
pilot
distance
zone controlled by PSBR (Mho
11
21M.Pilot.En_PSBR
0 or 1
characteristic)
0: disable
1: enable
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Enabling/disabling
pilot
distance
zone controlled by PSBR (Quad
12
21Q.Pilot.En_PSBR
0 or 1
characteristic)
0: disable
1: enable
3.6.10 Distance SOTF Protection
When the circuit breaker is closed manually or automatically, it is possible to switch on to a fault.
This is especially critical if the line in the remote station is grounded, since the distance protection
would not clear the fault until overreach zones (Z2 and/or zone 3) time delays have elapsed. In this
situation, however, the fastest possible clearance is required.
The SOTF (switch onto fault) protection is a complementary function to the distance protection.
With distance SOTF protection, a fast trip is achieved for a fault on the whole line, when the line is
being energized. It shall be responsive to all types of faults anywhere within the protected line.
3.6.10.1 Function Block Diagram
21SOTF
21SOTF.En
21SOTF.Op
21SOTF.Blk
21SOTF.Op_PDF
3.6.10.2 I/O Signals
Table 3.6-14 I/O signals of distance SOTF protection
No.
Input Signal
1
21SOTF.En
2
21SOTF.Blk
No.
Description
Distance SOTF protection enabling input, it is triggered from binary input or
programmable logic etc.
Distance SOTF protection blocking input, it is triggered from binary input or
programmable logic etc.
Output Signal
1
21SOTF.Op
2
21SOTF.Op_PDF
Description
Accelerate distance protection to trip when manual closing or auto-reclosing to
fault
Accelerate distance protection to trip when another fault happened under pole
discrepancy conditions
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3.6.10.3 Logic
SIG
21SOTF.En
SIG
21SOTF.Blk
EN
[21SOTF.En]
&
&
21SOTF.Enable
Figure 3.6-45 Logic diagram of enabling distance SOTF protection
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SIG
21SOTF.Enable
EN
[21SOTF.En_ManCls]
&
&
SIG
Manual closing signal
EN
[21SOTF.Z2.En_ManCls]
SIG
Y.Z2.Flg_PSBR
EN
[21SOTF.Z3.En_ManCls]
SIG
Y.Z3.Flg_PSBR
EN
[21SOTF.Z4.En_ManCls]
SIG
Y.Z4.Flg_PSBR
EN
[21SOTF.En_3PAR]
SIG
3-pole reclosing signal
EN
[21SOTF.Z2.En_3PAR]
SIG
Y.Z2.Flg_PSBR
EN
[21SOTF.Z3.En_3PAR]
SIG
Y.Z3.Flg_PSBR
EN
[21SOTF.Z4.En_3PAR]
SIG
Y.Z4.Flg_PSBR
EN
[21SOTF.Z2.En_PSBR]
SIG
Y.Z2.Flg_PSBR
SIG
Y.Z2.Rls_PSBR
EN
[21SOTF.Z3.En_PSBR]
SIG
Y.Z3.Flg_PSBR
SIG
Y.Z3.Rls_PSBR
EN
[21SOTF.En_1PAR]
SIG
PD signal
SIG
Y.Z2.Rls_PSBR
SIG
21SOTF.Enable
EN
[21SOTF.En_PDF]
SIG
Y.Z2.Rls_PSBR
SIG
PD signal
[21SOTF.t_ManCls]
0
[21SOTF.t_3PAR]
0
[21SOTF.t_1PAR]
0
&
&
>=1
&
&
&
>=1
21SOTF.Op
&
&
>=1
>=1
&
&
>=1
&
&
&
&
[21SOTF.t_PDF]
0
21SOTF.Op_PDF
&
&
Figure 3.6-46 Logic diagram of distance SOTF protection
Y: 21M or 21Q
Distance SOTF protection can be enabled or disabled by logic setting [21SOTF.En] and can be
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3 Operation Theory
optional enabled by logic settings independently for several cases, including manual closing,
3-pole reclosing, 1-pole reclosing and pole discrepancy conditions.
Distance protection for SOTF will operate to trip three-phase circuit breaker when closing manually.
Controlled by the logic settings, zone 2, 3 and 4 of distance protection can be determined whether
is accelerated to operate.
Zone 2, 3 and 4 of distance element for SOTF with or without PSBR logic will operate to trip circuit
breaker if the logic setting [21SOTF.Z2.En_3PAR], [21SOTF.Z3.En_3PAR] and
[21SOTF.Z4.En_3PAR] are set as “0” or “1” respectively when 3-pole auto-reclosing.
Zone 2 of distance element for SOTF with PSBR logic will operate to trip three-phase circuit
breaker when 1-pole or 3-pole auto-reclosing if both the logic setting [21SOTF.Z2.En_3PAR] and
[21SOTF.Z3.En_3PAR] are set as “0”.
For single-phase permanent fault, distance SOTF protection for 1-pole reclosing onto the faulty
phase will trip three-phase circuit breaker.
Under pole discrepancy condition after single-phase tripping, distance SOTF protection will
accelerate to operate if another fault happens to the healthy phase.
SOTF protection is automatically enabled after circuit breaker opened for 50 ms and automatically
disabled after circuit breaker closed for 400ms.
3.6.10.4 Settings
Table 3.6-15 Settings of distance SOTF protection
No.
Name
Range
Step
Unit
Remark
Enabling/disabling distance SOTF
1
21SOTF.En
protection
0 or 1
0: disable
1: enable
Enabling/disabling
distance
2
21SOTF.Z2.En_ManCls
0 or 1
SOTF
zone
2
of
protection
for
manual closing
1: enable
0: disable
Enabling/disabling
distance
3
21SOTF.Z3.En_ManCls
0 or 1
SOTF
zone
3
of
protection
for
manual closing
1: enable
0: disable
Enabling/disabling
distance
4
21SOTF.Z4.En_ManCls
0 or 1
SOTF
zone
4
of
protection
for
manual closing
1: enable
0: disable
5
21SOTF.Z2.En_3PAR
0 or 1
Enabling/disabling
zone
2
of
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distance
SOTF
protection
for
3-pole reclosing
1: enable
0: disable
Enabling/disabling
distance
6
21SOTF.Z3.En_3PAR
0 or 1
SOTF
zone
3
of
protection
for
3-pole reclosing
1: enable
0: disable
Enabling/disabling
distance
7
21SOTF.Z4.En_3PAR
0 or 1
SOTF
zone
4
of
protection
for
3-pole reclosing
1: enable
0: disable
Enabling/disabling
zone
2
controlled by PSB of distance
8
21SOTF.Z2.En_PSBR
SOTF
0 or 1
protection
for
3-pole
reclosing
1: enable
0: disable
Enabling/disabling
zone
3
controlled by PSB of distance
9
21SOTF.Z3.En_PSBR
SOTF
0 or 1
protection
for
3-pole
reclosing
1: enable
0: disable
Enabling/disabling
zone
4
controlled by PSB of distance
10
21SOTF.Z4.En_PSBR
SOTF
0 or 1
protection
for
3-pole
reclosing
1: enable
0: disable
Enabling/disabling distance SOTF
protection under pole discrepancy
11
21SOTF.En_PDF
0 or 1
conditions
1: enable
0: disable
Time delay of distance protection
12
21SOTF.t_PDF
0.000~10.000
0.001
s
operating under pole discrepancy
conditions
Option of manual SOTF mode
13
SOTF.Opt_Mode_ManCls
0: initiated by input signal of
0, 1 or 2
manual closing
1: initiated by CB position
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2: initiated by either input signal of
manual closing or CB position
Table 3.6-16 Internal settings of distance SOTF protection
No.
Name
Default Value
Unit
Remark
Enabling/disabling distance SOTF protection for
1
21SOTF.En_ManCls
manual closing
1
0: disable
1: enable
2
21SOTF.t_ManCls
0.025
s
Time delay of distance protection accelerating to
trip when manual closing
Enabling/disabling distance SOTF protection for
3
21SOTF.En_3PAR
3-pole reclosing
1
0: disable
1: enable
4
21SOTF.t_3PAR
0.025
s
Time delay of distance protection accelerating to
trip when 3-pole reclosing
Enabling/disabling distance SOTF protection for
5
21SOTF.En_1PAR
1-pole reclosing
1
0: disable
1: enable
6
21SOTF.t_1PAR
0.025
s
Time delay of distance protection accelerating to
trip when 1-pole reclosing
3.7 Optical Pilot Channel (Option)
3.7.1 General Application
When fibre optical channel is available between the devices at both ends, the devices have an
optional module to transmit permissive signal or blocking signal (subject to the scheme selected),
transfer signal and transfer trip via the fibre ports of the module. The communication rate can be
64 kbit/s or 2048kbit/s via optional dedicated optical fibre channel or multiplex channel.
3.7.2 Function Description
12 digital bits are integrated in each frame of transmission message for various applications. Each
received message frame via fibre optical channel will pass through security check to ensure the
integrity of the message consistently.
The last four digital bits of the 12 have been assigned for pilot scheme protection. The
communication channel can be configured as single channel mode or as dual channels mode.
(FOx, x can be 1 or 2) according to the optical pilot channel module selected.
3.7.2.1 Channel Interface
The modules can communicate in two modes via multiplexer or dedicated optical fibre.
Communication through dedicated fibre is usually recommended unless the received power does
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not meet with the requirement.
Channel of 64 kbit/s or 2048kbit/s via dedicated fibre is shown in Figure 3.7-1 and Figure 3.7-2.
Two fibre cores of optical cable are dedicated to pilot scheme protection.
Two fibre cores of optical cable are normally in service, and all data are exchanged via the other
healthy core if one core is failed.
Max 2km for 62.5/125um multi-mode FO (C37.94)
TX
RX
RX
TX
PCS-902
PCS-902
ST connectors
ST connectors
Figure 3.7-1 Direct optical link up to 2km with 850nm
Max 40km/100km for 9/125um single-mode FO
TX
RX
RX
TX
PCS-902
PCS-902
FC connectors
FC connectors
Figure 3.7-2 Direct optical link up to 40km with 1310nm or up to 100km with 1550nm
Channel of 64 kbit/s or 2048kbit/s via multiplexer is shown in Figure 3.7-3, Figure 3.7-4 and Figure
3.7-5.
C37.94 (n*64kbit/s)
Multi-mode FO
Communication convertor
TX
RX
RX
TX
E
PCS-902
ST connectors
O
Interface
Link to
communicate
device
ST connectors
Figure 3.7-3 Connect to a communication network via communication convertor
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G.703 (64kbit/s)
MUX-64
Single-mode FO
TX
RX
RX
TX
E
Interface
Link to
communicate
device
PCS-902
FC connectors
O
FC connectors
Figure 3.7-4 Connect to a communication network via MUX-64
G.703-E1 (2048kbit/s)
MUX-2M
Single-mode FO
TX
RX
RX
TX
E
Interface
PCS-902
FC connectors
O
Link to
communicate
device
FC connectors
Figure 3.7-5 Connect to a communication network via MUX-2M
3.7.2.2 Communication Clock
Valid messages exchange is key factor for digital pilot scheme protection.
The device transmits and receives messages based on respective clocks, which are called
transmit clock (i.e. clock TX) and receive clock (i.e. clock RX) respectively. Clock RX is fixed to be
extracted from message frame, which can ensure no slip frame and no error message received.
Clock TX has two options:
1. Use internal crystal clock, which is called internal clock. (master clock)
2. Use external clock. (slave clock)
Depend on the clock used by the device at both ends, there are three modes.
1.
Master-master mode
Both ends use internal clock.
2.
Slave-slave mode
Both ends use external clock.
3.
Master-slave mode
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One of them uses internal clock, the other uses external clock
The logic setting [FOx.En_IntClock] is used in pilot scheme protection to select the communication
clock. The internal clock is enabled automatically when the logic setting [FOx.En_IntClock] is set
as “1”. Contrarily, the external clock is enabled automatically when the logic setting
[FOx.En_IntClock] is set to “0”.
If the device uses multiplex PCM channel, logic setting [FOx.En_IntClock] at both ends should be
set as “0” (Mode 2). If the device uses dedicated optical fibre channel, clock Mode 1 and Mode 3
can be used. Mode 1 is recommended in considering simplification to user, i.e. logic setting
[FOx.En_IntClock] at both ends should be set as “1”.
3.7.2.3 Identity Code
In order to ensure reliability of the device when digital communication channel is applied, settings
[FO.LocID] and [FO.RmtID] are provided as identity code to distinguish uniquely the device at
remote end using same channel.
Under normal conditions, the identity code of the device at local end should be different with that at
remote end. In addition, it is recommended that the identity code of all devices, i.e., the setting
[FO.LocID], should be unique in the power grid. The setting range is from 0 to 65535. Only for loop
test, they are set as the same.
The setting [FO.LocID] of the device at an end should be the same as the setting [FO.RmtID] of
the device at opposite end and the greater [FO.LocID] between the two ends is chosen as a
master end for sampling synchronism, the smaller [FO.LocID] is slave end. If the setting [FO.LocID]
is set the same as [FO.RmtID], that implies the device in loopback testing state.
The setting [FO.LocID] is packaged in the message frame and transmitted to the remote end.
When the [FO.LocID] of the device at remote end is received by local device is same to the setting
[FO.RmtID] of local device, the message received from the remote end is valid, and protection
information involved in message is read. When these settings are not matched, the message is
considered as invalid and protection information involved in message is ignored, corresponding
alarms will be issued.
3.7.2.4 Channel Statistics
The device has the function of on-line channel monitoring and channel statistics. It can produce
channel statistic report automatically at 9:00 every day and the report can be printed for operator
to check the channel quality. The monitoring contents of channel status are shown as follows, and
they can be viewed by the menu “Main Menu→Test→Prot Ch Count→Chx Counter”.
1.
FOx.Start_Time (starting time)
It shows the starting time of the channel status statistics of the device at local end.
2.
FO.RmtID (ID code of the remote end)
It shows the ID information received by the device at local end now.
3.
FOx.t_ChDly (propagation delay of channel x)
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It shows the calculated communication channel time delay of the device at local end now (unit: us).
The calculation is based on the assumption of same channel path for to and from remote end. The
device measures propagation delay of communication channel based on the below principle.
Side S transmits a frame of message to side M, and meanwhile records the transmitting time “tss”
on the basis of clock on side S. When side M receives the message, it will record receiving time
“tmr” of the message with its own clock, and return a frame of message to side S at next fixed
transmitting time, meanwhile data of “tms-tmr” is included in the frame of message. Side S will
receive the message from side M at the time “tsr” and obtain the data of “tms-tmr”.
Therefore, the propagation delay of the channel “Td” is obtained through calculation:
Td 
(t sr  t ss )  (t ms  t mr )
2
T1
tss
tsr
tmr
Td
tms
"S"
"M"
T2
Figure 3.7-6 Schematic diagram of communication channel time
4.
FOx.Alm_CH (channel x is abnormal)
5.
FOx.N_CRCFail (total number of error frame of channel x)
It shows the total number of the error frames of the device at local end from starting time of
channel statistics until now. Error frame means that this frame fails in CRC check.
6.
FOx.N_FramErr (total number of abnormal messages of channel x)
It shows the total number of abnormal messages of the device at local end from starting time of
channel statistics until now.
7.
FOx.N_FramLoss (total number of lost frames of channel x)
It shows the total number of the lost frames of the device at local end from starting time of channel
statistics until now.
8.
FOx.N_RmtAbnor (total number of abnormal messages from the remote end of channel x)
It shows the total number of abnormal messages received from the remote end from starting time
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of channel statistics until now.
9.
FOx.t_CRCFailSec (seconds of serious error frames of channel x)
It shows the total number of serious error frame seconds of the device at local end from starting
time of the channel statistics until now.
3.7.3 Function Block Diagram
FOx
FOx.Send1
FOx.Recv1
FOx.Send2
FOx.Recv2
FOx.Send3
FOx.Recv3
FOx.Send4
FOx.Recv4
FOx.Send5
FOx.Recv5
FOx.Send6
FOx.Recv6
FOx.Send7
FOx.Recv7
FOx.Send8
FOx.Recv8
FOx.Alm_CH
FOx.Alm_ID
3.7.4 I/O Signals
Table 3.7-1 I/O signals of pilot channel
No.
Input Signal
Description
1
FOx.Send1
Sending signal 1 of channel x
2
FOx.Send2
Sending signal 2 of channel x
3
FOx.Send3
Sending signal 3 of channel x
4
FOx.Send4
Sending signal 4 of channel x
5
FOx.Send5
Sending signal 5 of channel x
6
FOx.Send6
Sending signal 6 of channel x
7
FOx.Send7
Sending signal 7 of channel x
8
FOx.Send8
Sending signal 8 of channel x
Sending signal 9 of channel x (it is configured fixedly as sending permissive
9
FOx.Send9
signal 1 or sending A-phase permissive signal (only for phase-segregated
command scheme))
10
FOx.Send10
11
FOx.Send11
12
FOx.Send12
Sending signal 10 of channel x (it is configured fixedly as sending B-phase
permissive signal (only for phase-segregated command scheme))
Sending signal 11 of channel x (it is configured fixedly as sending C-phase
permissive signal (only for phase-segregated command scheme))
Sending signal 12 of channel x (it is configured fixedly as sending permissive
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signal 1 when pilot directional earth-fault protection sharing pilot channel 1 with
pilot distance protection, or sending permissive signal 2 only for pilot directional
earth-fault protection adopting independent pilot channel 2)
No.
Output Signal
Description
1
FOx.Recv1
Receiving signal 1 of channel x
2
FOx.Recv2
Receiving signal 2 of channel x
3
FOx.Recv3
Receiving signal 3 of channel x
4
FOx.Recv4
Receiving signal 4 of channel x
5
FOx.Recv5
Receiving signal 5 of channel x
6
FOx.Recv6
Receiving signal 6 of channel x
7
FOx.Recv7
Receiving signal 7 of channel x
8
FOx.Recv8
Receiving signal 8 of channel x
Receiving signal 9 of channel x (it is configured fixedly as receiving permissive
9
FOx.Recv9
signal via channel No.1, or receiving permissive signal of A-phase via channel
No.1 (only for phase-segregated command scheme))
Receiving signal 10 of channel x (it is configured fixedly as receiving permissive
10
FOx.Recv10
signal of B-phase via channel No.1 (only for phase-segregated command
scheme))
Receiving signal 11 of channel x (it is configured fixedly as receiving permissive
11
FOx.Recv11
signal of C-phase via channel No.1 (only for phase-segregated command
scheme))
Receiving signal 12 of channel x (it is configured fixedly as receiving permissive
12
FOx.Recv12
signal 1 when pilot directional earth-fault protection sharing pilot channel 1 with
pilot distance protection, or receiving permissive signal 2 only for pilot
directional earth-fault protection adopting independent pilot channel 2)
13
FOx.Alm_CH
Channel x is abnormal
14
FOx.Alm_ID
15
FO.RmtID
16
FOx.t_ChDly
17
FOx.N_CRCFail
Total number of error frame of channel x
18
FOx.N_FramErr
Total number of abnormal messages of channel x
19
FOx.N_FramLoss
Total number of lost frames of channel x
20
FOx.N_RmtAbnor
Total number of abnormal messages from the remote end of channel x
21
FOx.t_CRCFailSec
Seconds of serious error frames of channel x
22
FOx.Alm_Connect
Optical fibre of channel x is connected wrongly
Received ID from the remote end is not as same as the setting [FO.RmtID] of
the device in local end
ID information received from the remote end by the device at local end now
Calculated propagation delay of communication channel of the device at local
end now
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3.7.5 Logic
SIG
Receiving transfer signal n from remote side
SIG
FOx.Alm_CH
SIG
FOx.Alm_ID
&
FOx.Recvn
>=1
Figure 3.7-7 Logic diagram of receiving signal n
Where:
n can be 1~12
3.7.6 Settings
Table 3.7-2 Settings of pilot channel
No.
Name
Range
Step
Unit
Remark
1
FO.LocID
0-65535
1
Identity code of the device at local end
2
FO.RmtID
0-65535
1
Identity code of the device at remote end
Option of internal clock or external clock
3
FOx.En_IntClock
0 or 1
0: external clock
1: internal clock
4
Fox.BaudRate
64 or 2048
kbps
Baud rate of optical pilot channel
3.8 Pilot Distance Protection
3.8.1 General Application
The instant distance protection with underreaching setting is impossible to isolate the fault at
remote end of the line, while distance protection with overreaching setting needs a time delay to
grade with downstream protection to maintain discrimination. Pilot distance protection that
exchanges distance protection information at both ends of the line can remove the fault within this
line quickly, and will not operate for external fault.
Pilot distance protection requires communication channel to exchange protection information at
both ends. The channel may be dedicated or multiplexed channel through optical fiber or any other
communication media. Pilot distance protection has schemes of permissive underreaching
transfer trip (PUTT), permissive overreaching transfer trip (POTT) and blocking.
3.8.2 Function Description
Pilot distance protection determines whether it will send the signal to the remote end according to
the discrimination result of the distance element or direction element. Pilot distance protection can
be divided into permissive scheme and blocking scheme according to whether the signal sent is
used to permit tripping or block tripping. For permissive scheme, it can be divided into
overreaching mode or underreaching mode according to the setting of distance element and
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scheme selected, furthermore, it will provide the unblocking scheme as auxiliary function. For
overreaching mode, current reversal logic and weak infeed logic are available for parallel line
operation and weak power source situation respectively.
Pilot distance protection with permissive scheme receives permissive signal from the remote end,
so as to combine with local discrimination condition to accelerate tripping, so it has high security.
Blocking scheme will operate with a short time delay [85.t_DPU_Blocking1] if forward pilot zone
element operates and not receiving blocking signal before the short time delay expired.
Pilot distance protection can be enabled or disabled by input signals, logic setting and blocking
signal, as shown in Figure 3.8-1.
SIG
85.Z.En1
SIG
85.Z.En2
EN
[85.Z.En]
SIG
&
&
Enable 85.Z
85.Z.Blk
Figure 3.8-1 Enabling/disabling logic of pilot distance protection
Pilot distance protection receives and sends signals via pilot channel, and the logic of receiving
signal is shown in Figure 3.8-2.
SET
85.Blocking
&
>=1
Valid_Recv1
SIG
85.Recv1
SIG
85.Abnor_Ch1
SIG
Unblocking1 Valid
EN
[85.PUTT]
EN
[85.POTT]
&
>=1
&
>=1
Figure 3.8-2 Logic diagram of receiving signal
Pilot distance protection has the following application modes:
3.8.2.1 Zone Extension
When pilot scheme protection is out of service due to pilot channel failure or no pilot scheme
protection is provided. The fault outside zone 1 only can be cleared by zone 2 with a time delay. It
can not ensure that all faults within protected line are cleared instantaneously. As a supplement of
pilot scheme protection, zone extension can clear the fault within the whole line instantaneously.
Different with pilot distance protection, zone extension can also operate for external close up fault
in parallel line, but power supply can be restored by AR. So zone extension should be blocked
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when AR is out of service and is not ready.
In order to prevent too many lines from disconnecting with system due to zone extension operate
when the circuit breaker is closed into permanent fault, zone extension should be blocked when
AR operates. For temporary fault, the line can be into service again after AR operates successfully.
For permanent fault in either local line or parallel line, distance protection with a time delay will
operate.
SIG
85.ZX.En1
SIG
85.ZX.En2
EN
85.ZX.En
SIG
85.ZX.Blk1
SIG
85.ZX.Blk2
SIG
79.Ready
SIG
Zpilot
&
>=1
&
[85.t_DPU_ZX]
0ms
85.Op_ZX
&
Figure 3.8-3 Zone extension
Zone extension uses the setting of pilot zone (ZPilot), and its operation characteristic can be Mho
or Quad.
3.8.2.2 Permissive Underreaching Transfer Trip (PUTT)
Distance elements zone 1 (Z1) with underreaching setting and pilot zone (ZPilot) with
overreaching setting are used for this scheme. Z1 element will send permissive signal to the
remote end and release tripping after Z1 time delay expired. After receiving permissive signal with
ZPilot element pickup, a tripping signal will be released.
The signal transmission element for PUTT is set according to underreaching mode, so current
reversal need not be considered.
For PUTT, there may be a dead zone under weak power source condition. If the fault occurs
outside Z1 zone at strong power source side, Z1 at weak power supply side may not operate to trip
and transmit permissive signal, and pilot distance protection will not operate. Therefore, the
system fault can only be removed by Z2 at strong power source side with time delay.
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ZPilot
Z2
Z1
M
EM
A
Fault
B
Z1
EN
N
Z2
ZPilot
Relay A
Relay B
Z1
Z1
&
ZPilot
&
85.Op_Z
>=1
85.Op_Z
&
WI
ZPilot
WI
Figure 3.8-4 Simple schematic of PUTT
Pilot distance protection always adopts pilot channel 1, and the logic of PUTT is shown in Figure
3.8-5.
SIG
21M/21Q.Z1.Op
0ms
100ms
SIG
85.ExTrp
0ms
150ms
SET
85.PUTT
&
SIG
Enable 85.Z
SIG
FD.Pkp
SIG
Valid_Recv1
SIG
ZPilot
SIG
WI
>=1
&
Send1
&
&
8ms
0ms
85.Op_Z
>=1
Figure 3.8-5 Logic diagram of pilot distance protection (PUTT)
3.8.2.3 Permissive Overreaching Transfer Trip (POTT)
Pilot zone (ZPilot) distance element with an overreaching setting as zone 2 distance element is
used for POTT scheme if selected. ZPilot will send permissive signal to remote end once it picks
up and release tripping signal upon receiving permissive signal from the remote end.
When POTT is applied on parallel lines arrangement and the ZPilot setting covers 50% of the
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parallel line, there may be a problem under current reversal condition, settings for current reversal
condition should be considered, please refer to section 3.8.2.6 for details.
Under weak power source condition, the problem of dead zone at weak power source end is
eliminated by the weak infeed logic, please refers to section 3.8.2.7 for details.
ZPilot
Z2
M
EM
Zpilot_Rev
Fault
A
B
EN
N
Zpilot_Rev
Z2
ZPilot
Relay A
ZPilot
&
85.Op_Z
>=1
Relay B
&
85.Op_Z
>=1
WI
ZPilot
WI
Figure 3.8-6 Simple schematic of POTT
SIG
Zpilot
SIG
85.ExTrp
SIG
CB open position
SIG
Valid_Recv1
0ms
150ms
>=1
&
&
200ms
0ms
&
Send1
SIG
ZPilot
SIG
Enable 85.Z
SIG
WI
&
&
>=1
&
t1
t2
&
85.Op_Z
&
SIG
FD.Pkp
SET
[85.POTT]
8ms
0ms
Figure 3.8-7 Logic diagram of pilot distance protection (POTT)
Where:
t1: pickup time delay of current reversal, the setting [85.t_DPU_CR1]
t2: dropoff time delay of current reversal, the setting [85.t_DDO_CR1]
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3.8.2.4 Blocking
Permissive scheme has high security, but it relies on pilot channel seriously. Pilot distance
protection will not operate when there is an internal fault with abnormal channel. Blocking scheme
could be considered as an alternative.
Blocking scheme takes use of pilot distance element Zpilot operation to terminate sending of
blocking signal. Blocking signal will be sent once fault detector picks up without pilot zone Zpilot
operation. Pilot distance protection will operate with a short time delay if pilot distance element
operates and not receiving blocking signal after timer expired.
The setting of pilot zone element Zpilot in Blocking scheme is overreaching, so current reversal
condition should be considered. However, the short time delay of pilot distance protection has an
enough margin for current reversal, that this problem has been resolved.
The short time delay must consider channel delay and with a certain margin to set. As shown in
Figure 3.8-8, an external fault happens to line MN. The fault is behind the device at M side, for
blocking scheme, the device at M side will send blocking signal to the device at N side. If channel
delay is too long, the device at side N has operated before receiving blocking signal. Hence, the
time delay of pilot distance protection adopted in blocking scheme should be set according to
channel delay.
Blocking signal
Fault
EM
M
A
N
B
EN
Figure 3.8-8 Simple schematic of system fault
For blocking scheme, pilot distance protection will operate when there is an internal fault with
abnormal channel, however, it is possible that pilot distance protection issue an undesired trip
when there is an external fault with abnormal channel.
ZPilot
EM
M
Zpilot_Rev
A
Fault
B
EN
N
Zpilot_Rev
ZPilot
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Relay A
Relay B
FD.Pkp
&
Zpilot
&
[85.t_DPU_Blocking1]
85.Op_Z
85.Op_Z
&
FD.Pkp
&
Zpilot
[85.t_DPU_Blocking1]
Figure 3.8-9 Simple schematic of blocking
SIG
Zpilot
SIG
85.ExTrp
0ms
150ms
&
SIG
CB open position
&
200ms
SIG
>=1
0ms
&
Valid_Recv1
Send1
&
SIG
FWD_ZPilot
SIG
WI
SIG
FD.Pkp
SET
85.Blocking
SIG
Enable 85.Z
>=1
&
[85.t_DPU_Blocking1]
85.Op_Z
&
Figure 3.8-10 Logic diagram of pilot distance protection (Blocking)
Current reversal logic is only used for permissive scheme. For blocking scheme, the time delay of
pilot distance protection has enough margin for current reversal, so current reversal need not be
considered.
3.8.2.5 Unblocking
Permissive scheme will trip only when it receives permissive signal from the remote end. However,
it may not receive permissive signal from the remote end when pilot channel fails. For this case,
pilot distance protection can adopt unblocking scheme. Under normal conditions, the signaling
equipment works in the pilot frequency, and when the device operates to send permissive signal,
the signaling equipment will be switched to high frequency. While pilot channel is blocked, the
signaling equipment will receive neither pilot frequency signal nor high frequency signal. The
signaling equipment will provide a contact to the device as unblocking signal. When the device
receives unblocking signal from the signaling equipment, it will recognize channel failure, and
unblocking signal will be taken as permissive signal temporarily.
The unblocking function can only be used together with PUTT and POTT.
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SIG
[85.En_Unblocking1]
SIG
85.Unblocking1
&
&
[85.t_Unblocking1] 0ms
SIG
Detecting multi-phase fault
EN
[85.Opt_PilotCh1]
SIG
Pilot distance forward element
>=1
&
Unblocking1 Valid
Figure 3.8-11 Logic diagram of pilot distance protection (Unblocking)
3.8.2.6 Current Reversal
When there is a fault in one of the parallel lines, the direction of the fault current may change
during the sequence tripping of the circuit breaker at both ends as shown in Figure 3.8-12: When a
fault occurs on line C–D near breaker D, the fault current through line A-B to D will flow from A to B.
When breaker D is tripped, but breaker C is not tripped, the fault current in line A-B will then flow
from B to A. This process is the current reversal.
M
Strong
source
EM
M
N
A
B
C
Weak
source
EN
N
A
B
EN
EM
D
C
Direction of fault current
flow before CB‘D’open
D
Direction of fault current
flow after CB‘D’open
Figure 3.8-12 Current reversal
As shown above, the device A judges a forward fault while the device B judges a reverse fault
before break D is tripped. However, the device A judges a reverse fault while the device B judges a
forward fault after breaker D is tripped. There is a competition between pickup and drop off of pilot
zones in the device A and the device B when the fault measured by the device A changes from
forward direction into reverse direction and vice versa for the device B. There may be
maloperation for the device in line A-B if the forward direction of the device B has operated but the
forward direction of the device A drops off slightly slower or the forward direction of the device B
has operated but the forward direction information of the device A is still received due to the
channel delay (the permissive signal is received).
In general, the following two methods shall be adopted to solve the problem of current reversal:
1.
The fault shall be measured by means of the reverse element of the device B. Once the
reverse element of the device B operates, the send signals and the tripping circuit will be
blocked for a period of time after a short time delay. This method can effectively solve the
problem of competition between the device A and the device B, but there shall be a
precondition. The reverse element of the device B must be in cooperation with the forward
element of the device A, i.e. in case of a fault in adjacent lines, if the forward element of the
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device A operates, and the reverse element of the device B must also operate. Once the
bilateral cooperation fails, the anticipated function cannot be achieved. In addition, the
blocking time for sending signals and the tripping circuit after the reverse element of the
device B operates shall be set in combination with the channel time delay.
2.
Considering the pickup and drop off time difference of distance elements and the channel time
delay between the device A and the device B, the maloperation due to current reversal shall
be eliminated by setting the time delay. The reverse direction element of the device is not
required for this method, the channel time delay and the tripping time of adjacent breaker
shall be taken into account comprehensively.
This protection device adopts the second method to eliminate the maloperation due to current
reversal.
SIG
Pilot forward zone start condition
SIG
Signal received conditon
&
t1
t2
Current reversal blocking
Figure 3.8-13 Logic diagram of current reversal blocking
t1: [85.t_DPU_CR1]
t2: [85.t_DDO_CR1]
Referring to above figure, when signal from the remote end is received without pilot forward zone
pickup, the current reversal blocking logic is enabled after t1 delay.
The time delay of t1 [85.t_DPU_CR1] shall be set the shortest possible but allowing sufficient time
for pilot forward zone pickup, generally set as 25ms.
Once the current reversal logic is enabled, the healthy line device B transfer tripping is blocked.
The logic will be disabled by either the dropoff of signal or the pickup of pilot forward zone. A time
delay t2 [85.t_DDO_CR1] is required to avoid maloperation for the case that the pilot forward zone
(or forward element of pilot directional earth-fault protection) of device B picks up before the signal
from device A drops off. Considering the channel propagation delay and the pickup and drop-off
time difference of pilot forward zone (or pilot directional earth-fault element) with margin, t2 is
generally set between 25ms ~ 40ms.
Because the time delay of pilot distance protection has an enough margin to current reversal,
current reversal blocking only used for permissive scheme not blocking scheme.
3.8.2.7 Weak Infeed
In case of a fault in line at one end of which there is a weak power source, the fault current
supplied to the fault point from the weak power source is very small or even nil, and the
conventional distance element could not operate. The weak infeed logic combines the protection
information from the strong power source end and the electric feature of the local end to cope with
the case.
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ZPilot
Z1
M
EM
A
Zpilot_Rev
B
Fault
Z1
Zpilot_Rev
EN
N
ZPilot
Load
Figure 3.8-14 Line fault description
The device has options for weak infeed echo only or weak infeed echo with weak infeed tripping.
The weak infeed logic can be applied together with unblocking logic for PUTT and POTT.
When the weak infeed logic is enabled, distance forward and reverse element and direction
element of directional earth-fault protection do not operate with the voltage lower than the setting
[85.U_UV_WI] after the device picks up, upon receiving signal from remote end, the weak infeed
logic will echo the signal back to remote end for 200ms if the weak infeed echo is enabled, the
weak infeed end will echo signal and release tripping according to the logic.
ZPilot_Rev at weak source end must coordinate with ZPilot_Set of the remote end. The coverage
of ZPilot_Rev must exceed that of ZPilot_Set of the remote end. ZPilot_Rev only activates in the
protection calculation when the weak infeed logic is enabled. In case of the weak infeed logic not
enabled, the setting coordination is not required.
If the device does not pick up, and the weak infeed logic is enabled, upon receiving signal from
remote end with the voltage lower than the setting [85.U_UV_WI], the weak infeed logic will echo
back to remote end for 200ms. When either weak infeed echo or weak infeed tripping is enabled,
then the weak infeed logic is deemed to be enabled. During the device picking up, the weak infeed
logic is shown in Figure 3.8-15.
SIG
Valid_Recv1
SIG
Pilot DEF forward direction
SIG
Pilot DEF reverse direction
SIG
Pilot distance forward direction
>=1
&
>=1
&
Forward direction (WI)
SIG
Pilot distance reverse direction
EN
[85.En_WI]
SET
Up<[85.U_UV_WI]
SET
Upp<[85.U_UV_WI]
>=1
200ms
0ms
&
Figure 3.8-15 Weak infeed logic during pickup
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If the device does not pick up, the weak infeed logic is shown as the following figure:
SIG
Signal receive condition
EN
[85.En_WI]
SET
Up<[85.U_UV_WI]
&
&
WI echo
>=1
200ms
SET
0ms
&
Upp<[85.U_UV_WI]
Figure 3.8-16 Weak infeed logic without pickup
For permissive scheme, the signal receive condition means that the permissive signal is received
or the unblocking signal is valid.
3.8.2.8 CB Echo
A feature is also provided which enables fast tripping to be maintained along the whole length of
the protected line, even when one terminal is open. The device will initiate sending a pulse of
200ms permissive signal when signal receive condition is met during CB is in open position.
SIG
FD.Pkp
SIG
CB open position
SIG
Valid_Recv1
EN
85.POTT
&
&
200ms
0ms
&
Send permissive signal
&
Figure 3.8-17 Simplified CB Echo logic for POTT
CB Echo logic is only applied to permissive overreach mode not underreach mode, and it is
processed without the device pickup. This logic will be terminated immediately once the device
picks up.
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3.8.3 Function Block Diagram
85
85.Z.En1
85.Op_Z
85.Z.En2
85.Send1
85.Z.Blk
85.SendB
85.Abnor_Ch1
85.SendC
85.Rcv1
85.Op_ZX
85.RcvB
85.RcvC
85.ExTrp
85.Unblocking1
85.ZX.En1
85.ZX.En2
85.ZX.Blk1
85.ZX.Blk2
79.Ready
3.8.4 I/O Signals
Table 3.8-1 I/O signals of pilot distance protection
No.
Input Signal
1
85.Z.En1
2
85.Z.En2
3
85.Z.Blk
4
85.Abnor_Ch1
Description
Pilot distance protection enabling input 1, it is triggered from binary input or
programmable logic etc.
Pilot distance protection enabling input 2, it is triggered from binary input or
programmable logic etc.
Pilot distance protection blocking input, it is triggered from binary input or
programmable logic etc.
Input signal of indicating that pilot channel 1 is abnormal
Input signal of receiving permissive signal via channel No.1, or input signal of
5
85.Recv1
receiving
permissive
signal
of
A-phase
via
channel
No.1
(only
for
phase-segregated command scheme)
6
85.RecvB
7
85.RecvC
8
85.ExTrp
Input signal of receiving permissive signal of B-phase via channel No.1 (only for
phase-segregated command scheme)
Input signal of receiving permissive signal of C-phase via channel No.1 (only for
phase-segregated command scheme)
Input signal of initiating sending permissive signal from external tripping signal
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9
85.Unblocking1
10
85.ZX.En1
11
85.ZX.En2
12
85.ZX.Blk1
13
85.ZX.Blk2
14
79.Ready
No.
Unblocking signal 1
Zone Extension enabling input 1, it is triggered from binary input or programmable
logic etc.
Zone Extension enabling input 2, it is triggered from binary input or programmable
logic etc.
Zone Extension blocking input 1, it is triggered from binary input or programmable
logic etc.
Zone Extension blocking input 2, it is triggered from binary input or programmable
logic etc.
AR has been ready for reclosing cycle.
Output Signal
Description
1
85.Op_Z
Pilot distance protection operates.
2
85.Send1
3
85.SendB
4
85.SendC
5
85.Op_ZX
Zone extension protection operates.
6
85.Op_ZX_St
Zone extension protection starts
Output signal of sending permissive signal 1 or sending A-phase permissive
signal (only for phase-segregated command scheme)
Output signal of sending B-phase permissive signal (only for phase-segregated
command scheme)
Output signal of sending C-phase permissive signal (only for phase-segregated
command scheme)
3.8.5 Settings
Table 3.8-2 Settings of pilot distance protection
No.
Name
Range
Step
Unit
Remark
Option of pilot scheme
1
85.Opt_PilotMode
0~2
0: POTT
1
1: PUTT
2: Blocking
Option
of
phase-segregated
signal scheme or three-phase
2
85.Opt_Ch_PhSeg
signal scheme
0 or 1
0: three-phase signal scheme
1:
phase-segregated
signal
scheme
Enabling/disabling weak infeed
3
85.En_WI
scheme
0 or 1
0: disable
1: enable
4
85.U_UV_WI
0~Unn
0.001
V
Undervoltage setting of weak
infeed logic
Enabling/disabling
5
85.Z.En
0 or 1
pilot
distance protection
0: disable
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1: enable
Enabling/disabling unblocking
6
85.En_Unblocking1
scheme
0 or 1
0: disable
1: enable
Time
7
85.t_DPU_Blocking1
0.000~1.000
0.001
s
delay
scheme
of
for
blocking
pilot
distance
protection operation
8
85.t_DDO_CR1
0.000~1.000
0.001
s
9
85.t_DPU_CR1
0.000~1.000
0.001
s
Time delay dropoff for current
reversal logic
Time delay pickup for current
reversal logic
Enabling/disabling
10
85.En_ZX
zone
extension protection
0 or 1
0: disable
1: enable
11
85.t_DPU_ZX
0.000~10.000
0.001
s
Pickup time delay for zone
extension protection operation
Table 3.8-3 Internal settings of pilot distance protection
No.
1
Name
85.t_Unblocking1
Default Value
0.1
Unit
s
Remark
Pickup time delay of unblocking scheme for pilot
channel 1
Option of PLC channel for pilot channel 1
2
85.Opt_PilotCh1
1
0: phase-to-phase channel
1: phase-to-ground channel
3.9 Pilot Directional Earth-fault Protection
3.9.1 General Application
Directional earth fault protection needs to coordinate with downstream protection with definite or
inverse time delay so it cannot clear an internal fault quickly. Pilot directional earth-fault protection
takes use of directional earth fault elements on both ends, it can detect high resistance fault and
maintain high-speed operation.
Pilot protection requires communication channel to exchange the protection information at both
ends. The channel may be dedicated or multiplexed channel through optical fiber or any other
communication media.
Pilot directional earth-fault protection can be used independently, for example, no distance
protection is equipped with the device but fast operation is required for the whole line, or it is used
as backup protection of pilot distance protection to enhance the sensitivity for an earth fault with
high fault resistance.
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3.9.2 Function Description
Sending permissive signal (or terminating sending signal) to the opposite end is controlled by
forward direction element. Current reversal logic is available for parallel line operation and CB
echo logic is provided once pilot directional earth fault protection is enabled. Current reversal logic
is only used for permissive scheme. For blocking scheme, current reversal need not be considered
because there is a settable time delay in pilot directional earth-fault protection.
Pilot directional earth-fault protection can be enabled or disabled by input signals, logic setting and
blocking signal, as shown in Figure 3.9-1.
SIG
85.DEF.En1
SIG
85.DEF.En2
EN
[85.DEF.En]
SIG
85.DEF.Blk
&
&
Enable 85.DEF
Figure 3.9-1 Enabling/disabling logic of pilot directional earth-fault protection
Pilot directional earth-fault protection comprises permissive scheme and blocking scheme. It can
share pilot channel 1 ([85.DEF.En_IndepCh]=0) with pilot distance protection, or uses independent
pilot channel 2 ([85.DEF.En_IndepCh]=1) by setting logic setting [85.DEF.En_IndepCh]. For
underreach mode, pilot directional earth-fault always adopts independent pilot channel 2. The
logic of receiving signal is shown in Figure 3.9-2.
SET
85.Blocking
SIG
85.Recv1
&
>=1
&
SIG
85.Abnor_Ch1
SIG
Unblocking1 Valid
SET
85.PUTT
&
>=1
>=1
Valid_Recv_DEF
EN
[85.DEF.En_IndepCh]
SET
85.Blocking
&
&
>=1
SIG
85.Recv2
SIG
85.Abnor_Ch2
SIG
Unblocking2 Valid
&
Figure 3.9-2 Logic diagram of receiving signal
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SIG
FWD_ROC
&
85.FWD_DEF_Pilot
SIG
3I0>[85.DEF.3I0_Set]
SIG
REV_ROC
&
85.REV_DEF_Pilot
SIG
FD.ROC.Pkp
Figure 3.9-3 Forward/reverse direction of zero-sequence power
FWD_ROC: The forward direction of zero-sequence power.
REV_ROC: The reverse direction of zero-sequence power.
3.9.2.1 Permissive Transfer Trip (PTT)
Pilot protection with permissive scheme receives permissive signal from the device of remote end,
so as to combine with local discrimination condition to accelerate tripping, so it has high security.
Operation of forward directional earth fault element is used to send permissive signal to the
remote end when the protection is enabled and will release tripping signal upon receiving
permissive signal from the remote end with further guarded by no operation of reverse directional
earth fault element. This ensures the security of the protection.
The following figure shows the schematic of permissive transfer trip.
FWD_DEF_Pilot
M
EM
Rev_DEF_Pilot
Fault
A
B
EN
N
Rev_DEF_Pilot
FWD_DEF_Pilot
Relay A
FWD_DEF_Pilot
&
&
85.DEF.t_DPU
85.Op_DEF
85.Op_DEF
85.DEF.t_DPU
FWD_DEF_Pilot
Relay B
Figure 3.9-4 Simple schematic of DEF (permissive scheme)
For blocking scheme, pilot directional earth-fault protection will operate when there is an internal
fault with abnormal channel, however, it is possible that pilot directional earth-fault protection issue
an undesired trip when there is an external fault with abnormal channel.
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SIG
[85.ExTrp]
SIG
CB open position
SIG
Valid_Recv_DEF
SIG
FD.Pkp
SIG
FWD_DEF_Pilot
SIG
REV_DEF_Pilot
SIG
Valid_Recv_DEF
SIG
FD.Pkp
SET
85.PUTT
SET
85.POTT
SIG
Enable 85.DEF
0ms
150ms
&
>=1
&
200ms
0ms
&
85.Send_DEF
&
&
&
t1
t2
&
>=1
&
&
&
[85.DEF.t_DPU]
>=1
85.Op_DEF
&
EN
85.DEF.En_IndepCh
Figure 3.9-5 Logic diagram of DEF (permissive scheme)
t1: pickup time delay of current reversal
t2: dropoff time delay of current reversal
When adopting independent pilot channel 2, settings of t1
[85.t_DDO_CR2] should be considered individually from channel 1.
[85.t_DPU_CR2] and t2
When sharing pilot channel 1 with pilot distance protection, t1 and t2 are the settings
[85.t_DPU_CR1] and [85.t_DDO_CR1] respectively.
3.9.2.2 Blocking
Permissive scheme has high security, but it relies on pilot channel seriously. Pilot directional
earth-fault protection will not operate when there is an internal fault with abnormal channel.
Blocking scheme could be considered as an alternative.
Blocking scheme sends blocking signal when fault detector picks up if and zero-sequence forward
element does not operate or both zero-sequence forward element and zero-sequence reverse
element do not operate. Pilot directional earth-fault protection will operate if forward directional
zero-sequence overcurrent element operates and not receiving blocking signal.
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FWD_DEF_Pilot
Rev_DEF_Pilot
M
EM
A
Fault
B
EN
N
Rev_DEF_Pilot
FWD_DEF_Pilot
Relay B
Relay A
Pkp_FD_Prot
Pkp_FD_Prot
&
REV_DEF_Pilot
&
&
REV_DEF_Pilot
&
FWD_DEF_Pilot
FWD_DEF_Pilot
&
&
85.Op_DEF
&
85.Op_DEF
&
[t_DEF_PilotP]
[t_DEF_PilotP]
Figure 3.9-6 Simple schematic of blocking
SIG
85.TRIPOUT
SIG
85.ExTrp
SIG
CB open position
SIG
Valid_Recv_DEF
SIG
FWD_DEF_Pilot
SIG
REV_DEF_Pilot
SIG
FD.Pkp
SET
85.Blocking
SIG
Enable 85.DEF
>=1
0ms
150ms
>=1
&
Send_DEF
&
&
&
[85.DEF.t_DPU]
85.Op_DEF
&
Figure 3.9-7 Logic diagram of DEF (Blocking scheme)
When DEF shares pilot channel 1 with pilot distance protection, time delay of pilot directional
earth-fault protection will change from the setting [85.DEF.t_DPU] to the setting
[85.t_DPU_Blocking1].
Because the time delay of pilot directional earth-fault protection has enough margin for current
reversal, so blocking scheme should not consider the current reversal condition.
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3.9.2.3 Unblocking
Permissive scheme will operate only when it receives permissive signal from the remote end.
However, it may not receive permissive signal from the remote end when pilot channel fails. For
this case, pilot directional earth-fault protection can adopt unblocking scheme. Under normal
conditions, the signaling equipment works in the pilot frequency, and when the device operates to
send permissive signal, the signaling equipment will be switched to high frequency. While the
channel is blocked, the signaling equipment will receive neither pilot frequency signal nor high
frequency signal. The signaling equipment will provide a contact to the device as unblocking signal.
When the device receives unblocking signal from the signaling equipment, it will recognize
channel failure, and unblocking signal will be taken as permissive signal temporarily.
The unblocking scheme can only be used together with permissive scheme.
EN
[85.En_Unblocking2]
BI
85.Unblocking2
&
&
[85.t_Unblocking2]
SIG
Selection of multi-phase
EN
[85.Opt_PilotCh2]
SIG
Pilot DEF forward detection
0ms
>=1
&
Unblocking2 Valid
Figure 3.9-8 Logic diagram for unblocking
3.9.2.4 Current Reversal
The reach of directional earth-fault protection is difficult to define. There may have problem for
pilot direction earth-fault protection applied on parallel line arrangement due to current reversal
phenomenon. Current reversal blocking logic using time delay method is adopted in the device. It
is the same logic as pilot distance protection. Please refer to section 3.8.2.6 for details. The only
difference is that different signal receive terminal is used if independent channel is selected.
3.9.2.5 CB Echo
It is the same logic as pilot distance protection. Please refer to section 3.8.2.8 for details. The only
difference is that different signal receive terminal is used if independent channel is selected.
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3.9.3 Function Block Diagram
85
85.DEF.En1
85.Op_DEF
85.DEF.En2
85.DEF_BlkAR
85.DEF.Blk
85.Send1
85.Abnor_Ch1
85.Send2
85.Abnor_Ch2
85.Rcv1
85.Rcv2
85.ExTrp
85.Unblocking1
85.Unblocking2
3.9.4 I/O Signals
Table 3.9-1 I/O signals of pilot directional earth-fault protection
No.
Input Signal
Description
Pilot directional earth-fault protection enabling input 1, it is triggered from binary
1
85.DEF.En1
2
85.DEF.En2
3
85.DEF.Blk
4
85.Abnor_Ch1
Input signal of indicating that pilot channel 1 is abnormal
5
85.Abnor_Ch2
Input signal of indicating that pilot channel 2 is abnormal
6
85.Recv1
Input signal of receiving permissive signal via channel 1
7
85.Recv2
Input signal of receiving permissive signal via channel 2
8
85.ExTrp
Input signal of initiating sending permissive signal from external tripping signal
9
85.Unblocking1
Unblocking signal 1
10
85.Unblocking2
Unblocking signal 2
No.
input or programmable logic etc.
Pilot directional earth-fault protection enabling input 2, it is triggered from binary
input or programmable logic etc.
Pilot directional earth-fault protection blocking input, it is triggered from binary
input or programmable logic etc.
Output Signal
1
85.Op_DEF
2
85.Send1
3
85.Send2
Description
Pilot directional earth-fault protection operates.
Output signal of sending permissive signal 1 when pilot directional earth-fault
protection sharing pilot channel 1 with pilot distance protection
Output signal of sending permissive signal 2 only for pilot directional earth-fault
protection adopting independent pilot channel 2
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3.9.5 Settings
Table 3.9-2 Settings of pilot directional earth-fault protection
No.
Name
Range
Step
Unit
Remark
Enabling/disabling pilot directional
1
85.DEF.En
earth-fault protection
0 or 1
0: disable
1: enable
Enabling/disabling pilot directional
earth-fault protection operate to
block AR
2
85.DEF.En_BlkAR
0 or 1
0: selective phase tripping and not
blocking AR
1: three-phase tripping and blocking
AR
Enabling/disabling
channel
for
independent
pilot
directional
earth-fault protection
3
85.DEF_En_IndepCh
0:
0 or 1
pilot
directional
earth-fault
protection sharing same channel
with pilot distance protection
1:
pilot
directional
earth-fault
adopting independent pilot channel
Enabling/disabling
unblocking
scheme for pilot DEF via pilot
4
85.En_Unblocking2
0 or 1
channel 2
0: disable
1: enable
5
85.DEF.3I0_Set
(0.050~30.000)×In
0.001
A
6
85.DEF.t_DPU
0.001~10.000
0.001
s
Current setting of pilot directional
earth-fault protection
Time
85.t_DPU_CR2
0.000~1.000
0.001
s
of
pilot
directional
earth-fault protection
Time
7
delay
delay
pickup
for
current
reversal logic when pilot directional
earth-fault
protection
adopts
independent pilot channel 2
Time delay dropoff for current
8
85.t_DDO_CR2
0.000~1.000
0.001
s
reversal logic when pilot directional
earth-fault
protection
adopts
independent pilot channel 2
Table 3.9-3 Internal settings of pilot distance protection
No.
1
Name
85.t_Unblocking2
Default Value
0.2
Unit
Remark
s
Pickup time delay of unblocking scheme for pilot
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channel 2
Option of PLC channel for pilot channel 2
2
85.Opt_PilotCh2
1
0: phase-to-phase channel
1: phase-to-ground channel
3.10 Current Direction
3.10.1 General Application
Overcurrent protection is widely used in the power system as backup protection, but in some
cases, the direction of current is necessary to aid to complete the selective tripping. As shown
below:
L
EM
M
C
Fault
D
N
A
B
EN
Figure 3.10-1 Line fault description
When line LM has an earth fault, the fault currents flowing through the relay A and the relay D are
of similar magnitude in most cases. It is desirable that the fault is isolated from the power system
by tripping the circuit breaker C and circuit breaker D. Hence, the overcurrent protection of relay A
and relay D require to associate with current direction to fulfill selective tripping.
Directional earth fault protection has a time delay due to coordinate with that of downstream so it
cannot clear the fault quickly. Pilot directional earth-fault protection, which is fulfilled by directional
earth fault element on both ends, it can maintain fast operation and achieve high sensitivity to
detect high resistance fault.
3.10.2 Function Description
The module computes direction of phase current and phase-to-phase current, zero-sequence
current and negative-sequence current.
The direction of phase current and phase-to-phase current equips with an under-voltage direction
function to ensure that phase or phase-to-phase overcurrent protection has explicit directionality
when the polarized voltage is too low for close up fault.
The direction of zero-sequence current and negative-sequence current direction equips with an
impedance compensation function to ensure that zero-sequence or negative-sequence
overcurrent protection has explicit directionality when the zero-sequence voltage or the
negative-sequence voltage is too low.
3.10.2.1 Phase/Phase-to-phase Current Direction
By setting the characteristic angle [RCA_OC] to determine the most sensitive forward angle of
phase current and phase-to-phase current, power value is calculated using phase current with
phase polarized voltage or phase-to-phase current with phase-to-phase polarized voltage to
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determine the direction of phase current or phase-to-phase current respectively in forward
direction or reverse direction. When the power value is zero, neither forward direction nor reverse
direction is considered. As shown below:
jX
U
φ
θ
I
R
O
Forward direction
Reverse direction
Figure 3.10-2 Vector diagram of current and voltage
Where:
φ is the setting [RCA_OC]
θ is the phase angle between polarized voltage and current
The power value is calculated as below:
P=U×[I×COS(θ-φ)]
1.
If P>0, the current direction polarized by U is forward direction
2.
If P<0, the current direction polarized by U is reverse direction
From above diagram can be seen, when θ=φ, P reaches to the maximum value. It is considered
as the most sensitive forward direction. Hence, φ is called as sensitivity angle of phase
overcurrent protection.
1.
Polarized voltage of phase or phase-to-phase current direction
In the event of asymmetrical fault, because phase or phase-to-phase voltage may decrease to
very low voltage whereas positive-sequence voltage does not, the polarized voltage of phase or
phase-to-phase current direction uses positive-sequence voltage to avoid wrong direction due to
too low polarized voltage. Therefore, using positive-sequence voltage as polarized voltage can
ensure that the direction determination has no dead zone for asymmetrical fault. For symmetric
fault, if positive-sequence voltage decreases to 15%Un, the device uses memorized
positive-sequence voltage as polarized voltage, the memorized positive-sequence voltage is 1.5
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cycles pre-fault positive-sequence voltage.
2.
Phase or phase-to-phase current direction under normal polarized voltage condition
When using normal polarized voltage to calculate phase and phase-to-phase current direction,
there are total twelve direction determination algorithm including forward direction and reverse
direction.
Table 3.10-1 Direction description
Direction
Phase A
Phase B
Phase C
Phase AB
Phase BC
Phase CA
3.
Polarized Voltage
Current
Forward direction
U1a
Ia
Reverse direction
U1a
Ia
Forward direction
U1b
Ib
Reverse direction
U1b
Ib
Forward direction
U1c
Ic
Reverse direction
U1c
Ic
Forward direction
U1ab
Iab
Reverse direction
U1ab
Iab
Forward direction
U1bc
Ibc
Reverse direction
U1bc
Ibc
Forward direction
U1ca
Ica
Reverse direction
U1ca
Ica
Phase or phase-to-phase current direction for under-voltage conditions
When the symmetrical fault occurs on a power system, positive-sequence voltage may reduce to
less than 0.15Un, the device will switch to phase or phase-to-phase current direction for
under-voltage condition. The 1.5 cycle pre-fault positive-sequence voltage is used as polarized
voltage with reverse threshold to ensure stable direction decision when three-phase voltage goes
to approximately zero due to close up fault.
At first, the threshold is forward offset before direction is determined, and the threshold will be
reversed offset after direction is determined.
3.10.2.2 Zero-sequence/Negative-sequence Current Direction
By setting the characteristic angle [RCA_ROC] and [RCA_NegOC] to determine the most
sensitive forward angle of zero-sequence current and negative-sequence current, power value is
calculated using zero-sequence current with zero-sequence voltage or negative-sequence current
with negative-sequence voltage to determine the direction of zero-sequence current and
negative-sequence current respectively in forward direction or reverse direction.
When the power value is between 0 and -0.1In, neither forward direction nor reverse direction is
considered.
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jX
3U0
θ-180°
-3I0
φ
R
O
3I0
θ
Reverse direction
Forward direction
Figure 3.10-3 Vector diagram of zero-sequence power
Vector diagram of negative-sequence power is similar to that of zero-sequence power.
Where:
φ is the setting [RCA_ROC] or the setting [RCA_NegOC]
θ is the phase angle between zero/negative-sequence voltage and zero/negative-sequence
current
3I0: calculated zero-sequence current by vector sum of Ia, Ib and Ic
The power value is calculated as below:
P=U×[I×COS(θ-φ)]

If P>0, the direction of zero /negative-sequence current is reverse direction

If P<-0.1InVA, the direction of zero /negative-sequence current is forward direction
1.
The direction of zero-sequence current
Calculating the power value using zero-sequence current (3I0) and zero-sequence voltage (3U0)
to determine the direction of zero-sequence current
According to the equation:
The zero-sequence current and the zero-sequence voltage can be gained by calculation
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Zero-sequence power is: P=3U0×[3I0×COS(θ-φ)]
2.
The direction of negative-sequence current
Calculating the power value using negative-sequence current (3I2) and negative-sequence
voltage (3U2) to determine the direction of negative-sequence current
According to the equation:
The negative-sequence current and the negative-sequence voltage can be gained by calculation
Negative-sequence power is: P=3U2×[3I2×COS(θ-φ)]
3.
The direction of zero-sequence/negative-sequence current with impedance compensation
When zero-sequence impedance or negative-sequence impedance behind the device is very
small, if the fault in forward direction happens, the measured zero-sequence voltage or
negative-sequence voltage by the device may be relatively small to determine correct direction. In
order to solve this problem, compensated zero-sequence voltage and negative-sequence voltage
are used for power calculation.
The compensation formula is as follows:
is the setting [Z0_Comp], which cannot exceed the total zero-sequence impedance of
the protected line
is the setting [Z2_Comp], which cannot exceed the total negative-sequence impedance
of the protected line
3.10.3 I/O Signals
Table 3.10-2 I/O signals of current direction
No.
Output Signal
Description
1
FWD_ROC
The forward direction of zero-sequence power
2
REV_ROC
The reverse direction of zero-sequence power
3
FWD_NegOC
The forward direction of negative-sequence power
4
REV_NegOC
The reverse direction of negative-sequence power
5
Forward_DIR_A, B, C
The forward direction of phase current
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6
Rev_DIR_A, B, C
The reverse direction of phase current
7
Forward_DIR_AB, BC, CA
The forward direction of phase-to-phase current
8
Rev_DIR_AB, BC, CA
The reverse direction of phase-to-phase current
3.10.4 Settings
Table 3.10-3 Settings of current direction
No.
Name
Range
Step
Unit
1
RCA_OC
45.00~89.00
0.01
Deg
2
RCA_ROC
45.00~89.00
0.01
Deg
3
RCA_NegOC
45.00~89.00
0.01
Deg
4
Z0_Comp
(0.000~4Unn)/In
0.001
ohm
5
Z2_Comp
(0.000~4Unn)/In
0.001
ohm
Remark
The characteristic angle of directional
phase overcurrent element
The characteristic angle of directional earth
fault element
The characteristic angle of directional
negative-sequence overcurrent element
The
compensated
zero-sequence
impedance
The
compensated
negative-sequence
impedance
3.11 Phase Overcurrent Protection
3.11.1 General Application
When a fault occurs in power system, usually the fault current would be very large and phase
overcurrent protection operates monitoring fault current is then adopted to avoid further damage to
protected equipment. Directional element can be selected to improve the sensitivity and selectivity
of the protection. For application on feeder-transformer circuits, second harmonic can also be
selected to block phase overcurrent protection to avoid the effect of inrush current on the
protection.
3.11.2 Function Description
Phase overcurrent protection has following functions:
1.
Four-stage phase overcurrent protection with independent logic, current and time delay
settings.
2.
All stages can be selected as definite-time or inverse-time characteristic. The inverse-time
characteristic is selectable among IEC and ANSI/IEEE standard inverse-time characteristics,
and a user-defined inverse-time curve is available for stage 1 of phase overcurrent protection.
3.
Direction control element can be selected to control each stage phase overcurrent protection
with three options: no direction, forward direction and reverse direction.
4.
Second harmonic can be selected to block each stage of phase overcurrent protection.
3.11.2.1 Overview
Phase overcurrent protection consists of following three elements:
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1.
Overcurrent element: each stage is independent overcurrent element.
2.
Direction control element: one direction control element shared by all overcurrent elements,
and each overcurrent element can individually select protection direction.
3.
Harmonic blocking element: one harmonic blocking element shared by all overcurrent
elements and each phase overcurrent element can individually enable the output signal from
harmonic element as a blocking input.
3.11.2.2 Overcurrent Element
The operation criterion for each stage of overcurrent element is:
Ip> [50/51Px.I_Set]
Equation 3.11-1
Where:
Ip is measured phase current.
[50/51Px.I_Set] is the current setting of stage x (x=1, 2, 3, or 4) of overcurrent element.
3.11.2.3 Direction Control Element
Please refer to section 3.10 for details.
3.11.2.4 Harmonic Blocking Element
When phase overcurrent protection is used to protect feeder transformer circuits harmonic
blocking function can be selected for each stage of phase overcurrent element by configuring logic
setting [50/51Px.En_Hm2] (x=1, 2, 3 or 4) to prevent maloperation due to inrush current.
When the percentage of second harmonic component to fundamental component of any phase
current is greater than the setting [50/51P.K_Hm2], harmonic blocking element operates to block
stage x overcurrent element if corresponding logic setting [50/51Px.En_Hm2] enabled.
Operation criterion:
Equation 3.11-2
Where:
is second harmonic of phase current
is fundamental component of phase current.
[50/51P.K_Hm2] is harmonic blocking coefficient.
If fundamental component of any phase current is lower than the minimum operating current
(0.1In), then harmonic calculation is not carried out and harmonic blocking element does not
operate.
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3.11.2.5 Characteristic Curve
All stages can be selected as definite-time or inverse-time characteristic, inverse-time operating
characteristic is as follows.
Where:
Iset is current setting [50/51Px.I_Set].
Tp is time multiplier setting [50/51Px.TMS].
α is a constant.
K is a constant.
C is a constant.
I is measured phase current from line CT
The user can select the operating characteristic from various inverse-time characteristic curves by
setting [50/51Px.Opt_Curve], and parameters of available characteristics for selection are shown
in the following table.
Table 3.11-1 Inverse-time curve parameters
50/51Px.Opt_Curve
Time Characteristic
α
K
C
0
Definite time
1
IEC Normal inverse
0.14
0.02
0
2
IEC Very inverse
13.5
1.0
0
3
IEC Extremely inverse
80.0
2.0
0
4
IEC Short-time inverse
0.05
0.04
0
5
IEC Long-time inverse
120.0
1.0
0
6
ANSI Extremely inverse
28.2
2.0
0.1217
7
ANSI Very inverse
19.61
2.0
0.491
8
ANSI Inverse
0.0086
0.02
0.0185
9
ANSI Moderately inverse
0.0515
0.02
0.114
10
ANSI Long-time extremely inverse
64.07
2.0
0.25
11
ANSI Long-time very inverse
28.55
2.0
0.712
12
ANSI Long-time inverse
0.086
0.02
0.185
13
Programmable user-defined
If all available curves do not comply with user application, user may set [50/51Px.Opt_Curve] as
“13” to customize the inverse-time curve characteristic with constants α, K and C. (only stage 1)
When inverse-time characteristic is selected, if calculated operating time is less than setting
[50/51Px.tmin], then the operating time of the protection changes to the value of setting
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[50/51Px.tmin] automatically.
Define-time or inverse-time phase overcurrent protection drops off instantaneously after fault
current disappears.
3.11.3 Function Block Diagram
50/51Px
50/51Px.En1
50/51Px.StA
50/51Px.En2
50/51Px.StB
50/51Px.Blk
50/51Px.StC
50/51Px.St
50/51Px.Op
3.11.4 I/O Signals
Table 3.11-2 I/O signals of phase overcurrent protection
No.
Input Signal
Description
Stage x of phase overcurrent protection enabling input 1, it is triggered from binary
1
50/51Px.En1
2
50/51Px.En2
3
50/51Px.Blk
4
I3P
Three-phase current input
5
U3P
Three-phase voltage input
No.
input or programmable logic etc.
Stage x of phase overcurrent protection enabling input 2, it is triggered from binary
input or programmable logic etc.
Stage x of phase overcurrent protection blocking input, it is triggered from binary
input or programmable logic etc.
Output Signal
Description
1
50/51Px.Op
Stage x of phase overcurrent protection operates.
2
50/51Px.St
Stage x of phase overcurrent protection starts.
3
50/51Px.StA
Stage x of phase overcurrent protection starts (A-Phase).
4
50/51Px.StB
Stage x of phase overcurrent protection starts (B-Phase).
5
50/51Px.StC
Stage x of phase overcurrent protection starts (C-Phase).
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3.11.5 Logic
SET
Ia>[50/51Px.I_Set]
SET
Ib>[50/51Px.I_Set]
SET
Ic>[50/51Px.I_Set]
EN
[50/51Px.En]
SIG
[50/51Px.En1]
SIG
[50/51Px.En2]
SIG
[50/51Px.Blk]
SET
[50/51Px.Opt_Dir]=1
SIG
Forward DIR
SET
[50/51Px.Opt_Dir]=2
SIG
Reverse DIR
SET
[50/51Px.Opt_Dir]=0
SIG
I3P
SET
[50/51Px.En_Hm2]
&
[50/51Px.StA]
&
[50/51Px.StB]
&
&
[50/51Px.StC]
&
&
>=1
[50/51Px.St]
&
Timer
t
>=1
2nd Hm Detect
[50/51Px.Op]
t
&
Figure 3.11-1 Logic diagram of phase overcurrent protection
Where:
x=1, 2, 3, 4
3.11.6 Settings
Table 3.11-3 Settings of phase overcurrent protection
No.
Name
Range
Step
Unit
Remark
Setting
1
50/51P.k_Hm2
0.000~1.000
0.001
of
component
second
for
harmonic
blocking
phase
overcurrent elements
2
50/51P1.I_Set
(0.050~30.000)×In
0.001
A
3
50/51P1.t_Op
0.000~20.000
0.001
s
Current setting for stage 1 of phase
overcurrent protection
Time delay for stage 1 of phase
overcurrent protection
Enabling/disabling stage 1 of phase
4
50/51P1.En
overcurrent protection
0 or 1
0: disable
1: enable
Enabling/Disabling
5
50/51P1.En_BlkAR
0 or 1
auto-reclosing
blocked when stage 1 of phase
overcurrent protection operates
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0: disable
1: enable
Direction option for stage 1 of phase
overcurrent protection
6
50/51P1.Opt_Dir
0: no direction
0, 1 or 2
1: forward direction
2: reverse direction
Enabling/disabling second harmonic
blocking
7
50/51P1.En_Hm2
0 or 1
for
stage
1
of
phase
overcurrent protection
0: disable
1: enable
Option of characteristic curve for
8
50/51P1.Opt_Curve
0~13
stage
1
1
of
phase
overcurrent
protection
Time multiplier setting for stage 1 of
9
50/51P1.TMS
0.010~200.000
0.001
inverse-time
phase
overcurrent
protection
Minimum operating time for stage 1 of
10
50/51P1.tmin
0.000~20.000
0.001
s
inverse-time
phase
overcurrent
protection
Constant
11
50/51P1.Alpha
0.010~5.000
“α”
for
customized
0.001
stage
1
of
inverse-time
characteristic
phase
overcurrent
protection
Constant
12
50/51P1.C
0.000~20.000
“C”
for
customized
0.001
stage
1
of
inverse-time
characteristic
phase
overcurrent
protection
Constant
13
50/51P1.K
0.050~20.000
“K”
for
customized
0.001
characteristic
stage
1
of
inverse-time
phase
overcurrent
protection
14
50/51P2.I_Set
(0.050~30.000)×In
0.001
A
15
50/51P2.t_Op
0.000~20.000
0.001
s
Current setting for stage 2 of phase
overcurrent protection
Time delay for stage 2 of phase
overcurrent protection
Enabling/disabling stage 2 of phase
16
50/51P2.En
overcurrent protection
0 or 1
0: disable
1: enable
Enabling/Disabling
17
50/51P2.En_BlkAR
0 or 1
auto-reclosing
blocked when stage 2 of phase
overcurrent protection operates
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0: disable
1: enable
Direction option for stage 2 of phase
overcurrent protection
18
50/51P2.Opt_Dir
0: no direction
0, 1 or 2
1: forward direction
2: reverse direction
Enabling/disabling second harmonic
blocking
19
50/51P2.En_Hm2
0 or 1
for
stage
2
of
phase
overcurrent protection
0: disable
1: enable
Option of characteristic curve for
20
50/51P2.Opt_Curve
stage
0~12
2
of
phase
overcurrent
protection
Time multiplier setting for stage 2 of
21
50/51P2.TMS
0.010~200.000
0.001
inverse-time
phase
overcurrent
protection.
Minimum operating time for stage 2 of
22
50/51P2.tmin
0.000~20.000
0.001
s
inverse-time
phase
overcurrent
protection
23
50/51P3.I_Set
(0.050~30.000)×In
0.001
A
24
50/51P3.t_Op
0.000~20.000
0.001
s
Current setting for stage 3 of phase
overcurrent protection
Time delay for stage 3 of phase
overcurrent protection
Enabling/disabling stage 3 of phase
25
50/51P3.En
overcurrent protection
0 or 1
0: disable
1: enable
Enabling/Disabling
auto-reclosing
blocked when stage 3 of phase
26
50/51P3.En_BlkAR
0 or 1
overcurrent protection operates
0: disable
1: enable
Direction option for stage 3 of phase
overcurrent protection
27
50/51P3.Opt_Dir
0: no direction
0, 1 or 2
1: forward direction
2: reverse direction
Enabling/disabling second harmonic
blocking
28
50/51P3.En_Hm2
0 or 1
for
stage
3
of
phase
overcurrent protection
0: disable
1: enable
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Option of characteristic curve for
29
50/51P3.Opt_Curve
0~12
stage
3
of
phase
overcurrent
protection
Time multiplier setting for stage 3 of
30
50/51P3.TMS
0.010~200.000
inverse-time
0.001
phase
overcurrent
protection.
Minimum operating time for stage 3 of
31
50/51P3.tmin
0.000~20.000
0.001
s
inverse-time
phase
overcurrent
protection
32
50/51P4.I_Set
(0.050~30.000)×In
0.001
A
33
50/51P4.t_Op
0.000~20.000
0.001
s
Current setting for stage 4 of phase
overcurrent protection
Time delay for stage 4 of phase
overcurrent protection
Enabling/disabling stage 4 of phase
34
50/51P4.En
overcurrent protection
0 or 1
0: disable
1: enable
Enabling/Disabling
auto-reclosing
blocked when stage 4 of phase
35
50/51P4.En_BlkAR
0 or 1
overcurrent protection operates
0: disable
1: enable
Direction option for stage 4 of phase
overcurrent protection
36
50/51P4.Opt_Dir
0: no direction
0, 1 or 2
1: forward direction
2: reverse direction
Enabling/disabling second harmonic
blocking
37
50/51P4.En_Hm2
0 or 1
for
stage
4
of
phase
overcurrent protection
0: disable
1: enable
Option of characteristic curve for
38
50/51P4.Opt_Curve
0~12
stage
4
of
phase
overcurrent
protection
Time multiplier setting for stage 4 of
39
50/51P4.TMS
0.010~200.000
inverse-time
0.001
phase
overcurrent
protection.
Minimum operating time for stage 4 of
40
50/51P4.tmin
0.010~20.000
0.001
s
inverse-time
phase
overcurrent
protection
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3.12 Earth Fault Protection
3.12.1 General Application
During normal operation of power system, there is trace residual current, whereas a fault current
flows to earth will result in greater residual current. Therefore, residual current is adopted for the
calculation of earth fault protection.
In order to improve the selectivity of earth fault protection in power grid with multiple power
sources, directional element can be selected to control earth fault protection. For application on
line-transformer unit, second harmonic also can be selected to block earth fault protection to avoid
the effect of sympathetic current on the protection.
3.12.2 Function Description
Earth fault protection has following functions:
1.
Four-stage earth fault protection with independent logic, current and time delay settings.
2.
All stages can be selected as definite-time or inverse-time characteristic. The inverse-time
characteristic is selectable, among IEC and ANSI/IEEE standard inverse-time characteristics,
and a user-defined inverse-time curve is available for stage 1 of earth fault protection.
3.
Directional element can be selected to control each stage of earth fault protection with three
options: no direction, forward direction and reverse direction.
4.
Second harmonic can be selected to block each stage of earth fault protection.
3.12.2.1 Overview
Earth fault protection consists of following three elements:
1.
Overcurrent element: each stage equipped with one independent overcurrent element.
2.
Directional control element: one direction control element shared by all overcurrent elements,
and each overcurrent element can individually select protection direction.
3.
Harmonic blocking element: one harmonic blocking element shared by all overcurrent
elements and each overcurrent element can individually enable the output signal of harmonic
blocking element as a blocking input.
3.12.2.2 Directional Earth-fault Element
The operation criterion for each stage of earth fault protection is:
3I0>[50/51Gx.3I0_Set]
Equation 3.12-1
Where:
3I0 is the calculated residual current.
[50/51Gx.3I0_Set] is the current setting of stage x (x=1, 2, 3, or 4) of earth fault protection.
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3.12.2.3 Direction Control Element
Please refer to section 3.10 for details.
3.12.2.4 Harmonic Blocking Element
In order to prevent effects of inrush current on earth fault protection, harmonic blocking function
can be selected for each stage of earth fault element by configuring logic setting
[50/51Gx.En_Hm2] (x=1, 2, 3 or 4).
When the percentage of second harmonic component to fundamental component of residual
current is greater than the setting [50/51G.K_Hm2], harmonic blocking element operates to block
stage x of earth fault protection if corresponding logic setting [50/51Gx.En_Hm2] is enabled
Operation criterion:
Equation 3.12-2
Where:
is second harmonic of residual current
is fundamental component of residual current.
[50/51G.K_Hm2] is harmonic blocking coefficient.
If fundamental component of residual current is lower than the minimum operating current (0.1In)
then harmonic calculation is not carried out and harmonic blocking element does not operate.
3.12.2.5 Characteristic Curve
All 4 stages earth fault protection can be selected as definite-time or inverse-time characteristic,
and inverse-time operating time curve is as follows.
Equation 3.12-3
Where:
Iset
is residual current setting [50/51Gx.3I0_Set].
Tp is time multiplier setting [50/51Gx.TMS].
K is a constant
C is a constant.
α is a constant.
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3I0 is the calculated residual current.
The user can select the operating characteristic from various inverse-time characteristic curves by
setting [50/51Gx.Opt_Curve], and parameters of available characteristics for selection are shown
in the following table.
Table 3.12-1 Inverse-time curve parameters
50/51Gx.Opt_Curve
Time Characteristic
K
α
C
0
Definite time
1
IEC Normal inverse
0.14
0.02
0
2
IEC Very inverse
13.5
1.0
0
3
IEC Extremely inverse
80.0
2.0
0
4
IEC Short-time inverse
0.05
0.04
0
5
IEC Long-time inverse
120.0
1.0
0
6
ANSI Extremely inverse
28.2
2.0
0.1217
7
ANSI Very inverse
19.61
2.0
0.491
8
ANSI Inverse
0.0086
0.02
0.0185
9
ANSI Moderately inverse
0.0515
0.02
0.114
10
ANSI Long-time extremely inverse
64.07
2.0
0.25
11
ANSI Long-time very inverse
28.55
2.0
0.712
12
ANSI Long-time inverse
0.086
0.02
0.185
13
Programmable User-defined
If all available curves do not comply with user application, user may set [50/51Gx.Opt_Curve] as
“13” to customize the inverse-time curve characteristic, and constants K, α and C with
configuration tool software. (only stage 1)
When inverse-time characteristic is selected, if calculated operating time is less than setting
[50/51Gx.tmin], then the operating time of the protection changes to the value of setting
[50/51Gx.tmin] automatically.
Define-time or inverse-time directional earth-fault protection drops off instantaneously after fault
current disappears.
3.12.3 Function Block Diagram
50/51Gx
50/51Gx.En1
50/51Gx.St
50/51Gx.En2
50/51Gx.Op
50/51Gx.Blk
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3.12.4 I/O Signals
Table 3.12-2 I/O signals of earth fault protection
No.
Input Signal
Description
Stage x of earth fault protection enabling input 1, it is triggered from binary input or
1
50/51Gx.En1
2
50/51Gx.En2
3
50/51Gx.Blk
4
I3P
Three-phase current input
5
U3P
Three-phase voltage input
No.
programmable logic etc.
Stage x of earth fault protection enabling input 2, it is triggered from binary input or
programmable logic etc.
Stage x of earth fault protection blocking input, it is triggered from binary input or
programmable logic etc.
Output Signal
Description
1
50/51Gx.Op
Stage x of earth fault protection operates.
2
50/51Gx.St
Stage x of earth fault protection starts.
3.12.5 Logic
EN
[50/51Gx.En]
SIG
[50/51Gx.En1]
SIG
[50/51Gx.En2]
SIG
[50/51Gx.Blk]
SET
3I0>[50/51Gx.3I0_Set]
EN
[50/51Gx.En_Abnor_Blk]
&
>=1
&
&
SIG
&
No abnormal conditions
>=1
>=1
SET
[50/51Gx.Opt_Dir]=1
SIG
Forward DIR
SET
[50/51Gx.Opt_Dir]=2
SIG
Reverse DIR
SET
[50/51Gx.Opt_Dir]=0
SIG
CTS.Alm
EN
[50/51Gx.En_CTS_Blk]
SIG
I3P
SET
[50/51Gx.En_Hm2]
[50/51Gx.St]
Timer
t
[50/51Gx.Op]
t
&
&
>=1
&
2nd Hm Detect
&
Figure 3.12-1 Logic diagram of earth fault protection
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Where:
x=1, 2, 3, 4
Abnormal condition 1: when the system is under pole disagreement condition, for 1-pole AR, earth
fault protection will operate. If the logic setting [50/51Gx.En_Abnor_Blk] is set as “1”, the stage x of
earth fault protection will be blocked. If the logic setting [50/51Gx.En_Abnor_Blk] is set as “0”,
earth fault protection is not controlled by direction element.
Abnormal condition 2: When manually closing circuit breaker, three phases of the circuit breaker
maybe not operate simultaneously, and SOTF protection should operate. If the logic setting
[50/51Gx.En_Abnor_Blk] is set as “1”, the stage x of earth fault protection will be blocked. If the
logic setting [50/51Gx.En_Abnor_Blk] is set as “0”, earth fault protection is not controlled by
direction element.
Abnormal condition 3: VT circuit failure. If the logic setting [50/51Gx.En_Abnor_Blk] is set as “1”,
the stage x of earth fault protection will be blocked. If the logic setting [50/51Gx.En_Abnor_Blk] is
set as “0”, earth fault protection is not controlled by direction element.
3.12.6 Settings
Table 3.12-3 Settings of earth fault protection
No.
Name
Range
Step
Unit
Remark
Setting
1
50/51G.K_Hm2
0.000~1.000
of
second
harmonic
component for blocking earth
0.001
fault elements
2
50/51G1.3I0_Set
(0.050~30.000)×In
0.001
A
3
50/51G1.t_Op
0.000~20.000
0.001
s
Current setting for stage 1 of
earth fault protection
Time delay for stage 1 of earth
fault protection
Enabling/disabling stage 1 of
4
50/51G1.En
earth fault protection
0 or 1
0: disable
1: enable
Enabling/Disabling auto-reclosing
blocked when stage 1 of earth
5
50/51G1.En_BlkAR
0 or 1
fault protection operates
0: disable
1: enable
Direction option for stage 1 of
earth fault protection
6
50/51G1.Opt_Dir
0: no direction
0, 1 or 2
1: forward direction
2: reverse direction
7
50/51G1.En_Hm2
Enabling/disabling
0 or 1
second
harmonic blocking for stage 1 of
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earth fault protection
0: disable
1: enable
Enabling/disabling blocking for
stage 1 of earth fault protection
8
50/51G1.En_Abnor_Blk
under abnormal conditions
0 or 1
0: disable
1: enable
Enabling/disabling blocking for
stage 1 of earth fault protection
9
50/51G1.En_CTS_Blk
0 or 1
under CT failure conditions
0: disable
1: enable
10
50/51G1.Opt_Curve
0~13
Option of characteristic curve for
1
stage 1 of earth fault protection
Time multiplier setting for stage 1
11
50/51G1.TMS
0.010~200.000
0.001
of
inverse-time
earth
fault
protection
Minimum operating time for stage
12
50/51G1.tmin
0.050~20.000
0.001
s
1 of inverse-time earth fault
protection
Constant “α” for stage 1 of
13
50/51G1.Alpha
0.010~5.000
customized
0.001
characteristic
inverse-time
earth
fault
protection
Constant “C” for stage 1 of
14
50/51G1.C
0.000~20.000
customized
0.001
characteristic
inverse-time
earth
fault
protection
Constant “K” for stage 1 of
15
50/51G1.K
0.050~20.000
customized
0.001
characteristic
inverse-time
earth
fault
protection
16
50/51G2.3I0_Set
(0.050~30.000)×In
0.001
A
17
50/51G2.t_Op
0.000~20.000
0.001
s
Current setting for stage 2 of
earth fault protection
Time delay for stage 2 of earth
fault protection
Enabling/disabling stage 2 of
18
50/51G2.En
earth fault protection
0 or 1
0: disable
1: enable
Enabling/Disabling auto-reclosing
19
50/51G2.En_BlkAR
0 or 1
blocked when stage 2 of earth
fault protection operates
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0: disable
1: enable
Direction option for stage 2 of
earth fault protection
20
50/51G2.Opt_Dir
0: no direction
0, 1 or 2
1: forward direction
2: reverse direction
Enabling/disabling
second
harmonic blocking for stage 2 of
21
50/51G2.En_Hm2
0 or 1
earth fault protection
0: disable
1: enable
Enabling/disabling blocking for
stage 2 of earth fault protection
22
50/51G2.En_Abnor_Blk
0 or 1
under abnormal conditions
0: disable
1: enable
Enabling/disabling blocking for
stage 2 of earth fault protection
23
50/51G2.En_CTS_Blk
0 or 1
under CT failure conditions
0: disable
1: enable
24
50/51G2.Opt_Curve
Option of characteristic curve for
0~12
stage 2 of earth fault protection
Time multiplier setting for stage 2
25
50/51G2.TMS
0.010~200.000
0.001
of
inverse-time
earth
fault
protection
Minimum operating time for stage
26
50/51G2.tmin
0.050~20.000
0.001
s
2 of inverse-time earth fault
protection
27
50/51G3.3I0_Set
(0.050~30.000)×In
0.001
A
28
50/51G3.t_Op
0.000~20.000
0.001
s
Current setting for stage 3 of
earth fault protection
Time delay for stage 3 of earth
fault protection
Enabling/disabling stage 3 of
29
50/51G3.En
earth fault protection
0, 1 or 2
0: disable
1: enable
Enabling/Disabling auto-reclosing
blocked when stage 3 of earth
30
50/51G3.En_BlkAR
0 or 1
fault protection operates
0: disable
1: enable
31
50/51G3.Opt_Dir
0 or 1
Direction option for stage 3 of
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earth fault protection
0: no direction
1: forward direction
2: reverse direction
Enabling/disabling
second
harmonic blocking for stage 3 of
32
50/51G3.En_Hm2
0 or 1
earth fault protection
0: disable
1: enable
Enabling/disabling blocking for
stage 3 of earth fault protection
33
50/51G3.En_Abnor_Blk
0 or 1
under abnormal conditions
0: disable
1: enable
Enabling/disabling blocking for
stage 3 of earth fault protection
34
50/51G3.En_CTS_Blk
0 or 1
under CT failure conditions
0: disable
1: enable
35
50/51G3.Opt_Curve
Option of characteristic curve for
0~12
stage 3 of earth fault protection
Time multiplier setting for stage 3
36
50/51G3.TMS
0.010~200.000
0.001
of
inverse-time
earth
fault
protection
Minimum operating time for stage
37
50/51G3.tmin
0.050~20.000
0.001
s
3 of inverse-time earth fault
protection
38
50/51G4.3I0_Set
(0.050~30.000)×In
0.001
A
39
50/51G4.t_Op
0.000~20.000
0.001
s
Current setting for stage 4 of
earth fault protection
Time delay for stage 4 of earth
fault protection
Enabling/disabling stage 4 of
40
50/51G4.En
earth fault protection
0, 1 or 2
0: disable
1: enable
Enabling/Disabling auto-reclosing
blocked when stage 4 of earth
41
50/51G4.En_BlkAR
fault protection operates
0 or 1
0: disable
1: enable
Direction option for stage 4 of
42
50/51G4.Opt_Dir
earth fault protection
0 or 1
0: no direction
1: forward direction
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2: reverse direction
Enabling/disabling
second
harmonic blocking for stage 4 of
43
50/51G4.En_Hm2
0 or 1
earth fault protection
0: disable
1: enable
Enabling/disabling blocking for
stage 4 of earth fault protection
44
50/51G4.En_Abnor_Blk
0 or 1
under abnormal conditions
0: disable
1: enable
Enabling/disabling blocking for
stage 4 of earth fault protection
45
50/51G4.En_CTS_Blk
0 or 1
under CT failure conditions
0: disable
1: enable
46
50/51G4.Opt_Curve
Option of characteristic curve for
0~12
stage 4 of earth fault protection
Time multiplier setting for stage 4
47
50/51G4.TMS
0.010~200.000
0.001
of
inverse-time
earth
fault
protection
Minimum operating time for stage
48
50/51G4.tmin
0.050~20.000
0.001
s
4 of inverse-time earth fault
protection
3.13 Overcurrent Protection for VT Circuit Failure
3.13.1 General Application
When protection VT circuit fails, distance protection will be disabled. As a substitute, definite-time
phase overcurrent protection and ground overcurrent protection will be enabled automatically, if
selected, as backup protection of distance protection.
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3.13.2 Function Block Diagram
51PVT/51GVT
51PVT.En1
51PVT.Op
51PVT.En2
51PVT.St
51PVT.Blk
51PVT.StA
51GVT.En1
51PVT.StB
51GVT.En2
51PVT.StC
51GVT.Blk
51GVT.Op
51GVT.St
3.13.3 I/O Signals
Table 3.13-1 I/O signals of overcurrent protection for VT circuit failure
No.
Input Signal
1
51PVT.En1
2
51PVT.En2
3
51PVT.Blk
4
51GVT.En1
5
51GVT.En2
6
51GVT.Blk
No.
Description
Phase overcurrent protection for VT circuit failure enabling input 1, it is triggered
from binary input or programmable logic etc.
Phase overcurrent protection for VT circuit failure enabling input 2, it is triggered
from binary input or programmable logic etc.
Phase overcurrent protection for VT circuit failure blocking input, it is triggered
from binary input or programmable logic etc.
Ground overcurrent protection for VT circuit failure enabling input 1, it is triggered
from binary input or programmable logic etc.
Ground overcurrent protection for VT circuit failure enabling input 2, it is triggered
from binary input or programmable logic etc.
Ground overcurrent protection for VT circuit failure blocking input, it is triggered
from binary input or programmable logic etc.
Output Signal
Description
1
51PVT.Op
Phase overcurrent protection for VT circuit failure operates.
2
51PVT.St
Phase overcurrent protection for VT circuit failure starts.
3
51PVT.StA
Phase overcurrent protection for VT circuit failure starts (A-Phase).
4
51PVT.StB
Phase overcurrent protection for VT circuit failure starts (B-Phase).
5
51PVT.StC
Phase overcurrent protection for VT circuit failure starts (C-Phase).
6
51GVT.Op
Ground overcurrent protection for VT circuit failure operates.
7
51GVT.St
Ground overcurrent protection for VT circuit failure starts.
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3.13.4 Logic
SET
3I0>[51GVT.3I0_Set]
51GVT.St
&
EN
[51GVT.En]
SIG
FD.ROC.Pkp
[51GVT.t_Op]
0ms
51GVT.Op
&
>=1
[51PVT.t_Op]
SIG
VTS.Alm
EN
[51PVT.En]
SET
0ms
51PVT.Op
51PVT.St
&
&
51PVT.StA
Ia>[51PVT.I_Set]
&
51PVT.StB
SET
Ib>[51PVT.I_Set]
&
51PVT.StC
SET
Ic>[51PVT.I_Set]
Figure 3.13-1 Logic diagram of overcurrent protection for VT circuit failure
3.13.5 Settings
Table 3.13-2 Settings of overcurrent protection for VT circuit failure
No.
Name
Range
Step
Unit
1
51GVT.3I0_Set
(0.050~30.000)×In
0.001
A
2
51GVT.t_Op
0.000~10.000
0.001
s
Remark
Current setting of ground overcurrent
protection when VT circuit failure
Time delay of ground overcurrent
protection when VT circuit failure
Enabling/disabling
ground
overcurrent protection when VT circuit
3
51GVT.En
0 or 1
failure
0: disable
1: enable
4
51PVT.I_Set
(0.050~30.000)×In
0.001
A
5
51PVT.t_Op
0.000~10.000
0.001
s
Current setting of phase overcurrent
protection when VT circuit failure
Time delay of phase overcurrent
protection when VT circuit failure
Enabling/disabling phase overcurrent
6
51PVT.En
protection when VT circuit failure
0 or 1
0: disable
1: enable
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3.14 Residual Current SOTF Protection
3.14.1 General Application
When the circuit breaker is closed manually or automatically, it is possible to switch on to an
existing fault. This is especially critical if the line in the remote station is grounded, since earth fault
protection would not clear the fault until their time delays had elapsed. In this situation, however,
the fastest possible clearance is desired.
Residual current SOTF (switch onto fault) protection is a complementary function to earth fault
protection. With residual current SOTF protection, a fast trip is achieved for a fault on the line,
when the line is being energized. It shall be responsive to all types of earth faults anywhere within
the protected line, and it shall be enabled for a period of 400ms when the circuit is energized either
manually or via an auto-reclosing system.
3.14.2 Function Description
Residual current SOTF protection will operate to trip three-phase circuit breaker with a time delay
of 60ms when 1-pole auto-reclosing.
Residual current SOTF protection will operate to trip three-phase circuit breaker with a time delay of
100ms when 3-pole auto-reclosing or closing manually.
3.14.3 Function Block Diagram
50GSOTF
50GSOTF.En1
50GSOTF.Op
50GSOTF.En2
50GSOTF.St
50GSOTF.Blk
3.14.4 I/O Signals
Table 3.14-1 I/O signals of residual SOTF protection
No.
Input Signal
1
50GSOTF.En1
2
50GSOTF.En2
3
50GSOTF.Blk
No.
Description
Residual current SOTF protection enabling input 1, it is triggered from binary input
or programmable logic etc.
Residual current SOTF protection enabling input 2, it is triggered from binary input
or programmable logic etc.
Residual current SOTF protection blocking input, it is triggered from binary input
or programmable logic etc.
Output Signal
Description
1
50GSOTF.Op
Residual current SOTF protection operates.
2
50GSOTF.St
Residual current SOTF protection starts.
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3.14.5 Logic
SIG
3-pole AR signal
SIG
Manual closing signal
SET
3I0>[50GSOTF.3I0_Set]
SIG
50GSOTF.En1
>=1
&
SIG
100ms
&
50GSOTF.Blk
EN
[50GSOTF.En_3I0]
SIG
FD.ROC.Pkp
SIG
1-pole AR signal
>=1
50GSOTF.Op
&
&
50GSOTF.En2
SIG
0ms
60ms
0ms
&
>=1
50GSOTF.St
Figure 3.14-1 Logic diagram of residual current SOTF protection
3.14.6 Settings
Table 3.14-2 Settings of residual current SOTF protection
No.
Name
Range
Step
Unit
1
50GSOTF.3I0_Set
(0.050~30.000)×In
0.001
A
Remark
Current setting of residual current
SOTF protection
Enabling/disabling residual current
2
50GSOTF.En_3I0
SOTF protection
0 or 1
0: disable
1: enable
3.15 Voltage Protection
Voltage protection has the function of protecting device against undervoltage and overvoltage.
Both operational states are unfavorable as overvoltage may cause insulation breakdown while
undervoltage may cause stability problem. Each voltage protection function has two individual
stages with respective time delay. These voltage protection functions can be switched on or off
separately. Selectable definite-time characteristic and multiple inverse-time characteristics are
available.
3.15.1 Overvoltage Protection
3.15.1.1 General Application
Abnormal high voltages often occur e.g. in low loaded, long distance transmission lines, in
islanded systems when generator voltage regulation fails, or load rejection of a generator. Even if
compensation reactors are provided to avoid line overvoltage by compensation of the line
capacitance and thus reduction of the overvoltage, the overvoltage will endanger the insulation if
the reactors fail. The line must be de-energized within a very short time.
The overvoltage protection in this device detects the phase voltages Ua, Ub and Uc or the
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phase-to-phase voltages Uab, Ubc and Uca with an option of any phase or all phases operation
for output. The overvoltage protection can be used for tripping purpose as well as to initiate
transfer trip, which selectable controlled by local circuit breaker.
3.15.1.2 Function Description
Phase overvoltage protection has following functions:
1.
Two-stage phase overvoltage protection with independent logic, voltage and time delay
settings.
2.
Stage 1 and stage 2 can be selected as definite-time or inverse-time characteristic. The
inverse-time characteristic is selectable, among IEC and ANSI/IEEE standard inverse-time
characteristics.
3.
Phase voltage or phase-to-phase voltage can be selected for protection calculation.
4.
“1-out-of-3” or “3-out-of-3” logic can be selected for protection criterion. (1-out-of-3 means any
of three phase voltages, 3-out-of-3 means all three phase voltages)
1.
Operation Criterion
Users can select phase voltage or phase-to-phase voltage for the protection calculation. If setting
[59Px.Opt_Up/Upp] is set to “0”, phase voltage criterion is selected and if [59Px.Opt_Up/Upp] is
set to “1”, phase-to-phase voltage criterion is selected.
When phase voltage or phase-to-phase voltage is greater than any enabled stage voltage setting,
the stage protection picks up and operates after delay, which will drop off instantaneously when
fault voltage disappears.

Phase voltage criterion
Two operation criteria of definite-time overvoltage protection are shown as follows, which of them
is applied depending on the logic setting [59Px.Opt_1P/3P].
UΦ_max>[ 59Px.U_Set]
Equation 3.15-1
or
Ua>[59Px.U_Set] & Ub>[59Px.U_Set] & Uc>[59Px.U_Set]
Equation 3.15-2
Where:
UΦ_max is the maximum value among three phase-voltage.
Ua, Ub, Uc are three phase voltages.
[59Px.U_Set] is the setting of stage x (x=1 or 2) overvoltage protection.
When [59Px.Opt_1P/3P] is set as “0”, “1-out-of-3” logic (Equation 3.15-1) is selected as operation
criterion, and when set as “1”, “3-out-of-3” logic (Equation 3.15-2) is selected.
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
Phase-to-phase voltage criterion
Two operation criteria of definite-time overvoltage protection are shown as follows, which of them
is applied depending on the logic setting [59Px.Opt_1P/3P].
UΦΦ_max>[ 59Px.U_Set]
Equation 3.15-3
or
Uab>[59Px.U_Set] & Ubc>[59Px.U_Set] & Uca>[59Px.U_Set]
Equation 3.15-4
[59Px.U_Set] is the setting of stage x (x =1 or 2) overvoltage protection.
When [59Px.Opt_1P/3P] is set as “0”, “1-out-of-3” logic (Equation 3.15-3) is selected as operation
criterion, and when set as “1”, “3-out-of-3” logic (Equation 3.15-4) is selected.
2.
Characteristic Curve
Phase overvoltage protection stage 1 and stage 2 can be selected as definite-time or inverse-time
characteristic, and inverse-time operating time curve is as follows.
Where:
Uset is the voltage setting [59Px.U_Set] (x=1 or 2).
Tp is time multiplier setting [59Px.Opt_TMS].
K is a constant.
C is a constant.
α is a constant.
U is the measured voltage
For stage 1 and stage 2 of overvoltage protection, operating characteristic can be chosen from
definite-time characteristic and 12 inverse-time characteristics by setting the logic setting
[59Px.Opt_Curve] (x=1~12). The parameters of each characteristic are listed in the following table.
Table 3.15-1 Inverse-time curve parameters
59Px.Opt_Curve
Time Characteristic
K
α
C
0
Definite time
1
IEC Normal inverse
0.14
0.02
0
2
IEC Very inverse
13.5
1.0
0
3
IEC Extremely inverse
80.0
2.0
0
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59Px.Opt_Curve
Time Characteristic
K
α
C
4
IEC Short-time inverse
0.05
0.04
0
5
IEC Long-time inverse
120.0
1.0
0
6
ANSI Extremely inverse
28.2
2.0
0.1217
7
ANSI Very inverse
19.61
2.0
0.491
8
ANSI Inverse
0.0086
0.02
0.0185
9
ANSI Moderately inverse
0.0515
0.02
0.114
10
ANSI Long-time extremely inverse
64.07
2.0
0.25
11
ANSI Long-time very inverse
28.55
2.0
0.712
12
ANSI Long-time inverse
0.086
0.02
0.185
When inverse-time characteristic is selected, if calculated operating time is less than setting
[59Px.tmin], then the operating time changes to the value of setting [59Px.tmin] automatically.
Define-time or inverse-time phase overvoltage protection drops off instantaneously when
measured voltage is lower than reset voltage.
3.15.1.3 Function Block Diagram
59Px
59Px.En1
59Px.St
59Px.En2
59Px.St1
59Px.Blk
59Px.St2
59Px.St3
59Px.Op
59Px.Alm
59Px.Op_InitTT
3.15.1.4 I/O Signals
Table 3.15-2 I/O signals of overvoltage protection
No.
Input Signal
1
59Px.En1
2
59Px.En2
3
59Px.Blk
Description
Stage x of overvoltage protection enabling input 1, it is triggered from binary input
or programmable logic etc.
Stage x of overvoltage protection enabling input 2, it is triggered from binary input
or programmable logic etc.
Stage x of overvoltage protection blocking input, it is triggered from binary input or
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programmable logic etc.
4
U3P
No.
Three-phase voltage input
Output Signal
Description
1
59Px.Op
Stage x of overvoltage protection operates.
2
59Px.St
Stage x of overvoltage protection starts.
3
59Px.St1
Stage x of overvoltage protection starts (A or AB).
4
59Px.St2
Stage x of overvoltage protection starts (B or BC).
5
59Px.St3
Stage x of overvoltage protection starts (C or CA).
6
59Px.Op_InitTT
Stage x of overvoltage protection operates to initiate transfer trip.
7
59Px.Alm
Stage x of overvoltage protection alarms.
3.15.1.5 Logic
EN
[59Px.En]
SIG
59Px.En1
SIG
59Px.En2
SIG
59Px.Blk
&
EN
[59Px.En_Alm]
SIG
Enable 59Px
EN
[59Px.Opt_Up/Upp]
Enable 59Px
>=1
59Px.St
&
&
>=1
SET
Timer
t
t
UA>[59Px.U_Set]
&
&
&
SET
UAB>[59Px.U_Set]
59Px.Alm
&
&
&
>=1
SET
&
>=1
59Px.Op
Timer
t
t
UB>[59Px.U_Set]
&
&
>=1
59Px.Op_InitTT
SET
UBC>[59Px.U_Set]
>=1
&
&
>=1
SET
UC>[59Px.U_Set]
Timer
t
&
&
t
&
SET
UCA>[59Px.U_Set]
EN
[59Px.Opt_1P/3P]
BI
[52b_PhA]
BI
[52b_PhB]
BI
[52b_PhC]
EN
[59Px.En_52b_TT]
EN
[59Px.En_TT]
59Px.St1
59Px.St2
&
59Px.St3
Figure 3.15-1 Logic diagram of stage x of overvoltage protection
Where:
x=1, 2
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3.15.1.6 Settings
Table 3.15-3 Settings of overvoltage protection
No.
Name
Range
Step
Unit
1
59P1.U_Set
Un~2Unn
0.001
V
2
59P1.t_Op
0.000~30.000
0.001
s
Remark
Voltage setting for stage 1 of overvoltage
protection
Time delay for stage 1 of overvoltage
protection
Enabling/disabling stage 1 of overvoltage
3
59P1.En
protection
0 or 1
0: disable
1: enable
Option of 1-out-of-3 mode or 3-out-of-3
4
59P1.Opt_1P/3P
mode
0 or 1
0: 3-out-of-3 mode
1: 1-out-of-3 mode
Option of phase-to-phase voltage or phase
5
59P1.Opt_Up/Upp
voltage
0 or 1
0: phase voltage
1: phase-to-phase voltage
Enabling/disabling stage 1 of overvoltage
6
59P1.En_Alm
protection for alarm purpose
0 or 1
0: disable
1: enable
Enabling/disabling transfer trip controlled
by CB open position for stage 1 of
7
59P1.En_52b_TT
0 or 1
overvoltage protection
0: disable
1: enable
Enabling/disabling stage 1 of overvoltage
8
59P1.En_TT
protection operate to initiate transfer trip
0 or 1
0: disable
1: enable
Option of characteristic curve for stage 1 of
9
59P1.Opt_Curve
0~13
10
59P1.Opt_TMS
0.010~200.000
0.001
11
59P1.tmin
0.050~20.000
0.001
s
12
59P2.U_Set
Un~2Unn
0.001
V
13
59P2.t_Op
0.000~30.000
0.001
s
14
59P2.En
0 or 1
overvoltage protection
Time multiplier setting for stage 1 of
inverse-time overvoltage protection
Minimum delay for stage 1 of inverse-time
overvoltage protection
Voltage setting for stage 2 of overvoltage
protection
Time delay for stage 2 of overvoltage
protection
Enabling/disabling stage 2 of overvoltage
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protection
0: disable
1: enable
Option of 1-out-of-3 mode or 3-out-of-3
15
59P2.Opt_1P/3P
mode
0 or 1
0: 3-out-of-3 mode
1: 1-out-of-3 mode
Option of phase-to-phase voltage or phase
16
59P2.Opt_Up/Upp
voltage
0 or 1
0: phase voltage
1: phase-to-phase voltage
Enabling/disabling stage 2 of overvoltage
17
59P2.En_Alm
protection for alarm purpose
0 or 1
0: disable
1: enable
Enabling/disabling transfer trip controlled
by CB open position for stage 2 of
18
59P2.En_52b_TT
0 or 1
overvoltage protection
0: disable
1: enable
Enabling/disabling stage 2 of overvoltage
19
59P2.En_TT
protection operate to initiate transfer trip
0 or 1
0: disable
1: enable
Option of characteristic curve for stage 2 of
20
59P2.Opt_Curve
0~12
21
59P2.Opt_TMS
0.010~200.000
0.001
22
59P2.tmin
0.050~20.000
0.001
overvoltage protection
Time multiplier setting for stage 2 of
inverse-time overvoltage protection
s
Minimum delay for stage 2 of inverse-time
overvoltage protection
3.15.2 Undervoltage Protection
3.15.2.1 General Application
The undervoltage protection can be applied to trip when fault occurs in a system. Two stages of
undervoltage protection are available measuring phase voltages UA, UB and UC or phase-to-phase
voltages UAB, UBC and UCA. The protection output can be selected for either any phase or all
phases operation. The undervoltage protection is normally used as decoupling system rather than
load shedding.
3.15.2.2 Function Description
Phase undervoltage protection has following functions:
1.
Two-stage phase undervoltage protection with independent logic, voltage and time delay
settings.
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2.
Stage 1 and stage 2 can be selected as definite-time or inverse-time characteristic. The
inverse-time characteristic is selectable, among IEC and ANSI/IEEE standard inverse-time
characteristics.
3.
Phase voltage or phase-to-phase voltage can be selected for protection calculation.
4.
“1-out-of-3” or “3-out-of-3” logic can be selected for protection criterion. (1-out-of-3 means any
of three phase voltages, 3-out-of-3 means all three phase voltages)
1.
Operation Criterion
Users can select phase voltage or phase-to-phase voltage for the protection calculation. If setting
[27Px.Opt_Up/Upp] is set to “0”, phase voltage criterion is selected and if [27Px.Opt_Up/Upp] is
set to “1”, phase-to-phase voltage criterion is selected.
When phase voltage or phase-to-phase voltage is less than any enabled stage voltage setting, the
stage protection picks up and operates after delay, which will drop off instantaneously when fault
voltage disappears.

Phase voltage criterion
Two operation criteria of definite-time undervoltage protection are shown as follows, which of them
is applied depending on the logic setting [27Px.Opt_1P/3P].
UΦ_min<[ 27Px.U_Set]
Equation 3.15-5
or
Ua<[ 27Px.U_Set] & Ub<[27Px.U_Set] & Uc<[27Px.U_Set]
Equation 3.15-6
Where:
UΦ_min is the minimum value among three phase voltages.
Ua, Ub and Uc are three phase voltages.
[27Px.U_Set] is the setting of stage x (x=1 or 2) undervoltage protection.
When [27Px.Opt_1P/3P] is set as “0”, “1-out-of-3” logic (Equation 3.15-5) is selected as operation
criterion, and when set as “1”, “3-out-of-3” logic (Equation 3.15-6) is selected.

Phase-to-phase voltage criterion
Two operation criteria of definite-time undervoltage protection are shown as follows, which of them
is applied depending on the logic setting [27Px.Opt_Up/Upp].
UΦΦ_min<[ 27Px.U_Set]
Equation 3.15-7
or
Uab<[27Px.U_Set] & Ubc<[27Px.U_Set] & Uca<[27Px.U_Set]
Equation 3.15-8
Where:
UΦΦ_min is the minimum value among three phase-to-phase voltages.
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Uab, Ubc and Uca are three phase-to-phase voltages.
[27Px.U_Set] is the setting of stage x (x =1 or 2) undervoltage protection.
When the setting [27Px.Opt_1P/3P] is set as “0”, “1-out-of-3” logic (Equation 3.15-7) is selected as
operation criterion, and when it is set as “1”, “3-out-of-3” logic (Equation 3.15-8) is selected.
2.
Characteristic Curve
Undervoltage protection stage 1 and stage 2 can be selected as definite-time or inverse-time
characteristic, and inverse-time operating time curve is as follows.
Where:
Uset is the setting [27Px.U_Set] (x=1 or 2).
Tp is time multiplier setting [27Px.Opt_TMS].
K is a constant.
C is a constant.
α is a constant.
U is the measured voltage
For stage 1 and stage 2 of undervoltage protection, operating characteristic can be chosen from
definite-time characteristic and twelve inverse-time characteristics by setting the logic setting
[27Px.Opt_Curve] (x=1~12). The parameters of each characteristic are listed in the following table.
Table 3.15-4 Inverse-time curve parameters of phase undervoltage protection
27Px.Opt_Curve
Time Characteristic
K
α
C
0
Definite time
1
IEC Normal inverse
0.14
0.02
0
2
IEC Very inverse
13.5
1.0
0
3
IEC Extremely inverse
80.0
2.0
0
4
IEC Short-time inverse
0.05
0.04
0
5
IEC Long-time inverse
120.0
1.0
0
6
ANSI Extremely inverse
28.2
2.0
0.1217
7
ANSI Very inverse
19.61
2.0
0.491
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27Px.Opt_Curve
Time Characteristic
α
K
C
8
ANSI Inverse
0.0086
0.02
0.0185
9
ANSI Moderately inverse
0.0515
0.02
0.114
10
ANSI Long-time extremely inverse
64.07
2.0
0.25
11
ANSI Long-time very inverse
28.55
2.0
0.712
12
ANSI Long-time inverse
0.086
0.02
0.185
When inverse-time characteristic is selected, if calculated operating time is less than setting
[27Px.tmin], then the operating time changes to the value of setting [27Px.tmin] automatically.
Define-time or inverse-time phase under voltage protection drops off instantaneously when
measured voltage is higher than reset voltage.
3.15.2.3 Function Block Diagram
27Px
27Px.En1
27Px.Alm
27Px.En2
27Px.Op
27Px.Blk
27Px.St
27Px.St1
27Px.St2
27Px.St3
3.15.2.4 I/O Signals
Table 3.15-5 I/O signals of undervoltage protection
No.
Input Signal
1
27Px.En1
2
27Px.En2
3
27Px.Blk
4
U3P
No.
Description
Stage x of undervoltage protection enabling input 1, it is triggered from binary
input or programmable logic etc.
Stage x of undervoltage protection enabling input 2, it is triggered from binary
input or programmable logic etc.
Stage x of undervoltage protection blocking input, it is triggered from binary input
or programmable logic etc.
Three-phase voltage input
Output Signal
Description
1
27Px.Op
Stage x of undervoltage protection operates.
2
27Px.Alm
Stage x of undervoltage protection alarms.
3
27Px.St
Stage x of undervoltage protection starts.
4
27Px.St1
Stage x of undervoltage protection starts (A or AB).
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5
27Px.St2
Stage x of undervoltage protection starts (B or BC).
6
27Px.St3
Stage x of undervoltage protection starts (C or CA).
3.15.2.5 Logic
When FD element reflecting current operates, including DPFC current element and residual
current element, the undervoltage protection is released for operation.
When any of the following conditions is fulfilled, the undervoltage protection will be blocked.
1.
VT signal fails if the voltage comes from busbar VT, the voltage will restore to the normal
immediately after the fault being cleared away. However, if the voltage comes from line VT,
the voltage will drop to zero immediately after the fault is cleared. The undervoltage protection
will be continuously in operation, thus an auxiliary current criterion is provided to solve it.
(Input 1)
2.
Any phase is out of service, i.e. Up<0.01Un and IP<0.06In. (Input 2)
3.
Binary input of blocking undervoltage is energized, such as normally closed contact of line
disconnector. (Input 3)
4.
Any phase of circuit breaker is open (binary input of normal close contact of breaker is
energized) and the corresponding phase current is smaller than 0.06In. (Input 4)
SIG
Input 1
SIG
Input 2
SIG
Input 3
SIG
Input 4
20ms
100ms
>=1
Block UV
Figure 3.15-2 Blocking logic of undervoltage protection
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EN
[27Px.En]
SIG
27Px.En1
SIG
27Px.En2
SIG
27Px.Blk
&
EN
SIG
Enable 27Px
[27Px.En_Alm]
Enable 27Px
>=1
27Px.St
SIG
Block UV
SET
[27Px.Opt_Up/Upp]
&
Timer
t
&
>=1
SET
&
t
UA<[27Px.U_Set]
&
&
&
SET
UAB<[27Px.U_Set]
27Px.Op
&
Timer
t
&
>=1
SET
t
UB<[27Px.U_Set]
&
27Px.Alm
&
SET
UBC<[27Px.U_Set]
>=1
&
Timer
t
&
>=1
SET
>=1
&
t
UC<[27Px.U_Set]
27Px.St1
&
27Px.St2
SET
UCA<[27Px.U_Set]
SET
[27P1.Opt_1P/3P]
27Px.St3
Figure 3.15-3 Logic diagram of stage x of undervoltage protection
Where:
x=1, 2
3.15.2.6 Settings
Table 3.15-6 Settings of undervoltage protection
No.
Name
Range
Step
Unit
1
27P1.U_Set
0~Unn
0.001
V
2
27P1.t_Op
0.000~30.000
0.001
s
Remark
Voltage setting for stage 1 of undervoltage
protection
Time delay for stage 1 of undervoltage
protection
Enabling/disabling stage 1 of undervoltage
3
27P1.En
protection
0 or 1
0: disable
1: enable
Option of 1-out-of-3 mode or 3-out-of-3
4
27P1.Opt_1P/3P
0 or 1
mode
0: 3-out-of-3 mode
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1: 1-out-of-3 mode
Option
5
27P1.Opt_Up/Upp
of
voltage
criterion
adopting
phase-to-phase voltage or phase voltage
0 or 1
0: phase voltage
1: phase-to-phase voltage
Enabling/disabling stage 1 of undervoltage
6
27P1.En_Alm
protection operate to alarm
0 or 1
0: disable
1: enable
Option of characteristic curve for stage 1
7
27P1.Opt_Curve
0~13
1
8
27P1.Opt_TMS
0.010~200.000
0.001
9
27P1.tmin
0.050~20.000
0.001
s
10
27P2.U_Set
0~Unn
0.001
V
11
27P2.t_Op
0.000~30.000
0.001
s
of undervoltage protection
Time multiplier setting for stage 1 of
inverse-time undervoltage protection
Minimum delay for stage 1 of inverse-time
undervoltage protection
Voltage setting for stage 2 of undervoltage
protection
Time delay for stage 2 of undervoltage
protection
Enabling/disabling stage 2 of undervoltage
12
27P2.En
protection
0 or 1
0: disable
1: enable
Option of 1-out-of-3 mode or 3-out-of-3
13
27P2.Opt_1P/3P
mode
0 or 1
0: 3-out-of-3 mode
1: 1-out-of-3 mode
Option
14
27P2.Opt_Up/Upp
of
voltage
criterion
adopting
phase-to-phase voltage or phase voltage
0 or 1
0: phase voltage
1: phase-to-phase voltage
Enabling/disabling stage 2 of undervoltage
15
27P2.En_Alm
protection operate to alarm
0 or 1
0: disable
1: enable
Option of characteristic curve for stage 2
16
27P2.Opt_Curve
0~12
1
17
27P2.Opt_TMS
0.010~200.000
0.001
18
27P2.tmin
0.050~20.000
0.001
of undervoltage protection
Time multiplier setting for stage 2 of
inverse-time undervoltage protection
s
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3 Operation Theory
3.16 Frequency Protection
3.16.1 General Application
In case of frequency decline due to lack of active power in the power system, underfrequency
protection operates to shed part of the load according to the declined value of frequency to
re-balance the power supply and the load. On the contrary, if the power frequency of regional rises
due to the active power excess demand, overfrequency protection operates to perform generator
rejection to shed part of the generators automatically according to the rising frequency so that
power supply and the load are re-balanced.
3.16.2 Function Description
3.16.2.1 Underfrequency Protection
Underfrequency protection consists of the four stages (stage 1 to stage 4). When system
frequency is smaller than the setting [81U.f_Pkp], underfrequency protection will put into service.
In order to prevent possible maloperation of underfrequency protection in conditions of high
harmonics, voltage circuit failures and so on, such blocking measures are carried out as follows:
1.
Blocking in undervoltage condition
If the positive voltage U<0.15Un, the calculation of protection is not carried out and the output
relay will be blocked.
2.
df/dt blocking element
If －df/dt≥[81U.df/dt_Blk], the calculation of protection is not carried out and the output relay will
be blocked. The blocking element will not be released automatically until the system frequency
recovers to be less than the setting [81U.f_Pkp].
3.
Frequency abnormality condition
When f<40Hz or f>65Hz, underfrequency protection will be blocked
Operation criteria of underfrequency protection is shown in the following equation.
f<[81U.UFx.f_Set]
Equation 3.16-1
Where:
f is system frequency.
[81U.UFx.f_Set] is the frequency settings of stage x (x=1, 2, 3 or 4) of underfrequency protection.
The equation of df/dt blocking function is as follows.
df/dt≥[81U.df/dt_Blk]
Equation 3.16-2
Where:
df/dt is the frequency slip speed and the time step (i.e. dt) for the calucation is equal to 5 cycle.
[81U.df/dt_Blk] is the setting of df/dt blocking underfrequency protection.
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Underfrequency protection can be blocked by the frequency slip speed (df/dt). If the logic setting
[81U.UFx.En_df/dt_Blk] (x=1, 2, 3 or 4) is set as “1”, when Equation 3.16-1 and Equation 3.16-2
are met, it is decided that a fault occurred and the corresponding stage underfrequency protection
is blocked at the same time for the purpose of waiting for operation of other related protection. The
blocking signal will not reset until the system frequency recovers, i.e. the system frequency is
greater than the setting [81U.f_Pkp]. If the logic setting is set as “0”, when Equation 3.16-1 and
Equation 3.16-2 are met, the stage underfrequency protection will be released to operate.
3.16.2.2 Overfrequency Protection
Overfrequency protection consists of the four stages (stage 1 to stage 4). When system frequency
is greater than the setting [81O.f_Pkp], overfrequency protection will put into service.
In order to prevent possible maloperation of overfreqency protection in conditions of high
harmonics, voltage circuit failures and so on, such blocking measures are carried out as follows:
1.
Blocking in undervoltage condition
If the positive voltage U<0.15Un, the calculation of protection is not carried out and the output
relay will be blocked.
2.
Frequency abnormality condition
When f<40Hz or f>65Hz, overfrequency protection will be blocked
Operation criteria of overfrequency protection is shown in the following equation.
f>[81O.OFx.f_Set]
Equation 3.16-3
Where:
f is system frequency.
[81O.OFx.f_Set] is the frequency setting of stage x (x=1, 2, 3, or 4) of overfrequency protection.
3.16.3 Function Block Diagram
81U.UFx
81O.OFx
81U.En1
81U.St
81O.En1
81O.St
81U.En2
81U.UFx.Op
81O.En2
81O.OFx.Op
81U.Blk
81O.Blk
3.16.4 I/O Signals
Table 3.16-1 I/O signals of underfrequency protection
No.
1
Input Signal
81U.En1
Description
Underfrequency protection enabling input 1, it is triggered from binary input or
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programmable logic etc.
2
81U.En2
3
81U.Blk
4
U3P
No.
Underfrequency protection enabling input 2, it is triggered from binary input or
programmable logic etc.
Underfrequency protection blocking input, it is triggered from binary input or
programmable logic etc.
Three-phase voltage input
Output Signal
Description
1
81U.UFx.Op
Stage x of underfrequency protection operates (x=1, 2, 3 or 4).
2
81U.St
Underfrequency protection starts.
Table 3.16-2 I/O signals of overfrequency protection
No.
Input Signal
1
81O.En1
2
81O.En2
3
81O.Blk
4
U3P
No.
Description
Overfrequency protection enabling input 1, it is triggered from binary input or
programmable logic etc.
Overfrequency protection enabling input 2, it is triggered from binary input or
programmable logic etc.
Overfrequency protection blocking input, it is triggered from binary input or
programmable logic etc.
Three-phase voltage input
Output Signal
Description
1
81O.OFx.Op
Stage x of overfrequency protection operates (x=1, 2, 3 or 4).
2
81O.St
Overfrequency protection starts.
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3.16.5 Logic
SIG
[81U.En1]
SIG
[81U.En2]
SIG
[81U.Blk]
OTH
U1<0.15Un
SIG
f<40 or f>65
SET
-df/dt>[81U.df/dt_Blk]
EN
81U.UF1.En_df/dt_Blk
&
Enable 81U
≥1
Block 81U
>=1
>=1
EN
81U.UF2.En_df/dt_Blk
>=1
EN
81U.UF3.En_df/dt_Blk
>=1
EN
81U.UF4.En_df/dt_Blk
SIG
Enable 81U
SIG
Block 81U
OTH
f<[81U.f_Pkp]
SET
f<[81U.UF1.f_Set]
EN
[81U.UF1.En]
SET
f<[81U.UF2.f_Set]
EN
[81U.UF2.En]
SET
f<[81U.UF3.f_Set]
EN
[81U.UF3.En]
SET
f<[81U.UF4.f_Set]
EN
[81U.UF4.En]
&
>=1
&
50ms
[81U.St]
0ms
&
[81U.UF1.t_Op]
0ms
[81U.UF1.Op]
[81U.UF2.t_Op]
0ms
[81U.UF2.Op]
[81U.UF3.t_Op]
0ms
[81U.UF3.Op]
[81U.UF4.t_Op]
0ms
[81U.UF4.Op]
&
&
&
Figure 3.16-1 Logic diagram of underfrequency protection
When underfrequency protection is disabled, these signals, [81U.St] and [81U.UFx.Op], are both
reset. The default values of inputs signals, [81U.En1] and [81U.En2], are “1” and [81U.Blk] is “0” if
those inputs are not connected to external signals or setting.
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SIG
[81O.En1]
SIG
[81O.En2]
SIG
[81O.Blk]
OTH
U1<0.15Un
SIG
f
SIG
Enable 81O
SIG
Block 81O
OTH
f>[81O.f_Pkp]
SET
f>[81O.OF1.f_Set]
&
Enable 81O
≥1
Block 81O
40 or f
65
&
&
≥1
EN
[81O.OF1.En]
SET
f>[81O.OF2.f_Set]
EN
[81O.OF2.En]
SET
f>[81O.OF3.f_Set]
EN
[81O.OF3.En]
SET
f>[81O.OF4.f_Set]
EN
50ms
[81O.St]
0ms
&
[81O.OF1.t_Op]
0ms
[81O.OF1.Op]
[81O.OF2.t_Op]
0ms
[81O.OF2.Op]
[81O.OF3.t_Op]
0ms
[81O.OF3.Op]
[81O.OF4.t_Op]
0ms
[81O.OF4.Op]
&
&
&
[81O.OF4.En]
Figure 3.16-2 Logic diagram of overfrequency protection
When overfrequency protection is disabled, these signals, [81O.St] and [81O.OFx.Op], are both
reset. The default values of input signals, [81O.En1] and [81O.En2] are “1” and [81O.Blk] is “0” if
those inputs are not connected to external signals or setting.
3.16.6 Settings
Table 3.16-3 Settings of frequency protection
No.
Name
Range
Step
Unit
1
81U.f_Pkp
45.000~60.000
0.01
Hz
2
81U.df/dt_Blk
0.200~20.000
0.01
Hz/s
3
81U.UF1.f_Set
45.000~60.000
0.001
Hz
4
81U.UF1.t_Op
0.050~30.000
0.01
s
5
81U.UF2.f_Set
45.000~60.000
0.001
Hz
6
81U.UF2.t_Op
0.050~30.000
0.01
s
Remark
Frequency
pickup
setting
for
underfrequency protection
Frequency setting for stage 1 of
underfrequency protection
Time
delay
for
stage
1
of
underfrequency protection
Frequency setting for stage 2 of
underfrequency protection
Time
delay
for
stage
2
of
underfrequency protection
Frequency setting for stage 3 of
underfrequency protection
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7
81U.UF3.f_Set
45.000~60.000
0.001
Hz
8
81U.UF3.t_Op
0.050~30.000
0.01
s
9
81U.UF4.f_Set
45.000~60.000
0.001
Hz
10
81U.UF4.t_Op
0.050~30.000
0.01
s
Time
delay
for
81U.UF1.En
3
of
underfrequency protection
Frequency setting for stage 4 of
underfrequency protection
Time
delay
for
stage
4
of
change
for
underfrequency protection
Rate
of
frequency
blocking underfrequency protection
Enabling/disabling
11
stage
stage
1
of
underfrequency protection
0 or 1
0: disable
1: enable
Enabling/disabling rate of frequency
change
12
81U.UF1.En_df/dt_Blk
0 or 1
to
block
stage
1
of
underfrequency protection
0: disable
1: enable
Enabling/disabling
13
81U.UF2.En
stage
2
of
underfrequency protection
0 or 1
0: disable
1: enable
Enabling/disabling rate of frequency
change
14
81U.UF2.En_df/dt_Blk
0 or 1
to
block
stage
2
of
underfrequency protection
0: disable
1: enable
Enabling/disabling
15
81U.UF3.En
stage
3
of
underfrequency protection
0 or 1
0: disable
1: enable
Enabling/disabling rate of frequency
change
16
81U.UF3.En_df/dt_Blk
0 or 1
to
block
stage
3
of
underfrequency protection
0: disable
1: enable
Enabling/disabling
17
81U.UF4.En
stage
4
of
underfrequency protection
0 or 1
0: disable
1: enable
Enabling/disabling rate of frequency
change
18
81U.UF4.En_df/dt_Blk
0 or 1
to
block
stage
4
of
underfrequency protection
0: disable
1: enable
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19
81O.f_Pkp
50.000~65.000 (Hz)
0.001
Hz
20
81O.OF1.f_Set
50.000~65.000 (Hz)
0.001
Hz
21
81O.OF1.t_Op
0.050~20.000 (s)
0.001
s
22
81O.OF2.f_Set
50.000~65.000 (Hz)
0.001
Hz
23
81O.OF2.t_Op
0.050~20.000 (s)
0.001
s
24
81O.OF3.f_Set
50.000~65.000 (Hz)
0.001
Hz
25
81O.OF3.t_Op
0.050~20.000 (s)
0.001
s
26
81O.OF4.f_Set
50.000~65.000 (Hz)
0.001
Hz
27
81O.OF4.t_Op
0.050~20.000 (s)
0.001
s
Frequency
pickup
81O.OF1.En
for
overfrequency protection
Frequency setting for stage 1 of
overfrequency protection
Time
delay
for
stage
1
of
overfrequency protection
Frequency setting for stage 2 of
overfrequency protection
Time
delay
for
stage
2
of
overfrequency protection
Frequency setting for stage 3 of
overfrequency protection
Time
delay
for
stage
3
of
overfrequency protection
Frequency setting for stage 4 of
overfrequency protection
Time
delay
for
stage
4
of
1
of
2
of
3
of
4
of
overfrequency protection
Enabling/disabling
28
setting
stage
overfrequency protection
0 or 1
0: disable
1: enable
Enabling/disabling
29
81O.OF2.En
stage
overfrequency protection
0 or 1
0: disable
1: enable
Enabling/disabling
30
81O.OF3.En
stage
overfrequency protection
0 or 1
0: disable
1: enable
Enabling/disabling
31
81O.OF4.En
stage
overfrequency protection
0 or 1
0: disable
1: enable
3.17 Breaker Failure Protection
3.17.1 General Application
Duplicated protection configurations are usually adopted for EHV power system, but the primary
equipment, circuit breaker, is not duplicated. Breaker failure protection is adopted to cater circuit
breaker tripping failure.
Breaker failure protection issues a back-up trip command to trip adjacent circuit breakers in case
of a tripping failure of the circuit breaker, and clears the fault as requested by the device. To utilize
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the protection information of faulty equipment and the electrical information of failure circuit
breaker to constitute the criterion of breaker failure protection, it can ensure that the adjacent
circuit breakers of failure circuit breaker are tripped with a shorter time delay, so that the affected
area is minimized, and ensure stable operation of the entire power grid to prevent generators,
transformers and other components from seriously damaged.
3.17.2 Function Description
The instantaneous re-tripping function, after receiving tripping signal from other device and the
corresponding phase overcurrent element operating, is available and provides phase-segregated
binary output contact, which can ensure the circuit breaker is still tripped in case the secondary
circuit between the device and the circuit breaker is abnormal, to avoid undesired tripping of
breaker failure protection and the expansion of the affected area. Instantaneous re-tripping
function does not block AR.
When both the phase-segregated tripping contact from line protection and the corresponding
phase overcurrent element operate, or both the three-phase tripping contact and any phase
overcurrent element operate, breaker failure protection will send three-phase tripping command to
trip local circuit breaker after time delay of [50BF.t1_Op] and trip all adjacent circuit breakers after
time delay of [50BF.t2_Op].
When the protection element except undervoltage element within this device operates and issues
tripping signal, breaker failure protection will also be initiated.
Taking into account that the faulty current is too small for generator or transformer fault, the
sensitivity of phase current element may not meet the requirements, zero-sequence current
criterion and negative-sequence current criterion are provided in addition to the phase overcurrent
element for breaker failure protection initiated by input signal [50BF.ExTrp3P_GT] from generator
and transformer protection. They can be enabled or disabled by logic settings [50BF.En_3I0_3P]
and [50BF.En_I2_3P] respectively.
For some special fault (for example, mechanical protection or overvoltage protection operating),
maybe faulty current is very small and current criterion of breaker failure protection is not met, in
order to make breaker failure protection can also operate under the above situation, an input
signal [50BF.ExTrp_WOI] is equipped to initiate breaker failure protection, once the input signal is
energized, normally closed auxiliary contact of circuit breaker is chosen in addition to breaker
failure current check to trigger breaker failure timer. The device takes current as priority with CB
auxiliary contact (52b) as an option criterion for breaker failure check.
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3.17.3 Function Block Diagram
50BF
50BF.ExTrp3P_L
50BF.Op_ReTrpA
50BF.ExTrp3P_GT
50BF.Op_ReTrpB
50BF.ExTrp_WOI
50BF.Op_ReTrpC
50BF.ExTrpA
50BF.Op_ReTrp3P
50BF.ExTrpB
50BF.Op_t1
50BF.ExTrpC
50BF.Op_t2
50BF.En
50BF.Blk
3.17.4 I/O Signals
Table 3.17-1 I/O signals of breaker failure protection
No.
Input Signal
Description
1
50BF.ExTrp3P_L
Input signal of three-phase tripping contact from line protection
2
50BF.ExTrp3P_GT
3
50BF.ExTrpA
Input signal of phase-A tripping contact from external device
4
50BF.ExTrpB
Input signal of phase-B tripping contact from external device
5
50BF.ExTrpC
Input signal of phase-C tripping contact from external device
Input signal of three-phase tripping contact from generator or transformer
protection
Input signal of three-phase tripping contact from external device. Once it is
6
50BF.ExTrp_WOI
energized, normally closed auxiliary contact of circuit breaker is chosen in
addition to breaker failure current check to trigger breaker failure timers.
7
50BF.En
8
50BF.Blk
No.
Output Signal
Input signal of enabling breaker failure protection
Breaker failure protection blocking input, such as function blocking binary input.
When the input is 1, breaker failure protection is reset and time delay is cleared.
Description
1
50BF.Op_ReTrpA
Breaker failure protection operates to re-trip phase-A circuit breaker
2
50BF.Op_ReTrpB
Breaker failure protection operates to re-trip phase-B circuit breaker
3
50BF.Op_ReTrpC
Breaker failure protection operates to re-trip phase-C circuit breaker
4
50BF.Op_ReTrp3P
Breaker failure protection operates to re-trip three-phase circuit breaker
5
50BF.Op_t1
Stage 1 breaker failure protection operates
6
50BF.Op_t2
Stage 2 breaker failure protection operates
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3.17.5 Logic
SIG
50BF.En
EN
[50BF.En]
SIG
50BF.Blk
SIG
Enable 50BF
EN
[50BF.En_ReTrp]
EN
[50BF.En_3I0_1P]
SET
3I0>[50BF.3I0_Set]
SIG
BFI_A
&
Enable 50BF
&
>=1
>=1
&
&
>=1
BI
[50BF.ExTrpA]
SET
IA>[50BF.I_Set]
SIG
BFI_B
>=1
&
[50BF.ExTrpB]
SET
IB>[50BF.I_Set]
SIG
BFI_C
>=1
&
[50BF.ExTrpC]
SET
IC>[50BF.I_Set]
SIG
BFI_3P
BI
[50BF.ExTrp3P_L]
[50BF.t_ReTrp] 0ms
[50BF.Op_ReTrpB]
[50BF.t_ReTrp] 0ms
[50BF.Op_ReTrpC]
&
>=1
BI
[50BF.Op_ReTrpA]
&
>=1
BI
[50BF.t_ReTrp] 0ms
>=1
>=1
>=1
&
>=1
BI
[50BF.ExTrp3P_GT]
BI
[50BF.ExTrp_WOI]
EN
[50BF.En_3I0_3P]
[50BF.Op_ReTrp3P]
&
>=1
&
SET
3I0>[50BF.3I0_Set]
EN
[50BF.En_I2_3P]
SET
I2>[50BF.I2_Set]
EN
[50BF.En_CB_Ctrl]
BI
[52b_PhA]
&
>=1
>=1
&
&
&
[50BF.t1_Op]
0ms
[50BF.Op_t1]
[50BF.t2_Op]
0ms
[50BF.Op_t2]
&
&
BI
[52b_PhB]
BI
[52b_PhC]
SIG
Enable 50BF
Figure 3.17-1 Logic diagram of breaker failure protection
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3.17.6 Settings
Table 3.17-2 Settings of breaker failure protection
No.
Name
Range
Step
Unit
Remark
Current setting of phase current
criterion for BFP
Current setting of zero-sequence
current criterion for BFP
1
50BF.I_Set
(0.050~30.000 )×In
0.001
A
2
50BF.3I0_Set
(0.050~30.000 )×In
0.001
A
3
50BF.I2_Set
(0.050~30.000 )×In
0.001
A
Current
setting
negative-sequence
criterion for BFP
4
50BF.t_ReTrp
0.000~10.000
0.001
s
Time delay of re-tripping for BFP
5
50BF.t1_Op
0.000~10.000
0.001
s
Time delay of stage 1 for BFP
6
50BF.t2_Op
0.000~10.000
0.001
s
Time delay of stage 2 for BFP
7
50BF.En
0 or 1
8
50BF.En_ReTrp
0 or 1
9
10
11
12
50BF.En_3I0_1P
50BF.En_3I0_3P
50BF.En_I2_3P
50BF.En_CB_Ctrl
of
current
Enabling/disabling breaker failure
protection
0: disable
1: enable
Enabling/disabling re-trip function
for BFP
0: disable
1: enable
0 or 1
Enabling/disabling zero-sequence
current criterion for BFP initiated by
single-phase tripping contact
0: disable
1: enable
0 or 1
Enabling/disabling zero-sequence
current criterion for BFP initiated by
three-phase tripping contact
0: disable
1: enable
0 or 1
Enabling/disabling
negative-sequence current criterion
for BFP initiated by three-phase
tripping contact
0: disable
1: enable
0 or 1
Enabling/disabling breaker failure
protection can be initiated by
normally closed contact of circuit
breaker
0: disable
1: enable
3.18 Thermal Overload Protection
3.18.1 General Application
During overload operation of a transmission line (specially for cable), great current results in
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greater heat to lead temperature increase and if the temperature reaches too high values the
equipment might be damaged.
Thermal overload protection estimates the internal heat content (temperature) continuously. This
estimation is made by using a thermal model with two time constants, which is based on current
measurement.
When the temperature increases to the alarm value, the protection issues alarm signals to remind
the operator for attention, and if the temperature continues to increase to the trip value, the
protection sends trip command to disconnect the protected line.
3.18.2 Function Description
Thermal overload protection has following functions:



Thermal time characteristic adopting IEC 60255-8
Two stages for alarm purpose and two stages for trip purpose
Thermal accumulation can be cleared by external input signal
The device provides a thermal overload model which is based on the IEC60255-8 standard. The
thermal overload formulas are shown as below.
1.
Criterion of cooling start characteristic:
I2
T    ln 2
I  (k  I B ) 2
2.
Criterion of hot start characteristic:
T    ln
I 2  I p2
I 2  (k  I B ) 2
Where:
T = Time to operate (in seconds)
 = Thermal time constant of the equipment to be protected, the setting [49.Tau]
IB = Full load current rating, the setting [49.Ib_Set]
I = The RMS value of the largest phase current
IP = Steady state pre-loading before application of the overload
k = Factor associated to the thermal state formula, the setting [49.K]
ln = Natural logarithm
The characteristic curve of thermal overload model is shown in Figure 3.18-1.
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Refer to IEC60255-8
t
Ip
P=—
IB
P = 0.0
P = 0.6
P = 0.8
P = 0.9
kIB
I
Figure 3.18-1 Characteristic curve of the thermal overload model
The hot start characteristic is adopted in the device. The calculation is carried out at zero of Ip, so
users need not to set the value of Ip.
Tripping outputs of the protection is controlled by current, even if the thermal accumulation value is
greater than the setting for tripping, the protection drops off instantaneously when current
disappears. Alarm outputs of the protection is not controlled by current, and only if the thermal
accumulation value is greater than the setting for alarm, alarm output contacts, which can be
connected to block the auto-reclosure, will operate.
3.18.3 Function Block Diagram
49
49.Clr_Cmd
49.St
49.En
49-1.Alm
49.Blk
49-1.Op
49-2.Alm
49-2.Op
3.18.4 I/O Signals
Table 3.18-1 I/O signals of thermal overload protection
No.
Input Signal
1
49.Clr_Cmd
2
49.En
3
49.Blk
4
I3P
Description
Input signal of clear thermal accumulation value
Thermal overload protection enabling input, it is triggered from binary input or
programmable logic etc.
Thermal overload protection blocking input, it is triggered from binary input or
programmable logic etc.
Three-phase current input
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No.
Output Signal
Description
1
49.St
Thermal overload protection starts.
2
49-1.Op
Stage 1 of thermal overload protection operates to trip.
3
49-2.Op
Stage 2 of thermal overload protection operates to trip.
4
49-1.Alm
Stage 1 of thermal overload protection operates to alarm.
5
49-2.Alm
Stage 2 of thermal overload protection operates to alarm.
3.18.5 Logic
SIG
[49.Blk]
SIG
[49.En]
&
&
SIG
[49.I3P]
SET
[49.Ib_Set]
49.St
&
EN
Timer
t
&
EN
[49-x.En_Alm]
BI
[49.Clr_Cmd]
49-x.Op
t
[49-x.En_Trp]
Timer
t
49-x.Alm
t
Figure 3.18-2 Logic diagram of thermal overload protection
Where:
x can be 1 or 2
3.18.6 Settings
Table 3.18-2 Settings of thermal overload protection
No.
Name
Range
Step
Unit
1
49-1.K
1.000~3.000
0.001
%
2
49-2.K
1.000~3.000
0.001
%
3
49.Ib_Set
(0.050~30.000 )×In
0.001
A
4
49.Tau
0.100~100.000
0.001
min
5
49-1.En_Alm
0 or 1
Remark
The factor setting for stage 1 of
thermal overload protection which
is associated to the thermal state
formula
The factor setting for stage 2 of
thermal overload protection which
is associated to the thermal state
formula
The reference current setting of the
thermal overload protection
The time constant setting of the
IDMT overload protection
Enabling/disabling
thermal overload
alarm purpose
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6
49-1.En_Trp
7
49-2.En_Alm
8
49-2.En_Trp
0: disable
1: enable
Enabling/disabling stage 1 of
thermal overload protection for trip
purpose
0: disable
1: enable
0 or 1
Enabling/disabling stage 2
thermal overload protection
alarm purpose
0: disable
1: enable
Enabling/disabling stage 2
thermal overload protection for
purpose
0: disable
1: enable
0 or 1
0 or 1
of
for
of
trip
3.19 Stub Overcurrent Protection
3.19.1 General Application
Stub overcurrent protection is mainly designed for one and a half breakers arrangement. When
line disconnector is open and transmission line is put into maintenance, line VT is no voltage.
Distance protection is disabled, and stub overcurrent protection is enabled. It is used to protect
stub section among for two circuit breakers and line disconnector. Usually, stub overcurrent
protection is enabled automatically by normally closed auxiliary contact of line disconnector.
CT1
CT2
Bus
Bus
To the device
Line
Line
Figure 3.19-1 3/2 breakers arrangement
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3.19.2 Function Block Diagram
50STB
50STB.En1
50STB.Op
50STB.En2
50STB.St
50STB.Blk
3.19.3 I/O Signals
Table 3.19-1 I/O signals of stub overcurrent protection
No.
Input Signal
1
50STB.En1
2
50STB.En2
3
50STB.Blk
4
50STB.89b_DS
No.
Description
Stub overcurrent protection enabling input 1, it is triggered from binary input or
programmable logic etc.
Stub overcurrent protection enabling input 2, it is triggered from binary input or
programmable logic etc.
Stub overcurrent protection blocking input, it is triggered from binary input or
programmable logic etc.
Normally closed auxiliary contact of line disconnector
Output Signal
Description
1
50STB.Op
Stub overcurrent protection operates.
2
50STB.St
Stub overcurrent protection starts.
3.19.4 Logic
Only one stage is available to stub overcurrent protection. Based on calculating summation
current from dual CTs, the logic scheme of stub overcurrent protection is shown as Figure 3.19-2.
SIG
50STB.En1
SIG
50STB.En2
SIG
50STB.Blk
SET
Ia>[50STB.I_Set]
SET
Ib>[50STB.I_Set]
SET
Ic>[50STB.I_Set]
EN
[50STB.En]
&
&
&
[50STB.t_Op]
50STB.Op
>=1
50STB.St
Figure 3.19-2 Logic diagram of stub overcurrent protection
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3.19.5 Settings
Table 3.19-2 Settings of stub overcurrent protection
No.
Name
Range
Step
Unit
1
50STB.I_Set
(0.050~30.000)×In
0.001
A
2
50STB.t_Op
0.000~10.000
0.001
s
Remark
Current setting of stub overcurrent
protection
Time delay of stub overcurrent
protection
Enabling/disabling stub overcurrent
3
50STB.En
protection
0 or 1
1: enable
0: disable
3.20 Dead Zone Protection
3.20.1 General Application
Generally, fault current is very large when multi-phase fault occurs between CT and circuit breaker
(i.e. dead zone) and it will have a greater impact on the system. Breaker failure protection can
operate after a longer time delay, in order to clear the dead zone fault quickly and improve the
system stability, dead zone protection with shorter time delay (compared with breaker failure
protection) is adopted.
3.20.2 Function Description
For some wiring arrangement (for example, circuit breaker is located between CT and the line), if
fault occurs between CT and circuit breaker, line protection can operate to trip circuit breaker
quickly, but the fault have not been cleared since local circuit breaker is tripped. Here dead zone
protection is needed in order to trip relevant circuit breaker.
The criterion for dead zone protection is: when dead zone protection is enabled, binary input of
initiating dead zone protection is energized (by default, three-phase tripping signal is used to
initiate dead zone protection), if overcurrent element for dead zone protection operates, then
corresponding circuit breaker is tripped and three phases normally closed contact of the circuit
breaker are energized, dead zone protection will operate to trip adjacent circuit breaker after a
time delay.
3.20.3 Function Block Diagram
50DZ
50DZ.En1
50DZ.St
50DZ.En2
50DZ.Op
50DZ.Blk
50DZ.ExStart
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3.20.4 I/O Signal
Table 3.20-1 I/O signals of dead zone protection
No.
Input Signal
Description
1
50DZ.En1
Dead zone protection enabling input 1, it can be binary inputs or logic link.
2
50DZ.En2
Dead zone protection enabling input 2, it can be binary inputs or logic link.
3
50DZ.Blk
4
50DZ.ExStart
No.
Dead zone protection blocking input, such as function blocking binary input. When
the input is 1, dead zone protection is reset and time delay is cleared.
Initiation signal input of the dead zone protection.
Output Signal
Description
1
50DZ.St
Dead zone protection starts.
2
50DZ.Op
Dead zone protection operates.
3.20.5 Logic
EN
[50DZ.En]
SIG
[50DZ.En1]
SIG
[50DZ.En2]
SIG
[50DZ.Blk]
BI
52b_PhA
BI
52b_PhB
BI
52b_PhC
SET
&
&
&
Ia > [50DZ.I_Set]
SET
Ib > [50DZ.I_Set]
SET
Ic > [50DZ.I_Set]
SIG
[50DZ.ExStart]
50DZ.St
&
>=1
[50DZ.t_Op]
&
0ms
50DZ.Op
Figure 3.20-1 Dead zone protection
3.20.6 Settings
Table 3.20-2 Settings of dead zone protection
No.
Name
Range
Step
Unit
Remark
Current
1
50DZ.I_Set
(0.050~30.000)×In
0.001
A
setting
for
dead
zone
protection. This setting shall ensure the
protection being sensitive enough if
dead zone fault occurs.
2
50DZ.t_Op
0.000~10.000
0.001
s
Time delay of dead zone protection.
Enabling/disabling
3
50DZ.En
0 or 1
-
dead
zone
protection.
1: enable
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0: disable
3.21 Pole Discrepancy Protection
3.21.1 General Application
The pole discrepancy of circuit breaker may occur during operation of a breaker with segregated
operating gears for the three phases. The reason could be an interruption in the tripping/closing
circuits, or mechanical failure. A pole discrepancy can only be tolerated for a limited period. When
there is loading, zero-sequence or negative-sequence current will be generated in the power
system, which will result in overheat of the generator or the motor. With the load current increasing,
overcurrent elements based on zero-sequence current or negative-sequence current may operate.
Pole discrepancy protection is required to operate before the operation of these overcurrent
elements.
3.21.2 Function Description
Pole discrepancy protection determines three-phase breaker pole discrepancy condition by its
phase segregated CB auxiliary contacts. In order to improve the reliability of pole discrepancy
protection, the asymmetrical current component can be selected as addition criteria when needed.
3.21.3 Function Block Diagram
62PD
62PD.En1
62PD.Op
62PD.En2
62PD.St
62PD.Blk
3.21.4 I/O Signals
Table 3.21-1 I/O signals of pole discrepancy protection
No.
Input Signal
Description
Pole discrepancy protection enabling input 1, it is triggered from binary input or
1
62PD.En1
2
62PD.En2
3
62PD.Blk
4
62PD.In_PD
Pole discrepancy binary input
5
I3P
Three-phase current input
No.
programmable logic etc.
Pole discrepancy protection enabling input 2, it is triggered from binary input or
programmable logic etc.
Pole discrepancy protection blocking input, it is triggered from binary input or
programmable logic etc.
Output Signal
Description
1
62PD.Op
Pole discrepancy protection operates to trip
2
62PD.St
Pole discrepancy protection starts
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3.21.5 Logic
Pole discrepancy protection can be initiated by two methods.
1.
Initiation method 1
It uses combination of circuit breaker normally closed and normally open auxiliary contacts to
initiate pole discrepancy protection, i.e. the binary input [62PD.In_PD] and its connection is shown
as below.
DC+
52b_PhA
52a_PhA
52b_PhB
52a_PhB
52b_PhC
52a_PhC
Binary input
62PD.In_PD
Figure 3.21-1 Pole discrepancy
Where:
52b_PhA: normally closed CB auxiliary contact of phase A
52b_PhB: normally closed CB auxiliary contact of phase B
52b_PhC: normally closed CB auxiliary contact of phase C
52a_PhA: normally open CB auxiliary contact of phase A
52a_PhB: normally open CB auxiliary contact of phase B
52a_PhC: normally open CB auxiliary contact of phase C
2.
Initiation method 2
Phase-segregated circuit breaker auxiliary contacts are connected to the device. When the state
of three phase-segregated circuit breaker auxiliary contacts are inconsistent, pole discrepancy
protection will be started and initiate output after a time delay [62PD.t_Op].
Pole discrepancy protection can be blocked by external input signal [62PD.Blk]. In general, this
input signal is usually from the output of 1-pole AR initiation, so as to prevent pole discrepancy
protection from operation during 1-pole AR initiation.
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SIG
62PD.En1
SIG
62PD.En2
BI
[62PD.Blk]
EN
[62PD.En]
BI
[62PD.In_PD]
&
62PD.St
&
&
[62PD.t_Op]
EN
[62PD.En_3I0/I2_Ctrl]
SET
3I0>[62PD.3I0_Set]
SET
I2>[62PD.I2_Set]
0ms
62PD.Op
>=1
>=1
Figure 3.21-2 Logic diagram of pole discrepancy protection
3.21.6 Settings
Table 3.21-2 Settings of pole discrepancy protection
No.
Name
Range
Step
Unit
Remark
Current setting of residual current
criterion for pole discrepancy
protection
1
62PD.3I0_Set
(0.050~30.000 )×In
0.001
A
2
62PD.I2_Set
(0.050~30.000 )×In
0.001
A
3
62PD.t_Op
0.000~10.000
0.001
s
4
62PD.En
0 or 1
5
62PD.En_3I0/I2_Ctrl
0 or 1
Current
setting
of
negative-sequence current criterion
for pole discrepancy protection
Time delay of pole discrepancy
protection
Enabling/disabling
pole
discrepancy protection
0: disable
1: enable
Enabling/disabling
residual
current
criterion
and
negative-sequence current criterion
for pole discrepancy protection
0: disable
1: enable
3.22 Broken Conductor Protection
3.22.1 General Application
Single-phase earthing fault and two-phases earthing fault are the most common fault on circuits,
the fault is easy to detect because the fault current will increase obviously.
Broken-conductor fault is difficult to detect since there is no increase of current but
negative-sequence current, so negative-sequence overcurrent protection can be considered to
clear broken-conductor fault. However, under heavy load condition, negative-sequence current is
relative large due to unbalance loading, but negative-sequence current because of
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broken-conductor fault under light load condition is relative small. If negative-sequence current
protection is set larger than maximum negative-sequence current under loading, the protection
may be failure to operate if broken-conductor fault happens under light load condition,
negative-sequence overcurrent protection is therefore not suitable to apply for broken-conductor
fault.
The network of single-phase broken condition is similar to that of two-phases earthing fault,
positive-sequence, negative-sequence and zero-sequence network is connected in parallel, I2/I1=
Z0/(Z0+Z2), generally, zero-sequence impedance is larger than positive-sequence impedance, i.e.
I2/I1>0.5. The network of two-phases broken condition is similar to that of single-phase earthing
fault, positive-sequence, negative-sequence and zero-sequence network is connected in series,
so I2/I1=1.
3.22.2 Function Description
Broken-conductor fault mainly is single-phase broken or two-phases broken. According to the ratio
of negative-sequence current to positive-sequence current (I2/I1), it is used to judge whether there
is an broken-conductor fault. Negative-sequence current under normal operating condition (i.e.
unbalance current) is due to CT error and unbalance load, so the ratio of negative-sequence
current to positive-sequence current (amplitude) is relative steady. The value with margin can then
be used as the setting of broken conductor protection. It is mainly used to detect broken-conductor
fault and CT circuit failure as well.
3.22.3 Function Block Diagram
46BC
46BC.En1
46BC.St
46BC.En2
46BC.Op
46BC.Blk
3.22.4 I/O Signals
Table 3.22-1 I/O signals of broken conductor protection
No.
Input Signal
1
46BC.En1
2
46BC.En2
3
46BC.Blk
No.
1
Output Signal
46BC.St
Description
Enable broken conductor protection input 1, it is triggered from binary input or
programmable logic etc.
Enable broken conductor protection input 2, it is triggered from binary input or
programmable logic etc.
Broken conductor protection blocking input, it is triggered from binary input or
programmable logic etc.
Description
Broken-conductor protection starts
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2
46BC.Op
Broken-conductor protection operates.
3.22.5 Logic
EN
[46BC.En]
SIG
[46BC.En1]
SIG
[46BC.En2]
&
&
&
46BC.St
&
[46BC.t_Op] 0ms
SIG
[46BC.Blk]
SET
I2/I1>[46BC.K_Set]
46BC.Op
Figure 3.22-1 Logic diagram of broken conductor protection
3.22.6 Settings
Table 3.22-2 Settings of broken conductor protection
No.
Name
Range
Step
1
46BC.k_Set
0.20~1.00
0.001
2
46BC.t_Op
0.000~600.000
0.001
3
46BC.En
0 or 1
Unit
Remark
Ratio
setting
(negative-sequence
current to positive-sequence current) of
broken conductor protection
s
Time delay of broken conductor
protection
Enabling/disabling broken conductor
protection
0: disable
1: enable
3.23 Synchrocheck
3.23.1 General Application
The purpose of synchrocheck is to ensure two systems are synchronism before they are going to
be connected.
When two asynchronous systems are connected together, due to phase difference between the
two systems, larger impact will be led to the system during closing. Thus auto-reclosing and
manual closing are applied with the synchrocheck to avoid this situation and maintain the system
stability. The synchrocheck includes synchronism check and dead charge check.
3.23.2 Function Description
The synchronism check function measures the conditions across the circuit breaker and compares
them with the corresponding settings. The output is only given if all measured quantities are
simultaneously within their set limits.
The dead charge check function measures the amplitude of line voltage and bus voltage at both
sides of the circuit breaker, and then compare them with the live check setting [25.U_Lv] and the
dead check setting [25.U_Dd]. The output is only given when the measured quantities comply with
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the criteria.
Synchrocheck in this device can be used for auto-reclosing and manual closing for both
single-breaker and dual-breakers. Details are described in the following sections.
When used for the synchrocheck of single-breaker, comparative relationship between reference
voltage (UL) and incoming voltage (UB) for synchronism is as follows.
UL
UB
Figure 3.23-1 Relationship between reference voltage and synchronous voltage
Figure 3.23-1 shows the characteristics of synchronism check element used for the auto-reclosing
if both line and busbar are live. The synchronism check element operates if voltage difference,
phase angle difference and frequency differency are all within their setting values.
1.
The voltage difference is checked by the following equations.
[25.U_Lv]≤UB
[25.U_Lv] ≤UL
[25.U_Diff]≤|UB- UL|
2.
The phase difference is checked by the following equations.
UB.UL cosØ≥0
UB.UL sin([25.phi_Diff])≥UB.UL sin([25.phi_Diff])
Where,
Ø is phase difference between UB and UL
3.
The frequency difference is checked by the following equations.
|f(UB)-f(UL)|≤[25.f_Diff]
If frequency check is disabled (i.e. [25.En_fDiffChk] is set as “0”), a detected maximum slip cycle
can also be determined by the following equation based on phase difference setting and the
synchronism check time setting:
f =[25.phi_Diff]/(180×[25.t_SynChk])
Where:
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f is slip cycle
If frequency check is enabled (i.e. [25.En_fDiffChk] is set as “1”), then [25.t_SynChk] can be set to
be a very small value (default value is 50ms).
3.23.2.1 Single Busbar Arrangement
Voltage selection function is not required for this busbar arrangement, the connection of the
voltage signals and respective VT MCB auxiliary contacts to the device is shown in the Figure
3.23-2 and Figure 3.23-3.
1.
Three-phase bus voltage used for protection
Bus
VTS.En_Line_VT=0

UL1
Ua
CB
Ub
Uc
MCB_VT_UL1
UB1
MCB_VT_UB1
Line
Figure 3.23-2 Voltage connection for single busbar arrangement
2.
Three-phase line voltage used for protection
Bus
VTS.En_Line_VT=1
CB
UB1
MCB_VT_UB1

UL1
Ua
Ub
Uc
Line
MCB_VT_UL1
Figure 3.23-3 Voltage connection for single busbar arrangement
In the figures, the setting [VTS.En_Line_VT] is used to determine protection voltage signals (Ua,
Ub, Uc) from line VT or bus VT according to the condition.
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3.23.2.2 Double Busbars Arrangement
Bus2
Bus1
B1D B2D
UB1
MCB_VT_UB1
UB2
MCB_VT_UB2
UB1D_Clsd
UB1D_Open
UB2D_Clsd
UB2D_Open

UL1


CB
Ua
Ub
Line
Uc
MCB_VT_UL1
Figure 3.23-4 Voltage connection for double busbars arrangement
For double busbars arrangement, selection of appropriate voltage signals from Bus 1 and Bus 2
for synchronizing are required. Line VT signal is taken as reference to check synchronizing with
the voltage after voltage selection function. Selection approach is as follows.
For the disconnector positions, the normally open (NO) and normally closed (NC) contacts of the
disconnector for bus 1 and bus 2 are required to determine the disconnector open and closed
positions. The voltage selection logic is as follows.
BI
UB1D_Clsd
&
UB1_SEL
BI
UB1D_Open
Voltage
Selection Logic
BI
UB2D_Clsd
&
UB2_SEL
BI
UB2D_Open
&
Invalid_SEL
UB1
UB
UB2
Figure 3.23-5 Voltage selection for double busbars arrangement
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After acquiring the disconnector open and closed positions of double busbars, use the following
logic to acquire the feeder voltage of double busbars.
DS2 CLOSED
DS2 OPEN
DS1 CLOSED
Keep original value
Voltage from Bus 1 VT (UB1_Sel=1)
DS1 OPEN
Voltage from Bus 2 VT (UB2_Sel=1)
Keep original value
DS1 is disconnector of Bus 1
DS2 is disconnector of Bus 2
If voltage selection is invalid (Invalid_SEL=1), keep original selection and without switchover.
3.23.2.3 One and A Half Breakers Arrangement
For one and a half breakers arrangement, selection of appropriate voltage signals among Line1
VT, Line2 VT and Bus 2 VT as reference voltage to check synchronizing with Bus 1 voltage signal
for closing breaker at Bus 1 side.
Bus1
UB1
MCB_VT_UB1
UB1D_Clsd
UB1D_Open

UL1

B1D
Ua
Line 1
Ub
Uc
MCB_VT_UL1
UL1D_Clsd
UL1D_Open
UL2
MCB_VT_UL2
UL2D_Clsd
UL2D_Open
UB2D_Clsd
UB2D_Open

L1D
Line 2


L2D
UB2
MCB_VT_UB2
B2D
Bus2
Figure 3.23-6 Voltage connection for one and a half breakers arrangement
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For the circuit breaker at bus side (take bus breaker of bus 1 as an example), the device acquires
the disconnector open and closed positions of two feeders and bus 2. The voltage selection logic
is as follows.
BI
UL1D_Clsd
BI
UL1D_Open
BI
UL2D_Clsd
BI
UL2D_Open
BI
UB2D_Clsd
BI
UB2D_Open
&
UL1_SEL
&
UL2_SEL
&
&
UB2_SEL
&
&
Invalid_SEL
UL1
UL
UL2
UB2
Figure 3.23-7 Voltage selection for one and a half breakers arrangement
For the tie breaker, the device acquires the disconnector open and closed positions of two feeders
and two busbars. Either Line 1 VT or Bus 1 VT signal is selected as reference voltage to check
synchronizing with the selected voltage between Line 2 VT and Bus 2 VT. The voltage selection
logic is as follows.
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BI
UL1D_Clsd
&
UL1_SEL
BI
UL1D_Open
BI
UB1D_Clsd
BI
UB1D_Open
&
UB1_SEL
&
&
UL1
UL
UB1
BI
UL2D_Clsd
&
UL2_SEL
BI
UL2D_Open
BI
UB2D_Clsd
BI
UB2D_Open
&
UB2_SEL
&
>=1
&
UL2
Invalid_SEL
UB
UB2
Figure 3.23-8 Voltage selection for one and a half breakers arrangement
When the voltage selection fails (including VT circuit failure and MCB failure), the device will issue
the corresponding failure signal. If the voltage selection is invalid (Invalid_SEL=1), keep original
selection and without switchover.
In order to simplify description, one of the two voltages used in the synchrocheck (synchronism check
and dead charge check) which obtained after voltage selection function is regarded as line voltage,
and another is bus voltage.
3.23.2.4 Synchronism Voltage Circuit Failure Supervision
If synchronism voltage from line VT or busbar VT is used for auto-reclosing with synchronism or
dead line or busbar check, the synchronism voltage is monitored.
If the circuit breaker is in closed state (52b of three phases are de-energized), but the synchronism
voltage is lower than the setting [25.U_Lv], it means that synchronism voltage circuit fails and an
alarm [25.Alm_VTS_UB] or [25.Alm_VTS_UL] will be issued with a time delay of 10s.
If auto-reclosing is disabled, or the logic setting [25.En_NoChk] is set as “1”, synchronism voltage
is not required and synchronism voltage circuit failure supervision will be disabled.
When synchronism voltage circuit failure is detected, function of synchronism check and dead
check in auto-reclosing logic will be disabled.
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After synchronism voltage reverted to normal condition, the alarm will be reset automatically with a
time delay of 10s.
3.23.3 I/O Signals
Table 3.23-1 I/O signals of synchrocheck
No.
Input Signal
Description
1
25.Blk_Chk
2
25.Blk_SynChk
3
25.Blk_DdChk
4
25.Start_Chk
5
25.Blk_VTS_UB
VT circuit supervision (UB) is blocked
6
25.Blk_VTS_UL
VT circuit supervision (UL) is blocked
7
25.MCB_VT_UB
Binary input for VT MCB auxiliary contact (UB)
8
25.MCB_VT_UL
Binary input for VT MCB auxiliary contact (UL)
No.
Input signal of blocking synchrocheck function for AR.
Input signal of blocking synchronism check for AR. If the value is “1”, the output of
synchronism check is “0”.
Input signal of blocking dead charge check for AR.
Input signal of starting synchronism check, usually it was starting signal of AR
from auto-reclosing module.
Output Signal
Description
1
UL1_Sel
To select voltage of Line 1
2
UL2_Sel
To select voltage of Line 2
3
UB1_Sel
To select voltage of Bus 1
4
UB2_Sel
To select voltage of Bus 2
5
Invalid_Sel
Voltage selection is invalid.
6
25.Ok_fDiff
7
25.Ok_UDiff
8
25.Ok_phiDiff
9
25.Ok_DdL_DdB
Dead line and dead bus condition is met
10
25.Ok_DdL_LvB
Dead line and live bus condition is met
11
25.Ok_LvL_DdB
Live line and dead bus condition is met
12
25.Chk_LvL
Line voltage is greater than the voltage setting [25.U_Lv]
13
25.Chk_DdL
Line voltage is smaller than the voltage setting [25.U_Dd]
14
25.Chk_LvB
Bus voltage is greater than the voltage setting [25.U_Lv]
15
25.Chk_DdB
Bus voltage is smaller than the voltage setting [25.U_Dd]
16
25.Ok_DdChk
To indicate that dead charge check condition of AR is met
17
25.Ok_SynChk
To indicate that synchronism check condition of AR is met
18
25.Ok_Chk
To indicate that synchrocheck condition of AR is met
19
25.Alm_VTS_UB
Synchronism voltage circuit is abnormal (UB)
20
25.Alm_VTS_UL
Synchronism voltage circuit is abnormal (UL)
21
f_Prot
Frequency of the voltage used by protection calculation
22
f_Syn
Frequency of the voltage used by synchrocheck
To indicate that frequency difference condition for synchronism check of AR is
met, frequency difference between UB and UL is smaller than [25.f_Diff].
To indicate that voltage difference condition for synchronism check of AR is met,
voltage difference between UB and UL is smaller than [25.U_Diff]
To indicate phase difference condition for synchronism check of AR is met, phase
difference between UB and UL is smaller than [25.phi_Diff].
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23
u_Diff
Voltage difference for synchronism check
24
f_Diff
Frequency difference for synchronism check
25
phi_Diff
Phase difference for synchronism check
3.23.4 Logic
These logic diagrams give the introduction to the working principles of the synchronism check and
dead charge check.
3.23.4.1 Synchronism Check Logic
The frequency difference, voltage difference, and phase difference of voltages from both sides of
the circuit breaker are calculated in the device, they are used as input conditions of the
synchronism check.
When the synchronism check function is enabled and the voltages of both ends meets the
requirements of the voltage difference, phase difference, and frequency difference, and there is no
synchronism check blocking signal, it is regarded that the synchronism check conditions are met.
SIG
25.Blk_Chk
SIG
25.Blk_SynChk
EN
[25.En_SynChk]
SIG
25.Start_Chk
SIG
UB>[25.U_Lv]
SIG
UL>[25.U_Lv]
SIG
25.Ok_UDiff
SIG
25.Ok_phiDiff
SIG
25.Ok_fDiff
>=1
&
&
&
50ms
0ms
&
[25.t_SynChk]
0ms
25.Ok_SynChk
Figure 3.23-9 Synchronism check
3.23.4.2 Dead Charge Check Logic
The dead charge check conditions have three types, namely, live-bus and dead-line check,
dead-bus and live-line check and dead-bus and dead-line check. The above three modes can be
enabled and disabled by the corresponding logic settings. The device can calculate the measured
bus voltage and line voltage at both sides of the circuit breaker and compare them with the
settings [25.U_Lv] and [25.U_Dd]. When the voltage is higher than [25.U_Lv], the bus/line is
regarded as live. When the voltage is lower than [25.U_Dd], the bus/line is regarded as dead.
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SIG
25.Blk_Chk
SIG
25.Blk_DdChk
SIG
25.Start_Chk
EN
[25.En_DdL_DdB]
>=1
&
&
[25.t_DdChk]
>=1
0ms
25.Ok_DdChk
&
25.Ok_DdL_DdB
EN
[25.En_DdL_LvB]
&
25.Ok_DdL_LvB
EN
[25.En_LvL_DdB]
SIG
UL>[25.U_Lv]
SIG
UL<[25.U_Dd]
SIG
UB>[25.U_Lv]
SIG
UB<[25.U_Dd]
SIG
25.Alm_VTS_UB
SIG
25.Alm_VTS_UL
&
25.Ok_LvL_DdB
>=1
Figure 3.23-10 Dead charge check logic
3.23.4.3 Synchrocheck Logic
SIG
25.Ok_SynChk
EN
25.En_NoChk
SIG
25.Ok_DdChk
>=1
25.Ok_Chk
Figure 3.23-11 Synchrocheck logic
This device comprises two synchrocheck modules, correspond to circuit breaker 1 and circuit
breaker 2 respectively.
3.23.5 Settings
Table 3.23-2 Settings of synchrocheck
No.
Name
Range
Step
Unit
Remark
Voltage selecting mode of line.
0: A-phase voltage
1
25.Opt_Source_UL
0~5
1
1: B-phase voltage
2: C-phase voltage
3: AB-phase voltage
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4: BC-phase voltage
5: CA-phase voltage
Voltage selecting mode of bus.
0: A-phase voltage
1: B-phase voltage
2
25.Opt_Source_UB
0~5
2: C-phase voltage
1
3: AB-phase voltage
4: BC-phase voltage
5: CA-phase voltage
3
25.U_Dd
0.05Un~0.8Un
0.001
V
Voltage threshold of dead check
4
25.U_Lv
0.5Un~Un
0.001
V
Voltage threshold of live check
5
25.K_Usyn
0.20-5.00
6
25.phi_Diff
0~ 89
Compensation
coefficient
synchronous voltage
1
Deg
Phase
difference
25.phi_Comp
0~359
1
Deg
limit
of
synchronism check for AR
Compensation
7
for
difference
for
phase
between
two
synchronous voltages
8
25.f_Diff
0.02~1.00
0.01
Hz
9
25.U_Diff
0.02Un~0.8Un
V
10
25.t_DeadChk
0.010~25.000
s
11
25.t_SynChk
0.010~25.000
s
Frequency
difference
25.En_fDiffChk
of
synchronism check for AR
Voltage
difference
limit
of
synchronism check for AR
Time delay to confirm dead check
condition
Time
delay
to
confirm
synchronism check condition
Enabling/disabling
12
limit
frequency
difference check
0 or 1
0: disable
1: enable
Enabling/disabling
13
25.En_SynChk
synchronism
check
0 or 1
0: disable
1: enable
Enabling/disabling dead line and
14
25.En_DdL_DdB
dead bus (DLDB) check
0 or 1
0: disable
1: enable
Enabling/disabling dead line and
15
25.En_DdL_LvB
live bus (DLLB) check
0 or 1
0: disable
1: enable
16
25.En_LvL_DdB
0 or 1
Enabling/disabling live line and
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dead bus (LLDB) check
0: disable
1: enable
Enabling/disabling AR without any
17
25.En_NoChk
check
0 or 1
0: disable
1: enable
3.24 Automatic Reclosure
3.24.1 General Application
To maintain the integrity of the overall electrical transmission system, the device is installed on the
transmission system to isolate faulted segments during system disturbances. Faults caused by
lightning, wind, or tree branches could be transient in nature and may disappear once the circuit is
de-energized. According to statistics, for overhead transmission line, 80%~90% of the faults on
overhead lines are the transient faults. Auto-reclosing systems are installed to restore the faulted
section of the transmission system once the fault is extinguished (providing it is a transient fault).
For certain transmission systems, auto-reclosure is used to improve system stability by restoring
critical transmission paths as soon as possible.
Besides overhead lines, other equipment failure, such as cables, busbar, transformer fault and so
on, are generally permanent fault, and auto-reclosing is not initiated after faulty feeder is tripped.
For some mixed circuits, such as overhead line with a transformer unit, hybrid transmission lines,
etc., it is required to ensure that auto-reclosing is only initiated for faults overhead line section, or
make a choice according to the situation.
3.24.2 Function Description
This auto-reclosing logic can be used with either integrated device or external device. When the
auto-reclosure is used with integrated device, the internal protection logic can initiate AR,
moreover, a tripping contact from external device can be connected to the device via opto-coupler
input to initiate integrated AR function.
When external auto-reclosure is used, the device can output some configurable output to initiate
external AR, such as, contact of initiating AR, phase-segregated tripping contact, single-phase
tripping contact, three-phase tripping contact and contact of blocking AR. According to
requirement, these contacts can be selectively connected to external auto-reclosure device to
initiate AR.
For phase-segregated circuit breaker, AR mode can be 1-pole AR for single-phase fault and
3-pole AR for multi-phase fault, or always 3-pole AR for any kinds of fault according to system
requirement. For persistent fault or multi-shot AR number preset value is reached, the device will
send final tripping command. The device will provide appropriate tripping command based on
faulty phase selection if adopting 1-pole AR.
AR can be enabled or disabled by logic setting or external signal via binary input. When AR is
enabled, the device will output contact [79.On], otherwise, output contact [79.Off]. After some
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reclosing conditions, such as, CB position, CB pressure and so on, is satisfied, the device will
output contact [79.Ready].
According to requirement, the device can be set as one-shot or multi-shot AR. When adopting
multi-shot AR, the AR mode of first time reclosing can be set as 1-pole AR, 3-pole AR or 1/3-pole
AR. The rest AR mode is only 3-pole AR and its number is determined by the maximum 3-pole
reclosing number.
For one-shot AR or first reclosing of multi-shot AR, AR mode can be selected by logic setting
[79.En_1PAR], [79.En_3PAR] and [79.En_1P/3PAR] or external signal via binary inputs. When
3-pole or 1/3-pole AR mode is selected, the following three types of check modes can be selected:
dead charge check, synchronism check and no check.
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3.24.3 Function Block Diagram
79
79.En
79.On
79.Blk
79.Off
79.Sel_1PAR
79.Close
79.Sel_3PAR
79.Ready
79.Sel_1P/3PAR
79.AR_Blkd
79.Trp
79.Active
79.Trp3P
79.Inprog
79.TrpA
79.Inprog_1P
79.TrpB
79.Inprog_3P
79.TrpC
79.Inprog_3PS1
79.Lockout
79.Inprog_3PS2
79.PLC_Lost
79.Inprog_3PS3
79.WaitMaster
79.Inprog_3PS4
79.CB_Healthy
79.WaitToSlave
79.Clr_Counter
79.Prem_Trp1P
79.Ok_Chk
79.Prem_Trp3P
79.Fail_Rcls
79.Succ_Rcls
79.Fail_Chk
79.Mode_1PAR
79.Mode_3PAR
79.Mode_1/3PAR
3.24.4 I/O Signals
Table 3.24-1 I/O signals of auto-reclosing
No.
Input Signal
1
79.En
2
79.Blk
3
79.Sel_1PAR
Description
Binary input for enabling AR. If the logic setting [79.En_ExtCtrl]=1,
enabling AR will be controlled by the external signal via binary input
Binary input for disabling AR. If the logic setting [79.En_ExtCtrl]=1,
disabling AR will be controlled by the external input
Input signal for selecting 1-pole AR mode of corresponding circuit
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breaker
Input signal for selecting 3-pole AR mode of corresponding circuit
4
79.Sel_3PAR
5
79.Sel_1P/3PAR
6
79.Trp
Input signal of single-phase tripping from line protection to initiate AR
7
79.Trp3P
Input signal of three-phase tripping from line protection to initiate AR
8
79.TrpA
Input signal of A-phase tripping from line protection to initiate AR
9
79.TrpB
Input signal of B-phase tripping from line protection to initiate AR
10
79.TrpC
Input signal of C-phase tripping from line protection to initiate AR
breaker
Input signal for selecting 1/3-pole AR mode of corresponding circuit
breaker
Input signal of blocking reclosing, usually it is connected with the
11
79.Lockout
operating signals of definite-time protection, transformer protection
and busbar differential protection, etc.
12
79.PLC_Lost
13
79.WaitMaster
14
79.CB_Healthy
15
79.Clr_Counter
Clear the reclosing counter
16
79.Ok_Chk
Synchrocheck condition of AR is met
No.
Input signal of indicating the alarm signal that signal channel is lost
Input signal of waiting for reclosing permissive signal from master
AR (when reclosing multiple circuit breakers)
The input for indicating whether circuit breaker has enough energy to
perform the close function
Output Signal
Description
1
79.On
Automatic reclosure is enabled
2
79.Off
Automatic reclosure is disabled
3
79.Close
Output of auto-reclosing signal
4
79.Ready
Automatic reclosure have been ready for reclosing cycle
5
79.AR_Blkd
Automatic reclosure is blocked
6
79.Active
Automatic reclosing logic is actived
7
79.Inprog
Automatic reclosing cycle is in progress
8
79.Inprog_1P
The first 1-pole AR cycle is in progress
9
79.Inprog_3P
3-pole AR cycle is in progress
10
79.Inprog_3PS1
First 3-pole AR cycle is in progress
11
79.Inprog_3PS2
Second 3-pole AR cycle is in progress
12
79.Inprog_3PS3
Third 3-pole AR cycle is in progress
13
79.Inprog_3PS4
Fourth 3-pole AR cycle is in progress
14
79.WaitToSlave
15
79.Prem_Trp1P
16
79.Prem_Trp3P
17
79.Fail_Rcls
Auto-reclosing fails
18
79.Succ_Rcls
Auto-reclosing is successful
19
79.Fail_Chk
Synchrocheck for AR fails
Waiting signal of automatic reclosing which will be sent to slave
(when reclosing multiple circuit breakers)
Single-phase circuit breaker will be tripped once protection device
operates
Three-phase circuit breaker will be tripped once protection device
operates
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20
79.Mode_1PAR
Output of 1-pole AR mode
21
79.Mode_3PAR
Output of 3-pole AR mode
22
79.Mode_1/3PAR
Output of 1/3-pole AR mode
Automatic reclosure counter
23
79.N_Total_Rcls Total
Recorded number of all reclosing attempts
24
79.N_Total_Rcls 1-pole Shot 1
Recorded number of first 1-pole reclosing attempts
25
79.N_Total_Rcls 3-pole Shot 1
Recorded number of first 3-pole reclosing attempts
26
79.N_Total_Rcls 3-pole Shot 2
Recorded number of second 3-pole reclosing attempts
27
79.N_Total_Rcls 3-pole Shot 3
Recorded number of third 3-pole reclosing attempts
28
79.N_Total_Rcls 3-pole Shot 4
Recorded number of fourth 3-pole reclosing attempts
3.24.5 Logic
3.24.5.1 AR Ready
For the first reclosing of multi-shot AR, AR mode can be 1-pole AR or 3-pole AR, however, the
selection is valid only to the first reclosing, after that it can only be 3-pole AR.
When logic setting [79.SetOpt] is set as “1”, AR mode is determined by logic settings. When logic
setting [79.SetOpt] is set as “0”, AR mode is determined by external signal via binary inputs.
An auto-reclosure must be ready to operate before performing reclosing. The output signal
[79.Ready] means that the auto-reclosure can perform at least one time of reclosing function, i.e.,
breaker open-close-open.
When the device is energized or after the settings are modified, the following conditions must be
met before the reclaim time begins:
1.
AR function is enabled.
2.
The circuit breaker is ready, such as, normal storage energy and no low pressure signal.
3.
The duration of the circuit breaker in closed position before fault occurrence is not less than
the setting [79.t_CBClsd].
4.
There is no block signal of auto-reclosing.
After the auto-reclosure operates, the auto-reclosure must reset, i.e., [79.Active]=0, in addition to
the above conditions for reclosing again.
The logic of AR ready is shown in Figure 3.24-1.
When there is a fault on an overhead line, the concerned circuit breakers will be tripped normally.
After fault is cleared, the tripping command will drop off immediately. In case the circuit breaker is
in failure, etc., and the tripping signal of the circuit breaker maintains and in excess of the time
delay [79.t_PersistTrp], AR will be blocked, as shown in the following figure.
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SIG
Any tripping signal
SIG
79.LockOut
SIG
1-pole AR Initiation
SIG
Any tripping signal
En
[79.En_PDF_Blk]
SIG
79.Sel_1PAR
En
[79.N_Rcls]=1
SIG
Three phase trip
SIG
Phase A open
SIG
Phase B open
[79.t_PersistTrp] 0ms
>=1
0ms [79.t_DDO_BlkAR]
[79.t_SecFault] 0ms
&
&
>=1
79.AR_Blkd
&
&
&
>=1
&
SIG
Phase C open
SIG
CB closed position
[79.t_CBClsd]
SIG
79.Active
>=1
SIG
Any tripping signal
&
>=1
&
[79.CB_Healthy]
0ms
SIG
79.AR_Blkd
>=1
SIG
BlockAR
SIG
79.Fail_Rcls
SIG
79.Fail_Chk
SIG
Last shot is made
EN
[79.En]
EN
[79.En_ExtCtrl]
BI
100ms
[79.t_CBReady]
&
79.Ready
>=1
&
>=1
&
>=1
79.On
&
SIG
79.En
SIG
79.Blk
&
Figure 3.24-1 Logic diagram of AR ready
The input signal [79.CB_Healthy] must be energized before auto-reclosure gets ready. Because
most circuit breakers can finish one complete process: open-closed-open, it is necessary that
circuit breaker has enough energy before reclosing. When the time delay of AR is exhausted, AR
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will be blocked if the input signal [79.CB_Healthy] is still not energized within time delay
[79.t_CBReady]. If this function is not required, the input signal [79.CB_Healthy] can be not to
configure, and its state will be thought as “1” by default.
When auto-reclosure is blocked, auto-reclosing failure, synchrocheck failure or last shot is
reached, or when the internal blocking condition of AR is met (such as, zone 3 of distance
protection operates, the device operates for multi-phase fault, three-phase fault and so on. These
flags of blocking AR have been configured in the device, additional configuration is not required.),
auto-reclosure will be discharged immediately and next auto-reclosing will be disabled.
When the input signal [79.LockOut] is energized, auto-reclosure will be blocked immediately. The
blocking flag of AR will be also controlled by the internal blocking condition of AR. When the
blocking flag of AR is valid, auto-reclosure will be blocked immediately.
When a fault occurs under pole disagreement condition, blocking AR can be enabled or disabled.
The time delay [79.t_SecFault] is used to discriminate another fault which begins after 1-pole AR
initiated. AR will be blocked if another fault happens after this time delay if the logic setting
[79.En_PDF_Blk] is set as “1”, and 3-pole AR will be initiated if [79.En_PDF_Blk] is set as “1”.
AR will be blocked immediately once the blocking condition of AR appears, but the blocking
condition of AR will drop off with a time delay [79.t_DDO_BlkAR] after blocking signal disappears.
When one-shot and 1-pole AR is enabled, auto-reclosure will be blocked immediately if there are
binary inputs of multi-phase CB position is energized.
When any protection element operates to trip, the device will output a signal [79.Active] until AR
drop off (Reset Command). Any tripping signal can be from external protection device or internal
protection element.
AR function can be enabled by internal logic settings of AR mode or external signal via binary
inputs in addition to internal logic setting [79.En]. When logic setting [79.En_ExtCtrl] is set as “1”,
AR enable are determined by external signal via binary inputs and logic settings. When logic
setting [79.En_ExtCtrl] set as “0”, AR enable are determined only by logic settings.
For one-shot reclosing, if 1-pole AR mode is selected, auto-reclosure will reset when there is
three-phase tripping signal or input signal of multi-phase open position.
3.24.5.2 AR Initiation
AR mode can be selected by external signal via binary inputs or internal logic settings. If the logic
setting [79.SetOpt] set as “1”, AR mode is determined by the internal logic settings. If the logic
settings [79.SetOpt] set as “0”, AR mode is determined by the external inputs.
1.
AR initiated by tripping signal of line protection
AR can be initiated by tripping signal of line protection, and the tripping signal may be from internal
trip signal or external trip signal.
When selecting 1-pole AR or 1/3-pole AR, line single-phase fault will trigger 1-pole AR. When AR
is ready to reclosing (“79.Ready”=1) and the single-phase tripping command is received, this
single-phase tripping command will be kept in the device, and 1-pole AR will be initiated after the
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single-phase tripping command drops off. The single-phase tripping command kept in the device
will be cleared after the completion of auto-reclosing sequence (Reset Command). Its logic is
shown in Figure 3.24-2.
SIG
Reset Command
&
>=1
SIG
Single-phase Trip
&
SIG
79.Ready
SIG
79.Sel_1PAR
SIG
79.Sel_1P/3PAR
&
1-pole AR Initiation
>=1
Figure 3.24-2 Single-phase tripping initiating AR
When selecting 3-pole AR or 1/3-pole AR, three-phase tripping will trigger 3-pole AR. When AR is
ready to reclosing (“79.Ready”=1) and the three-phase tripping command is received, this
three-phase tripping command will be kept in the device, and 3-pole AR will be initiated after the
three-phase tripping command drops off. The three-phase tripping command kept in the device will
be cleared after the completion of auto-reclosing sequence. (Reset Command) Its logic is shown
in Figure 3.24-3.
SIG
Reset Command
&
>=1
SIG
Three-phase Trip
&
SIG
79.Ready
SIG
79.Sel_3PAR
SIG
79.Sel_1P/3PAR
&
3-pole AR Initiation
>=1
Figure 3.24-3 Three-phase tripping initiating AR
2.
AR initiated by CB state
A logic setting [79.En_CBInit] is available for selection that AR is initiated by CB state. Under
normal conditions, when AR is ready to reclosing (“79.Ready”=1), AR will be initiated if circuit
breaker is open and corresponding phase current is nil. AR initiated by CB state can be divided
into initiating 1-pole AR and 3-pole AR, their logics are shown in Figure 3.24-4 and Figure 3.24-5
respectively. Usually normally closed contact of circuit breaker is used to reflect CB state.
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SIG
Phase A open
SIG
Phase B open
>=1
&
&
&
&
SIG
Phase C open
EN
[79.En_CBInit]
SIG
79.Ready
SIG
79.Sel_1PAR
SIG
79.Sel_1P/3PAR
1-pole AR Initiation
>=1
Figure 3.24-4 1-pole AR initiation
SIG
Phase A open
SIG
Phase B open
SIG
Phase C open
EN
[79.En_CBInit]
SIG
79.Ready
EN
[79.Sel_1PAR]
EN
[79.Sel_1P/3PAR]
&
&
&
3-pole AR Initiation
>=1
Figure 3.24-5 3-pole AR initiation
3.24.5.3 AR Reclosing
After AR is initiated, the device will output the initiating contact of AR. For 1-pole AR, in order to
prevent pole discrepancy protection from maloperation under pole discrepancy conditions, the
contact of “1-pole AR initiation” can be used to block pole discrepancy protection.
When the dead time delay of AR expires after AR is initiated, as for 1-pole AR, the result of
synchronism check will not be judged, and reclosing command will be output directly. As far as the
3-pole AR, if the synchronism check is enabled, the release of reclosing command shall be subject
to the result of synchronism check. After the dead time delay of AR expires, if the synchronism
check is still unsuccessful within the time delay [79.t_wait_Chk], the signal of synchronism check
failure (79.Fail_Syn) will be output and the AR will be blocked. If 3-pole AR with no-check is
enabled, the condition of synchronism check success (25.Ok_Chk) will always be established.
And the signal of synchronism check success (25.Ok_Chk) from the synchronism check logic can
be applied by auto-reclosing function inside the device or external auto-reclosure device.
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>=1
79.Inprog
SIG
1-pole AR Initiation
[79.t_Dd_1PS1]
0ms
SIG
3-pole AR Initiation
[79.t_Dd_3PS1]
0ms
>=1
AR Pulse
&
79.Inprog_3P
79.Inprog_1P
&
[79.t_Wait_Chk]
0ms
79.Fail_Chk
25.Ok_Chk
SIG
Figure 3.24-6 One-shot AR
In case pilot protection adopting permissive scheme, when the communication channel is
abnormal, pilot protection will be disabled. In the process of channel abnormality, an internal fault
occurs on the transmission line, backup protection at both ends of line will operate to trip the circuit
breaker of each end. The operation time of backup protection at both ends of the line is possibly
non-accordant, whilst the time delay of AR needs to consider the arc-extinguishing and insulation
recovery ability for transient fault, so the time delay of AR shall be considered comprehensively
according to the operation time of the device at both ends. When the communication channel of
main protection is abnormal (input signal [79.PLC_Lost] is energized), and the logic setting
[79.En_AddDly] is set as “1”, then the dead time delay of AR shall be equal to the original dead
time delay of AR plus the extra time delay [79.t_AddDly], so as to ensure the recovery of insulation
intensity of fault point when reclosing after transient fault. This extra time delay [t_ExtendDly] is
only valid for the first shot AR.
>=1
SIG
BI
Any tripping signal
&
&
[79.PLC_Lost]
SIG
79.Active
EN
[79.En_AddDly]
&
Extend AR time
Figure 3.24-7 Extra time delay and blocking logic of AR
Reclosing pulse length may be set through the setting [79.t_DDO_AR]. For the circuit breaker
without anti-pump interlock, a logic setting [79.En_CutPulse] is available to control the reclosing
pulse. When this function is enabled, if the device operates to trip during reclosing, the reclosing
pulse will drop off immediately, so as to prevent multi-shot reclosing onto fault. After the reclosing
command is issued, AR will drop off with time delay [79.t_Reclaim], and can carry out next
reclosing.
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SIG
AR Pulse
0ms
50ms
>=1
79.AR_Out
0ms
[79.t_DDO_AR]
[79.t_Reclaim]
SIG
Single-phase Trip
SIG
Three-phase Trip
EN
[79.En_CutPulse]
>=1
0ms
Reset Command
&
&
Figure 3.24-8 Reclosing output logic
The reclaim timer defines a time from the issue of the reclosing command, after which the
reclosing function resets. Should a new trip occur during this time, it is treated as a continuation of
the first fault. The reclaim timer is started when the CB closing command is given.
3.24.5.4 Reclosing Failure and Success
For transient fault, the fault will be cleared after the device operates to trip. After the reclosing
command is issued, AR will drop off after time delay [79.t_Reclaim], and can carry out next
reclosing. When the reclosing is unsuccessful or the reclosing condition is not met after AR
initiated, the reclosing will be considered as unsuccessful, including the following cases.
1.
For one-shot AR, if the tripping command is received again within reclaim time after the
reclosing pulse is issued, the reclosing shall be considered as unsuccessful.
2.
For multi-shot AR, if the reclosing times are equal to the setting value of AR number and the
tripping command is received again after the last reclosing pulse is issued, the reclosing shall
be considered as unsuccessful.
3.
The logic setting [79.En_FailCheck] is available to judge whether the reclosing is successful
by CB state, when it is set as “1”. If CB is still in open position with a time delay [79.t_Fail] after
the reclosing pulse is issued, the reclosing shall be considered as unsuccessful. For this case,
the device will issue a signal (79.Fail_Rcls) to indicate that the reclosing is unsuccessful, and
this signal will drop off after (Reset Command). AR will be blocked if the reclosing shall be
considered as unsuccessful.
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SIG
Any tripping command
SIG
Last shot is made
SIG
79.Inprog
SIG
79.AR_Blkd
&
>=1
0ms
200ms
>=1
79.Fail_Rcls
&
>=1
SIG
AR Pulse
SIG
CB closed
EN
[79.En_FailCheck]
&
[79.t_Fail]
0ms
&
&
0
[79.t_Fail]
&
79.Succ_Rcls
Figure 3.24-9 Reclosing failure and success
After unsuccessful AR is confirmed, AR will be blocked. AR will not enter into the ready state
unless the circuit breaker position drops off , and can only begin to enter into the ready state again
after the circuit breaker is closed.
3.24.5.5 Reclosing Numbers Control
The device may be set up into one-shot or multi-shot AR. Through the setting [79.N_Rcls], the
maximum number of reclosing attempts may be set up to 4 times. Generally, only one-shot AR is
selected. Some corresponding settings may be hidden if one-shot AR is selected.
1.
1-pole AR
[79.N_Rcls]=1 means one-shot reclosing. For one-shot 1-pole AR mode, 1-pole AR will be initiated
only for single-phase fault and respective faulty phase selected, otherwise, AR will be blocked. For
single-phase transient fault on the line, line protection device will operate to trip and 1-pole AR is
initiated. After the dead time delay for 1-pole AR is expired, the device will send reclosing pulse,
and then the auto-reclosure will drop off after the time delay [79.t_Reclaim] to ready for the next
reclosing. For permanent fault, the device will operate to trip again after the reclosing is performed,
and the device will output the signal of reclosing failure [79.Fail_Rcls].
[79.N_Rcls]>1 means multi-shot reclosing. For multi-shot reclosing in 1-pole AR mode, the first
reclosing is 1-pole AR, and the subsequent reclosing can only be 3-pole AR. For single-phase
transient fault on the line, line protection device will operate to trip and then 1-pole AR is initiated.
After the dead time delay of the first reclosing is expired, the device will send reclosing pulse, and
then the auto-reclosure will drop off after the time delay [79.t_Reclaim] to ready for the next
reclosing. For permanent fault, the device will operate to trip again after the reclosing is performed,
and then 3-pole AR is initiated. At this time, the time delay applies the setting [79.t_Dd_3PS2].
After the time delay is expired, if the reclosing condition is met, the device will send reclosing pulse.
The sequence is repeated until the reclosing is successful or the maximum permit reclosing
number [79.N_Rcls] is reached. If the first fault is multi-phase fault, the device operates to trip
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three-phase and initiate 3-pole AR. At this time, the time delay applies the setting [79.t_Dd_3PS1].
For the possible reclosing times of 3-pole AR in 1-pole AR mode, please refer to Table 3.24-2.
2.
3-pole AR
[79.N_Rcls]=1 means one-shot reclosing. For one-shot 3-pole AR mode, line protection device will
operate to trip when a transient fault occurs on the line and 3-pole AR will be initiated. After the
dead time delay for 3-pole AR is expired, the device will send reclosing pulse, and then the
auto-reclosure will drop off after the time delay [79.t_Reclaim] to ready for the next reclosing. For
permanent fault, the device will operate to trip again after the reclosing is performed, and the
device will output the signal of reclosing failure [79.Fail_Rcls].
[79.N_Rcls]>1 means multi-shot reclosing. For multi-shot reclosing in 3-pole AR mode, line
protection device will operate to trip when a transient fault occurs on the line and 3-pole AR will be
initiated. After the dead time delay of the first reclosing is expired, the device will send reclosing
pulse, and then the auto-reclosure will drop off after the time delay [79.t_Reclaim] to ready for the
next reclosing. For permanent fault, the device will operate to trip again after the reclosing is
performed, and then 3-pole AR is initiated after the tripping contact drops off. After the time delay
for AR is expired, the device will send reclosing pulse. The sequence is repeated until the
reclosing is successful or the maximum permit reclosing number [79.N_Rcls] is reached.
3.
1/3-pole AR
[79.N_Rcls]=1 means one-shot reclosing. For one-shot 1/3-pole AR mode, line protection device
will operate to trip when a transient fault occurs on the line and 1-pole AR will be initiated for
single-phase fault and 3-pole AR will be initiated for multi-phase fault. After respective dead time
delay for AR is expired, the device will send reclosing pulse, and then the auto-reclosure will drop
off after the time delay [79.t_Reclaim] to ready for the next reclosing. For permanent fault, the
device will operate to trip again after the reclosing is performed, and the device will output the
signal of reclosing failure [79.Fail_Rcls].
[79.N_Rcls]>1 means multi-shot reclosing. For multi-shot reclosing in 1/3-pole AR mode, line
protection device will operate to trip when a transient fault occurs on the line and AR will be
initiated. After the dead time delay of the first reclosing is expired, the device will send reclosing
pulse, and then the auto-reclosure will drop off after the time delay [79.t_Reclaim] to ready for the
next reclosing. For permanent fault, the device will operate to trip again after the reclosing is
performed, and then 3-pole AR is initiated after the tripping contact drops off. After the time delay
for AR is expired, the device will send reclosing pulse. The sequence is repeated until the
reclosing is successful or the maximum permit reclosing number [79.N_Rcls] is reached. For the
possible reclosing times of 3-pole AR in 1/3-pole AR mode, please refer to Table 3.24-2.
The table below shows the number of reclose attempts with respect to the settings and AR modes.
Table 3.24-2 Reclosing number
Setting Value
1-pole AR
3-pole AR
1/3-pole AR
N-1AR
N-3AR
N-1AR
N-3AR
N-1AR
N-3AR
1
1
0
0
1
1
1
2
1
1
0
2
1
2
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3
1
2
0
3
1
3
4
1
3
0
4
1
4
N-1AR: the reclosing number of 1-pole AR
N-3AR: the reclosing number of 3-pole AR
4.
Coordination between dual auto-reclosures
Duplicated protection configurations are normally applied for UHV lines. If reclosing function is
integrated within line protections, the auto-reclosing function can be enabled in any or both of the
line protections without coordination.
If both sets of reclosing functions are enabled, when one of them first recloses onto a permanent
fault, the other will block the reclosing pulse according to the latest condition of the faulty phase.
For one-shot AR mode, if the current is detected in the faulty phase, AR will be blocked
immediately to prevent the circuit breaker from repetitive reclosing. For multi-shot AR mode, if the
current is detected in the faulty phase, the current reclosing pulse will be blocked and go into the
next reclosing pulse logic automatically. If the maximum permitted reclosing number [79.N_Rcls] is
reached, the auto-reclosure will drop off after the time delay [79.t_Reclaim].
For one-shot or multi-shot AR, there is a corresponding reclosing counter at each stage. After
reclosing pulse is sent, the corresponding reclosing counter will plus 1 and the reclosing counter
may be cleared by the submenu “Clear Counter”. If the circuit breaker is reclosed by other
devices during AR initiation, the auto-reclosure will go into the next reclosing pulse logic.
3.24.5.6 AR Time Sequence Diagram
The following two examples indicate typical time sequence of AR process for transient fault and
permanent fault respectively.
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Signal
Fault
Trip
CB 52b
Open
[79.t_Reclaim]
79.t_Reclaim
79.Active
79.Inprog
[79.t_Dd_1PS1]
79.Inprog_1P
[79.t_Dd_1PS1]
79.Ok_Chk
AR Out
[79.t_DDO_AR]
79.Perm_Trp3P
79.Fail_Rcls
Time
Figure 3.24-10 Single-phase transient fault
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Signal
Fault
Trip
Open
52b
Open
[79.t_Reclaim]
79.t_Reclaim
79.Active
79.Inprog
79.Inprog_1P
[79.t_Dd_1PS1]
79.Inprog_3PS2
[79.t_Dd_3PS2]
79.Ok_Chk
AR Out
[79.t_DDO_AR]
[79.t_DDO_AR]
79.Perm_Trp3P
79.Fail_Rcls
200ms
Time
Figure 3.24-11 Single-phase permanent fault ([79.N_Rcls]=2)
3.24.6 Settings
Table 3.24-3 Settings of auto-reclosing
No.
Name
Range
Step
Unit
1
Remark
1
79.N_Rcls
1~4
Maximum number of reclosing attempts
2
79.t_Dd_1PS1
0.000~600.000
0.001
s
Dead time of first shot 1-pole reclosing
3
79.t_Dd_3PS1
0.000~600.000
0.001
s
Dead time of first shot 3-pole reclosing
4
79.t_Dd_3PS2
0.000~600.000
0.001
s
5
79.t_Dd_3PS3
0.000~600.000
0.001
s
6
79.t_Dd_3PS4
0.000~600.000
0.001
s
7
79.t_CBClsd
0.000~600.000
0.001
s
Dead time of second shot 3-pole
reclosing
Dead time of third shot 3-pole reclosing
Dead
time
of
fourth
shot
3-pole
reclosing
Time delay of circuit breaker in closed
position before reclosing
Time delay to wait for CB healthy, and
8
79.t_CBReady
0.000~600.000
0.001
s
begin to timing when the input signal
[79.CB_Healthy] is de-energized and if
it is not energized within this time delay,
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AR will be blocked.
Maximum wait time for synchronism
9
79.t_WaitChk
0.000~600.000
0.001
s
10
79.t_Fail
0.000~600.000
0.001
s
11
79.t_DDO_AR
0.000~600.000
0.001
s
Pulse width of AR closing signal
12
79.t_Reclaim
0.000~600.000
0.001
s
Reclaim time of AR
13
79.t_PersistTrp
0.000~600.000
0.001
s
check
Time delay allow for CB status change
to conform reclosing successful
Time delay of excessive trip signal to
block auto-reclosing
Drop-off time delay of blocking AR,
14
79.t_DDO_BlkAR
0.000~600.000
0.001
s
when
blocking
disappears,
signal
AR
blocking
for
AR
condition
drops off after this time delay
15
79.t_AddDly
0.000~600.000
0.001
s
16
79.t_WaitMaster
0.000~600.000
0.001
s
Additional time delay for auto-reclosing
Maximum
wait
time
for
reclosing
permissive signal from master AR
Time delay of discriminating another
fault, and begin to times after 1-pole AR
17
79.t_SecFault
0.000~600.000
0.001
s
initiated, 3-pole AR will be initiated if
another fault happens during this time
delay. AR will be blocked if another fault
happens after that.
Enabling/disabling
auto-reclosing
blocked when a fault occurs under pole
18
79.En_PDF_Blk
disagreement condition
0 or 1
0: disable
1: enable
Enabling/disabling auto-reclosing with
19
79.En_AddDly
an additional dead time delay
0 or 1
0: disable
1: enable
Enabling/disabling adjust the length of
20
79.En_CutPulse
reclosing pulse
0 or 1
0: disable
1: enable
Enabling/disabling confirm whether AR
21
79.En_FailCheck
is successful by checking CB state
0 or 1
0: disable
1: enable
Enabling/disabling auto-reclosing
22
79.En
0 or 1
0: disable
1: enable
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Enabling/disabling AR by external input
23
79.En_ExtCtrl
signal besides logic setting [79.En]
0 or 1
0: only logic setting
1: logic setting and external input signal
Enabling/disabling AR be initiated by
24
79.En_CBInit
open state of circuit breaker
0 or 1
0: disable
1: enable
Option of AR priority
0 None (single-breaker arrangement)
25
79.Opt_Priority
1
0, 1 or 2
High (master AR of multi-breaker
arrangement)
2
Low (slave AR of multi-breaker
arrangement)
Control option of AR mode
1: select AR mode by internal logic
26
79.SetOpt
0 or 1
settings
0: select AR mode by external input
signals
Enabling/disabling 1-pole AR mode
27
79.En_1PAR
0 or 1
0: disable
1: enable
Enabling/disabling 3-pole AR mode
28
79.En_3PAR
0 or 1
0: disable
1: enable
Enabling/disabling 1/3-pole AR mode
29
79.En_1P/3PAR
0 or 1
0: disable
1: enable
3.25 Transfer Trip
3.25.1 General Application
This function module provides a binary input [TT.Init] for receiving transfer trip from the remote end.
This feature ensures simultaneous tripping at both ends.
3.25.2 Function Description
Transfer trip can be controlled by local fault detector by logic settings [TT.En_FD_Ctrl]. In addition,
the binary input [TT.Init] is always supervised, and the device will issue an alarm [TT.Alm] and
block transfer trip once the binary input is energized for longer than 4s and drop off after resumed
to normal with a time delay of 10s.
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3.25.3 Function Block Diagram
TT
TT.Init
TT.Alm
TT.En
TT.Op
TT.Blk
TT.On
3.25.4 I/O Signals
Table 3.25-1 I/O signals of transfer trip
No.
Input Signal
1
TT.Init
2
TT.En
3
TT.Blk
No.
Description
Input signal of initiating transfer trip after receiving transfer trip
Transfer trip enabling input, it is triggered from binary input or programmable logic
etc.
Transfer trip blocking input, it is triggered from binary input or programmable logic
etc.
Output Signal
Description
1
TT.Alm
Input signal of receiving transfer trip is abnormal
2
TT.Op
Transfer trip operates
3
TT.On
Transfer trip is enabled
3.25.5 Logic
SIG
TT.En
&
TT.On
SIG
TT.Blk
BI
[TT.Init]
SIG
TT.Alm
EN
[TT.En_FD_Ctrl]
SIG
local fault detector
BI
4s
10s
TT.Alm
&
>=1
TT.Op
[TT.Init]
Figure 3.25-1 Logic diagram of transfer trip
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3.25.6 Settings
Table 3.25-2 Settings of Transfer trip
No.
1
2
Name
TT.t_Op
TT.En_FD_Ctrl
Range
Step
Unit
0.000~600.000
0.001
s
Remark
Time delay of transfer trip
Transfer trip controlled by local fault detector
element
0: not controlled by local fault detector
element
1: controlled by local fault detector element
0 or 1
3.26 Trip Logic
3.26.1 General Application
For any enabled protection tripping elements, their operation signal will convert to appropriate
tripping signals through trip logics and then trigger output contacts by configuration.
3.26.2 Function Description
This module gathers signals from phase selection and protection tripping elements and then
converts the operation signal from protection tripping elements to appropriate tripping signals.
The device can implement phase-segregated tripping or three-phase tripping, and may output the
contact of blocking AR and the contact of initiating breaker failure protection.
3.26.3 I/O Signals
Table 3.26-1 I/O signals of trip logic
No.
1
Input Signal
Description
Faulty phase selection (phase
The result of fault phase selection
A, phase B, phase C)
If multi-phase is selected, three-phase breakers will be tripped.
Input signal of permitting three-phase tripping
2
PrepTrp3P
When this signal is valid, three-phase tripping will be adopted for any
kind of faults.
3
Line tripping element
4
Breaker tripping element
5
Initiating BFP element
No.
All operation signals of various line protection tripping elements, such
as distance protection, overcurrent protection, etc.
All protection tripping elements concerned with breaker, such as pole
discrepancy protection, etc.
Tripping element to initiate BFP
Output Signal
Description
1
TrpA
Tripping A-phase circuit breaker
2
TrpB
Tripping B-phase circuit breaker
3
TrpC
Tripping C-phase circuit breaker
4
Trp
Tripping any phase circuit breaker
5
3PTrp
Tripping three-phase circuit breaker
6
BFI_A
Protection tripping signal of A-phase configured to initiate BFP, BFI
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signal shall be reset immediately after tripping signal drops off.
Protection tripping signal of B-phase configured to initiate BFP, BFI
7
BFI_B
8
BFI_C
9
BFI
10
Trp3P_PSFail
Initiating three-phase tripping due to failure in fault phase selection
11
BlockAR
Blocking auto-reclosing
signal shall be reset immediately after tripping signal drops off.
Protection tripping signal of C-phase configured to initiate BFP, BFI
signal shall be reset immediately after tripping signal drops off.
Protection tripping signal configured to initiate BFP, BFI signal shall be
reset immediately after tripping signal drops off.
3.26.4 Logic
After tripping signal is issued, the tripping pulse will be kept as same as the setting [t_Dwell_Trp] at
least. When the time delay is expired, for phase-segregated tripping, the tripping signal will drop
off immediately if the faulty current of corresponding phase is less than 0.06In (In is secondary
rated current), otherwise the tripping signal will be always kept until the faulty current of
corresponding phase is less than 0.06In. For three-phase tripping, the tripping signal will drop off
immediately if three-phase currents are all less than 0.06In, otherwise the tripping signal will be
always kept until three-phase currents are all less than 0.06In.
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SIG
FPS (phase A)
&
>=1
&
TrpA
SIG
FPS (phase B)
&
>=1
&
TrpB
SIG
FPS (phase C)
&
>=1
&
TrpC
SIG
Line tripping element
&
&
>=1
>=1
>=1
&
Trp
>=1
&
3PTrp
&
>=1
&
200ms
SIG
Breaker tripping element
SIG
PrepTrp3P
EN
[En_3PTrp]
0ms
Trp3P_PSFail
>=1
&
SIG
Trp
SIG
TrpA
SIG
SIG
SIG
SIG
SIG
[t_Dwell_Trp]
0
&
[t_Dwell_Trp]
0
&
[t_Dwell_Trp]
0
&
Ia<0.06In
TrpB
Ib<0.06In
TrpC
Ib<0.06In
&
BFI_A
&
BFI_B
&
BFI_C
&
BFI
SIG
Initiating BFP element
Figure 3.26-1 Tripping logic
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SIG
85.Op_DEF
EN
[85.DEF.En_BlkAR]
SIG
Y.ZGx.Op
EN
[Y.ZGx.En_BlkAR]
SIG
50/51Px.Op
EN
[50/51Px.En_BlkAR]
SIG
50/51Gx.Op
EN
50/51Gx.En_BlkAR
SIG
51PVT.Op
SIG
51GVT.Op
SIG
59Pz.Op
SIG
27Pz.Op
SIG
81U.UFx.Op
SIG
81O.OFx.Op
SIG
50BF.Op_t1
SIG
50BF.Op_t2
SIG
49-1.Op
SIG
49-2.Op
SIG
50STB.Op
SIG
62PD.Op
SIG
46BC.Op
SIG
TT.Op
EN
En_MPF_Blk_AR
SIG
Multi-phase fault
EN
En_3PF_Blk_AR
SIG
Three-phase fault
EN
En_PhSF_Blk_AR
SIG
Phase selection failure
SIG
21SOTF.Op
SIG
50GSOTF.Op
SIG
Manual closing signal
&
&
&
>=1
&
>=1
>=1
>=1
>=1
>=1
BlockAR
>=1
>=1
>=1
>=1
>=1
&
&
>=1
>=1
&
>=1
&
Figure 3.26-2 Blocking AR logic
Where:
Y can be 21M or 21Q
x can be 1, 2, 3, 4 or 5
z can be 1 or 2
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3.26.5 Settings
Table 3.26-2 Settings of trip logic
No.
Name
Range
Step
Unit
Remark
Enabling/disabling
1
En_MPF_Blk_AR
auto-reclosing
blocked
when multi-phase fault happens
0 or 1
0: disable
1: enable
Enabling/disabling
2
En_3PF_Blk_AR
auto-reclosing
blocked
when three-phase fault happens
0 or 1
0: disable
1: enable
Enabling/disabling
3
En_PhSF_Blk_AR
auto-reclosing
blocked
when faulty phase selection fails
0 or 1
0: disable
1: enable
Enabling/disabling three-phase tripping mode
4
En_3PTrp
for any fault conditions
0 or 1
0: disable
1: enable
The dwell time of tripping command, empirical
value is 0.04
5
t_Dwell_Trp
0.000~10.000
0.001
s
The tripping contact shall drop off under
conditions of no current or protection tripping
element drop-off.
3.27 VT Circuit Supervision
3.27.1 General Application
The purpose of VT circuit supervision is to detect whether VT circuit is normal. Because some
protection functions, such as distance protection, under-voltage protection and so on, will be
influenced by VT circuit failure, these protection functions should be disabled when VT circuit fails.
VT circuit failure can be caused by many reasons, such as fuse blown due to short-circuit fault,
poor contact of VT circuit, VT maintenance and so on. The device can detect them and issue an
alarm signal to block relevant protection functions. However, the alarm of VT circuit failure should
not be issued when the following cases happen.
1.
Line VT is used as protection VT and the protected line is out of service.
2.
Only current protection functions are enabled and VT is not connected to the device.
3.27.2 Function Description
VT circuit supervision can detect failure of single-phase, two-phase and three-phase on protection
VT. Under normal condition, the device continuously supervises input voltage from VT, VT circuit
failure signal will be activated if residual voltage exceeds the threshold value or positive-sequence
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voltage is lower than the threshold value. If the device is under pickup state due to system fault or
other abnormality, VT circuit supervision will be disabled.
Under normal conditions, the device detect residual voltage greater than 8% of Unn to determine
single-phase or two-phase VT circuit failure, and detect three times positive-sequence voltage less
than Unn to determine three-phase VT circuit failure. Upon detecting abnormality on VT circuit, an
alarm will comes up after 1.25s and drop off with a time delay of 10s after VT circuit restored to
normal.
VT (secondary circuit) MCB auxiliary contact as a binary input can be connected to the binary
input circuit of the device. If MCB is open (i.e. [VTS.MCB_VT] is energized), the device will
consider the VT circuit is not in a good condition and issues an alarm without a time delay. If the
auxiliary contact is not connected to the device, VT circuit supervision will be issued with time
delay as mentioned in previous paragraph.
When VT is not connected into the device, the alarm will be not issued if the logic setting
[VTS.En_Out_VT] is set as “1”. However, the alarm is still issued if the binary input [VTS.MCB_VT]
is energized, no matter that the logic setting [VTS.En_Out_VT] is set as “1” or “0”.
When VT neutral point fails, third harmonic of residual voltage is comparatively large. If third
harmonic amplitude of residual voltage is larger than 0.2Unn and without operation of fault
detector element, VT neutral point failure alarm signal [VTNS.Alm] will be issued after 1.25s and
drop off with a time delay of 10s after three phases voltage restored to normal.
3.27.3 Function Block Diagram
VTS
VTS.En
VTNS
VTS.Alm
VTS.Blk
VTNS.En
VTNS.Alm
VTNS.Blk
VTS.MCB_VT
3.27.4 I/O Signals
Table 3.27-1 I/O signals of VT circuit supervision
No.
Input Signal
1
VTS.En
2
VTS.Blk
3
VTNS.En
4
VTNS.Blk
Description
VT supervision enabling input, it is triggered from binary input or programmable
logic etc.
VT supervision blocking input, it is triggered from binary input or programmable
logic etc.
VT neutral point supervision enabling input, it is triggered from binary input or
programmable logic etc.
VT neutral point supervision blocking input, it is triggered from binary input or
programmable logic etc.
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5
No.
VTS.MCB_VT
Binary input for VT MCB auxiliary contact
Output Signal
Description
1
VTS.Alm
Alarm signal to indicate VT circuit fails
2
VTNS.Alm
Alarm signal to indicate VT neutral point fails
3.27.5 Logic
SIG
3U0>0.08Unn
SIG
3U1<Unn
EN
[VTS.En_Line_VT]
SIG
52b_3P
EN
[VTS.En_Out_VT]
>=1
&
1.25s
10s
>=1
BI
EN
&
&
>=1
[VTS.MCB_VT]
[VTS.En]
SIG
[VTS.En]
SIG
[VTS.Blk]
&
VTS.Alm
&
Figure 3.27-1 Logic of VT circuit supervision
OTH
U03>0.2Unn
EN
[VTS.En_Out_VT]
EN
[VTS.En]
SIG
[VTNS.En]
SIG
[VTNS.Blk]
&
1.25s
10s
&
VTNS.Alm
&
Figure 3.27-2 Logic of VT neutral point supervision
Unn: rated phase-to-phase voltage
U03: third harmonic amplitude of neutral point residual voltage
3.27.6 Settings
Table 3.27-2 VTS Settings
No.
Name
Range
Step
Unit
Remark
No voltage used for protection calculation
1: enable
1
VTS.En_Out_VT
0 or 1
0: disable
In general, when VT is not connected to the
device, this logic setting should be set as “1”
2
VTS.En_Line_VT
0 or 1
Voltage selection for protection calculation from
busbar VT or line VT
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1: line VT
0: busbar VT
Alarm function of VT circuit supervision
3
VTS.En
0 or 1
1: enable
0: disable
3.28 CT Circuit Supervision
3.28.1 General Application
The purpose of the CT circuit supervision is to detect any abnormality on CT secondary circuit.
3.28.2 Function Description
Under normal conditions, CT secondary signal is continuously supervised by detecting the
residual current and voltage. If residual current is larger than 10%In whereas residual voltage is
less than 3V, an error in CT circuit is considered, the concerned protection functions are blocked
and an alarm is issued with a time delay of 10s and drop off with a time delay of 10s after CT
circuit is restored to normal condition.
3.28.3 Function Block Diagram
CTS
CTS.Alm
CTS.En
CTS.Blk
3.28.4 I/O Signals
Table 3.28-1 I/O signals of CT circuit supervision
No.
Input Signal
Description
CT circuit supervision enabling input, it is triggered from binary input or
1
CTS.En
2
CTS.Blk
3
U3P
Three-phase voltage input
4
I3P
Three-phase current input
No.
1
Output Signal
CTS.Alm
programmable logic etc.
CT circuit supervision blocking input, it is triggered from binary input or
programmable logic etc.
Description
Alarm signal to indicate CT circuit fails
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3.28.5 Logic
SIG
CTS.En
SIG
CTS.Blk
SIG
3I0>0.1In
SIG
3U0<3V
SIG
IA<0.06In
SIG
IB<0.06In
SIG
IC<0.06In
&
&
10s
10s
CTS.Alm
&
>=1
Figure 3.28-1 Logic diagram of CT circuit failure
3.29 Control and Synchrocheck for Manual Closing
3.29.1 General Application
The purpose of control is to open or close primary equipment, including circuit breaker (CB),
disconnector (DS) and earth switch (ES), or to issue outputs for signaling purpose. Synchronism
check and dead check are also provided for the control processes as below:
1. Local manual closing CB
2. Local closing CB by access the menu “Local Cmd→Manual Control”
3. Remote closing CB from SCADA (i.e., local HMI system) or control center (CC)
Programmable interlocking logics within a bay and amongst different bays are provided by using
PCS-Explorer.
3.29.2 Function Description
1. Control
High reliability is ensured by adopting the principle of selection before operation (abbreviated
SBO). When the binary input [BI_Maintenance] is energized as “1”, remote control from
SCADA/CC will be disabled, but local control will not be influenced.
The integrated control process is as follow:
1) The control source (SCADA/CC, or local LCD control operation, or manual control operation)
sends control selection command to this device
2) This device sends back the control selection result (success or failure) to the control source
after logic judgment
3) The control source sends control operation command to this device if the control selection
result is “success”. The control source will send control cancellation command to this device if
the control selection result is “failure”.
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4) This device sends back the control operation result (success or failure) to the control source
after logic judgment.
Logic calculation result of interlocking is input to the remote control module as a criterion of remote
operation. When the enabling parameter of remote open/close interlock is “1”, remote control
module determines whether it can be output according to the calculation result of interlocking. If
the current breaker position or programmable part can meet the interlocking condition, remote
control can be output normally, otherwise remote operation is blocked. When the enabling
parameter of remote open/close interlock is “0”, interlocking function is disabled and remote
control will be output directly without the judgment of interlocking.
Holding time of each binary output contact can be set by configuring corresponding settings and is
often configured as 250ms. However, for the control circuits without latched relays, the holding
time must be longer to ensure successful control operation.
EN
[En_Cls01_Blk]
SIG
Sig_En_CtrlCls01
BI
[BI_Rmt/Loc]
SIG
Cmd_LocCtrl
>=1
&
[t_DDO_Cls01] 0ms
[Op_Cls01]
[t_DDO_Clsxx] 0ms
[Op_Clsxx]
&
>=1
&
SIG
Cmd_RmtCtrl
SIG
Sig_Ok_Chk
SET
MCBrd.25.En_NoChk
EN
[En_Clsxx_Blk]
SIG
Sig_En_CtrlClsxx
BI
[BI_Rmt/Loc]
>=1
>=1
&
&
>=1
SIG
Cmd_LocCtrl
&
SIG
Cmd_RmtCtrl
Figure 3.29-1 Logic diagram of closing primary equipment
Where:
xx=02~10
Only the first closing command “Op_Cls01” controlled by synchrocheck logic can be used for CB
closing.
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EN
[En_Opnxx_Blk]
SIG
Sig_En_CtrlOpnxx
BI
[BI_Rmt/Loc]
SIG
Cmd_LocCtrl
>=1
&
[t_DDO_Opnxx] 0ms
[Op_Opnxx]
&
>=1
&
SIG
Cmd_RmtCtrl
Figure 3.29-2 Logic diagram of open primary equipment
Where:
xx=01~10
The control output fulfills signal output circuit, and opens or closes circuit breaker, disconnector
and earth switch according to the control command. Object manipulation strictly performs three
steps: selection, check and excute, and perform output relay check, to ensure that the remote
control can be excuted safely and reliably.
When logic interlock is enabled, the device can receive the programmable interlock logic. The
device can automatically initiate the interlock logic to determine whether to allow control
operations. The device provides corresponding settings ([En_Opnxx_Blk] and [En_Clsxx_Blk]) for
each control object. When they are set as “1”, the interlock function of the corresponding control
object is enabled. The interlock logic can be configured by using PCS-Explorer, and downloaded
to the device via the Ethernet port. If the interlock function is enabled, but it is not configured the
interlock logic, the result of the logic output is 0.
The control record is a file which is used to store remote control command records of this device
circularly. If the record number is to 256, the storage area of the control record will be full. If this
device has received a new remote command, this device will delete the oldest remote control
record, and then store the latest remote control record.
2. Synchrocheck
Three synchrocheck modes are designed for CB closing: no check mode, dead check mode and
synchronism check mode, if any one of the condition of three synchrocheck modes satisfied, then
synchrocheck signal “Sig_Ok_Chk” will be asserted.
The synchronism check function measures the conditions across the circuit breaker and compares
them with the corresponding settings. The output is only given if all measured quantities are
simultaneously within their set limits. Compared to the synchronism check for auto-reclosing, an
additional criterion is applied to check the rate of frequency change (df/dt) between both sides of
the CB.
When the following four conditions are all met, the synchronism check is successful.
1) Phase angle difference between incoming voltage and reference voltage is less than the
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setting [MCBrd.25.phi_Diff]
2) Frequency difference between incoming voltage and reference voltage is less than
[MCBrd.25.f_Diff]
3) Voltage difference between between incoming voltage and reference voltage is less than
[MCBrd.25.U_Diff]
4) Rate of frequency change between incoming voltage and reference voltage is less than
[MCBrd.25.df/dt]
The dead check function measures the amplitude of line voltage and bus voltage at both sides of
the circuit breaker, and then compare them with the live check setting [MCBrd.25.U_Lv] and the
dead check setting [MCBrd.25.U_Dd]. The dead check is successful when the measured
quantities comply with the criteria.
When this device is set to work in no check mode and receives a closing command, CB will be
closed without synchronism check and dead check.
3.29.3 Function Block Diagram
CSWI
Sig_En_CtrlOpnxx
Op_Opnxx
Sig_En_CtrlClsxx
Op_Clsxx
Sig_Ok_Chk
Cmd_RmtCtrl
Cmd_LocCtrl
BI_Rmt/Loc
3.29.4 I/O Signals
Table 3.29-1 I/O signals of control
No.
Input Signal
Description
1
Sig_En_CtrlOpnxx
It is the interlock status of No.xx open output of BO module (xx=01~10)
2
Sig_En_CtrlClsxx
It is the interlock status of No.xx closing output of BO module (xx=01~10)
From receiving a closing command, this device will continuously check
whether the 2 voltages (Incoming voltage and reference voltage) involved
in synchronism check(or dead check) can meet the criteria.
3
Sig_Ok_Chk
Within the duration of [MCBrd.25.t_Wait_Chk], if the synchronism
check(or dead check) criteria are not met, [Sig_Ok_Chk] will be set as “0”;
if the synchronism check(or dead check) criteria are met, [Sig_Ok_Chk]
will be set as “1”.
4
Cmd_LocCtrl
Access the menu “Local Cmd→Manual Control” to issue control
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command locally.
If the binary input [BI_Rmt/Loc] is energized as “1”, local control will be
disabled. If the binary input [BI_Rmt/Loc] is de-energized as “0”, local
control will be enabled.
If the binary input [BI_Rmt/Loc] is energized as “1”, remote control from
SCADA/CC will be enabled. If the binary input [BI_Rmt/Loc] is
5
de-energized as “0”, remote control from SCADA/CC will be disabled.
Cmd_RmtCtrl
Remote control commands from SCADA/CC can be transmitted via
IEC60870-5-103 protocol or IEC61850 protocol.
It is used to select the remote control or the local control.
“1”: the remote control, all the binary outputs can only be remotely
6
controlled by SCADA or control centers.
BI_Rmt/Loc
“0” the local control, each binary output can only be applied to open/close
CB/DS/ES locally. Each binary output can also be applied issue a signal
locally.
No.
Output Signal
Description
1
Op_Opnxx
No.xx command output for open.
2
Op_Clsxx
No.xx command output for closing.
3.29.5 Settings
Table 3.29-2 Control Settings
No.
Name
Range
Step
Unit
Remark
No.xx holding time of a normal open contact of
1
t_DDO_Opnxx
0~65535
1
ms
remote opening CB, disconnector or for
signaling purpose.
(xx=01, 02….10)
No.xx closing time of a normal open contact of
2
t_DDO_Clsxx
0~65535
1
ms
remote
closing
CB,
disconnector
or
for
signaling purpose.
(xx=01, 02….10)
These settings are applied to configure the
3
t_DPU_DPosxx
0~60000
1
ms
debouncing time. “DPU” is the abbreviation of
“Delay Pick Up”. (xx=01, 02….)
The items in this submenu are applied together
with
[Sig_En_CtrlOpnxx]
in
the
submenu
“Inputs”→“Interlock_Status”.
1: No.xx open output of the BO module is
4
En_Opnxx_Blk
0 or 1
controlled by the interlocking logic. If the
interlocking
conditions
are
met
(i.e.:
[Sig_En_CtrlOpnxx]=1), opening output xx has
output, otherwise (i.e.: [Sig_En_CtrlOpnxx]=0)
opening output xx has no output.
0: No.xx open output of the BO module is not
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controlled by the interlocking logic. Whether the
interlocking conditions are met or not, opening
output xx has output.
(xx=01, 02….10)
The items in this submenu are applied together
with
[Sig_En_CtrlClsxx]
in
the
submenu
“Inputs”→“Interlock_Status”.
1: No.xx closing output of the BO module is
controlled by the interlocking logic. If the
interlocking
5
En_Clsxx_Blk
conditions
are
met
(i.e.:
[Sig_En_CtrlClsxx]=1), closing output xx has
0 or 1
output, otherwise (i.e.: [Sig_En_CtrlClsxx]=0)
closing output xx has no output.
0: No.xx closing output of the BO module is not
controlled by the interlocking logic. Whether the
interlocking conditions are met or not, closing
output xx has output.
(xx=01, 02….10)
Table 3.29-3 Synchrocheck Settings
No.
Name
Range
Step
Unit
Remark
1
MCBrd.25.Opt_Source_UL
0~5
1
Voltage selecting mode of line
2
MCBrd.25.Opt_Source_UB
0~5
1
Voltage selecting mode of bus
3
MCBrd.25.U_Dd
0.05Un~0.8Un
0.001
V
Voltage threshold of dead check
4
MCBrd.25.U_Lv
0.5Un~Un
0.001
V
Voltage threshold of live check
5
MCBrd.25.K_Usyn
0.20-5.00
6
MCBrd.25.phi_Diff
0~ 89
1
7
MCBrd.25.phi_Comp
0~359
1
8
MCBrd.25.f_Diff
0.02~1.00
0.01
Hz
9
MCBrd.25.U_Diff
0.02Un~0.8Un
0.01
V
10
MCBrd.25.En_SynChk
0 or 1
11
MCBrd.25.En_DdL_DdB
0 or 1
12
MCBrd.25.En_DdL_LvB
0 or 1
13
MCBrd.25.En_LvL_DdB
0 or 1
14
MCBrd.25.En_NoChk
0 or 1
15
MCBrd.25.df/dt
0.00~3.00
Compensation
coefficient
for
synchronism voltage
Deg
Phase
difference
limit
of
synchronism check for AR
Compensation for phase difference
between two synchronous voltages
Frequency
difference
limit
of
synchronism check for AR
Voltage
difference
limit
of
synchronism check for AR
Enable synchronism check
Enable dead line and dead bus
(DLDB) check
Enable dead line and live bus
(DLLB) check
Enable live line and dead bus
(LLDB) check
Enable AR without any check
0.01
Hz/s
3-208
Threshold of rate of frequency
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
change between both sides of CB
for synchronism-check.
Circuit breaker closing time. It is the
16
MCBrd.25.t_Close_CB
20~1000
1
ms
time
from
receiving
closing
command pulse till the CB is
completely closed.
From receiving a closing command,
this device will continuously check
whether between incoming voltage
and reference voltage involved in
synchronism check (or dead check)
17
MCBrd.25.t_Wait_Chk
5~30
0.001
s
can
meet
the
criteria.
If
the
synchronism check (or dead check)
criteria are not met within the
duration of this time delay, the failure
of
synchronism-check
(or
dead
check) will be confirmed.
3.30 Faulty Phase Selection
3.30.1 General Application
Fault phase selection logic can be implemented by the following methods:
1.
Detecting the variation of operating voltage
2.
Detecting the phase difference between I0 and I2A
The logic makes the device ideal for single-phase tripping applications.
3.30.2 Function Description
3.30.2.1 Variation of Operating Voltage (Faulty Phase Selection Element 1)
1.
Variation of phase operating voltage
1)
Phase A: ΔUOPA
2)
Phase B: ΔUOPB
3)
Phase C: ΔUOPC
2.
Variation of phase-to-phase operating voltage
1)
Phase AB: ΔUOPAB
2)
Phase BC: ΔUOPBC
3)
Phase CA: ΔUOPCA
ΔUOΦMAX=Max(ΔUOPA, ΔUOPB, ΔUOPC)
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3 Operation Theory
ΔUOΦΦMAX=Max(ΔUOPAB, ΔUOPBC, ΔUOPCA)
If ΔUOΦMAX is several times higher than the variation of operating voltages of other two phases, the
single-phase fault is ensured, otherwise, the multi-phase fault is ensured.
Table 3.30-1 Relation between ΔUOΦMAX and faulty phase
ΔUOΦMAX or ΔUOΦΦMAX
Fault phase
ΔUOPA
Phase A
ΔUOPB
Phase B
ΔUOPC
Phase C
ΔUOPAB
Phase AB
ΔUOPBC
Phase BC
ΔUOPCA
Phase CA
3.30.2.2 I0 and I2A (Faulty Phase Selection Element 2)
The phase selection algorithm uses the angle relation between I0 and I2A of the device. As shown
in Figure 3.30-1, there are three faulty phase selection regions.
Region A
60°
-60°
Region B
Region C
180°
Figure 3.30-1 The region of faulty phase selection
Depended on the phase relation between I0 and I2A, the faulty phase can be determined.
1.
-60º<Arg(I0/I2A)<60º, region A is selected, possible faulty phase is phase A or phase BC.
2.
60º<Arg(I0/I2A)<180º, region B is selected, possible faulty phase is phase B or phase CA.
3.
180º<Arg(I0/I2A)<300º, region C is selected, possible faulty phase is phase C or phase AB.
For single-phase earth fault, I0 and I2 of faulty phase are in-phase and its distance element
operates.
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Date: 2012-08-14
3 Operation Theory
For phase to phase to earth fault, I0 and I2 of non-faulty phase are in-phase but its distance
element does not operate.
3.30.3 I/O Signals
Table 3.30-2 I/O signals of faulty phase selection
No.
Output Signal
Description
1
PhSA
Phase-A is selected as faulty phase
2
PhSB
Phase-B is selected as faulty phase
3
PhSC
Phase-C is selected as faulty phase
4
Neut
Earth fault
3.31 Fault Location
3.31.1 Application
The main objective of line protection is fast, selective and reliable operation for faults on a
protected line section. Besides this, information on distance to fault is very important for those
involved in operation and maintenance. Reliable information on the fault location greatly
decreases the outage of the protected lines and increases the total availability of a power system.
This fault location function cannot be used for the transmission line with series compensation.
3.31.2 Function Description
The fault location is an essential function to various line protection devices, after selecting faulty
phase, it measures and indicates the distance to the fault with high accuracy. Thus, the fault can
be quickly located for repairs. The calculation algorithm considers the effect of load currents,
double-end infeed and additional fault resistance. Both double-end fault location and single-end
fault location are available in line differential relay, but only single-end fault location is provided in
other relays.
The calculation equation is:
[km]
Where:
Dist: The distance of fault location according to the Zcalc (km)
Zcalc: The impedance value calculated from the location of protection device to fault point
Zl: The impedance value of the whole line + mutual impedance
Length: The input length of transmission line (km)
3.31.3 Mutual Compensation
When an earth fault occurred on a line of parallel lines arrangement, a distance relay at one end of
the faulty line will tend to underreach whilst the distance relay at the other end will tend to
3-211
PCS-902 Line Distance Relay
Date: 2012-08-14
3 Operation Theory
overreach. Usually the degree of underreach or overreach is acceptable, however, for cases
where precise fault location is required for long lines with high mutual coupling, mutual
compensation is then required to improve the distance measurement. Practically, the mutual effect
between the parallel lines is insignificant to positive and negative sequence and thus the mutual
compensation is only for zero sequence
A
Ia
B
ZM
k
C
Ic
ZS
D
(1-k)ZL
kZL
ZL
The principle in the application of mutual compensation is shown as follows with the aid of
following sequence network diagram figure. The diagram indicates a parallel lines arrangement
with an earth fault at location k on line CD.
The equivalent sequence network for an earth fault on a parallel lines arrangement with single
source is shown as below.
Ia1
ZL1
ZS1
kZL1
(1-k)ZL1
Ic1
Ia2
ZL2
ZS2
kZL2
(1-k)ZL2
Ic2
Ia0
ZL0
ZS0
Z0M
kZL0
(1-k)ZL0
Ic0
Figure 3.31-1 Equivalent sequence network
The device at location C without mutual compensation will have voltage URC and current IRC
measured as shown in the expression
URC is the voltage of the device at location C.
If the line is fully transposed, ZL1=ZL2, Then
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Date: 2012-08-14
3 Operation Theory
The impedance presented to the device is:
For an earth fault,
,
With the mutual compensation enabled,
(Actual distance of the fault)
The residual current from the parallel line should be added to the device. It should be connected to
terminal 08 and star point of the parallel line CT connected to terminal 07 as shown in the following
figure. Please note the connection diagram and the terminal numbers are for reference only. The
final connection terminals are subject to the device configuration at site.
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Date: 2012-08-14
3 Operation Theory
A
B
C
P2
S2
P2
S2
P1
S1
P1
S1
02
01
02
01
04
03
04
03
06
05
06
05
08
07
08
07
3.31.4 I/O Signals
Table 3.31-1 I/O signals of fault location
No.
Input Signal
Description
1
U3P
Three-phase voltage input
2
I3P
Three-phase current input
3
FPS_Fault
Faulty phase selection
4
FD.Pkp
The device picks up
No.
Output Signal
Description
1
Fault_Location
The result of fault location
2
Faulty_Phase
The selected faulty phase
3
Fault_Phase_Curr
Maximum faulty current
4
Fault_Resid_Curr
Maximum residual current
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Date: 2012-08-14
4 Supervision
4 Supervision
Table of Contents
4 Supervision ...................................................................................... 4-a
4.1 Overview .......................................................................................................... 4-1
4.2 Supervision Alarms......................................................................................... 4-1
4.3 Relay Self-supervision.................................................................................... 4-7
4.3.1 Relay Hardware Monitoring................................................................................................ 4-7
4.3.2 Fault Detector Monitoring ................................................................................................... 4-7
4.3.3 Check Setting..................................................................................................................... 4-7
4.4 AC Input Monitoring ........................................................................................ 4-7
4.4.1 Voltage/current Drift Monitoring and Auto-adjustment ........................................................ 4-7
4.4.2 Sampling Monitoring .......................................................................................................... 4-7
4.5 Secondary Circuit Monitoring ........................................................................ 4-7
4.5.1 Opto-coupler Power Supervision ....................................................................................... 4-7
4.5.2 Circuit Breaker Supervision................................................................................................ 4-7
4.6 GOOSE Alarm .................................................................................................. 4-8
List of Tables
Table 4.2-1 Alarm description ...................................................................................................4-1
Table 4.2-2 Troubleshooting .....................................................................................................4-4
PCS-902 Line Distance Relay
4-a
Date: 2012-03-12
4 Supervision
4-b
PCS-902 Line Distance Relay
Date: 2012-03-12
4 Supervision
4.1 Overview
Protection system is in quiescent state under normal conditions, and it is required to respond
promptly for faults occurred on power system. When the device is in energizing process before the
LED “HEALTHY” is on, the device need to be checked to ensure no abnormality. Therefore, the
automatic supervision function, which checks the health of the protection system when startup and
during normal operation, plays an important role.
The numerical relay based on the microprocessor operations is suitable for implementing this
automatic supervision function of the protection system.
In case a defect is detected during initialization when DC power supply is provided to the device,
the device will be blocked with indication and alarm of relay out of service. It is suggested a trial
recovery of the device by re-energization. Please contact supplier if the device is still failure.
When a failure is detected by the automatic supervision, it is followed by a LCD message, LED
indication and alarm contact outputs. The failure alarm is also recorded in event recording report
and can be printed If required.
4.2 Supervision Alarms
Hardware circuit and operation status of the device are self-supervised continuously. If any
abnormal condition is detected, information or report will be displayed and a corresponding alarm
will be issued.
A minor abnormality may block a certain number of protections functions while the other functions
can still work. However, if severe hardware failure or abnormality, such as PWR module failure,
DC converter failure and so on, are detected, all protection functions will be blocked and the LED
“HEALTHY” will be extinguished and blocking output contacts BO_FAIL will be given. The
protective device then can not work normally and maintenance is required to eliminate the failure.
All the alarm signals and the corresponding handling suggestions are listed below.
Note!
If the protective device is blocked or alarm signal is sent during operation, please do find
out its reason with the help of self-diagnostic record. If the reason can not be found at site,
please notify the factory NR. Please do not simply press button “TARGET RESET” on the
protection panel or re-energize on the device.
Table 4.2-1 Alarm description
No.
Item
Description
Blocking Device
Fail Signals
The device fails.
1
Fail_Device
This signal will be pick up if any fail signal picks up and it
Blocked
will drop off when all fail signals drop off.
2
Fail_Setting_OvRange
Set value of any setting is out of scope.
PCS-902 Line Distance Relay
Blocked
4-1
Date: 2012-03-12
4 Supervision
This signal will pick up instantaneously and will be
latched unless the recommended handling suggestion is
adopted.
3
Fail_BoardConfig
Mismatch between the configuration of plug-in modules
and the designing drawing of an applied-specific project.
Blocked
After config file is updated, settings of the file and
settings saved on the device are not matched.
4
Fail_SettingItem_Chgd
This signal will pick up instantaneously and will be
Blocked
latched unless the recommended handling suggestion is
adopted.
Error is found during checking memory data.
5
Fail_Memory
This signal will pick up instantaneously and will be
latched unless the recommended handling suggestion is
Blocked
adopted.
Error is found during checking settings.
6
Fail_Settings
This signal will pick up instantaneously and will be
latched unless the recommended handling suggestion is
Blocked
adopted.
DSP chip is damaged.
7
Fail_DSP
This signal will pick up instantaneously and will be
latched unless the recommended handling suggestion is
Blocked
adopted.
Communication between two DSP chips is abnormal
8
Fail_DSP_Comm
This signal will pick up instantaneously and will drop off
Blocked
instantaneously.
Software configuation is incorrect.
9
Fail_Config
This signal will pick up instantaneously and will be
latched unless the recommended handling suggestion is
Blocked
adopted.
AC current and voltage samplings are abnormal.
10
Fail_Sample
This signal will pick up with a time delay of 200ms and
will be latched unless the recommended handling
Blocked
suggestion is adopted.
11
MCBrd.Fail_Sample
12
MCBrd.Fail_Settings
For DSP plug-in module for measurement and control in
slot 06, AC current and voltage samplings are abnormal
Error is found during checking the settings of DSP
plug-in module for measurement and control in slot 06.
Blocked
Blocked
Alarm Signals
The device is abnormal.
13
Alm_Device
This signal will be pick up if any alarm signal picks up
Unblocked
and it will drop off when all alarm signals drop off.
The device is in the communication test mode.
14
Alm_CommTest
This signal will pick up instantaneously and will drop off
Unblocked
instantaneously.
4-2
PCS-902 Line Distance Relay
Date: 2012-03-12
4 Supervision
The error is found during MON module checking
15
Alm_Settings_MON
settings of device.
This signal will pick up with a time delay of 10s and will
Unblocked
be latched unless re-powering or rebooting the device.
The error is found during checking the version of
16
Alm_Version
software downloaded to the device.
This signal will pick up instantaneously and will drop off
Unblocked
instantaneously.
The active group set by settings in device and that set
17
Alm_BI_SettingGrp
by binary input are not matched.
This signal will pick up instantaneously and will drop off
Unblocked
instantaneously.
Data frame is abnormal between two DSP modules.
18
Alm_DSP_Frame
This signal will pick up instantaneously and will drop off
Unblocked
instantaneously.
The power supply of BI plug-in module in slot xx is
19
Bxx.Alm_OptoDC
abnormal.
This signal will pick up with a time delay of 10s and will
Unblocked
drop off with a time delay of 10s.
Fault detector element operates for longer than 50s.
20
Alm_Pkp_FD
This signal will pick up with a time delay of 50s and will
Unblocked
drop off with a time delay of 10s.
Neutral current fault detector element operates for
21
Alm_Pkp_I0
longer than 10s.
This signal will pick up with a time delay of 10s and will
Unblocked
drop off with a time delay of 10s.
Protection VT circuit fails.
22
VTS.Alm
This signal will pick up with a time delay of 1.25s and will
Unblocked
drop off with a time delay of 10s.
Protection VT circuit of neutral point fails.
23
VTNS.Alm
This signal will pick up with a time delay of 1.25s and will
Unblocked
drop off with a time delay of 10s.
CT circuit of corresponding circuit breaker fails.
24
CTS.Alm
This signal will pick up with a time delay of 10s and will
Unblocked
drop off with a time delay of 10s.
The
25
Alm_52b
auxiliary
normally
closed
contact
(52b)
of
corresponding circuit breaker is abnormal.
This signal will pick up with a time delay of 10s and will
Unblocked
drop off with a time delay of 10s.
The device is in maintenance state.
26
BI_Maintenance
This signal will pick up with a time delay of 150ms and
Unblocked
will drop off with a time delay of 150ms.
27
Alm_TimeSync
Time synchronization abnormality alarm.
PCS-902 Line Distance Relay
Unblocked
4-3
Date: 2012-03-12
4 Supervision
Frequency of the system is higher than 65Hz or lower
28
Alm_Freq
than 45Hz.
This signal will pick up with a time delay of 100ms and
Unblocked
will drop off with a time delay of 10s.
29
Alm_Sparexx
(xx=01~08)
Spare alarm signals
The time delay of pickup and dropoff for these alarm
Unblocked
signals can be set by PCS-Explorer.
Protection Element Alarm Signals
Input signal of receiving transfer trip is energized for
30
TT.Alm
longer than 4s and it will drop off with a time delay of
Unblocked
10s.
31
27P1.Alm
Stage 1 of undervoltage protection alarms.
Unblocked
32
27P2.Alm
Stage 2 of undervoltage protection alarms.
Unblocked
33
59P1.Alm
Stage 1 of overvoltage protection alarms.
Unblocked
34
59P2.Alm
Stage 2 of overvoltage protection alarms.
Unblocked
35
49-1.Alm
36
49-2.Alm
Stage 1 of thermal overload protection operates to
alarm.
Stage 2 of thermal overload protection operates to
alarm.
Unblocked
Unblocked
Synchronism voltage circuit is abnormal (UB)
37
25.Alm_VTS_UB
This signal will pick up with a time delay of 1.25s and will
Unblocked
drop off with a time delay of 10s.
Synchronism voltage circuit is abnormal (UL)
38
25.Alm_VTS_UL
This signal will pick up with a time delay of 1.25s and will
Unblocked
drop off with a time delay of 10s.
39
79.Fail_Rcls
Auto-reclosing fails.
Unblocked
40
79.Fail_Chk
Synchrocheck for AR fails.
Unblocked
41
68.St
Power swing detection takes into effect.
Unblocked
Channel x is abnormal
42
FOx.Alm_CH
This signal will pick up with a time delay of 100ms and
Unblocked
will drop off with a time delay of 1s.
Received ID from the remote end is not as same as the
43
FOx.Alm_ID
setting [FOx.RmtID] of the device in local end
This signal will pick up with a time delay of 100ms and
Unblocked
will drop off with a time delay of 1s.
Table 4.2-2 Troubleshooting
No.
Item
Handling suggestion
Fail Signals
1
Fail_Device
The signal is issued with other specific fail signals, and please refer to the
handling suggestion other specific alarm signals.
Please reset setting values according to the range described in the instruction
2
Fail_Setting_OvRange
manual, then re-power or reboot the device and the device will restore to
normal operation state.
4-4
PCS-902 Line Distance Relay
Date: 2012-03-12
4 Supervision
1. Go to the menu “Information→Borad Info”, check the abnormality
information.
3
Fail_BoardConfig
2. For the abnormality board, if the board is not used, then remove, and if the
board is used, then check whether the board is installed properly and work
normally.
Please check the settings mentioned in the prompt message on the LCD, and
4
Fail_SettingItem_Chgd
go to the menu “Settings” and select “Confirm_Settings” item to comfirm
settings. Then, the device will restore to normal operation stage.
5
Fail_Memory
Please inform the manufacture or the agent for repair.
6
Fail_Settings
Please inform the manufacture or the agent for repair.
7
Fail_DSP
8
Fail_DSP_Comm
9
Fail_Config
Chips are damaged and please inform the manufacture or the agent replacing
the module.
Please inform the manufacture or the agent for repair.
Please inform configuration engineers to check and confirm visualization
functions of the device
1. Please make the device out of service.
10
Fail_Sample
2. Then check if the analog input modules and wiring connectors connected to
those modules are installed at the position.
3. Re-power the device and the device will restore to normal operation state.
1. Please make the device out of service.
11
MCBrd.Fail_Sample
2. Then check if analog input modules and wiring connectors connected to
those modules are installed at the position.
3. Re-power the device and the device will restore to normal operation state.
12
MCBrd.Fail_Settings
Please inform the manufacturer or the agent for repair.
Alarm Signals
13
Alm_Device
14
Alm_CommTest
15
Alm_Settings_MON
The signal is issued with other specific alarm signals, and please refer to the
handling suggestion other specific alarm signals.
No special treatment is needed, and disable the communication test function
after the completion of the test.
Please inform the manufacture or the agent for repair.
Users may pay no attention to the alarm signal in the project commissioning
stage, but it is needed to download the latest package file (including correct
16
Alm_Version
version checksum file) provided by R&D engineer to make the alarm signal
disappear. Then users get the correct software version. It is not allowed that
the alarm signal is issued on the device already has been put into service. the
devices having being put into service so that the alarm signal disappears.
Please check the value of setting [Active_Grp] and binary input of indiating
17
BI_SettingGrp
active group, and make them matched. Then the “ALARM” LED will be
extinguished and the corresponding alarm message will disappear and the
device will restore to normal operation state.
18
Alm_DSP_Frame
Please inform the manufacture or the agent for repair.
1. check whether the binary input module is connected to the power supply.
19
Bxx.Alm_OptoDC
2. check whether the voltage of power supply is in the required range.
3. After the voltage for binary input module restores to normal range, the
PCS-902 Line Distance Relay
4-5
Date: 2012-03-12
4 Supervision
“ALARM” LED will be extinguished and the corresponding alarm message will
disappear and the device will restore to normal operation state.
Please check secondary values and protection settings. If settings are not set
20
Alm_Pkp_FD
reasonable to make fault detectors pick up, please reset settings, and then
the alarm message will disappear and the device will restore to normal
operation state.
Please check secondary values and protection settings. If settings are not set
21
Alm_Pkp_I0
reasonable to make fault detectors pick up, please reset settings, and then
the alarm message will disappear and the device will restore to normal
operation state.
22
VTS.Alm
23
VTNS.Alm
24
CTS.Alm
25
Alm_52b
Please check the corresponding VT secondary circuit. After the abnormality is
eliminated, the device returns to normal operation state.
Please check the corresponding VT secondary circuit of neutral point. After
the abnormality is eliminated, the device returns to normal operation state.
Please check the corresponding CT secondary circuit. After the abnormality is
eliminated, the device returns to normal operation state.
Please check the auxiliary contact of CB. After the abnormality is eliminated,
the device returns to normal operation state.
After maintenance is finished, please de-energized the binary input
26
Alm_BI_Maintenance
[BI_Maintenance] and then the alarm will disappear and the device restore to
normal operation state.
1. check whether the selected clock synchronization mode matches the clock
synchronization source;
2. check whether the wiring connection between the device and the clock
synchronization source is correct
27
Alm_TimeSync
3. check whether the setting for selecting clock synchronization (i.e.
[Opt_TimeSync]) is set correctly. If there is no clock synchronization, please
set the setting [Opt_TimeSync] as ”No TimeSync”.
4. After the abnormality is removed, the “ALARM” LED will be extinguished
and the corresponding alarm message will disappear and the device will
restore to normal operation state.
28
29
Alm_Freq
Adjust the system operating mode
Alm_Sparexx
Find the reason according to specific problem. (These signals are
(xx=01~08)
user-defined.)
Operation Alarm Signals
Please check the corresponding binary input secondary circuit. After the
30
TT.Alm
abnormality is eliminated, “ALARM” LED will go off automatically and device
returns to normal operation state with a time delay of 10s.
4-6
PCS-902 Line Distance Relay
Date: 2012-03-12
4 Supervision
4.3 Relay Self-supervision
4.3.1 Relay Hardware Monitoring
All chips on DSP module are monitored to ensure whether they are damaged or having errors. If
any one of them is detected damaged or having error, the alarm signal [Fail_DSP] is issued with
the device being blocked.
4.3.2 Fault Detector Monitoring
When neutral current fault detector picks up and lasts for longer than 10 seconds, an alarm
[Alm_Pkp_I0] will be issued without the device blocked.
When any fault detector picks up for longer than 50s, an alarm will be issued [Alm_Pkp_FD]
without the device blocked.
4.3.3 Check Setting
This relay has 10 setting groups, only one Setting group could be activiated (is active) at a time.
The settings of active setting group are checked to ensure they are reasonable. If settings are
checked to be unreasonable or out of setting scopes, a corresponding alarm signal will be issued,
and protective device is also blocked.
4.4 AC Input Monitoring
4.4.1 Voltage/current Drift Monitoring and Auto-adjustment
Zero point of voltage and current may drift due to variation of temperature or other environment
factors. The device continually traces the drift and adjust it to normal value automatically.
4.4.2 Sampling Monitoring
AC current and voltage samplings of protection DSP and fault detector DSP are monitored and if
the samples of protection DSP and fault detector DSP are detected to be wrong or inconsistent
between them, the alarm signal [Fail_Sample] will be issued and the device will be blocked.
4.5 Secondary Circuit Monitoring
4.5.1 Opto-coupler Power Supervision
Positive power supply of opto-coupler is continually monitored. If an error or damage has occurred,
an alarm [Bxx.Alm_OptoDC] will be issued.
4.5.2 Circuit Breaker Supervision
If 52b of three phases are energized ,which indicates circuit breaker is open and there is no
current detected in the line, the line will be considered to be out of service. SOTF protection will be
enabled after 50ms.
If 52b of three phases are energized that indicates circuit breaker is open but there is still current
detected in the line (the measured current is greater than a settable threshold value) or
three-phase circuit breaker is in pole disagreement, an alarm signal [Alm_52b] will be issued after
PCS-902 Line Distance Relay
4-7
Date: 2012-03-12
4 Supervision
10 seconds.
4.6 GOOSE Alarm
No.
Output Signal
Description
GOOSE alarm signal indicating that there is a network storm occurring on the
1
GAlm_AStorm_SL
2
GAlm_BStorm_SL
3
GAlm_CfgFile_SL
4
Namexx.GAlm_ADisc_SL_xx
GOOSE alarm signal indicating that network A for Namexx is disconnected.
5
Namexx.GAlm_BDisc_SL_xx
GOOSE alarm signal indicating that network B for Namexx is disconnected.
6
Namexx.GAlm_Cfg_SL_xx
network A.
GOOSE alarm signal indicating that there is a network storm occurring on the
network B.
GOOSE alarm signal indicating that there is an error in the GOOSE
configuration file
Between GOOSE control blocks received on network and GOOSE control
blocks defined in GOOSE.txt file are unmatched for Namexx.
These are GOOSE alarm reports. When any alarm message is issued, the LED “ALARM” is lit without
the device being blocked. After the abnormality is removed, the device will return to normal with the
LED “ALARM” being distinguished automatically.
No.
Output Signal
Handling suggestion
1
GAlm_AStorm_SL
Please check the related switches
2
GAlm_BStorm_SL
Please check the related switches
3
GAlm_CfgFile_SL
Please check the GOOSE configuration file (i.e. GOOSE.txt)
4
Namexx.GAlm_ADisc_SL_xx
Please check the network
5
Namexx.GAlm_BDisc_SL_xx
Please check the network
6
Namexx.GAlm_Cfg_SL_xx
Please check the GOOSE configuration file and the network
Namexx is the name defined by the setting [Linkxx], xx=01, 02, 03, …, 64
4-8
PCS-902 Line Distance Relay
Date: 2012-03-12
5 Management
5 Management
Table of Contents
5 Management ..................................................................................... 5-a
5.1 Measurement ................................................................................................... 5-1
5.2 Recording ........................................................................................................ 5-5
5.2.1 Overview ............................................................................................................................ 5-5
5.2.2 Event Recording ................................................................................................................ 5-5
5.2.3 Disturbance Recording ...................................................................................................... 5-6
5.2.4 Present Recording ............................................................................................................. 5-7
PCS-902 Line Distance Relay
5-a
Date: 2012-03-08
5 Management
5-b
PCS-902 Line Distance Relay
Date: 2011-03-08
5 Management
5.1 Measurement
PCS-902 performs continuous measurement of the analogue input quantities. The current full
scale of relay is 40 times of rated current, and there is no effect to the performance of IED due to
overflowing of current full scale. The device samples 24 points per cycle and calculates the RMS
value in each interval and updated the LCD display in every 0.5 second. The measurement data
can be displayed on the LCD of the relay front panel or on the local/remote PC via software tool.
Navigate the menu to view the sampling value through LCD screen.
This device can be used for one or two circuit breaker configuration. If it is used for two circuit
breakers configuration, some corresponding metering will be suffixed by CBn (n is the number of
the CB and it can be 1 and 2).
1.
RMS Values
Access path: Press key “▲” to enter main menu firstly. Select the item “Measurements “ and
press key “ENT” to enter, and then select submenu “Measurements1” (from protection DSP) or
“Measurements2” (from fault detector DSP). Press key “ENT” to display corresponding
measurement values as below on the LCD.

Magnitude of three-phase protection voltage Ua, Ub, Uc (i.e. UL1)

Magnitude of synchronism voltage (UB1, UB2 and UL2)
Please refer to “Function Description in Synchronism Check” about the definitions of UL1, UB1,
UL2 and UB2.

Magnitude of calculated residual voltage (3U0)

Magnitude of positive-sequence and negative-sequence voltage (U1, U2)




Magnitude of phase current Ia, Ib, Ic (it represents the current of line, for two circuit breakers
configuration, such as one and a half breakers arrangement, it is equal to the summation of
corresponding phase currents of two circuit breakers)
Magnitude of calculated residual current 3I0 (For one circuit breaker configuration, it is
calculated from three phase currents, i.e. 3I0=Ia+Ib+Ic. However, for two circuit breakers
configuration, it is calculated from two groups of three phase currents, i.e.
3I0=Ia1+Ib1+Ic1+Ia2+Ib2+Ic2)
Magnitude of phase currents of two groups of CTs Ia1, Ib1, Ic1, Ia2, Ib2, Ic2 (Only displayed
for two circuit breakers configuration with two groups of CTs, for example, one and a half
breakers arrangement)
Magnitude of residual currents of two groups of CTs 3I01, 3I02 (Only displayed for two circuit
breakers configuration with two groups of CTs, for example, one and a half breakers
arrangement)

Frequency of protection voltage (f)

Frequency of synchronism voltage (f_Syn)
PCS-902 Line Distance Relay
5-1
Date: 2012-03-08
5 Management

Frequency difference (f_Diff)

Voltage difference (U_Diff)
2.
Phase Angle
Access path:
1)
Press key “▲” to enter main menu firstly.
2)
Select the item “Measurements “ and press key “ENT” to enter, and then
3)
Select submenu “Measurements1” (from protection DSP) or “Measurements2” (from fault
detector DSP).
4)
Press key “ENT” to display corresponding measurement values as below on the LCD.
These displayed phase angles of three-phase current and three-phase voltage are based on
phase A voltage.

Phase angle of (Ua, Ub, Uc)

Phase angle of (Ia, Ib, Ic)

Phase angle of (Ia1, Ib1, Ic1) (Only displayed for two circuit breakers configuration with two
groups of CTs, for example, one and a half breakers arrangement)

Phase angle of (Ia2, Ib2, Ic2) (Only displayed for two circuit breakers configuration with two
groups of CTs, for example, one and a half breakers arrangement)

Phase angle difference between two synchronism voltages (phi_Diff)
No.
Symbol
1
Ang(Ua)
2
Ang(Ub)
3
Ang(Uc)
4
Ang(Ia)
5
Ang(Ib)
6
Ang(Ic)
7
Ang(Ia1)
8
Ang(Ib1)
9
Ang(Ic1)
Definition
Phase angle of A-phase voltage (Ua), it is taken as reference (i.e. zero degree)
Phase angle difference for B-phase voltage (Ub) relative to the reference voltage
(A-phase voltage (Ua))
Phase angle difference for C-phase voltage (Uc) relative to the reference voltage
(A-phase voltage (Ua))
Phase angle difference for A-phase current (Ia) relative to the reference voltage
(A-phase voltage (Ua))
Phase angle difference for B-phase current (Ib) relative to the reference voltage
(A-phase voltage (Ua))
Phase angle difference for C-phase current (Ic) relative to the reference voltage
(A-phase voltage (Ua))
Phase angle difference for A-phase current (Ia of CT1 for CB1) relative to the
reference voltage (A-phase voltage (Ua))
Phase angle difference for B-phase current (Ib of CT1 for CB1) relative to the
reference voltage (A-phase voltage (Ua))
Phase angle difference for C-phase current (Ic of CT1 for CB1) relative to the
5-2
PCS-902 Line Distance Relay
Date: 2011-03-08
5 Management
reference voltage (A-phase voltage (Ua))
10
Ang(Ia2)
11
Ang(Ib2)
12
Ang(Ic2)
13
Ang(phi_Diff)
3.
Phase angle difference for A-phase current (Ia of CT2 for CB2) relative to the
reference voltage (A-phase voltage (Ua))
Phase angle difference for B-phase current (Ib of CT2 for CB2) relative to the
reference voltage (A-phase voltage (Ua))
Phase angle difference for C-phase current (Ic of CT2 for CB2) relative to the
reference voltage (A-phase voltage (Ua))
Phase angle difference between two synchronism voltages
Primary value
Access path:
1)
Press key “▲” to enter main menu firstly.
2)
Select the item “Measurements “ and press key “ENT” to enter, and then
3)
Select submenu “Measurements3”.
4)
Press key “ENT” to display corresponding measurement values as below on the LCD.
No.
Symbol
Definition
Unit
1
Ua
The primary value of A-phase voltage (Ua)
kV
2
Ub
The primary value of B-phase voltage (Ub)
kV
3
Uc
The primary value of C-phase voltage (Uc)
kV
4
Uab
The primary value of phase-to-phase voltage (Uab)
kV
5
Ubc
The primary value of phase-to-phase voltage (Ubc)
kV
6
Uca
The primary value of phase-to-phase voltage (Uca)
kV
7
3U0
The primary value of calculated residual voltage (3U0)
kV
8
U1
The primary value of positive-sequence voltage (U1)
kV
9
U2
The primary value of negative-sequence voltage (U2)
kV
10
Ia
The primary value of A-phase current of line (Ia)
A
11
Ib
The primary value of B-phase current of line (Ib)
A
12
Ic
The primary value of C-phase current of line (Ic)
A
13
I1
The primary value of positive-sequence current (I1)
A
14
I2
The primary value of negative-sequence current (I2)
A
15
Ia1
16
Ib1
17
Ic1
The primary value of A-phase current of CT1 for CB1 (Only displayed for two
circuit breakers configuration with two groups of CTs)
The primary value of B-phase current of CT1 for CB1 (Only displayed for two
circuit breakers configuration with two groups of CTs)
The primary value of C-phase current of CT1 for CB1 (Only displayed for two
circuit breakers configuration with two groups of CTs)
PCS-902 Line Distance Relay
A
A
A
5-3
Date: 2012-03-08
5 Management
The primary value of A-phase current of CT2 for CB2 (Only displayed for two
18
Ia2
19
Ib2
20
Ic2
21
UB1
The primary value of synchronism voltage (UB1)
kV
22
UL2
The primary value of synchronism voltage (UL2)
kV
23
UB2
The primary value of synchronism voltage (UB2)
kV
24
U_Syn
The primary value of synchronism voltage (U_Syn)
kV
25
f
The primary value of measurement frequency (f)
Hz
26
f_Syn
The primary value of synchronism frequency (f_Syn)
Hz
27
Pa
The primary value of phase-A active power (P)
MW
28
Pb
The primary value of phase-B active power (P)
MW
29
Pc
The primary value of phase-C active power (P)
MW
30
Qa
The primary value of phase-A reactive power (Q)
MVAr
31
Qb
The primary value of phase-B reactive power (Q)
MVAr
32
Qc
The primary value of phase-C reactive power (Q)
MVAr
33
S
The primary value of phase-A apparent power (S)
MVA
34
Sb
The primary value of phase-B apparent power (S)
MVA
35
Sc
The primary value of phase-C apparent power (S)
MVA
36
Cosa
The value of phase-A power factor (Cos)
-
37
Cosb
The value of phase-B power factor (Cos)
-
38
Cosc
The value of phase-C power factor (Cos)
-
39
P
The primary value of active power (P)
40
Q
The primary value of reactive power (Q)
MVAr
41
S
The primary value of apparent power (S)
MVA
42
Cos
The value of power factor (Cos)
43
f_Diff
44
df/dt
45
phi_Diff
46
U_Diff
The primary value of voltage difference.
47
PHr+
The primary positive active energy.
MWh
48
PHr-
The primary negative active energy.
MWh
circuit breakers configuration with two groups of CTs)
The primary value of B-phase current of CT2 for CB2 (Only displayed for two
circuit breakers configuration with two groups of CTs)
The primary value of C-phase current of CT2 for CB2 (Only displayed for two
circuit breakers configuration with two groups of CTs)
A
-
synchronism-check.
The df/dt difference between reference side and incoming side for CB
synchronism-check.
Phase-angle difference between reference side and incoming side for CB
5-4
A
MW
The frequency difference between reference side and incoming side for CB
synchronism-check.
A
Hz
Hz/s
Deg
kV
PCS-902 Line Distance Relay
Date: 2011-03-08
5 Management
49
QHr+
The primary positive reactive energy.
MVAh
50
QHr-
The primary negative reactive energy.
MVAh
5.2 Recording
5.2.1 Overview
PCS-902 provides the following recording functions:
1.
Event recording
2.
Disturbance recording
3.
Present recording
All the recording information except waveform can be viewed on local LCD or by printing.
Waveform could only be printed or extracted with PCS-Explorer software tool and a waveform
analysis software.
5.2.2 Event Recording
5.2.2.1 Overview
The device can store the latest 1024 disturbance records, 1024 binary events, 1024 supervision
events and 1024 device logs. All the records are stored in non-volatile memory, and when the
available space is exhausted, the oldest record is automatically overwritten by the latest one.
5.2.2.2 Disturbance Records
When any protection element operates or drops off, such as fault detector, distance protection etc.,
they will be logged in event records.
5.2.2.3 Supervision Events
The device is under automatic supervision all the time. If there are any failure or abnormal
condition detected, such as, chip damaged, VT circuit failure and so on, it will be logged in event
records.
5.2.2.4 Binary Events
When there is a binary input is energized or de-energized, i.e., its state has changed from “0” to “1”
or from “1” to “0”, it will be logged in event records.
5.2.2.5 Control Logs
When the total number of control command records reaches 256, “Control_Logs” memory area
will be full. If the device receives a new control command now, the oldest control command record
will be deleted, and then the latest control command record will be stored and displayed.
5.2.2.6 Device Logs
If an operator implements some operations on the device, such as reboot protective device,
modify setting, etc., they will be logged in event records.
PCS-902 Line Distance Relay
5-5
Date: 2012-03-08
5 Management
5.2.3 Disturbance Recording
5.2.3.1 Application
Disturbance records can be used to have a better understanding of the behavior of the power
network and related primary and secondary equipment during and after a disturbance. Analysis of
the recorded data provides valuable information that can be used to improve existing equipment.
This information can also be used when planning for and designing new installations.
5.2.3.2 Design
A disturbance record consists of fault record and fault waveform. A disturbance record is initiated
by fault detector element.
The disturbance record has two types:
1.
Fault detector element picks up without operation of protective element
2.
Fault detector element picks up with operation of protective elements.
5.2.3.3 Capacity and Information of Disturbance Records
The device can store up to 64 disturbance records with waveform in non-volatile memory. It is
based on first in first out queue that the oldest disturbance record will be overwritten by the latest
one.
For each disturbance record, the following items are included:
1.
Sequence number
Each operation will be recorded with a sequence number in the record and displayed on LCD
screen.
2.
Date and time of fault occurrence
The time resolution is 1ms using the relay internal clock synchronized via clock synchronized
device if connected. The date and time is recorded when a system fault is detected.
3.
Relative operating time
An operating time (not including the operating time of output relays) is recorded in the record.
4.
Faulty phase
5.
Fault location
To get accurate result of fault location, the following settings shall be set correctly:
1)
Positive-sequence line reactance [X1L]
2)
Positive-sequence line resistance [R1L]
3)
Zero-sequence line reactance [X0L]
4)
Zero-sequence line resistance [R0L]
5-6
PCS-902 Line Distance Relay
Date: 2011-03-08
5 Management
5)
Zero-sequence line mutual reactance [X0M]
6)
Zero-sequence line mutual resistance [R0M]
7)
Line positive-sequence sensitive angle [phi1_Reach]
8)
Line zero-sequence sensitive angle [ph0_Reach]
9)
Line length in km [LineLength]
6.
Protection elements
5.2.3.4 Capacity and Information of Fault Waveform
MON module can store 64 pieces of fault waveform oscillogram in non-volatile memory. If a new
fault occurs when 64 fault waveform have been stored, the oldest will be overwritten by the latest
one.
Each fault record consists of all analog and digital quantities related to protection, such as original
current and voltage, differential current, alarm elements, and binary inputs and etc.
Each time recording includes 12-cycle pre-fault waveform, and 250 cycles at least and 500 cycles
at most can be recorded.
5.2.4 Present Recording
Present recording is a waveform triggered manually on on the device′s LCD or remotely through
PCS-Explorer software. Recording content of present recording is same to that of disturbance
recording.
Each time recording includes 12-cycle waveform before triggering, and 250 cycles at most can be
recorded.
PCS-902 Line Distance Relay
5-7
Date: 2012-03-08
5 Management
5-8
PCS-902 Line Distance Relay
Date: 2011-03-08
6 Hardware
6 Hardware
Table of Contents
6 Hardware .......................................................................................... 6-a
6.1 Overview .......................................................................................................... 6-1
6.2 Typical Wiring .................................................................................................. 6-4
6.2.1 Conventional CT/VT (For reference only) .......................................................................... 6-4
6.2.2 ECT/EVT (For reference only) ........................................................................................... 6-6
6.2.3 CT Requirement ................................................................................................................. 6-8
6.3 Plug-in Module Description ............................................................................ 6-9
6.3.1 PWR Plug-in Module (Power Supply) ................................................................................ 6-9
6.3.2 MON Plug-in Module (Monitor) ........................................................................................ 6-11
6.3.3 AI Plug-in Module (Analog Input) ..................................................................................... 6-14
6.3.4 DSP Plug-in Module (Logic Process) ............................................................................... 6-24
6.3.5 NET-DSP Plug-in Module (GOOSE and SV) ................................................................... 6-25
6.3.6 CH Plug-in Module (Fibre Optical Channel Interface) ...................................................... 6-26
6.3.7 BI Plug-in Module (Binary Input) ...................................................................................... 6-27
6.3.8 BO Plug-in Module (Binary Output) .................................................................................. 6-32
6.3.9 HMI Module...................................................................................................................... 6-35
List of Figures
Figure 6.1-1 Rear view of fixed module position ....................................................................6-1
Figure 6.1-2 Hardware diagram ................................................................................................6-2
Figure 6.1-3 Front view of PCS-902 ..........................................................................................6-3
Figure 6.1-4 Typical rear view of PCS-902 ...............................................................................6-4
Figure 6.2-1 Typical wiring of PCS-902 (conventional CT/VT) ...............................................6-5
Figure 6.2-2 Typical wiring of PCS-902 (ECT/EVT) .................................................................6-7
Figure 6.3-1 View of PWR plug-in module .............................................................................6-10
Figure 6.3-2 Output contacts of PWR plug-in module ..........................................................6-10
PCS-902 Line Distance Relay
6-a
Date: 2011-03-08
6 Hardware
Figure 6.3-3 View of MON plug-in module .............................................................................6-12
Figure 6.3-4 Connection of communication terminal ...........................................................6-14
Figure 6.3-5 Schematic diagram of CT circuit automatically closed .......................................6-15
Figure 6.3-6 Current connection of AI plug-in module .........................................................6-16
Figure 6.3-7 Voltage connection 1 of AI plug-in module ......................................................6-16
Figure 6.3-8 Voltage connection 2 of AI plug-in module ......................................................6-17
Figure 6.3-9 View of AI plug-in module for one CT group input ..........................................6-17
Figure 6.3-10 Current connection of AI plug-in module .......................................................6-19
Figure 6.3-11 Voltage connection of AI plug-in module........................................................6-19
Figure 6.3-12 View of AI plug-in module for two CT group input ........................................6-20
Figure 6.3-13 Current connection of AI plug-in module .......................................................6-21
Figure 6.3-14 Voltage connection of AI plug-in module .......................................................6-22
Figure 6.3-15 View of AI plug-in module for two CT group input ........................................6-22
Figure 6.3-16 View of DSP plug-in module ............................................................................6-24
Figure 6.3-17 View of NET-DSP plug-in module ....................................................................6-25
Figure 6.3-18 View of CH plug-in module ..............................................................................6-26
Figure 6.3-19 View of BI plug-in module (NR1503) ...............................................................6-28
Figure 6.3-20 View of BI plug-in module (NR1504) ...............................................................6-29
Figure 6.3-21 View of BO plug-in module (NR1521A) ...........................................................6-32
Figure 6.3-22 View of BO plug-in module (NR1521C) ...........................................................6-33
Figure 6.3-23 View of BO plug-in module (NR1521F) ...........................................................6-34
Figure 6.3-24 View of BO plug-in module (NR1521G) ...........................................................6-35
List of Tables
Table 6.3-1 Terminal definition and description of PWR plug-in module ............................6-10
Table 6.3-2 Terminal definition of AI module .........................................................................6-18
Table 6.3-3 Terminal definition of AI module .........................................................................6-20
Table 6.3-4 Terminal definition of AI module .........................................................................6-23
6-b
PCS-902 Line Distance Relay
Date: 2011-03-08
6 Hardware
6.1 Overview
PCS-902 adopts 32-bit microchip processor CPU produced by FREESCALE as control core for
management and monitoring function, meanwhile, adopts high-speed digital signal processor DSP
for all the protection calculation. 24 points are sampled in every cycle and parallel processing of
sampled data can be realized in each sampling interval to ensure ultrahigh reliability and safety of
the device.
10
11
12
13
14
PWR module
09
BO module
08
BO module
07
BO module
06
BO module
05
BI module
04
BI module
03
DSP module
02
CH Module
01
DSP module
Slot No.
AI module
MON module
PCS-902 is comprised of intelligent plug-in modules, except that few particular plug-in modules’
position cannot be changed in the whole device (gray plug-in modules as shown in Figure 6.1-1),
other plug-in modules like AI (analog input) and IO (binary input and binary output) can be flexibly
configured in the remaining slot positions.
15
P1
Figure 6.1-1 Rear view of fixed module position
PCS-902 has 16 slots, PWR plug-in module, MON plug-in module, DSP plug-in module and CH
plug-in module are assigned at fixed slots.
Besides 5 fixed modules are shown in above figure, there are 12 slots can be flexibly configured.
AI plug-in module, BI plug-in module and BO plug-in module can be configured at position
between slot 02, 03 and 06~15. It should be pay attention that AI plug-in module will occupy two
slots.
This device is developed on the basis of our latest software and hardware platform, and the new
platform major characteristics are of high reliability, networking and great capability in
anti-interference. See Figure 6.1-2 for hardware diagram.
PCS-902 Line Distance Relay
6-1
Date: 2011-03-08
A/D
Protection
Calculation
DSP
A/D
Fault
Detector
DSP
Output Relay
Conventional CT/VT
External
Binary Input
6 Hardware
ECVT
Pickup
Relay
ECVT
ETHERNET
LCD
Power
Supply
Uaux
+E
Clock SYN
LED
CPU
RJ45
Keypad
PRINT
Figure 6.1-2 Hardware diagram
The working process of the device is as shown in above figure: current and voltage from
conventional CT/VT are converted into small voltage signal and sent to DSP module after filtered
and A/D conversion for protection calculation and fault detector respectively (ECVT signal is sent
to the device without small signal and A/D convertion). When DSP module completes all the
protection calculation, the result will be recorded in 32-bit CPU on MON module. DSP module
carries out fault detector, protection logic calculation, tripping output, and MON module perfomes
SOE (sequence of event) record, waveform recording, printing, communication between the
device and SAS and communication between HMI and CPU. When fault detector detects a fault
and picks up, positive power supply for output relay is provided.
The items can be flexibly configured depending on the situations like sampling method of the
device (conventional CT/VT or ECT/EVT), and the mode of binary output (conventional binary
output or GOOSE binary output). The configurations for PCS-900 series based on microcomputer
are classified into standard and optional modules.
Table 6.1-1 PCS-902 module configuration
No.
ID
Module description
1
NR1101/NR1102
Management and monitor module (MON module)
standard
2
NR1401
Analog input module (AI module )
standard
3
NR1161
Protection calculation and fault detector module (DSP module)
standard
4
NR1213
Protection communication channel module (CH module)
option
5
NR1503/NR1504
Binary input module (BI module)
standard
6
NR1521
Binary output module (BO module)
standard
7
NR1301
Power supply module (PWR module)
standard
6-2
Remark
PCS-902 Line Distance Relay
Date: 2011-03-08
6 Hardware
No.
8
ID
NR1136
9









Module description
Remark
GOOSE and SV from merging unit by IEC61850-9-2 (NET-DSP
module)
Human machine interface module (HMI module)
option
standard
MON module provides functions like communication with SAS, event record, setting
management etc.
AI module converts AC current and voltage from current transformers and voltage
transformers respectively to small voltage signal.
DSP module performs filtering, sampling, protection calculation and fault detector calculation.
CH module performs information exchange with the remote device through a dedicated
optical fibre channel, multiplex optical fibre channel or PLC channel.
BI module provides binary inputs via opto-couplers with rating voltage among
24V/110V/125V/220V/250V (configurable).
BO module provides output contacts for tripping, and signal output contact for annunciation
signal, remote signal, fault and disturbance signal, operation abnormal signal etc.
PWR module converts DC 250/220/125/110V into various DC voltage levels for modules of
the device.
HMI module is comprised of LCD, keypad, LED indicators and multiplex RJ45 ports for user
as human-machine interface.
NET-DSP module receives and sends GOOSE messages, sampled values (SV) from
merging unit by IEC61850-9-2 protocol.
PCS-902 series is made of a 4U height 19” chassis for flush mounting. Components mounted on
its front include a 320×240 dot matrix LCD, a 9 button keypad, 20 LED indicators and a multiplex
RJ45 port. A monolithic micro controller is installed in the equipment for these functions.
Following figures show front and rear views of PCS-902 respectively.
ALARM
11
PCS-902
12
13
4
14
5
15
6
16
7
17
8
18
9
19
10
20
GRP
3
HEALTHY
ESC
1
2
ENT
Figure 6.1-3 Front view of PCS-902
PCS-902 Line Distance Relay
6-3
Date: 2011-03-08
6 Hardware
20 LED indicators are, from top to bottom, operation (HEALTHY), self-supervision (ALARM),
others are configurable.
For the 9-button keypad, “ENT” is “enter”, “GRP” is “group number” and “ESC” is “escape”.
NR1102
NR1401
NR1161
NR1161
NR1213
NR1504
NR1504
NR1521
NR1521
NR1521
NR1521
NR1301
5V OK
ALM
TX
BO_ALM BO_FAIL
RX
ON
TX
OFF
RX
DANGER
1 BO_COM1
2
BO_FAIL
3
BO_ALM
4
BO_COM2
5
BO_FAIL
6
BO_ALM
7
OPTO+
8
OPTO-
9
10
PWR+
11
PWR-
12
GND
Figure 6.1-4 Typical rear view of PCS-902
6.2 Typical Wiring
DSP module
04
05
06
02
03
07
08
09
10
11
12
13
NR1521F NR1301
14
PWR module
CH Module
01
NR1521A NR1521C NR1521C
BO module
DSP module
Slot No.
NR1504
BO module
NR1161
BO module
NR1213
BO module
NR1161
BI module
NR1401
MON module
NR1102
AI module
6.2.1 Conventional CT/VT (For reference only)
15
P1
The following typical wiring is given based on above hardware configuration
6-4
PCS-902 Line Distance Relay
Date: 2011-03-08
6 Hardware
Power supply supervision
0801
CH-TX
CH-RX
or
CH-RX
FC/PC Type (Rear)
0201
Ia
0203
Ib
0204
0205
Ic
0206
0207
From parallel line
IM0
0208
0215
Ub
0216
0217
0221
UL2
0222
0223
OPTO-
P108
0814
Not used
0815
+
0816
+
0821
Power
Supply
P102
BO_FAIL
P103
BO_ALM
COM
P105
BO_FAIL
P106
BO_ALM
P104
COM
1101
BO_01
1102
1103
BO_02
1104
BO_11
1121
1122
1201
BO_01
1202
1203
BO_02
1204
BO_11
1221
1222
1301
BO_01
1302
1303
BO_02
1304
…
P101
0822
-
Signal Binary Output
(option)
P107
+
…
Power supply for
opto-coupler (24V)
PWR-
0809
BI_13
Signal Binary Output
UB2
0224
OPTO+
+
…
UB1
0220
P111
0808
BI_12
BI_18
Synchronism Voltage
0219
External DC power
supply
Not used
BI_07
Controlled by fault
detector element
Uc
0218
P110
0807
…
Ua
0214
Protection Voltage
0213
PWR+
+
BI_06
…
0202
To parallel line
0802
…
CH-TX
Fibre Optic
+
BI_01
*BI plug-in module can be independent common terminal
Dedicated Channel
Or
Telecom Equipment
BO_11
1321
1322
1501
B
0102
SGND
0103
BO_CtrlOpn1
0104
0101
SYN-
0102
SGND
0103
0104
Clock SYN
SYN+
1502
1503
BO_CtrlCls1
1504
…
Signal Binary Output (option)
0101
COM
To the screen of other coaxial
cable with single point earthing
A
1517
BO_CtrlOpn5
1518
1519
BO_CtrlCls5
1520
1521
0105
TXD
0106
SGND
0107
PRINT
PRINTER
RTS
BO_Ctrl
Multiplex
RJ45 (Front)
1522
0012
0225
Grounding
Bus
Figure 6.2-1 Typical wiring of PCS-902 (conventional CT/VT)
PCS-902 Line Distance Relay
6-5
Date: 2011-03-08
6 Hardware
PCS-902 (conventional CT/VT and conventional binary input and binary output)
Slot No.
01
04
05
08
09
11
12
13
15
P1
Module ID
NR1102
NR1401
NR1161
NR1213
NR1504
NR1504
NR1521
NR1521
NR1521
NR1521
NR1301
MON
AI
DSP
CH
BI
BI
BO
BO
BO
BO
PWR
08
09
11
12
13
02
03
06
07
10
14
PCS-902 (conventional CT/VT and GOOSE binary input and binary output)
Slot No.
01
04
05
06
Module ID
NR1102
NR1401
NR1161
NR1213
NR1136
NR1504
NR1301
MON
AI
DSP
CH
NETDSP
BI
PWR
02
03
07
10
14
15
P1
05
06
07
08
09
10
11
12
NR1301
PWR module
04
NR1521A NR1521C
BO module
NR1503
BO module
03
NR1136
BI module
02
NR1161
NET-DSP Module
01
NR1213
DSP module
Slot No.
NR1161
CH Module
MON module
NR1102
DSP module
6.2.2 ECT/EVT (For reference only)
13
14
15
P1
The following typical wiring is given based on above hardware configuration
6-6
PCS-902 Line Distance Relay
Date: 2011-03-08
6 Hardware
CH-RX
Dedicated Channel
Or
Telecom Equipment
or
CH-TX
CH-RX
Fibre Optic
MU
Phase B
RX
TX
…
P111
OPTO+
P107
OPTO-
P108
Power
Supply
P102
BO_FAIL
P103
BO_ALM
COM
P105
BO_FAIL
P106
BO_ALM
P104
COM
B
0102
SGND
0103
0104
0101
SYN-
0102
SGND
0103
0104
0105
TXD
0106
SGND
0107
0804
+
0805
-
0806
+
0821
-
0822
1101
1102
1103
BO_02
1104
BO_11
1121
1122
1201
BO_01
1202
1203
BO_02
1204
BO_11
1221
1222
1502
1503
BO_CtrlCls1
1504
1517
BO_CtrlOpn5
1518
1519
BO_CtrlCls5
1520
1521
BO_Ctrl
1522
IRIG-B
PRINT
PRINTER
RTS
-
BO_01
Clock SYN
SYN+
0803
…
0101
+
1501
COM
To the screen of other coaxial
cable with single point earthing
A
0802
BO_CtrlOpn1
Signal Binary Output (option)
P101
-
…
PWR-
0801
…
Power supply for
opto-coupler (24V)
P110
BI_11
Signal Binary Output
External DC power
supply
PWR+
BI_03
Controlled by fault
detector element
Phase C
BI_02
+
…
Phase A
FC/PC Type (Rear)
FO interface for SV channel
Up to 8
(LC Type)
SV from
ECT/EVT
BI_01
*BI plug-in module can be common negative
terminal
CH-TX
0012
Multiplex
RJ45 (Front)
0225
Grounding
Bus
Figure 6.2-2 Typical wiring of PCS-902 (ECT/EVT)
PCS-902 ECT/EVT, GOOSE binary input and binary output
Slot No.
01
04
05
06
Module ID
NR1102
02
03
NR1161
NR1213
NR1136
07
NR1504
08
09
10
11
12
13
14
15
NR1301
P1
MON
DSP
CH
NETDSP
BI
PWR
PCS-902 ECT/EVT, conventional binary input and binary output
Slot No.
01
Module ID
02
03
04
05
06
NR1102
NR1161
NR1213
MON
DSP
CH
07
08
09
11
12
13
NR1136
NR1504
NETDSP
BI
NR1504
NR1521
NR1521
BI
BO
BO
PCS-902 Line Distance Relay
10
15
P1
NR1521
NR1521
NR1301
BO
BO
PWR
14
6-7
Date: 2011-03-08
6 Hardware
In the protection system adopting electronic current and voltage transformer (ECT/EVT), the
merging unit will merge the sample data from ECT/EVT, and then send it to the device through
multi-mode optical fibre. DSP module receives the data from merging unit through the optical-fibre
interface to complete the protection calculation and fault detector.
The difference between the hardware platform based on ECT/EVT and the hardware platform
based on conventional CT/VT lies in the receiving module of sampled values only, and the device
receives the sampled value from merging unit through multi-mode optical fibre.
6.2.3 CT Requirement
-Rated primary current Ipn:
According to the rated current or maximum load current of primary apparatus.
-Rated continuous thermal current Icth:
According to the maximum load current.
-Rated short-time thermal current Ith and rated dynamic current Idyn:
According to the maximum fault current.
-Rated secondary current Isn
-Accuracy limit factor Kalf:
Ipn
Rated primary current (amps)
Icth
Rated continuous thermal current (amps)
Ith
Rated short-time thermal current (amps)
Idyn
Rated dynamic current (amps)
Isn
Rated secondary current (amps)
Kalf
Accuracy limit factor ()Kalf=Ipal/Ipn
IPal
Rated accuracy limit primary current (amps)
Performance verification
Esl > Esl′
Esl
Rated secondary limiting e.m.f (volts)
Esl = kalf×Isn×(Rct+Rbn)
Kalf
Accuracy limit factor (Kalf=Ipal/Ipn)
IPal
Rated accuracy limit primary current (amps)
Ipn
Rated primary current (amps)
Isn
Rated secondary current (amps)
Rct
Current transformer secondary winding resistance. (ohms)
Rbn
Rated resistance burden (ohms)
Rbn=Sbn/Isn2
Sbn
Rated burden (VAs)
Esl′
Required secondary limiting e.m.f (volts)
6-8
PCS-902 Line Distance Relay
Date: 2011-03-08
6 Hardware
Esl′ = k×Ipcf ×Isn×(Rct+Rb)/Ipn
k
Ipcf
stability factor = 2
Protective checking factor current (amps)
Same as the maximum prospective fault current
Isn
Rated secondary current (amps)
Rct
Current transformer secondary winding resistance. (ohms)
Rb
Real resistance burden (ohms)
Rb=Rr+2×RL+Rc
Rc
Contact resistance, 0.05-0.1 ohm (ohms)
RL
Resistance of a single lead from relay to current transformer (ohms)
Rr
Impedance of relay phase current input (ohms)
Ipn
Rated primary current (amps)
For example:
1.
Kalf=30, Isn=5A, Rct=1ohm, Sbn=60VA
Esl = kalf×Isn×(Rct+Rbn) = kalf×Isn×(Rct+ Sbn/ Isn2)
= 30×5×(1+60/25)=510V
2.
Ipcf=40000A, RL=0.5ohm, Rr=0.1ohm, Rc=0.1ohm, Ipn=2000A
Esl′ = 2×Ipcf×Isn×(Rct+Rb)/Ipn
= 2×Ipcf ×Isn×(Rct+(Rr+2×RL+Rc))/Ipn
= 2×40000×5×(1+(0.1+2×0.5+0.1))/2000=440V
Thus, Esl > Esl′
6.3 Plug-in Module Description
The device consists of PWR plug-in module, MON plug-in module, DSP plug-in module, AI plug-in
module, BI plug-in module, BO plug-in module, CH plug-in module and NET-DSP plug-in module.
Terminal definitions and application of each plug-in module are introduced as follows.
6.3.1 PWR Plug-in Module (Power Supply)
PWR module is a DC/DC or AC/DC converter with electrical insulation between input and output. It
has an input voltage range as described in Chapter 2 “Technical Data”. The standardized output
voltages are +3.3V, +5V, ±12V and +24V DC. The tolerances of the output voltages are
continuously monitored.
The +3.3V DC output provides power supply for the microchip processors, and the +5V DC output
provides power supply for all the electrical elements that need +5V DC power supply in this device.
The ±12V DC output provides power supply for A/D conversion circuits in this device, and the
+24V DC output provides power supply for the static relays of this device.
The use of an external miniature circuit breaker is recommended. The miniature circuit breaker
must be in the on position when the device is in operation and in the off position when the device is
PCS-902 Line Distance Relay
6-9
Date: 2011-03-08
6 Hardware
in cold reserve.
A 12-pin connector is fixed on PWR module. The terminal definition of the connector is described
as below.
NR1301
5V OK
ALM
BO_ALM BO_FAIL
ON
OFF
1
BO_COM1
2
BO_FAIL
3
BO_ALM
4
BO_COM2
5
BO_FAIL
6
BO_ALM
7
OPTO+
8
OPTO-
9
10 PWR+
11 PWR12 GND
Figure 6.3-1 View of PWR plug-in module
01
BO_FAIL
02
BO_ALM
03
04
BO_FAIL
05
BO_ALM
06
Figure 6.3-2 Output contacts of PWR plug-in module
Terminal definition and description is shown as follows:
Table 6.3-1 Terminal definition and description of PWR plug-in module
Terminal No.
Symbol
Description
01
BO_COM1
Common terminal 1
02
BO_FAIL
Device failure output 1 (01-02, NC)
03
BO_ALM
Device abnormality alarm output 1 (01-03, NO)
04
BO_COM2
Common terminal 2
6-10
PCS-902 Line Distance Relay
Date: 2011-03-08
6 Hardware
Terminal No.
Symbol
Description
05
BO_FAIL
Device failure output 2 (04-05, NC)
06
BO_ALM
Device abnormality alarm output 2 (04-06, NO)
07
OPTO+
Positive power supply for BI module (24V)
08
OPTO-
Negative power supply for BI module (24V)
09
Blank
Not used
10
PWR+
Positive input of power supply for the device (250V/220V/125V/110V)
11
PWR-
Negative input of power supply for the device (250V/220V/125V/110V)
12
GND
Grounded connection of the power supply
Note!
The standard rated voltage of PWR module is self-adaptive to 88~300 Vdc. If input voltage
is out of range, an alarm signal (Fail_Device) will be issued. For non-standard rated
voltage power supply module please specify when place order, and check if the rated
voltage of power supply module is the same as the voltage of power source before the
device being put into service.
PWR module provides terminal 12 and grounding screw for device grounding. Terminal 12
shall be connected to grounding screw and then connected to the earth copper bar of
panel via dedicated grounding wire.
Effective grounding is the most important measure for a device to prevent EMI, so effective
grounding must be ensured before the device is put into service.
PCS-902, like almost all electronic relays, contains electrolytic capacitors. These
capacitors are well known to be subject to deterioration over time if voltage is not applied
periodically. Deterioration can be avoided by powering the relays up once a year.
6.3.2 MON Plug-in Module (Monitor)
MON module consists of high-performance built-in processor, FLASH, SRAM, SDRAM, Ethernet
controller and other peripherals. Its functions include management of the complete device, human
machine interface, communication and waveform recording etc.
MON module uses the internal bus to receive the data from other modules of the device. It
communicates with the LCD module by RS-485 bus. This module comprises 100BaseT Ethernet
interfaces, RS-485 communication interfaces that exchange information with above system by
using IEC 61850, PPS/IRIG-B differential time synchronization interface and RS-232 printing
interface.
Modules with various combinations of memory and interface are available as shown in the table
below.
PCS-902 Line Distance Relay
6-11
Date: 2011-03-08
6 Hardware
NR1102A
ETHERNET
NR1102B
ETHERNET
NR1102C
ETHERNET
NR1102D
NR1102H
NR1102I
TX
TX
RX
RX
TX
TX
ETHERNET
NR1101E
ETHERNET
RX
RX
ETHERNET
ETHERNET
Figure 6.3-3 View of MON plug-in module
Module ID
Memory
Interface
Terminal No.
2 RJ45 Ethernet
RS-485
NR1102A
64M DDR
To SCADA
01
SYN+
02
SYN-
To
03
SGND
synchronization
05
RTS
06
TXD
07
SGND
4 RJ45 Ethernet
RS-485
64M DDR
Twisted pair wire
To printer
Cable
To SCADA
01
SYN+
02
SYN-
To
03
SGND
synchronization
05
RTS
06
TXD
07
SGND
2 RJ45 Ethernet
128M DDR
clock
clock
Twisted pair wire
04
RS-232
NR1102C
Physical Layer
04
RS-232
NR1102B
Usage
RS-485
To printer
Cable
To SCADA
01
SYN+
02
SYN-
To
SGND
synchronization
03
clock
Twisted pair wire
04
6-12
PCS-902 Line Distance Relay
Date: 2011-03-08
6 Hardware
RS-232
05
RTS
06
TXD
07
SGND
4 RJ45 Ethernet
RS-485
NR1102D
128M DDR
128M DDR
Cable
To SCADA
01
SYN+
02
SYN-
To
SGND
synchronization
03
clock
Twisted pair wire
04
RS-232
NR1102H
To printer
05
RTS
06
TXD
07
SGND
To printer
Cable
2 RJ45 Ethernet
To SCADA
Twisted pair wire
2 FO Ethernet
To SCADA
Optical fibre SC
RS-485
01
SYN+
02
SYN-
To
03
SGND
synchronization
clock
Twisted pair wire
04
RS-232
NR1102I
128M DDR
05
RTS
06
TXD
07
SGND
To printer
Cable
2 RJ45 Ethernet
To SCADA
Twisted pair wire
2 FO Ethernet
To SCADA
Optical fibre ST
RS-485
01
SYN+
02
SYN-
To
03
SGND
synchronization
clock
Twisted pair wire
04
RS-232
05
RXD
06
TXD
07
SGND
2 RJ45 Ethernet
RS-485
To printer
Cable
To SCADA
01
A
02
B
03
SGND
To SCADA
04
NR1101E
128M DDR
RS-485
05
A
06
B
07
SGND
Twisted pair wire
To SCADA
08
RS-485
09
SYN+
10
SYN-
To
11
SGND
synchronization
RTS
To printer
clock
12
RS-232
13
PCS-902 Line Distance Relay
Cable
6-13
Date: 2011-03-08
6 Hardware
14
TXD
15
SGND
16
The correct connection is shown in Figure 6.3-4. Generally, the shielded cable with two pairs of
twisted pairs inside shall be applied. One pair of the twisted pairs are respectively used to connect
the “+” and “–” terminals of difference signal. The other pair of twisted pairs are used to connect
the signal ground of the communication interface. The module reserves a free terminal for all the
communication ports. The free terminal has no connection with any signal of the device, and it is
used to connect the external shields of the cable when connecting multiple devices in series. The
external shield of the cable shall be grounded at one of the ends only.
Twisted pair wire
01
B
02
SGND
03
COM
04
Twisted pair wire
SYN+
01
SYN-
02
SGND
03
Clock SYN
To the screen of other coaxial
cable with single point earthing
A
04
Cable
05
TXD
06
SGND
07
PRINT
RTS
Figure 6.3-4 Connection of communication terminal
6.3.3 AI Plug-in Module (Analog Input)
AI module is applicable for power plant or substation with conventional VT and CT. It is assigned to
slot numbers 02 and 03. However, the module is not required if the device is used with ECT/EVT.
For AI module, if the plug is not put in the socket, external CT circuit is closed itself. Just shown as
below.
6-14
PCS-902 Line Distance Relay
Date: 2011-03-08
6 Hardware
Plug
Socket
In
Out
plug is not put in the socket
In
Out
Put the plug in the socket
Figure 6.3-5 Schematic diagram of CT circuit automatically closed
There are two types of AI module with rating 5 A or 1 A. Please declare which kind of AI module is
needed before ordering. Maximum linear range of the current converter is 40In.
1.
One CT group input without synchronism voltage switchover
For one CT group input, three phase currents (Ia, Ib and Ic) and residula current from parallel line
(for mutual compensation) are input to AI module separately. Terminal 01, 03, 05 and 07 are
polarity marks. It is assumed that polarity mark of CT installed on line is at line side.
Three phase voltages (Ua, Ub, and Uc) for protection calculation and one synchronism are input to
AI module. The synchronism voltage could be any phase-to-ground voltage or phase-to-phase
voltage.
If the auto-reclosing is enabled but synchronism check is not required, the synchronism voltage
should be disconnected.
PCS-902 Line Distance Relay
6-15
Date: 2011-03-08
6 Hardware
A
B
C
P2
S2
P2
S2
P1
S1
P1
S1
02
01
02
01
04
03
04
03
06
05
06
05
08
07
08
07
Figure 6.3-6 Current connection of AI plug-in module
Relevant description about parallel line to refer to “Section 3.25 Fault Location”.
A
B
C
13
14
15
16
17
18
19
20
Figure 6.3-7 Voltage connection 1 of AI plug-in module
6-16
PCS-902 Line Distance Relay
Date: 2011-03-08
6 Hardware
A
B
C
13
14
15
16
17
18
19
20
Figure 6.3-8 Voltage connection 2 of AI plug-in module
Ia
01
Ian
02
Ib
03
Ibn
04
Ic
05
Icn
06
IM0
07
IM0n
08
NR1401
09
10
11
12
Ua
13
Uan
14
Ub
15
Ubn
16
Uc
17
Ucn
18
Us
19
Usn
20
21
22
23
24
Figure 6.3-9 View of AI plug-in module for one CT group input
Table 6.3-2 lists the terminal number and definition of AI module.
PCS-902 Line Distance Relay
6-17
Date: 2011-03-08
6 Hardware
Table 6.3-2 Terminal definition of AI module
Terminal No.
2.
Definition
Definition
01
Ia
The current of A-phase (Polarity mark)
02
Ian
The current of A-phase
03
Ib
The current of B-phase (Polarity mark)
04
Ibn
The current of B-phase
05
Ic
The current of C-phase (Polarity mark)
06
Icn
The current of C-phase
07
IM0
Residual current of parallel line (Polarity mark)
08
IM0n
Residual current of parallel line
09
Reserve
10
Reserve
11
Reserve
12
Reserve
13
Ua
The voltage of A-phase (Polarity mark)
14
Uan
The voltage of A-phase
15
Ub
The voltage of B-phase (Polarity mark)
16
Ubn
The voltage of B-phase
17
Uc
The voltage of C-phase (Polarity mark)
18
Ucn
The voltage of C-phase
19
Us
Synchronism voltage (Polarity mark)
20
Usn
Synchronism voltage
21
Reserve
22
Reserve
23
Reserve
24
Reserve
25
GND
Ground
Two CT groups input with synchronism voltage switchover
For two circuit breakers configuration with two CT groups input, three phase currents
corresponding to CB1 and CB2 respectively (Ia1, Ib1, Ic1 and Ia2, Ib2, Ic2) are input to AI module.
Terminal 01, 03, 05, 07, 09 and 11 are polarity marks. It is assumed that polarity mark of CT
installed on line is at line side.
Three phase voltages (Ua, Ub, and Uc) are input to AI module. UB1, UB2 and UL2 are the
synchronism voltage from bus VT and line VT used for synchrocheck, it could be any
phase-to-ground voltage or phase-to-phase voltage. The device can automatically switch
synchronism voltage according to auxiliary contact of CB position or DS position.
If the auto-reclosing is enabled but synchronism check is not required, the synchronism voltage
should be disconnected.
6-18
PCS-902 Line Distance Relay
Date: 2011-03-08
6 Hardware
P2
P1
P1
P2
S1
S2
A
B
S2
S1
02
01
04
03
06
05
08
07
10
09
12
11
C
Figure 6.3-10 Current connection of AI plug-in module
A
B
C
A
13
14
15
16
17
18
19
20
21
22
23
24
B
C
Figure 6.3-11 Voltage connection of AI plug-in module
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Ia1
01
Ia1n
02
Ib1
03
Ib1n
04
Ic1
05
Ic1n
06
Ia2
07
Ia2n
08
Ib2
09
Ib2n
10
Ic2
11
Ic2n
12
Ua
13
Uan
14
Ub
15
Ubn
16
Uc
17
Ucn
18
UB1
19
UB1n
20
UL2
21
UL2n
22
UB2
23
UB2n
24
NR1401
Figure 6.3-12 View of AI plug-in module for two CT group input
Table 6.3-3 lists the terminal number and definition of AI module.
Table 6.3-3 Terminal definition of AI module
Terminal No.
Definition
Definition
01
Ia1
The current of A-phase (Polarity mark)
02
Ia1n
The current of A-phase
03
Ib1
The current of B-phase (Polarity mark)
04
Ib1n
The current of B-phase
05
Ic1
The current of C-phase (Polarity mark)
06
Ic1n
The current of C-phase
07
Ia2
The current of A-phase (Polarity mark)
08
Ia2n
The current of A-phase
09
Ib2
The current of B-phase (Polarity mark)
10
Ib2n
The current of B-phase
11
Ic2
The current of C-phase (Polarity mark)
12
Ic2n
The current of C-phase
13
Ua
The voltage of A-phase (Polarity mark)
14
Uan
The voltage of A-phase
15
Ub
The voltage of B-phase (Polarity mark)
16
Ubn
The voltage of B-phase
17
Uc
The voltage of C-phase (Polarity mark)
18
Ucn
The voltage of C-phase
19
UB1
The voltage of bus 1 (Polarity mark)
20
UB1n
The voltage of bus 1
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Terminal No.
3.
Definition
Definition
21
UL2
The voltage of line 2 (Polarity mark)
22
UL2n
The voltage of line 2
23
UB2
The voltage of bus 2 (Polarity mark)
24
UB2n
The voltage of bus 2
25
GND
Ground
Two CT groups input without synchronism voltage switchover
For two circuit breakers configuration with two CT groups input, three phase currents
corresponding to CB1 and CB2 respectively (Ia1, Ib1, Ic1 and Ia2, Ib2, Ic2), and residula current
from parallel line (for mutual compensation) are input to AI module. Terminal 01, 03, 05, 07, 09, 11
and 13 are polarity marks. It is assumed that polarity mark of CT installed on line is at line side.
Three phase voltages (Ua, Ub, and Uc) for protection calculation and one synchronism are input to
AI module. The synchronism voltage could be any phase-to-ground voltage or phase-to-phase
voltage.
If the auto-reclosing is enabled but synchronism check is not required, the synchronism voltage
should be disconnected.
P2
P1
P1
P2
S1
S2
A
B
S2
S1
02
01
04
03
06
05
08
07
10
09
12
11
14
13
C
To parallel line
From parallel line
Figure 6.3-13 Current connection of AI plug-in module
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A
B
C
A
15
16
17
18
19
20
21
22
23
24
B
C
Figure 6.3-14 Voltage connection of AI plug-in module
Ia1
01
Ia1n
02
Ib1
03
Ib1n
04
Ic1
05
Ic1n
06
Ia2
07
Ia2n
08
Ib2
09
Ib2n
10
Ic2
11
Ic2n
12
IM0
13
IM0n
14
Ua
15
Uan
16
Ub
17
Ubn
18
Uc
19
Ucn
20
Us
21
Usn
22
NR1401
23
24
Figure 6.3-15 View of AI plug-in module for two CT group input
Table 6.3-4 lists the terminal number and definition of AI module.
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6 Hardware
Table 6.3-4 Terminal definition of AI module
Terminal No.
Definition
Definition
01
Ia1
The current of A-phase (Polarity mark)
02
Ia1n
The current of A-phase
03
Ib1
The current of B-phase (Polarity mark)
04
Ib1n
The current of B-phase
05
Ic1
The current of C-phase (Polarity mark)
06
Ic1n
The current of C-phase
07
Ia2
The current of A-phase (Polarity mark)
08
Ia2n
The current of A-phase
09
Ib2
The current of B-phase (Polarity mark)
10
Ib2n
The current of B-phase
11
Ic2
The current of C-phase (Polarity mark)
12
Ic2n
The current of C-phase
13
IM0
Residual current of parallel line (Polarity mark)
14
IM0n
Residual current of parallel line
15
Ua
The voltage of A-phase (Polarity mark)
16
Uan
The voltage of A-phase
17
Ub
The voltage of B-phase (Polarity mark)
18
Ubn
The voltage of B-phase
19
Uc
The voltage of C-phase (Polarity mark)
20
Ucn
The voltage of C-phase
21
Us
Synchronism voltage (Polarity mark)
22
Usn
Synchronism voltage
23
Reserve
24
Reserve
25
GND
Ground
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6.3.4 DSP Plug-in Module (Logic Process)
NR1161
Figure 6.3-16 View of DSP plug-in module
This device can be equipped with 2 DSP plug-in modules at most and 1 DSP plug-in module at
least. The default DSP plug-in module is necessary, which mainly is responsible for protection
function including fault detector and protection calculation.
The module consists of high-performance double DSP (digital signal processor),16-digit
high-accuracy ADC that can perform synchronous sampling and manage other peripherals. One
of double DSP is responsible for protection calculation, and can fulfill analog data acquisition,
protection logic calculation and tripping output. The other is responsible for fault detector, and can
fulfill analog data acquisition, fault detector and providing power supply to output relay.
When the module is connected with conventional CT/VT, it can perform the synchronous data
acquisition through AI plug-in module. When the module is connected with ECT/EVT, it can
receive the real-time synchronous sampled value from merging unit through NET-DSP plug-in
module.
The other module is optional and it is not required unless control and manual closing with
synchronism check are equppied with this device. The default DSP plug-in module is fixed at slot
04 and the option DSP plug-in module is fixed at slot 06.
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6 Hardware
6.3.5 NET-DSP Plug-in Module (GOOSE and SV)
NR1136A
NR1136C
RX
Figure 6.3-17 View of NET-DSP plug-in module
This module consists of high-performance DSP (digital signal processor), 2~8 100Mbit/s
optical-fibre interface (LC type) and selectable IRIG-B interface (ST type). It supports GOOSE and
SV by IEC 61850-9-2 protocols. It can receive and send GOOSE messages to intelligent control
device, and receive SV from MU (merging unit).
This module supports IEEE1588 network time protocol, E2E and P2P defined in IEEE1588
protocol can be selected. This module supports Ethernet IEEE802.3 time adjustment message
format, UDP time adjustment message format and GMRP.
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6.3.6 CH Plug-in Module (Fibre Optical Channel Interface)
NR1213
NR1213
NR1213
NR1213
NR1214
TX
TX
TX
TX
RX
RX
RX
RX
TX
TX
RX
RX
NR1214
TX1
TX1
RX1
RX1
TX1
RX1
NR1213A
NR1213A-100
NR1213B
NR1213B-100
NR1214A
NR1214B
Figure 6.3-18 View of CH plug-in module
Type
Wavelength
Application
NR1213A
1310nm
Single-mode, single channel, transmission distance <40 km
NR1213A-100
1550nm
Single-mode, single channel, transmission distance <100 km
NR1213B
1310nm
Single-mode, dual channels, transmission distance <40 km
NR1213B-100
1550nm
Single-mode, dual channels, transmission distance <100 km
NR1214A
830nm
Multi-mode, single channel, transmission distance <2 km
NR1214B
830nm
Multi-mode, dual channels, transmission distance <2 km
PCS-902 series can exchange information with the device at the remote end through a dedicated
optical fibre channel or multiplex channel. The module transmits and receives optical signal using
FC/PC or ST optical connector.
The parameters are shown as follows:
Type1
Type2
Type3
Fiber Optic
Single mode, Rec.G652
Single mode, Rec.G652
Multi mode, Rec.G652
Wavelength
1310nm
1550nm
830nm
Transmission power
-13.0±3.0 dBm
-5.0 dBm±3.0 dBm
-12dBm~-20 dBm
Receiving sensitivity
Min.-37 dBm
Min.-36 dBm
Min.-30 dBm
Transmission distance
Max.40 km
Max.100 km
Max.2 km
Optical overload point
Min.-3 dBm
Min.-3 dBm
Min.-8 dBm
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Note!
When using dedicated optical fibre channel, if the transmission distance is longer than
50km, the transmitted power may be enchanced to ensure received power larger than
receiving sensitivity. Please notify supplier before ordering and it will be considered as
special project using 1550nm laser diode.
When using multiplex channel, the sending power of the device is fixed.
When using channel multiplexing equipment, the parameters are shown as follows:
1.
Channel type: digital optical fibre or digital microwave.
2.
Interface standard: 2048kbit/s E1
The device′s requirements on the channel are shown as follows:
1.
The routine of both direction shall be same to each other, so the time delays of both direction
are the same.
2.
The maximum one-way channel propagation delay shall be less than 15 ms.
6.3.7 BI Plug-in Module (Binary Input)
There are two kinds of BI modules available, NR1503 and NR1504. Up to 3 BI modules can be
equipped with one device. The rated voltage can be selected to be 24V/48V (NR1503D or
NR1504D) or 110V/220V/125V/250V (NR1503A or NR1504A).
Each BI module is with a 22-pin connector for 11 binary inputs (NR1503) or 18 binary inputs
(NR1504).
For NR1503, each binary input has independent negative power input of opto-coupler, and can be
configurable. The terminal definition of the connector of BI plug-in module is described as below.
[BI_n] (n=01, 02,…,11 can be configured as a specified binary input by PCS-Explorer software.)
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NR1503
BI_01
01
Opto01-
02
BI_02
03
Opto02-
04
BI_03
05
Opto03-
06
BI_04
07
Opto04-
08
BI_05
09
Opto05-
10
BI_06
11
Opto06-
12
BI_07
13
Opto07-
14
BI_08
15
Opto08-
16
BI_09
17
Opto09-
18
BI_10
19
Opto10-
20
BI_11
21
Opto11-
22
Figure 6.3-19 View of BI plug-in module (NR1503)
Terminal description for NR 1503 is shown as follows.
Terminal No.
Symbol
Description
01
BI_01
Configurable binary input 1
02
Opto01-
Negative supply of configurable binary input 1
03
BI_02
Configurable binary input 2
04
Opto02-
Negative supply of configurable binary input 2
05
BI_03
Configurable binary input 3
06
Opto03-
Negative supply of configurable binary input 3
07
BI_04
Configurable binary input 4
08
Opto04-
Negative supply of configurable binary input 4
09
BI_05
Configurable binary input 5
10
Opto05-
Negative supply of configurable binary input 5
11
BI_06
Configurable binary input 6
12
Opto06-
Negative supply of configurable binary input 6
13
BI_07
Configurable binary input 7
14
Opto07-
Negative supply of configurable binary input 7
15
BI_08
Configurable binary input 8
16
Opto08-
Negative supply of configurable binary input 8
17
BI_09
Configurable binary input 9
18
Opto09-
Negative supply of configurable binary input 9
19
BI_10
Configurable binary input 10
20
Opto10-
Negative supply of configurable binary input 10
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6 Hardware
Terminal No.
Symbol
Description
21
BI_11
Configurable binary input 11
22
Opto11-
Negative supply of configurable binary input 11
For NR1504, all binary inputs share one common negative power input, and can be configurable.
The terminal definition of the connector of BI plug-in module is described as below. [BI_n] (n=01,
02,…,18 can be configured as a specified binary input by PCS-Explorer software.)
NR1504
Opto+
01
BI_01
02
BI_02
03
BI_03
04
BI_04
05
BI_05
06
BI_06
07
08
BI_07
09
BI_08
10
BI_09
11
BI_10
12
BI_11
13
BI_12
14
15
BI_13
16
BI_14
17
BI_15
18
BI_16
19
BI_17
20
BI_18
21
COM-
22
Figure 6.3-20 View of BI plug-in module (NR1504)
Terminal description for NR1504 is shown as follows.
Terminal No.
Symbol
Description
01
Opto+
Positive supply of power supply of the module
02
BI_01
Configurable binary input 1
03
BI_02
Configurable binary input 2
04
BI_03
Configurable binary input 3
05
BI_04
Configurable binary input 4
06
BI_05
Configurable binary input 5
07
BI_06
Configurable binary input 6
08
Blank
Not used
09
BI_07
Configurable binary input 7
10
BI_08
Configurable binary input 8
11
BI_09
Configurable binary input 9
12
BI_10
Configurable binary input 10
13
BI_11
Configurable binary input 11
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Terminal No.
Symbol
Description
14
BI_12
Configurable binary input 12
15
Blank
Not used
16
BI_13
Configurable binary input 13
17
BI_14
Configurable binary input 14
18
BI_15
Configurable binary input 15
19
BI_16
Configurable binary input 16
20
BI_17
Configurable binary input 17
21
BI_18
Configurable binary input 18
22
COM-
Common terminal of negative supply of binary inputs
First four binary signals (BI_01, BI_02, BI_03, BI_04) in first BI plug-in module are fixed, they are
[BI_TimeSyn], [BI_Print], [BI_Maintenance] and [BI_RstTarg] respectively.
1.
Binary input: [BI_TimeSyn]
It is used to receive clock synchronization signal from clock synchronization device, the binary
input [BI_TimeSyn] will change from “0” to “1” once pulse signal is received. When the device
adopts “Conventional” mode as clock synchronization mode (refer to “Section 7.1 Communication
Settings”), the device can receives PPM (pulse per minute) and PPS (pulse per second). If the
setting [Opt_TimeSyn] is set as other values, this binary input is invalid.
2.
Binary input: [BI_Print]
It is used to manually trigger printing latest report when the equipment is configured as manual
printing mode by logic setting [En_AutoPrint]=0. The printer button is located on the panel usually.
If the equipment is configured as automatic printing mode ([En_AutoPrint]=1), report will be printed
automatically as soon as it is formed.
3.
Binary input: [BI_Maintenance]
It is used to block communication export when this binary input is energized. During device
maintenance or testing, this binary input is then energized not to send reports via communication
port, local display and printing still work as usual. This binary input should be de-energized when
the device is restored back to normal.
The application of the binary input [BI_Maintenance] for digital substation communication adopting
IEC61850 protocol is given as follows.
1)
Processing mechanism for MMS (Manufacturing Message Specification) message
a)
The protection device should send the state of this binary input to client.
b) When this binary input is energized, the bit “Test” of quality (Q) in the sent message changes
to “1”.
c) When this binary input is energized, the client cannot control the isolator link and circuit
breaker, modify settings and switch setting group remotely.
d)
According to the value of the bit “Test” of quality (Q) in the message sent, the client
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6 Hardware
discriminate whether this message is maintenance message, and then deal with it correspondingly.
If the message is the maintenance message, the content of the message will not be displayed on
real-time message window, audio alarm not issued, but the picture is refreshed so as to ensure
that the state of the picture is in step with the actual state. The maintenance message will be
stored, and can be inquired, in independent window.
2)
Processing mechanism for GOOSE message
a) When this binary input is energized, the bit “Test” in the GOOSE message sent by the
protection device changes to “1”.
b) For the receiving end of GOOSE message, it will compare the value of the bit “Test” in the
GOOSE message received by it with the state of its own binary input (i..e [BI_Maintenance]), the
message will be thought as invalid unless they are conformable.
3)
Processing mechanism for SV (Sampling Value) message
a) When this binary input of merging unit is energized, the bit “Test” of quality (Q) of sampling
data in the SV message sent change “1”.
b) For the receiving end of SV message, if the value of bit “Test” of quality (Q) of sampling data
in the SV message received is “1”, the relevant protection functions will be disabled, but under
maintenance state, the protection device should calculate and display the magnitude of sampling
data.
c) For duplicated protection function configurations, all merging units of control module
configured to receive sampling should be also duplicated. Both dual protection devices and dual
merging units should be fully independent each other, and one of them is in maintenance state will
not affect the normal operation of the other.
4.
Binary input: [BI_RstTarg]
It is used to reset latching signal relay and LCD displaying. The reset is done by pressing a button
on the panel.
Note!
The rated voltage of binary input is optional: 24V, 48V, 110V, 125V, 220V or 250V, which
must be specified when placed order. It is necessary to check whether the rated voltage of
BI module complies with site DC supply rating before put the relay in service.
Note!
There three binary signals are fixed for measurement functions, they are [BI_Rmt/Loc],
[BI_ManSynCls] and [BI_ManOpen] respectively.
5.
Binary input: [BI_Rmt/Loc]
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6 Hardware
It is used to select the remote control or the local control.
“1”: the remote control, all the binary outputs can only be remotely controlled by SCADA or control
centers.
“0” the local control, each binary output can only be applied to open/close CB/DS/ES locally. Each
binary output can also be applied issue a signal locally.
6.
Binary input: [BI_ManSynCls]
When the device is under local control condition (i.e. [BI_Rmt/Loc] is de-energized), the manual
synchronism check for closing circuit breaker will be initiated if it is energized.
7.
Binary input: [BI_ManOpen]
When the device is under local control condition (i.e. [BI_Rmt/Loc] is de-energized), the manual
control for open circuit breaker will be initiated if it is energized.
6.3.8 BO Plug-in Module (Binary Output)
NR1521A, NR1521C and NR1521G modules are three standard binary output modules. The
contacts provided by NR1521A, NR1521C and NR1521G are all normally open (NO) contacts.
Output contact can be configured as a specified tripping output contact and a signal output contact
respectively by PCS-Explorer software according to user requirement.
NR1521A can provide 11 output contacts controlled by fault detector.
NR1521A
BO_01
BO_02
BO_03
BO_04
BO_05
BO_06
BO_07
BO_08
BO_09
BO_10
BO_11
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
21
22
Figure 6.3-21 View of BO plug-in module (NR1521A)
NR1521C can provide 11 output contacts without controlled by fault detector.
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6 Hardware
NR1521C
BO_01
BO_02
BO_03
BO_04
BO_05
BO_06
BO_07
BO_08
BO_09
BO_10
BO_11
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
21
22
Figure 6.3-22 View of BO plug-in module (NR1521C)
BO plug-in module (NR1521F) is dedicatedly for remote/manual open or closing to circuit breaker,
disconnector and earth switch. 5 pairs of binary outputs (one for open and the other for closing)
can be provided by this BO plug-in module configured in slot 15 if measurement and control
function is equipped with the device. Up to 10 pairs of binary outputs can be provided by two BO
plug-in modules that can be configured in slot 14 and 15 respectively. (BO plug-in module
configured in slot 14 is optional if open or closing contacts is not enough)
A normally open contact is presented via terminal 21-22 designated as ROS (i.e. remote operation
signal). Whenever any of binary output contacts for open or closing is closed, ROS contact will
close to issue a signal indicating that this device is undergoing a remote operation.
BO plug-in module (NR1521F) is displayed as shown in the following figure.
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BO_CtrlOpn01
NR1521F
BO_CtrlOpn01
BO_CtrlOpn02
BO_CtrlOpn02
BO_CtrlOpn03
BO_CtrlOpn03
BO_CtrlOpn04
BO_CtrlOpn04
BO_CtrlOpn05
BO_CtrlOpn05
BO_Ctrl
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
21
22
Figure 6.3-23 View of BO plug-in module (NR1521F)
NR1521G can provide 11 output contacts without controlled by fault detector. The first four output
contacts are in parallel with instantaneous operating contacts which are recommended to be
configured as fast signaling contacts to send PLC signal.
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6 Hardware
NR1521G
BO_01
BO_02
BO_03
BO_04
BO_05
BO_06
BO_07
BO_08
BO_09
BO_10
BO_11
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
21
22
Figure 6.3-24 View of BO plug-in module (NR1521G)
6.3.9 HMI Module
The display panel consists of liquid crystal display module, keyboard, LED and ARM processor.
The functions of ARM processor include display control of the liquid crystal display module,
keyboard processing, and exchanging data with the CPU through LAN port etc. The liquid crystal
display module is a high-performance grand liquid crystal panel with soft back lighting, which has a
user-friendly interface and an extensive display range.
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7 Settings
7 Settings
Table of Contents
7 Settings ............................................................................................. 7-a
7.1 Communication Settings ................................................................................ 7-1
7.1.1 Setting Description ............................................................................................................. 7-2
7.1.2 Access Path ....................................................................................................................... 7-5
7.2 System Settings .............................................................................................. 7-5
7.2.1 Setting Description ............................................................................................................. 7-5
7.2.2 Access Path ....................................................................................................................... 7-6
7.3 Device Settings ............................................................................................... 7-6
7.3.1 Setting Description ............................................................................................................. 7-6
7.3.2 Access Path ....................................................................................................................... 7-7
7.4 Protection Settings ......................................................................................... 7-7
7.4.1 Setting Description ............................................................................................................. 7-7
7.4.2 Access Path ..................................................................................................................... 7-28
7.5 Logic Link Settings ....................................................................................... 7-28
7.5.1 GOOSE Link Settings ...................................................................................................... 7-28
7.5.2 Spare Link Settings .......................................................................................................... 7-28
7.5.3 Access Path ..................................................................................................................... 7-29
7.6 Measurement and Control Settings ............................................................. 7-29
7.6.1 Synchronism Settings ...................................................................................................... 7-29
7.6.2 Dual Position Binary Input Settings .................................................................................. 7-29
7.6.3 Control Settings ............................................................................................................... 7-30
7.6.4 Interlock Settings ............................................................................................................. 7-30
List of Tables
Table 7.1-1 Communication settings........................................................................................7-1
Table 7.2-1 System settings ......................................................................................................7-5
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7-a
Date: 2012-08-14
7 Settings
Table 7.3-1 Device settings .......................................................................................................7-6
7-b
PCS-902 Line Distance Relay
Date: 2012-08-14
7 Settings
The device has some setting groups for protection to coordinate with the mode of power system
operation, one of which is assigned to be active. However, equipment parameters are common for
all protection setting groups.
Note!
All current settings in this chapter are secondary current converted from primary current by
CT ratio. Zero-sequence current or voltage setting is configured according to 3I0 or 3U0
and negative sequence current setting according to I2 or U2.
7.1 Communication Settings
Table 7.1-1 Communication settings
No.
Item
Range
1
IP_LAN1
000.000.000.000~255.255.255.255
2
Mask_LAN1
000.000.000.000~255.255.255.255
3
IP_LAN2
000.000.000.000~255.255.255.255
4
Mask_LAN2
000.000.000.000~255.255.255.255
5
En_LAN2
0 or 1
6
IP_LAN3
000.000.000.000~255.255.255.255
7
Mask_LAN3
000.000.000.000~255.255.255.255
8
En_LAN3
0 or 1
9
IP_LAN4
000.000.000.000~255.255.255.255
10
Mask_LAN4
000.000.000.000~255.255.255.255
11
En_LAN4
0 or 1
12
Gateway
000.000.000.000~255.255.255.255
13
En_Broadcast
0 or 1
14
Addr_RS485A
0~255
15
Baud_RS485A
4800,9600,19200,38400,57600,115200 (bps)
16
Protocol_RS485A
0, 1 or 2
17
Addr_RS485B
0~255
18
Baud_RS485B
4800,9600,19200,38400,57600,115200 (bps)
19
Protocol_RS485B
0, 1 or 2
20
Threshold_Measmt
0~100%
21
Period_Measmt
0~65535s
22
Format_Measmt
0, 1
23
Baud_Printer
4800,9600,19200,38400,57600,115200 (bps)
24
En_AutoPrint
0 or 1
Conventional
25
Opt_TimeSyn
SAS
Advanced
NoTImeSyn
PCS-902 Line Distance Relay
7-1
Date: 2012-08-14
7 Settings
No.
Item
Range
26
IP_Server_SNTP
000.000.000.000~255.255.255.255
27
OffsetHour_UTC
-12~+12 (hrs)
28
OffsetMinute_UTC
0~60 (min)
7.1.1 Setting Description
1.
IP_LAN1, IP_LAN2, IP_LAN3, IP_LAN4
IP address of Ethernet port 1, Ethernet port 2, Ethernet port 3 and Ethernet port 4
2.
Mask_LAN1, Mask_LAN2, Mask_LAN3, Mask_LAN4
Subnet mask of Ethernet port 1, Ethernet port 2, Ethernet port 3 and Ethernet port 4
3.
En_LAN2, En_LAN3, En_LAN4
Put Ethernet port 2, Ethernet port 3 and Ethernet port 4 in service
They are used for Ethernet communication based on the IEC 60870-5-103 protocol. When the IEC
61850 protocol is applied, the IP address of Ethernet A will be GOOSE source MAC address.
Ethernet port 1 is always in service by default.
4.
Gateway
IP address of Gateway (router)
5.
En_Broadcast
This setting is only used only for IEC 60870-5-103 protocol. If NR network IEC 60870-5-103
protocol is used, the setting must be set as “1”.
0: the device does not send UDP messages through network
1: the device sends UDP messages through network
6.
Addr_RS485A, Addr_RS485B
They are the device′s communication address used to communicate with the SCADA or RTU via
serial ports (port A and port B).
7.
Baud_RS485A, Baud_RS485B
Baud rate of rear RS-485 serial port A or B
8.
Protocol_RS485A, Protocol_RS485B
Communication protocol of rear RS-485 serial port A or B
0: IEC 60870-5-103 protocol
1: Modbus Protocol
2: Reserved
7-2
PCS-902 Line Distance Relay
Date: 2012-08-14
7 Settings
Note!
Above table listed all the communication settings, the device delivered to the user maybe
only show some settings of them according to the communication interface configuration.
If only the Ethernet ports are applied, the settings about the serial ports (port A and port B)
are not listed in this submenu. And the settings about the Ethernet ports only listed in this
submenu according to the actual number of Ethernet ports.
The standard arrangement of the Ethernet port is two, at most four (predetermined when
ordering). Set the IP address according to actual arrangement of Ethernet numbers and
the un-useful port/ports need not be configured. If PCS-Explorer configuration tool
auxiliary software is connected with this device through the Ethernet, the IP address of the
PCS-Explorer must be set as one of the available IP address of this device.
9.
Threshold_Measmt
Threshold value of sending measurement values to SCADA through IEC 60870-5-103 or
IEC61850 protocol.
Default value: “1%”
10. Period_Measmt
The time period for equipment sends measurement data to SCADA through IEC 60870-5-103
protocol.
Default value: “60”
11. Format_Measmt
The setting is used to select the format of measurement data sent to SCADA through IEC
60870-5-103 protocol.
0: GDD data type through IEC103 protocol is 12
1: GDD data type through IEC103 protocol is 7, i.e. 754 short real number of IEEE standard
12. Baud_Printer
Baud rate of printer port
13. En_AutoPrint
If automatic print is required for fault report after protection operating, it is set as “1”. Otherwise, it
should be set to “0”.
14. Opt_TimeSyn
There are four selections for clock synchronization of device, shown as follows.

Conventional
PPS (RS-485): Pulse per second (PPS) via RS-485 differential level
PCS-902 Line Distance Relay
7-3
Date: 2012-08-14
7 Settings
IRIG-B (RS-485): IRIG-B via RS-485 differential level
PPM (DIN): Pulse per minute (PPM) via the binary input [BI_TimeSyn]
PPS (DIN): Pulse per second (PPS) via the binary input [BI_TimeSyn]

SAS
SNTP (PTP): Unicast (point-to-point) SNTP mode via Ethernet network
SNTP (BC): Broadcast SNTP mode via Ethernet network
Message (IEC103): Clock messages through IEC103 protocol

Advanced
IEEE1588: Clock message via IEEE1588
IRIG-B (Fiber): IRIG-B via optical-fibre interface
PPS (Fiber) PPS: Pulse per second (PPS) via optical-fibre interface

NoTimeSync
When no time synchronization signal is connected to the device, please select this option and the
alarm message [Alm_TimeSync] will not be issued anymore.
“Conventional” mode and “SAS” mode are always be supported by the device, but “Advanced”
mode is only supported when NET-DSP module is equipped. The alarm signal [Alm_TimeSyn]
may be issued to remind user loss of time synchronization signals.
1)
When “SAS” is selected, if there is no conventional clock synchronization signal, the device
will not send the alarm signal [Alm_TimeSyn]. When “Conventional” mode is selected, if there
is no conventional clock synchronization signal, “SAS” mode will be enabled automatically
with the alarm signal [Alm_TimeSyn] issued simultaneously.
2)
When “Advanced” mode is selected, if there is no conventional clock synchronization signal
connected to NET-DSP module, “SAS” mode is enabled automatically with the alarm signal
[Alm_TimeSyn] issued simultaneously.
3)
When “NoTimeSyn” mode is selected, the device will not send alarm signals without time
synchronization signal. But the device can be still synchronized if receiving time
synchronization signal.
Note!
The clock message via IEC 60870-5-103 protocol is invalid when the device receives the
IRIG-B signal through RCS-485 port.
15. IP_Server_SNTP
It is the address of the SNTP time synchronization server which sends SNTP timing messages to
the relay or BCU.
7-4
PCS-902 Line Distance Relay
Date: 2012-08-14
7 Settings
16. OffsetHour_UTC, OffsetMinute_UTC
If the IEC61850 protocol is adopted in substations, the time tags of communication messages are
required according to UTC (Universal Time Coordinated) time.
The setting [OffsetHour_UTC] is used to set the hour offset of the current time zone to the GMT
(Greenwich Mean Time) zone; for example, if a relay is applied in China, the time zone of China is
east 8th time zone, so this setting is set as “8”. The setting [OffsetMinute_UTC] is used to set the
minute offset of the current time zone to the GMT zone.
Time zone
GMT zone
East 1st
East 2nd
East 3rd
East 4th
East 5th
0
1
2
3
4
5
Setting
th
th
East 6
Time zone
East 7
6
Setting
West 1
12/-12
-1
th
Time zone
th
East 9
8
st
East/West 12
Setting
East 8
7
th
Time zone
th
East 10
East 11th
10
11
9
nd
West 2
rd
West 3
-2
th
West 4
-3
th
-4
th
West 5th
-5
West 6
West 7
West 8
West 9
West 10
West 11th
-6
-7
-8
-9
-10
-11
Setting
th
th
th
7.1.2 Access Path
MainMenuSettingsDevice SetupComm Settings
7.2 System Settings
Table 7.2-1 System settings
No.
Item
Unit
Range
1
Active_Grp
1~10
2
Opt_SysFreq
50 or 60
3
PrimaryEquip_Name
Maximum 12 character
4
U1n
33~65500
kV
5
U2n
80~220
V
6
I1n
100~65500
A
7
I2n
1 or 5
A
Hz
7.2.1 Setting Description
1.
Active_Grp
The number of active setting group, 10 setting groups can be configured for protection settings,
and only one is active at a time.
2.
PrimaryEquip_Name
It is recognized by the device automatically. Such setting is used for printing messages.
3.
Opt_SysFreq
It is option of system frequency, and can be set as 50Hz or 60Hz.
PCS-902 Line Distance Relay
7-5
Date: 2012-08-14
7 Settings
4.
Un1
Primary rated voltage of VT;
5.
Un2
Secondary rated voltage of VT;
6.
In1
Primary rated current of CT;
7.
In2
Secondary rated current of CT;
7.2.2 Access Path
MainMenuSettingsSystem Settings
7.3 Device Settings
Table 7.3-1 Device settings
No.
Item
Range
1
HDR_EncodeMode
GB18030, UTF-8
2
Opt_Caption_103
0, 1 or 2
3
Bxx.Un_BinaryInput
24V, 30V, 48V, 110V, 125V, 220V
7.3.1 Setting Description
1.
HDR_EncodeMode
Select encoding format of header (HDR) file COMTRADE recording file
Default value is “UTF-8”.
2.
Opt_Caption_103
Select the caption language sent to SAS via IEC103 protocol
0: Current language
1: Fixed Chinese
2: Fixed English
Default value of [Opt_Caption_103] is 0 (i.e. current language), and please set it to 1 (i.e. Fixed
Chinese) if the SAS is supplied by China Manufacturer.
3.
Bxx.Un_BinaryInput
This setting is used to set voltage level of binary input module. If low-voltage BI module is
equipped, 24V, 30V or 48V can be set according to the actual requirement, and if high-voltage BI
module is equipped, 110V, 125V or 220V can be set according to the actual requirement.
7-6
PCS-902 Line Distance Relay
Date: 2012-08-14
7 Settings
Bxx: this plug-in module is inserted in slot xx.
7.3.2 Access Path
MainMenuSettingsDevice SetupDevice Settings
7.4 Protection Settings
All settings of protection are based on secondary ratings of VT and CT. For the specific project,
some settings relevant to synchrocheck module, auto-reclosing module and breaker failure
protection module maybe with the suffix of “_CB1” and “_CB2” what represent the settings
correspond to synchrocheck module, auto-reclosing module and breaker failure protection module
for circuit breaker 1 and circuit breaker 2 respectively.
Unn: rated secondary phase-to-phase voltage.
Un: rated secondary phase-to-ground voltage.
In: rated secondary current.
7.4.1 Setting Description
7.4.1.1 Line Parameters
No.
Item
Remark
Range
1
X1L
Positive sequence reactance of the line
(0.000~4Unn)/In (ohm)
2
R1L
Positive sequence resistance of the line
(0.000~4Unn)/In (ohm)
3
X0L
Zero-sequence reactance of the line
(0.000~4Unn)/In (ohm)
4
R0L
Zero-sequence resistance of the line
(0.000~4Unn)/In (ohm)
5
X0M
Line mutual zero-sequence reactance
(0.000~4Unn)/In (ohm)
6
R0M
Line mutual zero-sequence resistance
(0.000~4Unn)/In (ohm)
7
LineLength
Total length of the line
0.00~655.35 (km)
8
phi1_Reach
Phase angle of line positive sequence impedance
30.00~89.00 (Deg)
9
phi0_Reach
Phase angle of line zero-sequence impedance
30.00~89.00 (Deg)
10
Real_K0
11
Imag_K0
Resistive
component
of
zero-sequence
of
zero-sequence
compensation coefficient
Imaginary
component
compensation coefficient
-4.000~4.000
-4.000~4.000
7.4.1.2 Fault Detector Settings (FD)
No.
Item
Remark
Range
1
FD.DPFC.I_Set
Current setting of DPFC current FD element
(0.050~30.000)×In (A)
2
FD.ROC.3I0_Set
Current setting of neutral current FD element
(0.050~30.000)×In (A)
PCS-902 Line Distance Relay
7-7
Date: 2012-08-14
7 Settings
7.4.1.3 Auxiliary Element (Aux.E)
No.
Item
1
AuxE.OCD.t_Ext
2
AuxE.OCD.En
3
AuxE.ROC1.3I0_Set
4
AuxE.ROC1.En
5
AuxE.ROC2.3I0_Set
6
AuxE.ROC2.En
7
AuxE.ROC3.3I0_Set
8
AuxE.ROC3.En
9
AuxE.OC1.I_Set
Remark
Range
Extended time delay of current change auxiliary
0.000~10.000 (s)
element
Enabling/disabling current change auxiliary element
Current setting of stage 1 residual current auxiliary
element
Enabling/disabling stage 1 residual current auxiliary
element
Current setting of stage 2 residual current
auxiliary
element
Enabling/disabling stage 2 residual current auxiliary
element
Current setting of stage 3 residual current auxiliary
element
Enabling/disabling stage 3 residual current auxiliary
element
Current setting of stage 1 phase current auxiliary
0 or 1
(0.050~30.000)×In
0 or 1
(0.050~30.000)×In
0 or 1
(0.050~30.000)×In
0 or 1
(0.050~30.000)×In
element
Enabling/disabling stage 1 phase current auxiliary
10
AuxE.OC1.En
11
AuxE.OC2.I_Set
12
AuxE.OC2.En
13
AuxE.OC3.I_Set
14
AuxE.OC3.En
15
AuxE.UVD.U_Set
16
AuxE.UVD.t_Ext
17
AuxE.UVD.En
18
AuxE.UVG.U_Set
19
AuxE.UVG.En
20
AuxE.UVS.U_Set
21
AuxE.UVS.En
22
AuxE.ROV.3U0_Set
Voltage setting for residual voltage auxiliary element
0~Un
23
AuxE.ROV.En
Enabling/disabling residual voltage auxiliary element
0 or 1
element
Current setting of stage 2 phase current auxiliary
(0.050~30.000)×In
element
Enabling/disabling stage 2 phase current auxiliary
element
Current setting of stage 3 phase current auxiliary
0 or 1
(0.050~30.000)×In
element
Enabling/disabling stage 3 phase current auxiliary
element
Voltage setting for voltage change auxiliary element
Extended time delay of voltage change auxiliary
0 or 1
0~Un
0.000~10.000 (s)
element
Enabling/disabling voltage change auxiliary element
Voltage setting for phase-to-ground under voltage
auxiliary element
Enabling/disabling phase-to-ground under voltage
auxiliary element
Voltage setting for phase-to-phase under voltage
0 or 1
0~Un
0 or 1
0~Unn
auxiliary element
Enabling/disabling phase-to-phase under voltage
0 or 1
auxiliary element
7-8
0 or 1
PCS-902 Line Distance Relay
Date: 2012-08-14
7 Settings
7.4.1.4 DPFC Distance Protection Settings (21D)
No.
Item
Remark
Range
1
21D.Z_DPFC
Impedance setting of DPFC distance protection
(0.000~4Unn)/In (ohm)
2
21D.En_DPFC
Enable DPFC distance protection
0 or 1
7.4.1.5 Load Encroachment Settings (LoadEnch)
No.
Item
Remark
Range
Angle setting of load trapezoid characteristic, it should
1
LoadEnch.phi_Blinder
be set according to the maximum load area angle 0~45 (Deg)
(φLoad_Max), φLoad_Max+5° is recommended.
Resistance setting of load trapezoid characteristic, it
2
LoadEnch.R_Blinder
should be set according to the minimum load
resistance, 70%~90% minimum load resistance is
(0.05~200)/In (ohm)
recommended.
3
LoadEnch.En
Enable load trapezoid characteristic
0 or 1
7.4.1.6 Distance Protection Settings with Mho Characteristic (21M)
No.
Item
1
21M.ZG.phi_Shift
2
21M.ZP.phi_Shift
3
21M.ZG1.Z_Set
4
21M.ZG1.t_Op
5
21M.ZG1.En
6
21M.ZG1.En_BlkAR
7
21M.ZP1.Z_Set
8
21M.ZP1.t_Op
9
21M.ZP1.En
10
21M.ZP1.En_BlkAR
11
21M.ZG2.Z_Set
12
21M.ZG2.t_Op
13
21M.ZG2.t_ShortDly
Remark
Phase shift of zone 1, 2 of phase-to-ground distance
protection
Phase shift of zone 1, 2 of phase-to-phase distance
protection
Impedance setting of zone 1 of phase-to-ground
distance protection
Time delay of zone 1 of phase-to-ground distance
protection
Range
0, 15 or 30 (Deg)
0, 15 or 30 (Deg)
(0.000~4Unn)/In (ohm)
0.000~10.000 (s)
Enable zone 1 of phase-to-ground distance protection 0 or 1
Enable phase-to-ground zone 1 of distance protection
operation to block AR
Impedance setting of zone 1 of phase-to-phase
distance protection
Time delay of zone 1 of phase-to-phase distance
protection
0 or 1
(0.000~4Unn)/In (ohm)
0.000~10.000 (s)
Enable zone 1 of phase-to-phase distance protection 0 or 1
Enable phase-to-phase zone 1 of distance protection
operation to block AR
Impedance setting of zone 2 of phase-to-ground
distance protection
Time delay of zone 2 of phase-to-ground distance
protection
Short time delay of zone 2 of phase-to-ground
distance protection
PCS-902 Line Distance Relay
0 or 1
(0.000~4Unn)/In (ohm)
0.000~10.000 (s)
0.000~10.000 (s)
7-9
Date: 2012-08-14
7 Settings
14
21M.ZG2.En
Enable zone 2 of phase-to-ground distance protection 0 or 1
15
21M.ZG2.En_BlkAR
16
21M.ZP2.Z_Set
17
21M.ZP2.t_Op
18
21M.ZP2.t_ShortDly
19
21M.ZP2.En
20
21M.ZP2.En_BlkAR
21
21M.Z2.En_ShortDly
22
21M.ZG3.Z_Set
23
21M.ZG3.t_Op
24
21M.ZG3.t_ShortDly
25
21M.ZG3.En
26
21M.ZG3.En_BlkAR
27
21M.ZP3.Z_Set
28
21M.ZP3.t_Op
29
21M.ZP3.t_ShortDly
30
21M.ZP3.En
31
21M.ZP3.En_BlkAR
32
21M.Z3.En_ShortDly
33
21M.Z4.Z_Fwd
34
21M.Z4.Z_Rev
35
21M.Z4.t_Op
Time delay of zone 4 of distance protection
0.000~10.000 (s)
36
21M.ZG4.En
Enable zone 4 of phase-to-ground distance element
0 or 1
37
21M.ZG4.En_BlkAR
38
21M.ZP4.En
39
21M.ZP4.En_BlkAR
Enable phase-to-ground zone 2 of distance protection
operation to block AR
Impedance setting of zone 2 of phase-to-phase
distance protection
Time delay of zone 2 of phase-to-phase distance
protection
Short time delay of zone 2 of phase-to-phase distance
protection
0 or 1
(0.000~4Unn)/In (ohm)
0.000~10.000 (s)
0.000~10.000 (s)
Enable zone 2 of phase-to-phase distance protection 0 or 1
Enable phase-to-phase zone 2 of distance protection
operation to block AR
0 or 1
Enable fixed accelerate zone 2 of distance protection 0 or 1
Impedance setting of zone 3 of phase-to-ground
distance protection
Time delay of zone 3 of phase-to-ground distance
protection
Short time delay of zone 3 of phase-to-ground
distance protection
(0.000~4Unn)/In (ohm)
0.000~10.000 (s)
0.000~10.000 (s)
Enable zone 3 of phase-to-ground distance protection 0 or 1
Enable phase-to-ground zone 3 of distance protection
operation to block AR
Impedance setting of zone 3 of phase-to-phase
distance protection
Time delay of zone 3 of phase-to-phase distance
protection
Short time delay of zone 3 of phase-to-phase distance
protection
0 or 1
(0.000~4Unn)/In (ohm)
0.000~10.000 (s)
0.000~10.000 (s)
Enable zone 3 of phase-to-phase distance protection 0 or 1
Enable phase-to-phase zone 3 of distance protection
operation to block AR
0 or 1
Enable fixed accelerate zone 3 of distance protection 0 or 1
Impedance setting of zone 4 of pilot positive distance
protection
Impedance setting of zone 4 of pilot reversal distance
protection
Enable phase-to-ground zone 4 of distance protection
operation to block AR
(0.000~4Unn)/In (ohm)
(0.000~4Unn)/In (ohm)
0 or 1
Enable zone 4 of phase-to-phase distance protection 0 or 1
Enable phase-to-phase zone 4 of distance protection
operation to block AR
7-10
0 or 1
PCS-902 Line Distance Relay
Date: 2012-08-14
7 Settings
40
21M.ZG5.Z_Set
41
21M.ZG5.t_Op
42
21M.ZG5.En
43
21M.ZG5.En_BlkAR
44
21M.ZP5.Z_Set
45
21M.ZP5.t_Op
46
21M.ZP5.En
47
21M.ZP5.En_BlkAR
48
21M.Z5.Opt_Dir
Impedance setting of zone 5 of phase-to-ground
distance protection
Time delay of zone 5 of phase-to-ground distance
protection
(0.000~4Unn)/In (ohm)
0.000~10.000 (s)
Enabe zone 5 of phase-to-ground distance protection 0 or 1
Enable phase-to-ground zone 5 of distance protection
operation to block AR
Impedance setting of zone 5 of phase-to-phase
distance protection
Time delay of zone 5 of phase-to-phase distance
protection
0 or 1
(0.000~4Unn)/In (ohm)
0.000~10.000 (s)
Enable zone 5 of phase-to-phase distance protection 0 or 1
Enable phase-to-phase zone 5 of distance protection
operation to block AR
Direction option for zone 5 of distance protection
0 or 1
0 or 1
7.4.1.7 Distance Protection Settings with Quad Characteristic (21Q)
No.
Item
1
21Q.ZG1.Z_Set
2
21Q.ZG1.R_Set
3
21Q.ZG1.t_Op
4
21Q.ZG1.En
5
21Q.ZG1.En_BlkAR
6
21Q.ZP1.Z_Set
7
21Q.ZP1.R_Set
8
21Q.ZP1.t_Op
9
21Q.ZP1.En
10
21Q.ZP1.En_BlkAR
11
21Q.ZG2.Z_Set
12
21Q.ZG2.R_Set
13
21Q.ZG2.t_Op
Remark
Impedance setting of zone 1 of phase-to-ground
distance protection
Resistance setting of zone 1 of phase-to-ground
distance protection
Time delay of zone 1 of phase-to-ground distance
protection
Range
(0.000~4Unn)/In (ohm)
(0.000~4Unn)/In (ohm)
0.000~10.000 (s)
Enable zone 1 of phase-to-ground distance protection 0 or 1
Enable phase-to-ground zone 1 of distance protection
operation to block AR
Impedance setting of zone 1 of phase-to-phase
distance protection
Resistance setting of zone 1 of phase-to-phase
distance protection
Time delay of zone 1 of phase-to-phase distance
protection
0 or 1
(0.000~4Unn)/In (ohm)
(0.000~4Unn)/In (ohm)
0.000~10.000 (s)
Enable zone 1 of phase-to-phase distance protection 0 or 1
Enable phase-to-phase zone 1 of distance protection
operation to block AR
Impedance setting of zone 2 of phase-to-ground
distance protection
Resistance setting of zone 2 of phase-to-ground
distance protection
Time delay of zone 2 of phase-to-ground distance
protection
PCS-902 Line Distance Relay
0 or 1
(0.000~4Unn)/In (ohm)
(0.000~4Unn)/In (ohm)
0.000~10.000 (s)
7-11
Date: 2012-08-14
7 Settings
14
21Q.ZG2.t_ShortDly
15
21Q.ZG2.En
16
21Q.ZG2.En_BlkAR
17
21Q.ZP2.Z_Set
18
21Q.ZP2.R_Set
19
21Q.ZP2.t_Op
20
21Q.ZP2.t_ShortDly
21
21Q.ZP2.En
22
21Q.ZP2.En_BlkAR
23
21Q.Z2.En_ShortDly
24
21Q.ZG3.Z_Set
25
21Q.ZG3.R_Set
26
21Q.ZG3.t_Op
27
21Q.ZG3.t_ShortDly
28
21Q.ZG3.En
29
21Q.ZG3.En_BlkAR
30
21Q.ZP3.Z_Set
31
21Q.ZP3.R_Set
32
21Q.ZP3.t_Op
33
21Q.ZP3.t_ShortDly
34
21Q.ZP3.En
35
21Q.ZP3.En_BlkAR
36
21Q.Z3.En_ShortDly
37
21Q.ZG4.Z_Set
Short time delay of zone 2 of phase-to-ground
distance protection
0.000~10.000 (s)
Enable zone 2 of phase-to-ground distance protection 0 or 1
Enable phase-to-ground zone 2 of distance protection
operation to block AR
Impedance setting of zone 2 of phase-to-phase
distance protection
Resistance setting of zone 2 of phase-to-phase
distance protection
Time delay of zone 2 of phase-to-phase distance
protection
Short time delay of zone 2 of phase-to-phase distance
protection
0 or 1
(0.000~4Unn)/In (ohm)
(0.000~4Unn)/In (ohm)
0.000~10.000 (s)
0.000~10.000 (s)
Enable zone 2 of phase-to-phase distance protection 0 or 1
Enable phase-to-phase zone 2 of distance protection
operation to block AR
0 or 1
Enable fixed accelerate zone 2 of distance protection 0 or 1
Impedance setting of zone 3 of phase-to-ground
distance protection
Resistance setting of zone 3 of phase-to-ground
distance protection
Time delay of zone 3 of phase-to-ground distance
protection
Short time delay of zone 3 of phase-to-ground
distance protection
(0.000~4Unn)/In (ohm)
(0.000~4Unn)/In (ohm)
0.000~10.000 (s)
0.000~10.000 (s)
Enable zone 3 of phase-to-ground distance protection 0 or 1
Enable phase-to-ground zone 3 of distance protection
operation to block AR
Impedance setting of zone 3 of phase-to-phase
distance element
Resistance setting of zone 3 of phase-to-phase
distance protection
Time delay of zone 3 of phase-to-phase distance
protection
Short time delay of zone 3 of phase-to-phase distance
protection
0 or 1
(0.000~4Unn)/In (ohm)
(0.000~4Unn)/In (ohm)
0.000~10.000 (s)
0.000~10.000 (s)
Enable zone 3 of phase-to-phase distance protection 0 or 1
Enable phase-to-phase zone 3 of distance protection
operation to block AR
0 or 1
Enable fixed accelerate zone 3 of distance protection 0 or 1
Impedance setting of zone 4 of phase-to-ground
distance protection
7-12
(0.000~4Unn)/In (ohm)
PCS-902 Line Distance Relay
Date: 2012-08-14
7 Settings
38
21Q.ZG4.R_Set
39
21Q.ZG4.t_Op
40
21Q.ZG4.En
41
21Q.ZG4.En_BlkAR
42
21Q.ZP4.Z_Set
43
21Q.ZP4.R_Set
44
21Q.ZP4.t_Op
45
21Q.ZP4.En
46
21Q.ZP4.En_BlkAR
47
21Q.ZG5.Z_Set
48
21Q.ZG5.R_Set
49
21Q.ZG5.t_Op
50
21Q.ZG5.En
51
21Q.ZG5.En_BlkAR
52
21Q.ZP5.Z_Set
53
21Q.ZP5.R_Set
54
21Q.ZP5.t_Op
55
21Q.ZP5.En
56
21Q.ZP5.En_BlkAR
57
21Q.Z5.Opt_Dir
Resistance setting of zone 4 of phase-to-ground
distance protection
Time delay of zone 4 of phase-to-ground distance
protection
(0.000~4Unn)/In (ohm)
0.000~10.000 (s)
Enable zone 4 of phase-to-ground distance protection 0 or 1
Enable phase-to-ground zone 4 of distance protection
operation to block AR
Impedance setting of zone 4 of phase-to-phase
distance protection
Resistance setting of zone 4 of phase-to-phase
distance protection
Time delay of zone 4 of phase-to-phase distance
protection
0 or 1
(0.000~4Unn)/In (ohm)
(0.000~4Unn)/In (ohm)
0.000~10.000 (s)
Enable zone 4 of phase-to-phase distance protection 0 or 1
Enable phase-to-phase zone 4 of distance protection
operation to block AR
Impedance setting of zone 5 of phase-to-ground
distance protection
Resistance setting of zone 5 of phase-to-ground
distance protection
Time delay of zone 5 of phase-to-ground distance
protection
0 or 1
(0.000~4Unn)/In (ohm)
(0.000~4Unn)/In (ohm)
0.000~10.000 (s)
Enable zone 5 of phase-to-ground distance protection 0 or 1
Enable phase-to-ground zone 5 of distance protection
operation to block AR
Impedance setting of zone 5 of phase-to-phase
distance protection
Resistance setting of zone 5 of phase-to-phase
distance protection
Time delay of zone 5 of phase-to-phase distance
protection
0 or 1
(0.000~4Unn)/In (ohm)
(0.000~4Unn)/In (ohm)
0.000~10.000 (s)
Enable zone 5 of phase-to-phase distance protection 0 or 1
Enabling/disabling phase-to-phase zone 5 of distance
protection operation to block AR
Direction option for zone 5 of distance protection
0 or 1
0 or 1
7.4.1.8 Pilot Distance Zone Settings
No.
Item
Remark
Range
1
21M.Pilot.Z_Set
Impedance setting of pilot distance element
(0.000~4Unn)/In (ohm)
2
21Q.Pilot.Z_Set
Impedance setting of pilot distance element
(0.000~4Unn)/In (ohm)
3
21M.Pilot.Z_Rev
Impedance setting of pilot reversal distance element
(0.000~4Unn)/In (ohm)
4
21Q.Pilot.Z_Rev
Impedance setting of pilot reversal distance element
(0.000~4Unn)/In (ohm)
5
21Q.Pilot.R_Set
Resistance setting of pilot distance element
(0.000~4Unn)/In (ohm)
PCS-902 Line Distance Relay
7-13
Date: 2012-08-14
7 Settings
6
21Q.Pilot.R_Rev
Resistance setting of pilot reversal distance element
(0.000~4Unn)/In (ohm)
7.4.1.9 Power Swing Detection Settings (68)
No.
1
Item
68.En
Remark
Range
Enable power swing detection
0 or 1
7.4.1.10 Power Swing Blocking Releasing Settings (PSBR)
No.
Item
1
21M.I_PSBR
2
21Q.I_PSBR
3
21M.Z1.En_PSBR
4
21Q.Z1.En_PSBR
5
21M.Z2.En_PSBR
6
21Q.Z2.En_PSBR
7
21M.Z3.En_PSBR
8
21Q.Z3.En_PSBR
9
21M.Z5.En_PSBR
10
21Q.Z5.En_PSBR
11
21M.Pilot.En_PSBR
12
21Q.Pilot.En_PSBR
Remark
Range
Current setting of PSBR (Mho Characteristic)
(0.050~30.000)×In (A)
Current setting for power swing blocking (Quad
Characteristic)
Enable PSBR for zone 1 of distance element (Mho
Characteristic)
Enable PSBR for zone 1 of distance element (Quad
Characteristic)
Enable PSBR for zone 2 of distance element (Mho
Characteristic)
Enable PSBR for zone 2 of distance element (Quad
Characteristic)
Enable PSBR for zone 3 of distance element (Mho
Characteristic)
Enable PSBR for zone 3 of distance element (Quad
Characteristic)
Enable PSBR for zone 4 of distance element (Mho
Characteristic)
Enable PSBR for zone 4 of distance element (Quad
Characteristic)
Enable PSBR for pilot distance element (Mho
Characteristic)
Enable PSBR for pilot distance element (Quad
Characteristic)
(0.050~30.000)×In (A)
0 or 1
0 or 1
0 or 1
0 or 1
0 or 1
0 or 1
0 or 1
0 or 1
0 or 1
0 or 1
7.4.1.11 Distance SOTF Protection Settings (21SOTF)
No.
1
Item
21SOTF.En
Remark
Range
Enable accelerating distance protection to trip
0 or 1
Enable stage 2 of accelerating distance protection
2
21SOTF.Z2.En_ManCls
to trip when manual closing or auto-reclosing onto 0 or 1
an existing fault
Enable stage 3 of accelerating distance protection
3
21SOTF.Z3.En_ManCls
to trip when manual closing or auto-reclosing onto 0 or 1
an existing fault
7-14
PCS-902 Line Distance Relay
Date: 2012-08-14
7 Settings
Enable stage 4 of accelerating distance protection
4
21SOTF.Z4.En_ManCls
to trip when manual closing or auto-reclosing onto 0 or 1
an existing fault
5
21SOTF.Z2.En_3PAR
Enable 3-pole auto-reclosing mode for zone 2
0 or 1
6
21SOTF.Z3.En_3PAR
Enable 3-pole auto-reclosing mode for zone 3
0 or 1
7
21SOTF.Z4.En_3PAR
Enable 3-pole auto-reclosing mode for zone 4
0 or 1
8
21SOTF.Z2.En_PSBR
Enable PSBR for zone 2 of distance element
0 or 1
9
21SOTF.Z3.En_PSBR
Enable PSBR for zone 3 of distance element
0 or 1
10
21SOTF.Z4.En_PSBR
Enable PSBR for zone 4 of distance element
0 or 1
Enable accelerating distance protection to trip
11
21SOTF.En_PDF
when fault occurs on healthy phase under pole 0 or 1
discrepancy situation
Time delay of accelerating distance protection to
12
21SOTF.t_PDF
trip when fault occurs on healthy phase under pole 0.000~10.000 (s)
discrepancy situation
13
SOTF.Opt_Mode_ManCls
Option of manual SOTF mode
0, 1 or 2
7.4.1.12 Optical Pilot Channel Settings
No.
Item
Remark
Range
1
FO.LocID
Indentity code of the device at local end
0-65535
2
FO.RmtID
Indentity code of the device at remote end
0-65535
3
FOx.En_IntClock
Option of internal clock or external clock
0 or 1
4
Fox.BaudRate
Baud rate of optical pilot channel
64 or 2048 (KBPS)
7.4.1.13 Pilot Distance Protection Settings (85)
No.
Item
Remark
Option of pilot scheme
Range
1
85.Opt_PilotMode
2
85.Opt_Ch_PhSeg
3
85.En_WI
Enable weak infeed scheme
0 or 1
4
85.U_UV_WI
Undervoltage setting of weak infeed logic
0~Unn (V)
5
85.Z.En
Enable pilot distance protection
0 or 1
6
85.En_Unblocking1
Enable unblocking scheme
0 or 1
7
85.t_DPU_Blocking1
8
85.t_DPU_CR1
Time delay pickup for current reversal logic
0.000~1.000 (s)
9
85.t_DDO_CR1
Time delay dropoff for current reversal logic
0.000~1.000 (s)
10
85.En_ZX
Enable zone extension protection
0 or 1
11
85.t_DPU_ZX
Option of phase-segregated signal scheme or
three-phase signal scheme
Time delay for blocking scheme of pilot distance
protection operation
Pickup time delay for zone extension protection
operation
PCS-902 Line Distance Relay
0~2
0 or 1
0.000~1.000 (s)
0.000~10.000 (s)
7-15
Date: 2012-08-14
7 Settings
7.4.1.14 Pilot Directional Earth-fault Protection Settings (85)
No.
Item
1
85.DEF.En
2
85.DEF.En_BlkAR
3
85.DEF_En_IndepCh
4
85.En_Unblocking2
5
85.DEF.3I0_Set
6
85.DEF.t_DPU
Remark
Range
Enable pilot directional earth-fault protection
0 or 1
Enable pilot directional earth-fault protection operate
to block AR
Enable independent pilot channel for pilot directional
earth-fault protection
Enable unblocking scheme for pilot DEF via pilot
channel 2
Current
setting
of
pilot
directional
earth-fault
protection
Time delay of pilot directional earth-fault protection
0 or 1
0 or 1
0 or 1
(0.050~30.000)×In (A)
0.001~10.000 (s)
Time delay pickup for current reversal logic when pilot
7
85.t_DPU_CR2
directional earth-fault protection adopts independent 0.000~1.000 (s)
pilot channel 2
Time delay dropoff for current reversal logic when
8
85.t_DDO_CR2
pilot
directional
earth-fault
protection
adopts 0.000~1.000 (s)
independent pilot channel 2
7.4.1.15 Current Direction Settings
No.
Item
Remark
The
characteristic
angle
Range
of
directional
phase
1
RCA_OC
2
RCA_ROC
3
RCA_NegOC
4
Z0_Comp
Zero-sequence compensation impedance setting
(0.000~4Unn)/In (ohm)
5
Z2_Comp
Negative-sequence compensation impedance setting
(0.000~4Unn)/In (ohm)
overcurrent element
The characteristic angle of directional earth fault
element
The
characteristic
angle
of
directional
negative-sequence overcurrent element
45.00~89.00 (Deg)
45.00~89.00 (Deg)
45.00~89.00 (Deg)
7.4.1.16 Phase Overcurrent Protection (50/51P)
No.
Item
1
50/51P.k_Hm2
2
50/51P1.I_Set
3
50/51P1.t_Op
4
50/51P1.En
5
50/51P1.En_BlkAR
Remark
Range
Setting of second harmonic component for blocking
phase overcurrent elements
Current setting for stage 1 of phase overcurrent
protection
Time delay for stage 1 of phase overcurrent
protection
Enable stage 1 of phase overcurrent protection
(0.050~30.000)×In (A)
0.000~20.000 (s)
0 or 1
Enabling/Disabling auto-reclosing blocked when
stage 1 of phase overcurrent protection operates
7-16
0.000~1.000
0 or 1
PCS-902 Line Distance Relay
Date: 2012-08-14
7 Settings
6
50/51P1.Opt_Dir
7
50/51P1.En_Hm2
8
50/51P1.Opt_Curve
9
50/51P1.TMS
10
50/51P1.tmin
11
50/51P1.Alpha
12
50/51P1.C
13
50/51P1.K
14
50/51P2.I_Set
15
50/51P2.t_Op
16
50/51P2.En
17
50/51P2.En_BlkAR
18
50/51P2.Opt_Dir
19
50/51P2.En_Hm2
20
50/51P2.Opt_Curve
21
50/51P2.TMS
22
50/51P2.tmin
23
50/51P3.I_Set
24
50/51P3.t_Op
25
50/51P3.En
26
50/51P3.En_BlkAR
27
50/51P3.Opt_Dir
Direction option for stage 1 of phase overcurrent
protection
Enable second harmonic blocking for stage 1 of
phase overcurrent protection
Option of characteristic curve for stage 1 of phase
overcurrent protection
Time multiplier setting for stage 1 of inverse-time
phase overcurrent protection
Minimum operating time for stage 1 of inverse-time
phase overcurrent protection
Constant “α” for stage 1 of customized inverse-time
characteristic phase overcurrent protection
Constant “C” for stage 1 of customized inverse-time
characteristic phase overcurrent protection
Constant “K” for stage 1 of customized inverse-time
characteristic phase overcurrent protection
Current setting for stage 2 of phase overcurrent
protection
Time delay for stage 2 of phase overcurrent
protection
Enable stage 2 of phase overcurrent protection
Enabling/Disabling auto-reclosing blocked when
stage 2 of phase overcurrent protection operates
Direction option for stage 2 of phase overcurrent
protection
Enable second harmonic blocking for stage 2 of
phase overcurrent protection
Option of characteristic curve for stage 2 of phase
overcurrent protection
Time multiplier setting for stage 2 of inverse-time
phase overcurrent protection.
Minimum operating time for stage 2 of inverse-time
phase overcurrent protection
Current setting for stage 3 of phase overcurrent
protection
Time delay for stage 3 of phase overcurrent
protection
Enable stage 3 of phase overcurrent protection
Enabling/Disabling auto-reclosing blocked when
stage 3 of phase overcurrent protection operates
Direction option for stage 3 of phase overcurrent
protection
PCS-902 Line Distance Relay
0, 1 or 2
0 or 1
0~13
0.010~200.000
0.000~20.000 (s)
0.010~5.000
0.000~200.000
0.050~20.000
(0.050~30.000)×In (A)
0.000~20.000 (s)
0 or 1
0 or 1
0, 1 or 2
0 or 1
0~12
0.010~200.000
0.000~20.000 (s)
(0.050~30.000)×In (A)
0.000~20.000 (s)
0 or 1
0 or 1
0, 1 or 2
7-17
Date: 2012-08-14
7 Settings
28
50/51P3.En_Hm2
29
50/51P3.Opt_Curve
30
50/51P3.TMS
31
50/51P3.tmin
32
50/51P4.I_Set
33
50/51P4.t_Op
34
50/51P4.En
35
50/51P4.En_BlkAR
36
50/51P4.Opt_Dir
37
50/51P4.En_Hm2
38
50/51P4.Opt_Curve
39
50/51P4.TMS
40
50/51P4.tmin
Enable second harmonic blocking for stage 3 of
phase overcurrent protection
Option of characteristic curve for stage 3 of phase
overcurrent protection
Time multiplier setting for stage 3 of inverse-time
phase overcurrent protection.
Minimum operating time for stage 3 of inverse-time
phase overcurrent protection
Current setting for stage 4 of phase overcurrent
protection
Time delay for stage 4 of phase overcurrent
protection
Enable stage 4 of phase overcurrent protection
0 or 1
0~12
0.010~200.000
0.000~20.000 (s)
(0.050~30.000)×In (A)
0.000~20.000 (s)
0 or 1
Enabling/Disabling auto-reclosing blocked when
stage 4 of phase overcurrent protection operates
Direction option for stage 4 of phase overcurrent
protection
Enable second harmonic blocking for stage 4 of
phase overcurrent protection
Option of characteristic curve for stage 4 of phase
overcurrent protection
Time multiplier setting for stage 4 of inverse-time
phase overcurrent protection.
Minimum operating time for stage 4 of inverse-time
phase overcurrent protection
0 or 1
0, 1 or 2
0 or 1
0~12
0.010~200.000
0.010~20.000 (s)
7.4.1.17 Direction Earth Fault Protection Settings (50/51G)
No.
Item
Remark
Range
Setting of second harmonic component for blocking
1
50/51G.K_Hm2
2
50/51G1.3I0_Set
Current setting for stage 1 of earth fault protection
(0.050~30.000)×In (A)
3
50/51G1.t_Op
Time delay for stage 1 of earth fault protection
0.000~20.000 (s)
4
50/51G1.En
Enable stage 1 of earth fault protection
0 or 1
5
50/51G1.En_BlkAR
6
50/51G1.Opt_Dir
7
50/51G1.En_Hm2
8
50/51G1.En_Abnor_Blk
9
50/51G1.En_CTS_Blk
earth fault elements
Enabling/Disabling auto-reclosing blocked when
stage 1 of earth fault protection operates
Direction option for stage 1 of earth fault protection
Enable second harmonic blocking for stage 1 of
earth fault protection
Enable blocking for stage 1 of earth fault protection
under abnormal conditions
Enable blocking for stage 1 of earth fault protection
under CT failure conditions
7-18
0.000~1.000
0 or 1
0, 1 or 2
0 or 1
0 or 1
0 or 1
PCS-902 Line Distance Relay
Date: 2012-08-14
7 Settings
Option of characteristic curve for stage 1 of earth
10
50/51G1.Opt_Curve
11
50/51G1.TMS
12
50/51G1.tmin
13
50/51G1.Alpha
14
50/51G1.C
15
50/51G1.K
16
50/51G2.3I0_Set
Current setting for stage 2 of earth fault protection
(0.050~30.000)×In (A)
17
50/51G2.t_Op
Time delay for stage 2 of earth fault protection
0.000~20.000 (s)
18
50/51G2.En
Enable stage 2 of earth fault protection
0 or 1
19
50/51G2.En_BlkAR
20
50/51G2.Opt_Dir
21
50/51G2.En_Hm2
22
50/51G2.En_Abnor_Blk
23
50/51G2.En_CTS_Blk
24
50/51G2.Opt_Curve
25
50/51G2.TMS
26
50/51G2.tmin
27
50/51G3.3I0_Set
Current setting for stage 3 of earth fault protection
(0.050~30.000)×In (A)
28
50/51G3.t_Op
Time delay for stage 3 of earth fault protection
0.000~20.000 (s)
29
50/51G3.En
Enable stage 3 of earth fault protection
0, 1 or 2
30
50/51G3.En_BlkAR
31
50/51G3.Opt_Dir
32
50/51G3.En_Hm2
33
50/51G3.En_Abnor_Blk
34
50/51G3.En_CTS_Blk
fault protection
Time multiplier setting for stage 1 of inverse-time
earth fault protection
Minimum operating time for stage 1 of inverse-time
earth fault protection
Constant “α” for stage 1 of customized inverse-time
characteristic earth fault protection
Constant “C” for stage 1 of customized inverse-time
characteristic earth fault protection
Constant “K” for stage 1 of customized inverse-time
characteristic earth fault protection
Enabling/Disabling auto-reclosing blocked when
stage 2 of earth fault protection operates
Direction option for stage 2 of earth fault protection
Enable second harmonic blocking for stage 2 of
earth fault protection
Enable blocking for stage 2 of earth fault protection
under abnormal conditions
Enable blocking for stage 2 of earth faultv protection
under CT failure conditions
Option of characteristic curve for stage 2 of earth
fault protection
Time multiplier setting for stage 2 of inverse-time
earth fault protection
Minimum operating time for stage 2 of inverse-time
earth fault protection
Enabling/Disabling auto-reclosing blocked when
stage 3 of earth fault protection operates
Direction option for stage 3 of earth fault protection
Enable second harmonic blocking for stage 3 of
earth fault protection
Enable blocking for stage 3 of earth fault protection
under abnormal conditions
Enable blocking for stage 3 of earth fault protection
under CT failure conditions
PCS-902 Line Distance Relay
0~13
0.010~200.000
0.050~20.000 (t)
0.010~5.000
0.000~20.000
0.050~20.000
0 or 1
0, 1 or 2
0 or 1
0 or 1
0 or 1
0~12
0.010~200.000
0.050~20.000 (s)
0 or 1
0 or 1
0 or 1
0 or 1
0 or 1
7-19
Date: 2012-08-14
7 Settings
Option of characteristic curve for stage 3 of earth
35
50/51G3.Opt_Curve
36
50/51G3.TMS
37
50/51G3.tmin
38
50/51G4.3I0_Set
Current setting for stage 4 of earth fault protection
(0.050~30.000)×In (A)
39
50/51G4.t_Op
Time delay for stage 4 of earth fault protection
0.000~20.000 (s)
40
50/51G4.En
Enable stage 4 of earth fault protection
0, 1 or 2
41
50/51G4.En_BlkAR
42
50/51G4.Opt_Dir
43
50/51G4.En_Hm2
44
50/51G4.En_Abnor_Blk
45
50/51G4.En_CTS_Blk
46
50/51G4.Opt_Curve
47
50/51G4.TMS
48
50/51G4.tmin
fault protection
Time multiplier setting for stage 3 of inverse-time
earth fault protection
Minimum operating time for stage 3 of inverse-time
earth fault protection
Enabling/Disabling auto-reclosing blocked when
stage 4 of earth fault protection operates
Direction option for stage 4 of earth fault protection
Enable second harmonic blocking for stage 4 of
earth fault protection
Enable blocking for stage 4 of earth fault protection
under abnormal conditions
Enable blocking for stage 4 of earth fault protection
under CT failure conditions
Option of characteristic curve for stage 4 of earth
fault protection
Time multiplier setting for stage 4 of inverse-time
earth fault protection
Minimum operating time for stage 4 of inverse-time
earth fault protection
0~12
0.010~200.000
0.050~20.000 (s)
0 or 1
0 or 1
0 or 1
0 or 1
0 or 1
0~12
0.010~200.000
0.050~20.000 (s)
7.4.1.18 Overcurrent Protection Settings for VT Circuit Failure (51PVT/51GVT)
No.
Item
1
51GVT.3I0_Set
2
51GVT.t_Op
3
51GVT.En
4
51PVT.I_Set
5
51PVT.t_Op
6
51PVT.En
Remark
Range
Current setting of ground overcurrent protection
when VT circuit failure
Time delay of ground overcurrent protection when
VT circuit failure
Enable ground overcurrent protection when VT
circuit failure
Current setting of phase overcurrent protection
when VT circuit failure
Time delay of phase overcurrent protection when
VT circuit failure
Enable phase overcurrent protection when VT
circuit failure
(0.050~30.000)×In (A)
0.000~10.000 (s)
0 or 1
(0.050~30.000)×In (A)
0.000~10.000 (s)
0 or 1
7.4.1.19 Residual Current SOTF Protection Settings (50GSOTF)
No.
1
Item
50GSOTF.3I0_Set
Remark
Range
Current setting of residual current SOTF protection
7-20
(0.050~30.000)×In (A)
PCS-902 Line Distance Relay
Date: 2012-08-14
7 Settings
2
50GSOTF.En_3I0
Enable residual current SOTF protection
0 or 1
7.4.1.20 Overvoltage Protection Settings (59P)
No.
Item
Remark
Range
1
59P1.U_Set
Voltage setting for stage 1 of overvoltage protection
Un~2Unn (V)
2
59P1.t_Op
Time delay for stage 1 of overvoltage protection
0.000~30.000 (s)
3
59P1.En
Enable stage 1 of overvoltage protection
0 or 1
4
59P1.Opt_1P/3P
Option of 1-out-of-3 mode or 3-out-of-3 mode
0 or 1
5
59P1.Opt_Up/Upp
Option of phase-to-phase voltage or phase voltage
0 or 1
6
59P1.En_Alm
7
59P1.En_52b_TT
8
59P1.En_TT
9
59P1.Opt_Curve
10
59P1.Opt_TMS
11
59P1.tmin
12
59P2.U_Set
Voltage setting for stage 2 of overvoltage protection
Un~2Unn (V)
13
59P2.t_Op
Time delay for stage 2 of overvoltage protection
0.000~30.000 (s)
14
59P2.En
Enable stage 2 of overvoltage protection
0 or 1
15
59P2.Opt_1P/3P
Option of 1-out-of-3 mode or 3-out-of-3 mode
0 or 1
16
59P2.Opt_Up/Upp
Option of phase-to-phase voltage or phase voltage
0 or 1
17
59P2.En_Alm
18
59P2.En_52b_TT
19
59P2.En_TT
20
59P2.Opt_Curve
21
59P2.Opt_TMS
22
59P2.tmin
Enable stage 1 of overvoltage protection for alarm
purpose
Enable transfer trip controlled by CB open position for
stage 1 of overvoltage protection
Enable stage 1 of overvoltage protection operate to
initiate transfer trip
Option of characteristic curve for stage 1 of overvoltage
protection
Time multiplier setting for stage 1 of inverse-time
overvoltage protection
Minimum delay for stage 1 of inverse-time overvoltage
protection
Enable stage 2 of overvoltage protection for alarm
purpose
Enable transfer trip controlled by CB open position for
stage 2 of overvoltage protection
Enable stage 2 of overvoltage protection operate to
initiate transfer trip
Option of characteristic curve for stage 2 of overvoltage
protection
Time multiplier setting for stage 2 of inverse-time
overvoltage protection
Minimum delay for stage 2 of inverse-time overvoltage
protection
0 or 1
0 or 1
0 or 1
0~13
0.010~200.000
0.050~20.000 (s)
0 or 1
0 or 1
0 or 1
0~12
0.010~200.000
0.050~20.000 (s)
7.4.1.21 Undervoltage Protection Settings (27P)
No.
Item
Remark
Range
1
27P1.U_Set
Voltage setting for stage 1 of undervoltage protection
0~Unn (V)
2
27P1.t_Op
Time delay for stage 1 of undervoltage protection
0.000~30.000 (s)
PCS-902 Line Distance Relay
7-21
Date: 2012-08-14
7 Settings
3
27P1.En
Enable stage 1 of undervoltage protection
0 or 1
4
27P1.Opt_1P/3P
Option of 1-out-of-3 mode or 3-out-of-3 mode
0 or 1
5
27P1.Opt_Up/Upp
6
27P1.En_Alm
7
27P1.Opt_Curve
8
27P1.Opt_TMS
9
27P1.tmin
Option of voltage criterion adopting phase-to-phase
voltage or phase voltage
Enable stage 1 of undervoltage protection operate to
alarm
Option
of
characteristic
curve
for
stage
1
of
undervoltage protection
Time multiplier setting for stage 1 of inverse-time
undervoltage protection
Minimum delay for stage 1 of inverse-time undervoltage
protection
0 or 1
0 or 1
0~13
0.010~200.000
0.050~20.000 (s)
10
27P2.U_Set
Voltage setting for stage 2 of undervoltage protection
0~Unn (V)
11
27P2.t_Op
Time delay for stage 2 of undervoltage protection
0.000~30.000 (s)
12
27P2.En
Enable stage 2 of undervoltage protection
0 or 1
13
27P2.Opt_1P/3P
Option of 1-out-of-3 mode or 3-out-of-3 mode
0 or 1
14
27P2.Opt_Up/Upp
15
27P2.En_Alm
16
27P2.Opt_Curve
17
27P2.Opt_TMS
18
27P2.tmin
Option of voltage criterion adopting phase-to-phase
voltage or phase voltage
Enable stage 2 of undervoltage protection operate to
alarm
Option
of
characteristic
curve
for
stage
2
of
undervoltage protection
Time multiplier setting for stage 2 of inverse-time
undervoltage protection
Minimum delay for stage 2 of inverse-time undervoltage
protection
0 or 1
0 or 1
0~12
0.010~200.000
0.050~20.000 (s)
7.4.1.22 Frequency Protection Settings (81U and 81O)
No.
Item
1
81U.f_Pkp
2
81U.df/dt_Blk
3
81U.UF1.f_Set
4
81U.UF1.t_Op
5
81U.UF2.f_Set
6
81U.UF2.t_Op
7
81U.UF3.f_Set
8
81U.UF3.t_Op
9
81U.UF4.f_Set
Remark
Range
Frequency pickup setting for underfrequency protection 45.000~60.000 (Hz)
Rate of frequency change for blocking underfrequency
protection
Frequency setting for stage 1 of underfrequency
protection
Time delay for stage 1 of underfrequency protection
Frequency setting for stage 2 of underfrequency
protection
Time delay for stage 2 of underfrequency protection
Frequency setting for stage 3 of underfrequency
protection
Time delay for stage 3 of underfrequency protection
Frequency setting for stage 4 of underfrequency
protection
7-22
0.200~20.000 (Hz/s)
45.000~60.000 (Hz)
0.050~30.000 (s)
45.000~60.000 (Hz)
0.050~30.000 (s)
45.000~60.000 (Hz)
0.050~30.000 (s)
45.000~60.000 (Hz)
PCS-902 Line Distance Relay
Date: 2012-08-14
7 Settings
10
81U.UF4.t_Op
11
81U.UF1.En
Time delay for stage 4 of underfrequency protection
0.050~30.000 (s)
Enabling/disabling stage 1 of underfrequency protection
0 or 1
0: disable
1: enable
Enabling/disabling rate of frequency change to block
12
81U.UF1.En_df/dt_Blk
stage 1 of underfrequency protection
0: disable
0 or 1
1: enable
Enabling/disabling stage 2 of underfrequency protection
13
81U.UF2.En
0: disable
0 or 1
1: enable
Enabling/disabling rate of frequency change to block
14
81U.UF2.En_df/dt_Blk
stage 2 of underfrequency protection
0: disable
0 or 1
1: enable
Enabling/disabling stage 3 of underfrequency protection
15
81U.UF3.En
0 or 1
0: disable
1: enable
Enabling/disabling rate of frequency change to block
16
81U.UF3.En_df/dt_Blk
stage 3 of underfrequency protection
0: disable
0 or 1
1: enable
Enabling/disabling stage 4 of underfrequency protection
17
81U.UF4.En
0 or 1
0: disable
1: enable
Enabling/disabling rate of frequency change to block
18
81U.UF4.En_df/dt_Blk
stage 4 of underfrequency protection
0: disable
0 or 1
1: enable
19
81O.f_Pkp
20
81O.OF1.f_Set
21
81O.OF1.t_Op
22
81O.OF2.f_Set
23
81O.OF2.t_Op
24
81O.OF3.f_Set
25
81O.OF3.t_Op
26
81O.OF4.f_Set
27
81O.OF4.t_Op
Frequency pickup setting for overfrequency protection
Frequency setting for stage 1 of overfrequency
protection
Time delay for stage 1 of overfrequency protection
Frequency setting for stage 2 of overfrequency
protection
Time delay for stage 2 of overfrequency protection
Frequency setting for stage 3 of overfrequency
protection
Time delay for stage 3 of overfrequency protection
Frequency setting for stage 4 of overfrequency
protection
Time delay for stage 4 of overfrequency protection
PCS-902 Line Distance Relay
50.000~65.000 (Hz)
50.000~65.000 (Hz)
0.050~20.000 (s)
50.000~65.000 (Hz)
0.050~20.000 (s)
50.000~65.000 (Hz)
0.050~20.000 (s)
50.000~65.000 (Hz)
0.050~20.000 (s)
7-23
Date: 2012-08-14
7 Settings
Enabling/disabling stage 1 of overfrequency protection
28
81O.OF1.En
0 or 1
0: disable
1: enable
Enabling/disabling stage 2 of overfrequency protection
29
81O.OF2.En
0 or 1
0: disable
1: enable
Enabling/disabling stage 3 of overfrequency protection
30
81O.OF3.En
0: disable
0 or 1
1: enable
Enabling/disabling stage 4 of overfrequency protection
31
81O.OF4.En
0: disable
0 or 1
1: enable
7.4.1.23 Breaker Failure Protection Settings (50BF)
No.
Item
Remark
Range
(0.050~30.000 )×In (A)
1
50BF.I_Set
Current setting of phase current criterion for BFP
2
50BF.3I0_Set
Current setting of zero-sequence current criterion
(0.050~30.000 )×In (A)
for BFP
3
50BF.I2_Set
Current setting of negative-sequence current
(0.050~30.000 )×In (A)
criterion for BFP
4
50BF.t_ReTrp
Time delay of re-tripping for BFP
0.000~10.000 (s)
5
50BF.t1_Op
Time delay of stage 1 for BFP
0.000~10.000 (s)
6
50BF.t2_Op
Time delay of stage 2 for BFP
0.000~10.000 (s)
7
50BF.En
Enable breaker failure protection
0 or 1
8
50BF.En_ReTrp
Enable re-trip function for BFP
0 or 1
9
50BF.En_3I0_1P
Enable zero-sequence current criterion for BFP
0 or 1
initiated by single-phase tripping contact
10
50BF.En_3I0_3P
Enable zero-sequence current criterion for BFP
0 or 1
initiated by three-phase tripping contact
11
50BF.En_I2_3P
Enable negative-sequence current criterion for BFP
0 or 1
initiated by three-phase tripping contact
12
50BF.En_CB_Ctrl
Enable breaker failure protection can be initiated by
0 or 1
normally closed contact of circuit breaker
7.4.1.24 Thermal Overload Protection (49)
No.
Item
Remark
Range
1
49-1.K
The factor setting for stage 1 of thermal overload
protection which is associated to the thermal state 1.000~3.000
formula
2
49-2.K
The factor setting for stage 2 of thermal overload
protection which is associated to the thermal state 1.000~3.000
formula
3
49.Ib_Set
The reference current setting of the thermal
(0.050~30.000 )×In (A)
overload protection
4
49.Tau
The time constant setting of the IDMT overload
0.100~100.000 (min)
protection
7-24
PCS-902 Line Distance Relay
Date: 2012-08-14
7 Settings
5
49-1.En_Alm
Enable stage 1 of thermal overload protection for
0 or 1
alarm purpose
6
49-1.En_Trp
Enable stage 1 of thermal overload protection for
0 or 1
trip purpose
7
49-2.En_Alm
Enable stage 2 of thermal overload protection for
0 or 1
alarm purpose
8
49-2.En_Trp
Enable stage 2 of thermal overload protection for
0 or 1
trip purpose
7.4.1.25 Stub Overcurrent Protection (50STB)
No.
Name
Remark
Range
1
50STB.I_Set
Current setting of stub overcurrent protection
(0.050~30.000)×In (A)
2
50STB.t_Op
Time delay of stub overcurrent protection
0.000~10.000 (s)
3
50STB.En
Enable stub overcurrent protection
0 or 1
7.4.1.26 Dead Zone Protection (50DZ)
No.
Name
Remark
Range
1
50DZ.I_Set
Current setting of dead zone protection
(0.050~30.000)×In (A)
2
50DZ.t_Op
Time delay of dead zone protection
0.000~10.000 (s)
3
50DZ.En
Enable dead zone protection
0 or 1
7.4.1.27 Pole Discrepancy Protection Settings (62PD)
No.
Item
Remark
Range
1
62PD.3I0_Set
Current setting of residual current criterion for pole
(0.050~30.000 )×In (A)
discrepancy protection
2
62PD.I2_Set
Current setting of negative-sequence
criterion for pole discrepancy protection
3
62PD.t_Op
Time delay of pole discrepancy protection
0.000~600.000 (s)
4
62PD.En
Enable pole discrepancy protection
0 or 1
5
62PD.En_3I0/I2_Ctrl
Enable
residual
current
criterion
negative-sequence current criterion for
discrepancy protection
current
(0.050~30.000 )×In (A)
and
pole 0 or 1
7.4.1.28 Broken Conductor Protection (46BC)
No.
Item
Remark
Range
1
46BC.k_Set
Ratio setting (negative-sequence current to
positive-sequence current) of broken conductor
protection
0.20~1.00
2
46BC.t_Op
Time delay of broken conductor protection
0.000~600.000 (s)
3
46BC.En
Enabe broken conductor protection
0 or 1
7.4.1.29 Synchrocheck Settings (25)
No.
Item
Remark
Range
1
25.Opt_Source_UL
Voltage selecting mode of line
0~5
2
25.Opt_Source_UB
Voltage selecting mode of bus
0~5
PCS-902 Line Distance Relay
7-25
Date: 2012-08-14
7 Settings
3
25.U_Dd
Voltage threshold of dead check
0.05Un~0.8Un (V)
4
25.U_Lv
Voltage threshold of live check
0.5Un~Un (V)
5
25.K_Usyn
Compensation coefficient for synchronism voltage
0.20-5.00
6
25.phi_Diff
Phase difference limit of synchronism check for AR
0~ 89 (Deg)
7
25.phi_Comp
8
25.f_Diff
Frequency difference limit of synchronism check for AR 0.02~1.00 (Hz)
9
25.U_Diff
Voltage difference limit of synchronism check for AR
0.02Un~0.8Un (V)
10
25.t_DeadChk
Time delay to confirm dead check condition
0.010~25.000 (s)
11
25.t_SynChk
Time delay to confirm synchronism check condition
0.010~25.000 (s)
12
25.En_fDiffChk
Enable frequency difference check
0 or 1
13
25.En_SynChk
Enable synchronism check
0 or 1
14
25.En_DdL_DdB
Enable dead line and dead bus (DLDB) check
0 or 1
15
25.En_DdL_LvB
Enable dead line and live bus (DLLB) check
0 or 1
16
25.En_LvL_DdB
Enable live line and dead bus (LLDB) check
0 or 1
17
25.En_NoChk
Enable AR without any check
0 or 1
Compensation for phase difference between two
synchronous voltages
0~359 (Deg)
7.4.1.30 Auto-reclosing Settings (79)
No.
Item
Remark
Range
1
79.N_Rcls
Maximum number of reclosing attempts
1~4
2
79.t_Dd_1PS1
Dead time of first shot 1-pole reclosing
0.000~600.000 (s)
3
79.t_Dd_3PS1
Dead time of first shot 3-pole reclosing
0.000~600.000 (s)
4
79.t_Dd_3PS2
Dead time of second shot 3-pole reclosing
0.000~600.000 (s)
5
79.t_Dd_3PS3
Dead time of third shot 3-pole reclosing
0.000~600.000 (s)
6
79.t_Dd_3PS4
Dead time of fourth shot 3-pole reclosing
0.000~600.000 (s)
7
79.t_CBClsd
Time delay of circuit breaker in closed position before
reclosing
0.000~600.000 (s)
Time delay to wait for CB healthy, and begin to timing
8
79.t_CBReady
when the input signal [79.CB_Healthy] is de-energized
and if it is not energized within this time delay, AR will
0.000~600.000 (s)
be blocked.
9
79.t_WaitChk
Maximum wait time for synchronism check
0.000~600.000 (s)
Time delay allow for CB status change to conform
10
79.t_Fail
11
79.t_DDO_AR
Pulse width of AR closing signal
0.000~600.000 (s)
12
79.t_Reclaim
Reclaim time of AR
0.000~600.000 (s)
13
79.t_PersistTrp
reclosing successful
Time
delay
of
excessive
trip
auto-reclosing
7-26
signal
to
block
0.000~600.000 (s)
0.000~600.000 (s)
PCS-902 Line Distance Relay
Date: 2012-08-14
7 Settings
Drop-off time delay of blocking AR, when blocking
14
79.t_DDO_BlkAR
signal for AR disappears, AR blocking condition drops 0.000~600.000 (s)
off after this time delay
15
79.t_AddDly
16
79.t_WaitMaster
Additional time delay for auto-reclosing
Maximum wait time for reclosing permissive signal from
master AR
0.000~600.000 (s)
0.000~600.000 (s)
Time delay of discriminating another fault, and begin to
17
79.t_SecFault
times after 1-pole AR initiated, 3-pole AR will be
initiated if another fault happens during this time delay.
0.000~600.000 (s)
AR will be blocked if another fault happens after that.
Enable auto-reclosing blocked when a fault occurs
18
79.En_PDF_Blk
19
79.En_AddDly
20
79.En_CutPulse
21
79.En_FailCheck
22
79.En
23
79.En_ExtCtrl
24
79.En_CBInit
Enable AR be initiated by open state of circuit breaker
0 or 1
25
79.Opt_Priority
Option of AR priority
0, 1 or 2
26
79.SetOpt
Control option of AR mode
0 or 1
27
79.En_1PAR
Enable 1-pole AR mode
0 or 1
28
79.En_3PAR
Enable 3-pole AR mode
0 or 1
29
79.En_1P/3PAR
Enable 1/3-pole AR mode
0 or 1
under pole disagreement condition
Enable auto-reclosing with an additional dead time
delay
Enable adjust the length of reclosing pulse
Enable confirm whether AR is successful by checking
CB state
Enable auto-reclosing
0 or 1
0 or 1
0 or 1
0 or 1
0 or 1
Enable AR by external input signal besides logic setting
[79.En]
0 or 1
7.4.1.31 Transfer Trip Settings (TT)
No.
Item
Remark
Range
1
TT.t_Op
Time delay of transfer trip
0.000~600.000 (s)
2
TT.En_FD_Ctrl
Enable transfer trip controlled by local fault detector
0 or 1
7.4.1.32 Tripping Logic Settings
No.
Item
1
En_MPF_Blk_AR
2
En_3PF_Blk_AR
3
En_PhSF_Blk_AR
4
En_3PTrp
Remark
Enable auto-reclosing blocked when multi-phase fault
happens
Enable auto-reclosing blocked when three-phase fault
happens
Enable auto-reclosing blocked when selection of faulty
phase fails
Range
0 or 1
0 or 1
0 or 1
Enable phase A,phase B and phase C breaker tripping 0 or 1
PCS-902 Line Distance Relay
7-27
Date: 2012-08-14
7 Settings
5
t_Dwell_Trp
The dwell time of tripping command, empirical value is
0.04
0.000~1000.000 (s)
7.4.1.33 VTS Settings (VTS)
No.
1
Item
VTS.En_Out_VT
Remark
Range
VT is not connected to the protection device
0 or 1
If three-phase voltage used for protection measurement
2
VTS.En_Line_VT
comes from line side (for example, 3/2 breaker), it
should be set as “1”. If three-phase voltage comes from
0 or 1
busbar side, it should be set as “0”.
3
VTS.En
Enable alarm function of VT circuit supervision
0 or 1
7.4.2 Access Path
MainMenuSettingsProt Settings
7.5 Logic Link Settings
The logic link settings (in the submenu “Logic Links”) are used to determine whether the relevant
function of this device is enabled or disabled. If this device supports the logic link function, it will
have a corresponding submenu in the submenu “Logic Links” for the logic link settings.
Each logic link settings is an “AND” condition of enabling the relevant function with the
corresponding binary input and logic setting. Through SAS or RTU, logic link settings can be set
as “1” or “0”; and it means that the relevant function can be in service or out of service through
remote command. It provides convenience for operation management.
7.5.1 GOOSE Link Settings
The GOOSE link settings (in the submenu “GOOSE Links”) are used to determine whether the
relevant GOOSE elements are enabled or disabled. See the GOOSE related instruction manual
for the more information and details.
7.5.2 Spare Link Settings
The spare link settings (in the submenu “Spare Links”) are used for future application. It can be
defined as one of above three link settings through the PCS-Explorer configuration tool.
No.
Item
Remark
Range
1
Link_01
Spare link setting 01
0 or 1
2
Link_02
Spare link setting 01
0 or 1
3
Link_01
Spare link setting 01
0 or 1
4
Link_02
Spare link setting 01
0 or 1
5
Link_01
Spare link setting 01
0 or 1
6
Link_02
Spare link setting 01
0 or 1
7
Link_01
Spare link setting 01
0 or 1
8
Link_02
Spare link setting 01
0 or 1
7-28
PCS-902 Line Distance Relay
Date: 2012-08-14
7 Settings
7.5.3 Access Path
MainMenuSettingsLogic Links
7.6 Measurement and Control Settings
7.6.1 Synchronism Settings
Parameters in the “Syn_Settings” menu are listed in the following table.
No.
Item
Remark
Range
1
MCBrd.25.Opt_Source_UL
Voltage selecting mode of line
0~5
2
MCBrd.25.Opt_Source_UB
Voltage selecting mode of bus
0~5
3
MCBrd.25.U_Dd
Voltage threshold of dead check
0.05Un~0.8Un (V)
4
MCBrd.25.U_Lv
Voltage threshold of live check
0.5Un~Un (V)
5
MCBrd.25.K_Usyn
Compensation coefficient for synchronism voltage
0.20-5.00
6
MCBrd.25.phi_Diff
Phase difference limit of synchronism check for AR
0~ 89 (Deg)
7
MCBrd.25.phi_Comp
8
MCBrd.25.f_Diff
9
MCBrd.25.U_Diff
Voltage difference limit of synchronism check for AR 0.02Un~0.8Un (V)
10
MCBrd.25.En_SynChk
Enable synchronism check
0 or 1
11
MCBrd.25.En_DdL_DdB
Enable dead line and dead bus (DLDB) check
0 or 1
12
MCBrd.25.En_DdL_LvB
Enable dead line and live bus (DLLB) check
0 or 1
13
MCBrd.25.En_LvL_DdB
Enable live line and dead bus (LLDB) check
0 or 1
14
MCBrd.25.En_NoChk
Enable AR without any check
0 or 1
15
MCBrd.25.df/dt
16
MCBrd.25.t_Close_CB
Compensation for phase difference between two
synchronous voltages
Frequency difference limit of synchronism check for
AR
Threshold of rate of frequency change between both
sides of CB for synchronism-check.
0~359 (Deg)
0.02~1.00 (Hz)
0.00~3.00 (Hz/s)
Circuit breaker closing time. It is the time from
receiving closing command pulse till the CB is 20~1000 (ms)
completely closed.
From receiving a closing command, this device will
continuously check whether between incoming
voltage
17
MCBrd.25.t_Wait_Chk
and
reference
voltage
involved
in
synchronism check (or dead check) can meet the
criteria. If the synchronism check (or dead check)
5~30 (s)
criteria are not met within the duration of this time
delay, the failure of synchronism-check (or dead
check) will be confirmed.
7.6.2 Dual Position Binary Input Settings
Parameters in the “BI_Settings” menu are listed in the following table.
PCS-902 Line Distance Relay
7-29
Date: 2012-08-14
7 Settings
No.
Name
Remark
Range
These settings are applied to configure the
1
debouncing time. “DPU” is the abbreviation of
t_DPU_DPosxx
0~60000 (ms)
“Delay Pick Up”. (xx=01, 02….)
Thses settings are applied to configure the status change confirmation time for No.xx double point
binary inputs. Up to 10 virtual double point binary inputs are provided in this device.
If a double point binary input changes from normal status to invalid status, i.e.: double point error
occurs, [t_DPU_DPosxx] will be applied as the debouncing time for No.xx double point binary
input.
7.6.3 Control Settings
Parameters in the “Control_Settings” menu are listed in the following table.
No.
Name
Remark
Range
No.xx holding time of a normal open contact of remote
1
t_DDO_Opnxx
0~65535 (ms)
opening CB, disconnector or for signaling purpose.
(xx=01, 02….10)
No.xx closing time of a normal open contact of remote
2
t_DDO_Clsxx
0~65535 (ms)
closing CB, disconnector or for signaling purpose.
(xx=01, 02….10)
7.6.4 Interlock Settings
Parameters in the “Interlock_Settings” menu are listed in the following table.
No.
Name
Remark
Range
The items in this submenu are applied together with
[Sig_En_CtrlOpnxx]
in
the
submenu
“Inputs”→“Interlock_Status”.
1: No.xx open output of the BO module is controlled by the
interlocking logic. If the interlocking conditions are met (i.e.:
1
En_Opnxx_Blk
[Sig_En_CtrlOpnxx]=1), opening output xx has output,
otherwise (i.e.: [Sig_En_CtrlOpnxx]=0) opening output xx
0 or 1
has no output.
0: No.xx open output of the BO module is not controlled by
the interlocking logic. Whether the interlocking conditions
are met or not, opening output xx has output.
(xx=01, 02….10)
The items in this submenu are applied together with
[Sig_En_CtrlClsxx]
2
En_Clsxx_Blk
in
the
submenu
“Inputs”→“Interlock_Status”.
0 or 1
1: No.xx closing output of the BO module is controlled by
the interlocking logic. If the interlocking conditions are met
7-30
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Date: 2012-08-14
7 Settings
No.
Name
Remark
Range
(i.e.: [Sig_En_CtrlClsxx]=1), closing output xx has output,
otherwise (i.e.: [Sig_En_CtrlClsxx]=0) closing output xx has
no output.
0: No.xx closing output of the BO module is not controlled
by the interlocking logic. Whether the interlocking conditions
are met or not, closing output xx has output.
(xx=01, 02….10)
PCS-902 Line Distance Relay
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7 Settings
7-32
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8 Human Machine Interface
8 Human Machine Interface
Table of Contents
8 Human Machine Interface ............................................................... 8-a
8.1 Overview .......................................................................................................... 8-1
8.1.1 Keypad Operation .............................................................................................................. 8-2
8.1.2 LED Indications .................................................................................................................. 8-3
8.1.3 Front Communication Port ................................................................................................. 8-3
8.1.4 Ethernet Port Setup ........................................................................................................... 8-4
8.2 Menu Tree ........................................................................................................ 8-5
8.2.1 Overview ............................................................................................................................ 8-5
8.2.2 Main Menus ....................................................................................................................... 8-6
8.2.3 Sub Menus ......................................................................................................................... 8-7
8.3 LCD Display ................................................................................................... 8-20
8.3.1 Overview .......................................................................................................................... 8-20
8.3.2 Normal Display................................................................................................................. 8-20
8.3.3 Display Disturbance Records ........................................................................................... 8-21
8.3.4 Display Supervision Event ............................................................................................... 8-23
8.3.5 Display IO Events ............................................................................................................ 8-23
8.3.6 Display Device Logs ........................................................................................................ 8-24
8.4 Keypad Operation ......................................................................................... 8-25
8.4.1 View Device Measurements ............................................................................................. 8-25
8.4.2 View Device Status .......................................................................................................... 8-25
8.4.3 View Device Records ....................................................................................................... 8-26
8.4.4 Print Device Report .......................................................................................................... 8-26
8.4.5 View Device Setting ......................................................................................................... 8-27
8.4.6 Modify Device Setting ...................................................................................................... 8-28
8.4.7 Copy Device Setting ........................................................................................................ 8-30
PCS-902 Line Distance Relay
8-a
Date: 2012-03-08
8 Human Machine Interface
8.4.8 Switch Setting Group ....................................................................................................... 8-31
8.4.9 Delete Device Records .................................................................................................... 8-32
8.4.10 Remote Control .............................................................................................................. 8-32
8.4.11 Modify Device Clock ....................................................................................................... 8-36
8.4.12 View Module Information................................................................................................ 8-36
8.4.13 Check Software Version ................................................................................................. 8-37
8.4.14 Communication Test....................................................................................................... 8-37
8.4.15 Select Language ............................................................................................................ 8-38
List of Figures
Figure 8.1-1 Front panel ............................................................................................................8-1
Figure 8.1-2 Keypad buttons ....................................................................................................8-2
Figure 8.1-3 LED indications ....................................................................................................8-3
Figure 8.1-4 Corresponding cable of the RJ45 port in the front panel ..................................8-4
Figure 8.1-5 Rear view and terminal definition of NR1102C...................................................8-5
Figure 8.2-1 Menu tree ..............................................................................................................8-7
List of Tables
Table 8.1-1 Definition of the 8-core cable ................................................................................8-4
Table 8.3-1 Tripping report messages....................................................................................8-23
Table 8.3-2 User operating event list......................................................................................8-25
8-b
PCS-902 Line Distance Relay
Date: 2012-03-08
8 Human Machine Interface
The operator can access the protective device from the front panel. Local communication with the
protective device is possible using a computer via a multiplex RJ45 port on the front panel.
Furthermore, remote communication is also possible using a PC with the substation automation
system via rear RS485 port or rear Ethernet port. The operator is able to check the protective
device status at any time.
This chapter describes human machine interface (HMI), and give operator a instruction about how
to display or print event report, setting and so on through HMI menu tree and display metering
value, including r.m.s. current, voltage and frequency etc. through LCD. Procedures to change
active setting group or a settable parameter value through keypad is also described in details.
Note!
About three measurements in menu “Measurements”, please refer to the following
description:
“Measurement1” is use to display measured values from protection calculation DSP
(displayed in secondary value)
“Measurement2” is used to display measured values from fault detector DSP (displayed
in secondary value)
“Measurement3” is used to display measured primary values and other calculated
quantities
8.1 Overview
The human-machine interface consists of a human-machine interface (HMI) module which allows
a communication to be as simple as possible for the user. The HMI module helps to draw your
attention to something that has occurred which may activate a LED or a report displayed on the
LCD. Operator can locate the data of interest by navigating the keypad.
HEALTHY
11
PCS-902
5
12
ALARM
4
14
5
15
6
16
7
17
8
18
9
19
10
20
GRP
13
3
ESC
1
2
ENT
1
4
3
2
Figure 8.1-1 Front panel
The function of HMI module:
PCS-902 Line Distance Relay
8-1
Date: 2012-03-08
8 Human Machine Interface
No.
Item
Description
A 320×240 dot matrix backlight LCD display is visible in dim lighting
1
LCD
conditions. The corresponding messages are displayed when there is
operation implemented.
20 status indication LEDs, 2 LEDs are fixed as the signals of “HEALTHY”
2
LED
(green) and “ALARM” (yellow), 18 LEDs are configurable with selectable
color among green, yellow and red.
3
Keypad
Navigation keypad and command keys for full access to device
4
Communication port
a multiplex RJ45 port for local communication with a PC
5
Logo
Type and designation and manufacturer of device
GR
P
8.1.1 Keypad Operation
ENT
ESC
Figure 8.1-2 Keypad buttons
1.
2.
3.
“ESC”:

Cancel the operation

Quit the current menu
“ENT”:

Execute the operation

Confirm the interface
“GRP”

4.
5.
6.
Activate the switching interface of setting group
leftward and rightward direction keys (“◄” and “►”):

Move the cursor horizontally

Enter the next menu or return to the previous menu
upward and downward direction keys (“▲” and “▼”)

Move the cursor vertically

Select command menu within the same level of menu
plus and minus sign keys (“＋” and “－”)

Modify the value
8-2
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Date: 2012-03-08
8 Human Machine Interface

Modify and display the message number

Page up/down
8.1.2 LED Indications
HEALTHY
ALARM
Figure 8.1-3 LED indications
A brief explanation has been made as bellow.
LED
Display
Off
HEALTHY
Steady Green
Off
Description
When the equipment is out of service or any hardware error is defected during
self-check.
Lit when the equipment is in service and ready for operation.
When equipment in normal operating condition.
ALARM
Steady Yellow
Lit when VT circuit failure, CT circuit failure or other abnormal alarm is issued.
Note!
“HEALTHY” LED can only be turned on by energizing the device and no abnormality
detected.
“ALARM” LED is turned on when abnormalities of device occurs like above mentioned
and can be turned off after abnormalities are removed except alarm report [CTS.Alm]
which can only be reset only when the failure is removed and the device is rebooted or
re-energized.
Other LED indicators with no labels are configurable and user can configure them to be lit
by signals of operation element, alarm element and binary output contact according to
requirement through PCS-Explorer software, but as drawed in figure, 2 LEDs are fixed as
the signals of “HEALTHY” (green) and “ALARM” (yellow), 18 LEDs are configurable with
selectable color among green, yellow and red.
8.1.3 Front Communication Port
There is a multiplex RJ45 port on the front panel. This port can be used as an RS-232 serial port
PCS-902 Line Distance Relay
8-3
Date: 2012-03-08
8 Human Machine Interface
as well as a twisted-pair ethernet port. As shown in the following figure, a customized cable is
applied for debugging via this multiplex RJ45 port.
Figure 8.1-4 Corresponding cable of the RJ45 port in the front panel
In the above figure and the following table:
P1: To connect the multiplex RJ45 port. An 8-core cable is applied here.
P2: To connect the twisted-pair ethernet port of the computer.
P3: To connect the RS-232 serial port of the computer.
The definition of the 8-core cable in the above figure is introduced in the following table.
Table 8.1-1 Definition of the 8-core cable
Terminal
No.
Core color
Function
Device side
Computer side
(Left)
(Right)
1
Orange
TX+ of the ethernet port
P1-1
P2-1
2
Orange & white
TX- of the ethernet port
P1-2
P2-2
3
Green & white
RX+ of the ethernet port
P1-3
P2-3
4
Blue
TXD of the RS-232 serial port
P1-4
P3-2
5
Brown & white
RXD of the RS-232 serial port
P1-5
P3-3
6
Green
RX- for the ethernet port
P1-6
P2-6
7
Blue & white
The ground connection of the RS-232 port.
P1-7
P3-5
8.1.4 Ethernet Port Setup
MON plug-in module is equipped with two or four 100Base-TX Ethernet interface, take NR1102C
as an example, as shown in Figure 8.1-5. Its rear view and the definition of terminals.
The Ethernet port can be used to communication with PC via auxiliary software (PCS-Explorer)
after connecting the protection device with PC, so as to fulfill on-line function (please refer to the
instruction manual of PCS-Explorer). At first, the connection between the protection device and PC
must be established. Through setting the IP address and subnet mask of corresponding Ethernet
interface in the menu “Settings→Device Setup→Comm Settings”, it should be ensured that the
protection device and PC are in the same network segment. For example, setting the IP address
and subnet mask of network A. (using network A to connect with PC)
8-4
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Date: 2012-03-08
8 Human Machine Interface
PC: IP address is set as “198.87.96.102”, subnet mask is set as “255.255.255.0”
The IP address and subnet mask of protection device should be [IP_LAN1]= 198.87.96.XXX,
[Mask_LAN1]=255.255.255.0, [En_LAN1]=1. (XXX can be any value from 0 to 255 except 102)
If the logic setting [En_LAN1] is non-available, it means that network A is always enabled.
NR1102C
ETHERNET
Network A
Network B
SYN+
SYNSGND
GND
RTS
TXD
SGND
Figure 8.1-5 Rear view and terminal definition of NR1102C
Note!
If using other Ethernet port, for example, Ethernet B, the logic setting [En_LAN2] must be
set as “1”.
8.2 Menu Tree
8.2.1 Overview
Press “▲” of any running interface and enter the main menu. Select different submenu by “▲” and
“▼”. Enter the selected submenu by pressing “ENT” or “►”. Press “◄” and return to the previous
menu. Press “ESC” back to main menu directly. For sake of entering the command menu again, a
command menu will be recorded in the quick menu after its execution. Five latest command
menus can be recorded in the quick menu. When five command menus are recorded, the latest
command menu will cover the earliest one, adopting the “first in first out” principle. It is arranged
from top to bottom and in accordance with the execution order of command menus.
Press “▲” to enter the main menu with the interface as shown in the following diagram:
PCS-902 Line Distance Relay
8-5
Date: 2012-03-08
8 Human Machine Interface
MainMenu
Language
Clock
Quick Menu
For the first powered protective device, there is no record in quick menu. Press “▲” to enter the
main menu with the interface as shown in the following diagram:
Measurements
Status
Records
Settings
Print
Local Cmd
Information
Test
Clock
Language
The descriptions about menu is based on the maximized configuration, for a specific project, if
some function is not available, the corresponding submenu will hidden.
8.2.2 Main Menus
The menu of the PCS-902 is organized into main menu and submenus, much like a PC directory
structure. The menu of the PCS-902 is divided into 10 sections:
8-6
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Date: 2012-03-08
8 Human Machine Interface
Main Menu
Measurements
Status
Records
Settings
Print
Local Cmd
Information
Test
Clock
Language
Figure 8.2-1 Menu tree
Under the main interface, press “▲” to enter the main menu, and select submenu by pressing “▲”,
“▼” and “ENT”. The command menu adopts a tree shaped content structure. The above diagram
provides the integral structure and all main menus under menu tree of the protection device.
8.2.3 Sub Menus
8.2.3.1 Measurements
Main Menu
Measurements
Measurements1
Measurements2
Measurements3
This menu is used to display real-time measured values, including AC voltage, AC current, phase
angle and calculated quantities. These data can help users to acquaint the device′s status. This
menu comprises following submenus. Please refer to “section measurement” about the detailed
measured values.
No.
1
Item
Measurement1
Function description
Display measured values from protection calculation DSP (Displayed in
PCS-902 Line Distance Relay
8-7
Date: 2012-03-08
8 Human Machine Interface
secondary value)
2
Measurement2
3
Measurement3
Display measured values from fault detector DSP (Displayed in
secondary value)
Display measured primary values and other calculated quantities
8.2.3.2 Status
Main Menu
Status
Inputs
Contact Inputs
Interlock Inputs
GOOSE Inputs
Prot Ch Inputs
Outputs
Contact Outputs
GOOSE Outputs
Prot Ch Outputs
Superv State
Prot Superv
FD Superv
GOOSE Superv
SV Superv
This menu is used to display real time input signals, output signals and alarm signals of the device.
These data can help users to acquaint the device′s status. This menu comprises following
submenus. Please refer to “section signal list” about the detailed inputs, output and alarm signals.
No.
Item
Function description
1
Inputs
Display all input signal states
2
Outputs
Display all output signal states
3
Superv State
Display supervision alarm states
The submenu “Inputs” comprises the following command menus.
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Date: 2012-03-08
8 Human Machine Interface
No.
Item
Function description
1
Contact Inputs
Display states of binary inputs derived from opto-isolated channels
2
Interlock Inputs
Display states of interlock result of each remote control.
3
GOOSE Inputs
Display states of GOOSE binary inputs.
4
Prot Ch Inputs
Display states of binary inputs received from protection channel.
The submenu “Outputs” comprises the following command menus.
No.
Item
Function description
1
Contact Outputs
Display states of contact binary outputs
2
GOOSE Outputs
Display states of GOOSE binary outputs
3
Prot Ch Outputs
Display states of channel outputs
The submenu “Superv State” comprises the following command menus.
No.
Item
Function description
1
Prot Superv
Display states of self-supervision signals from protection calculation DSP
2
FD Superv
Display states of self-supervision signals from fault detector DSP
3
GOOSE Superv
Display states of GOOSE self-supervision signals
4
SV Superv
Display states of SV self-supervision signals
8.2.3.3 Records
Main Menu
Records
Disturb Records
Superv Events
IO Events
Device Logs
Control Logs
Clear Records
This menu is used to display all kinds of records, including the disturbance records, supervision
events, binary events and device logs, so that the operator can load to view and use as the
reference of analyzing accidents and repairing the device. All records are stored in non-volatile
memory, it can still record them even if it loses its power.
This menu comprises the following submenus.
No.
1
Item
Disturb Records
Function description
Display disturbance records of the device
PCS-902 Line Distance Relay
8-9
Date: 2012-03-08
8 Human Machine Interface
2
Superv Events
Display supervision events of the device
3
IO Events
Display binary events of the device
4
Device Logs
Display device logs of the device
5
Control Logs
Display control logs of the device
6
Clear Records
Clear all recods.
8.2.3.4 Settings
Main Menu
Settings
System Settings
Prot Settings
Mon/Ctrl Settings
Logic Links
Function Links
GOOSE Links
SV Links
Spare Links
Device Setup
Device Settings
Comm Settings
Label Settings
Copy Settings
This menu is used to check the device setup, system parameters, protection settings and logic
links settings, as well as modifying any of the above setting items. Moreover, it can also execute
the setting copy between different setting groups.
This menu comprises the following submenus.
No.
Item
Function description
1
System Settings
Check or modify the system parameters
2
Prot Settings
Check or modify the protection settings
3
Mon/Ctrl Settings
Check or modify the measurement and control settings
4
Logic Links
Check or modify the logic links settings, including function links, SV links,
GOOSE links and spare links
8-10
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Date: 2012-03-08
8 Human Machine Interface
5
Device Setup
Check or modify the device setup
6
Copy_Settings
Copy setting between different setting groups
The submenu “Prot Settings” includes the following command menus.
No.
Item
Function description
1
Line Settings
Check or modify line parameters
2
FD Settings
Check or modify fault detector element settings
3
Direction Settings
Check or modify direction control element settings
4
Pilot Scheme Settings
5
DPFC Dist Settings
Check or modify DPFC distance protection settings
6
Mho Dist Settings
Check or modify distance protection with mho characteristic settings
7
Quad Dist Settings
Check or modify distance protection with Quad characteristic settings
8
ROC Settings
Check or modify directional earth-fault protection settings
9
SOTF Settings
Check or modify SOTF distance and overcurrent protection settings
10
OC Settings
Check or modify phase overcurrent protection settings
11
VTF OC Settings
Check or modify overcurrent protection settings for VT circuit failure
12
BFP Settings
Check or modify breaker failure protection settings
13
OV Settings
Check or modify overvoltage protection settings
14
UV Settings
Check or modify undervoltage protection settings
15
OF Settings
Check or modify overfrequency protection settings
16
UF Settings
Check or modify underfrequency protection settings
17
ThOvld Settings
Check or modify thermal overload protection settings
18
PD Settings
Check or modify pole discrepancy protection settings
19
Stub Settings
Check or modify stub overcurrent protection settings
20
BrknCond Settings
Check or modify broken-conductor protection settings
21
VTS/CTS Settings
22
Trip Logic Settings
Check or modify trippling logic settings
23
AR/Syn Settings
Check or modify synchronism check and auto-reclosing settings
Check or modify pilot distance protection and pilot directional earth-fault
protection settings
Check or modify VT circuit supervision and CT circuit supervision
settings
The submenu “Mon/Ctrl Settings” includes the following command menus.
No.
Item
Function description
1
Syn Settings
Check or modify manual sysnchronism check settings
2
BI Settings
Check or modify binary input settings
3
Control Settings
Check or modify control settings
4
Interlock Settings
Check or modify interlock settings
PCS-902 Line Distance Relay
8-11
Date: 2012-03-08
8 Human Machine Interface
The submenu “Logic Links” comprises the following command menus.
No.
Item
Function description
1
Function Links
Check or modify function links settings
2
GOOSE Links
Check or modify GOOSE links settings
3
SV Links
Check or modify SV links settings
4
Spare Links
Check or modify spare links settings (used for programmable logic)
The submenu “Device Setup” comprises the following command menus.
No.
Item
Function description
1
Device Settings
Check or modify the device settings.
2
Comm Settings
Check or modify the communication settings.
3
Label Settings
Check or modify the label settings of each protection element.
8-12
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Date: 2012-03-08
8 Human Machine Interface
8.2.3.5 Print
Main Menu
Print
Device Info
Settings
System Settings
Prot Settings
Mon/Ctrl Settings
Logic Links
Function Links
GOOSE Links
SV Links
Spare Links
Device Setup
Device Settings
Comm Settings
Label Settings
All Settings
Latest Modified
Disturb Records
Superv Events
IO Events
Prot Ch Superv
Channel 1
Channel 2
Prot Ch Statistics
Channel 1
Channel 2
Device Status
Waveform
IEC103 Info
Cancel Print
PCS-902 Line Distance Relay
8-13
Date: 2012-03-08
8 Human Machine Interface
This menu is used to print device description, settings, all kinds of records, waveform, information
related with IEC60870-5-103 protocol, channel state and channel statistic.
This menu comprises the following submenus.
No.
1
Item
Function description
Print the description information of the device, including software
Device Info
version.
Print device setup, system parameters, protection settings and logic
2
links settings. It can print by different classifications as well as printing all
Settings
settings of the device. Besides, it can also print the latest modified
settings.
3
Disturb Records
Print the disturbance records
4
Superv Events
Print the supervision events
5
IO Events
Print the binary events
6
Prot Ch Superv
Print the self-check information of optical fibre channel, which is made of
some hexadecimal characters and used to developer analyze channel
state
7
Prot Ch Statistics
8
Device Status
9
Waveform
Print the statistic report of optical fibre channel, which is formed A.M.
9:00 every day
Print the current state of the device, including the sampled value of
voltage and current, the state of binary inputs, setting and so on
Print the recorded waveform
Print 103 Protocol information, including function type (FUN),
10
IEC103 Info
information serial number (INF), general classification service group
number, and channel number (ACC)
11
Cancel Print
Cancel the print command
The submenu “Settings” comprises the following submenus.
No.
Item
Function description
1
System Settings
Print the system parameters
2
Prot Settings
Print the protection settings
3
Mon/Ctrl Settings
Print the measurement and control settings
4
Logic Links
Print the logic links settings
5
Device Setup
Print the settings related to device setup
6
All Settings
7
Latest Modified
Print all settings including device setup, system parameters, protection
settings and logic links settings
Print the setting latest modified
The submenu “Prot Settings” comprises the following command menus.
8-14
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Date: 2012-03-08
8 Human Machine Interface
No.
Item
Function description
1
Line Settings
Print line parameters
2
FD Settings
Print fault detector element settings
3
Direction Settings
Print direction control element settings
4
Pilot Scheme Settings
5
DPFC DistP Settings
Print DPFC distance protection settings
6
Mho Settings
Print distance protection with mho characteristic settings
7
Quad Settings
Print distance protection with Quad characteristic settings
8
ROC Settings
Print directional earth-fault protection settings
9
SOTF Settings
Print SOTF distance and overcurrent protection settings
10
OC Settings
Print phase overcurrent protection settings
11
OCVT Settings
Print overcurrent protection settings for VT circuit failure
12
BFP Settings
Print breaker failure protection settings
13
OV Settings
Print overvoltage protection settings
14
UV Settings
Print undervoltage protection settings
15
OF Settings
Print overfrequency protection settings
16
UF Settings
Print underfrequency protection settings
17
Overload Settings
Print thermal overload protection settings
18
MiscProt Settings
Print miscellaneous protection settings
19
VTS/CTS Settings
Print VT circuit supervision and CT circuit supervision settings
20
Trip Logic Settings
Print trippling logic settings
21
AR/Syn Settings
Print synchronism check and auto-reclosing settings
22
STB Settings
Print stub overcurrent protection settings
Print pilot distance protection and pilot directional earth-fault protection
settings
The submenu “Mon/Ctrl Settings” includes the following command menus.
No.
Item
Function description
1
Syn Settings
Check or modify manual sysnchronism check settings
2
BI Settings
Check or modify binary input settings
3
Control Settings
Check or modify control settings
4
Interlock Settings
Check or modify interlock settings
The submenu “Logic Links” comprises the following command menus.
No.
Item
Function description
1
Function Links
Print function links settings
2
GOOSE Links
Print GOOSE links settings
3
SV Links
Print SV links settings
PCS-902 Line Distance Relay
8-15
Date: 2012-03-08
8 Human Machine Interface
4
Spare Links
Print spare links settings (used for programmable logic)
The submenu “Device Setup” comprises the following command menus.
No.
Item
Function description
1
Device Settings
Print the device settings.
2
Comm Settings
Print the communication settings.
3
Label Settings
Print the label settings of each protection element.
The submenu “Prot Ch Superv” comprises the following command menus.
No.
Item
1
Channel 1
2
Channel 2
Function description
Print the self-check information of optical fibre channel 1, which is made of some
hexadecimal characters and used to developer analyze channel state
Print the self-check information of optical fibre channel 2, which is made of some
hexadecimal characters and used to developer analyze channel state
The submenu “Prot Ch Statistics” includes the following command menus.
No.
Item
1
Channel 1
2
Channel 2
Function description
Print the statistic report of optical fibre channel 1, which is formed A.M. 9:00 every
day
Print the statistic report of optical fibre channel 2, which is formed A.M. 9:00 every
day
8.2.3.6 Local Cmd
Main Menu
Local Cmd
Reset Target
Trig Oscillograph
Download
Clear Counter
Clear AR Counter
Clear Energy Counter
Manual Control
This menu is used to reset the tripping relay with latch, indicator LED, LCD display, and as same
as the resetting function of binary inputs. This menu provides a method of manually recording the
current waveform data of the device under normal condition for printing and uploading SAS.
Besides, it can send out the request of program download, clear statistic information about
8-16
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8 Human Machine Interface
GOOSE, SV, AR, FO channel and energy.
This menu comprises the following submenus.
No.
Item
Function description
1
Reset Target
Reset the local signal, indicator LED, LCD display and so on
2
Trig Oscillograph
Trigger waveform recording
3
Download
Send out the request of downloading program
4
Clear Counter
Clear GOOSE, SV, AR and FO channel statistic data
5
Clear AR Counter
Clear AR statistic data
6
Clear Energy Counter
Clear all energy metering values (i.e., PHr+,PHr-,Qr+,QHr-)
7
Manual Control
Manually operating to trip, close output or for signaling purpose
8.2.3.7 Information
Main Menu
Information
Version Info
Board Info
In this menu, the LCD displays software information of all kinds of intelligent plug-in modules,
which consists of version, creating time of software, CRC codes and management sequence
number. Besides, plug-in module information can also be viewed.
This menu comprises the following command menus.
No.
Item
Function description
Display software information of DSP module, MON module and HMI module,
1
Version Info
which consists of version, creating time of software, CRC codes and
management sequence number.
2
Board Info
Monitor the current working state of each intelligent module.
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8.2.3.8 Test
Main Menu
Test
Prot Ch Counter
Ch1 Counter
Ch2 Counter
GOOSE Comm Counter
SV Comm Counter
AR Counter
Device Test
Prot Elements
All Test
Select Test
Superv Events
All Test
Select Test
IO Events
All Test
Select Test
This menu is mainly used for developers to debug the program and for engineers to maintain the
protection device. It can be used to fulfill the communication test function. It is also used to
generate all kinds of reports or events to transmit to the SAS without any external input, so as to
debug the communication on site. Besides, it can also display statistic information about GOOSE,
SV, AR and FO channel.
This menu comprises the following submenus.
No.
Item
Function description
1
Prot Ch Couter
Check communication statistics data of protection FO channel
2
GOOSE Couters
Check communication statistics data of GOOSE
3
SV Couters
Check communication statistics data of SV (Sampled Values)
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4
AR Couters
Check AR counters
Automatically generate all kinds of reports or events to transmit to SCADA,
5
Device Test
including disturbance records, self-supervision events and binary events. It can
realize the report uploading by different classification, as well as the uploading
of all kinds of reports
The submenu “Prot Ch Counter” comprises the following command menus.
No.
Item
Function description
1
Ch1 Counter
Check communication statistic information of channel 1
2
Ch2 Counter
Check communication statistic information of channel 2
The submenu “Device Test” comprises the following submenus.
No.
Item
1
Protection Elements
2
Superv Events
3
IO Events
Function description
View the relevant information about disturbance records (only used for
debugging persons)
View the relevant information about supervision events (only used for
debugging persons)
View the relevant information about binary events (only used for debugging
persons)
Users can respectively execut the test automatically or manually by selecting commands “All Test”
or “Select Test”.
The submenu “Prot Elements” comprises the following command menus.
No.
Item
Description
1
All Test
Ordinal test of all protection elements
2
Select Test
Selective test of corresponding classification
The submenu “Superv Events” comprises the following command menus.
No.
Item
Description
1
All Test
Ordinal test of all self-supervisions
2
Select Test
Selective test of corresponding classification
The submenu “IO Events” comprises the following command menus.
No.
Item
Description
1
All Test
Ordinal test of change of all binary inputs
2
Select Test
Selective test of corresponding classification
8.2.3.9 Clock
The current time of internal clock can be viewed here. The time is displayed in the form
YY-MM-DD and hh:mm:ss. All values are presented with digits and can be modified.
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8.2.3.10 Language
This menu is mainly used to set LCD display language.
8.3 LCD Display
8.3.1 Overview
There are five kinds of LCD display, SLD (single line diagram) display, tripping reports, alarm
reports, binary input changing reports and control reports. Tripping reports and alarm reports will
not disappear until these reports are acknowledged by pressing the “RESET” button in the
protection panel (i.e. energizing the binary input [BI_RstTarg]). User can press both “ENT” and
“ESC” at the same time to switch the display among trip reports, alarm reports and the SLD display.
IO events will be displayed for 5s and then it will return to the previous display interface
automatically. Device logs will not pop up and can only be viewed by navigating the corresponding
menu.
8.3.2 Normal Display
After the protection device is powered and entered into the initiating interface, it takes 30 seconds
to complete the initialization of protection device. During the initialization of protection device, the
“HEALTHY” indicator lamp of the protection device goes out.
The device can display single line diagram (SLD) and primary operation information, it can support
wiring configuration function. LCD configuration file can be downloaded via the network. Remote
control operating through single line diagram is also supported.
Under normal condition, the LCD will display the following interface. The LCD adopts white color
as its backlight that is activated if once there is any keyboard operation, and is extinguished
automatically after 60 seconds of no operation.
2010-06-08 10:10:00
Ia
0.00A
Ib
0.00A
Ic
0.00A
3I0
0.00A
Ua
0.02V
Ub
0.00V
Uc
0.00V
3U0
0.02V
U_Syn
0.00V
f
50.00Hz
Addr 24343
Group 01
The content displayed on the screen contains: the current date and time of the protection device
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(with a format of yyyy-mm-dd hh:mm:ss:), the active setting group number, the three-phase
current sampling value, the neutral current sampling value, the three-phase voltage sampling
value, the neutral voltage sampling value, the synchronism voltage sampling value, line frequency
and the address relevant to IP address of Ethernet A. If all the sampling values of the voltage and
the current can’t be fully displayed within one screen, they will be scrolling-displayed automatically
from the top to the bottom.
If IP address of Ethernet A is “xxx.xxx.a.b”, the displayed address equals to (a×256+b). For
example, If IP address of Ethernet A is “198.087.095.023”, the displayed address will be “95×
256+23=24343”.
If the device has detected any abnormal state, it′ll display the self-check alarm information.
8.3.3 Display Disturbance Records
This device can store 1024 disturbance records and 64 disturbance records with fault waveform.
When there is protection element operating, the LCD will automatically display the latest
disturbance record, and two kinds of LCD display interfaces will be available depending on
whether there are supervision events at present.
For the situation that the disturbance records and the supervision events coexist, the upper half
part is the disturbance record, and the lower half part is the supervision event. As to the upper half
part, it displays separately the record number of the disturbance record, fault name, generating
time of the disturbance record (with a format of yyyy-mm-dd hh:mm:ss), protection element and
tripping element. If there is protection element operation, faulty phase and relative operation time
with reference to fault detector element are displayed. At the same time, if displayed rows of
protection element and tripping element are more than 3, a scroll bar will appear at the right. The
height of the black part of the scroll bar basically indicates the total lines of protection element and
tripping element, and its position suggests the position of the currently displayed line of the total
lines. The scroll bar of protection element and tripping element will roll up at the speed of one line
per time. When it rolls to the last three lines, it will roll from the earliest protection element and
tripping element again. The displayed content of the lower half part is similar to that of the upper
half part.
If the device has no the supervision event, the display interface will only show the disturbance
record.
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1. Disturb Records NO.2
2008-11-28 07:10:00:200
0 ms
DPFC.Pkp
24 ms
A
21Q.Z1.Op
If the device has the supervision event, the display interface will show the disturbance record and
the supervision event at the same time.
1. Disturb Records NO.2
2008-11-28 07:10:00:200
0 ms
DPFC.Pkp
24 ms
A
21Q.Z1.Op
2. Superv Events NO.3
2008-11-28 07:09:00:200
Alm_52b
Disturb Records NO.2
shows the title and SOE number of the disturbance record.
2008-11-28 07:10:00:200
shows the time when fault detector picks up, the format is
year–month-date and hour:minute:second:millisecond.
0ms DPFC.Pkp
shows fault detector element and its operating time (set as 0ms
fixedly).
24ms A 21Q.Z1.Op
shows operation element and its relative operation time
All the protection elements have been listed in Chapter “Operation Theory”, and please refer to
each protection element for details. Operation reports of fault detector and the reports related to
oscillography function are showed in the following table.
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Table 8.3-1 Tripping report messages
No.
Message
Description
1
ManTrigDFR
Oscillography function is triggered manually.
2
RmtTrigDFR
Oscillography function is triggered remotely.
8.3.4 Display Supervision Event
This device can store 1024 pieces of supervision events. During the running of the device, the
supervision event of hardware self-check errors or system running abnormity will be displayed
immediately.
2. Superv Events NO.4
2008-12-29 9:18:47:500ms
Alm_52b
0
1
Superv_Events NO.4
shows the SOE number and title of the supervision event
2008-11-28 09:18:47:500
shows the real time of the report: year–month-date and
hour:minute:second:millisecond
Alm_52b
shows the content of abnormality alarm
0→1
8.3.5 Display IO Events
This device can store 1024 pieces of binary events. During the running of the device, the binary
input will be displayed once its state has changed, i.e. from “0” to “1” or from “1” to “0”.
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3. IO Events NO.4
2008-11-29 09:18:47:500ms
BI_RstTarg
0
1
IO Events NO.4
shows the number and title of the binary event
2008-11-28 09:18:47:50
shows date and time when the report occurred, the format is
year–month-date and hour:minute:second:millisecond
BI_RstTarg 0→1
shows the state change of binary input, including binary input
name, original state and final state
8.3.6 Display Device Logs
This device can store 1024 pieces of device logs. During the running of the device, the device log
will be displayed after any operation of it is conducted.
4. Device Logs NO.4
2008-11-28 10:18:47:569ms
Reboot
Device Logs NO. 4
shows the title and the number of the device log
2008-11-28 10:18:47:569
shows date and time when the report occurred, the format is
year–month-date and hour:minute:second:millisecond
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shows the manipulation content of the device log
Reboot
User operating information listed below may be displayed.
Table 8.3-2 User operating event list
No.
Message
Description
1
Reboot
The device has been reboot.
2
Settings_Chg
The device′s settings have been changed.
3
ActiveGrp_Chgd
Active setting group has been changed.
4
Report_Cleared
All reports have been deleted. (Device logs can not be deleted)
5
Waveform_Cleared
All waveforms have been deleted.
6
Process_Exit
A process has exited.
7
Counter_Cleared
Clear counter
8
Signal_Reset
Reset signal
It will be displayed on the LCD before the fault report and self-check report are confirmed. Only
pressing the restore button on the protection screen or pressing both “ENT” and “ESC” at the
same time can switch among the fault report, the self-check report and the normal running state of
protection device to display it. The binary input change report will be displayed for 5s and then it
will return to the previous display interface automatically.
8.4 Keypad Operation
8.4.1 View Device Measurements
The operation is as follows:
1.
Press the “▲” to enter the main menu;
2.
Press the “▲” or “▼” to move the cursor to the “Measurements” menu, and then press
the “ENT” or “►” to enter the menu;
3.
Press the “▲” or “▼” to move the cursor to any command menu, and then press the
“ENT” to enter the menu;
4.
Press the “▲” or “▼” to page up/down (if all information cannot be displayed in one
display screen, one screen can display 14 lines of information at most);
5.
Press the “◄” or “►” to select pervious or next command menu;
6.
Press the “ENT” or “ESC” to exit this menu (returning to the “Measurements” menu);
8.4.2 View Device Status
The operation is as follows:
1.
Press the key “▲” to enter the main menu.
2.
Press the key “▲” or “▼” to move the cursor to the “Status” menu, and then press the
“ENT” or “►” to enter the menu.
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3.
Press the key “▲” or “▼” to move the cursor to any command menu item, and then press
the key “ENT” to enter the submenu.
4.
Press the “▲” or “▼” to page up/down (if all information cannot be displayed in one
display screen, one screen can display 14 lines of information at most).
5.
Press the key “◄” or “►” to select pervious or next command menu.
6.
Press the key “ENT” or “ESC” to exit this menu (returning to the “Status” menu).
8.4.3 View Device Records
The operation is as follows:
1.
Press the “▲” to enter the main menu;
2.
Press the “▲” or “▼” to move the cursor to the “Records” menu, and then press the
“ENT” or “►” to enter the menu;
3.
Press the “▲” or “▼” to move the cursor to any command menu, and then press the
“ENT” to enter the menu;
4.
Press the “▲” or “▼” to page up/down;
5.
Press the “＋” or “－” to select pervious or next record;
6.
Press the “◄” or “►” to select pervious or next command menu;
7.
Press the “ENT” or “ESC” to exit this menu (returning to the “Records” menu);
8.4.4 Print Device Report
The operation is as follows:
1.
Press the “▲” to enter the main menu;
2.
Press the “▲” or “▼” to move the cursor to the “Print” menu, and then press the “ENT” or
“►” to enter the menu;
3.
Press the “▲” or “▼” to move the cursor to any command menu, and then press the
“ENT” to enter the menu;

Selecting the “Disturb Records”, and then press the “＋” or “－” to select pervious
or next record. After pressing the key “ENT”, the LCD will display “Start Printing... ”,
and then automatically exit this menu (returning to the menu “Print”). If the printer
doesn’t complete its current print task and re-start it for printing, and the LCD will
display “Printer Busy…”. Press the key “ESC” to exit this menu (returning to the
menu “Print”).

Selecting the command menu “Superv Events” or “IO Events”, and then press the
key “▲” or “▼” to move the cursor. Press the “＋” or “－” to select the starting and
ending numbers of printing message. After pressing the key “ENT”, the LCD will
display “Start Printing…”, and then automatically exit this menu (returning to the
menu “Print”). Press the key “ESC” to exit this menu (returning to the menu “Print”).
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4.
If selecting the command menu “Device Info”, “Device Status“ or “IEC103_Info”,
press the key “ENT”, the LCD will display “Start printing..”, and then automatically exit this
menu (returning to the menu “Print”).
5.
If selecting the “Settings”, press the key “ENT” or “►” to enter the next level of menu.
6.
After entering the submenu “Settings”, press the key “▲” or “▼” to move the cursor, and
then press the key “ENT” to print the corresponding default value. If selecting any item to
printing:
Press the key “＋” or “－” to select the setting group to be printed. After pressing the key
“ENT”, the LCD will display “Start Printing…”, and then automatically exit this menu
(returning to the menu “Settings”). Press the key “ESC” to exit this menu (returning to the
menu “Settings”).
7.
After entering the submenu “Waveforms”, press the “＋” or “－” to select the waveform
item to be printed and press ”ENT” to enter. If there is no any waveform data, the LCD will
display “No Waveform Data!” (Before executing the command menu “Waveforms”, it is
necessary to execute the command menu “Trig Oscillograph” in the menu “Local Cmd”,
otherwise the LCD will display “No Waveform Data!”). With waveform data existing:
Press the key “＋” or “－” to select pervious or next record. After pressing the key “ENT”, the LCD
will display “Start Printing…”, and then automatically exit this menu (returning to the menu
“Waveforms”). If the printer does not complete its current print task and re-start it for printing, and
the LCD will display “Printer Busy…”. Press the key “ESC” to exit this menu (returning to the menu
“Waveforms”).
8.4.5 View Device Setting
The operation is as follows:
1.
Press the “▲” to enter the main menu;
2.
Press the “▲” or “▼” to move the cursor to the “Settings” menu, and then press the
“ENT” or “►” to enter the menu;
3.
Press the “▲” or “▼” to move the cursor to any command menu, and then press the
“ENT” to enter the menu;
4.
Press the “▲” or “▼” to move the cursor;
5.
Press the “+” or “-” to page up/down;
6.
Press the “◄” or “►” to select pervious or next command menu;
7.
Press the “ESC” to exit this menu (returning to the menu “Settings”).
Note!
If the displayed information exceeds 14 lines, the scroll bar will appear on the right side of
the LCD to indicate the quantity of all displayed information of the command menu and the
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relative location of information where the current cursor points at.
8.4.6 Modify Device Setting
The operation is as follows:
1.
Press the “▲” to enter the main menu;
2.
Press the “▲” or “▼” to move the cursor to the “Settings” menu, and then press the
“ENT” or “►” to enter the menu;
3.
Press the “▲” or “▼” to move the cursor to any command menu, and then press the
“ENT” to enter the menu;
4.
Press the “▲” or “▼” to move the cursor;
5.
Press the “+” or “-” to page up/down;
6.
Press the “◄” or “►” to select pervious or next command menu;
7.
Press the “ESC” to exit this menu (returning to the menu “Settings” );
8.
If selecting the command menu “System Settings”, move the cursor to the setting item
to be modified, and then press the “ENT”;
Press the “＋” or “－” to modify the value (if the modified value is of multi-bit, press the “◄” or “►”
to move the cursor to the digit bit, and then press the “＋” or “－” to modify the value), press the
“ESC” to cancel the modification and return to the displayed interface of the command menu
“System Settings”. Press the “ENT” to automatically exit this menu (returning to the displayed
interface of the command menu “System Settings”).
Move the cursor to continue modifying other setting items. After all setting values are modified,
press the “◄”, “►” or “ESC”, and the LCD will display “Save or Not?”. Directly press the “ESC” or
press the “◄” or “►” to move the cursor. Select the “Cancle”, and then press the “ENT” to
automatically exit this menu (returning to the displayed interface of the command menu “System
Settings”).
Press the “◄” or “►” to move the cursor. Select “No” and press the “ENT”, all modified setting item
will restore to its original value, exit this menu (returning to the menu “Settings”).
Press the “◄” or “►” to move the cursor to select “Yes”, and then press the “ENT”, the LCD will
display password input interface.
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Please Input Password:
____
Input a 4-bit password (“＋”, “◄”, “▲” or “－”). If the password is incorrect, continue inputting it,
and then press the “ESC” to exit the password input interface and return to the displayed interface
of the command menu “System Settings”. If the password is correct, LCD will display “Save
Setting Now…”, and then exit this menu (returning to the displayed interface of the command
menu “System Settings”), with all modified setting items as modified values.
Note!
For different setting items, their displayed interfaces are different but their modification
methods are the same. The following is ditto.
9.
If selecting the submenu “Prot Settings”, and press “ENT” to enter. After selecting
different command menu, the LCD will display the following interface: (take “FD
Settings” as an example)
Line Settings
Please Select Group for Config
Active Group:
01
Selected Group:
02
Press the “＋” or “－” to modify the value, and then press the “ENT” to enter it. Move the cursor to
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the setting item to be modified, press the “ENT” to enter.
Take the setting [FD.DPFC.I_Set] as an example is selected to modify, then press the “ENT” to
enter and the LCD will display the following interface. is shown the “＋” or “－” to modify the value
and then press the “ENT” to confirm.
FD.DPFC.I_Set
Current Value
0.200
Modified Value
0.202
Min Value
0.050
Max Value
30.000
Note!
After modifying protection settings in current active setting group or system parameters of
the device, the “HEALTHY” indicator lamp of the device will go out, and the device will
automatically restart and re-check them. If the check doesn’t pass, the device will be
blocked.
8.4.7 Copy Device Setting
The operation is as follows:
1.
Press the “▲” to enter the main menu;
2.
Press the “▲” or “▼” to move the cursor to the “Settings” menu, and then press the
“ENT” or “►” to enter the menu;
3.
Press the “▲” or “▼” to move the cursor to the command menu “Copy Settings”, and
then press the “ENT” to enter the menu.
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Copy Settings
Active Group:
01
Copy To Group:
02
Press the “＋” or “－” to modify the value. Press the “ESC”, and return to the menu “Settings”.
Press the “ENT”, the LCD will display the interface for password input, if the password is incorrect,
continue inputting it, press the “ESC” to exit the password input interface and return to the menu
“Settings”. If the password is correct, the LCD will display “copy setting OK!”, and exit this menu
(returning to the menu “Settings”).
8.4.8 Switch Setting Group
The operation is as follows:
1.
Exit the main menu;
2.
Press the “GRP”
Change Active Group
Active Group:
01
Change To Group:
02
Press the “＋” or “－” to modify the value, and then press the “ESC” to exit this menu (returning to
the main menu). After pressing the “ENT”, the LCD will display the password input interface. If the
password is incorrect, continue inputting it, and then press the “ESC” to exit the password input
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interface and return to its original state. If the password is correct, the “HEALTHY” indicator lamp
of the protection device will go out, and the protection device will re-check the protection setting. If
the check doesn’t pass, the protection device will be blocked. If the check is successful, the LCD
will return to its original state.
8.4.9 Delete Device Records
The operation is as follows:
1.
Exit the main menu;
2.
Press the “＋”, “－”, “＋”, “－” and “ENT”; Press the “ESC” to exit this menu (returning to
the original state). Press the “ENT” to carry out the deletion.
Press <ENT> To Clear
Press <ESC> To Exit
Note!
The operation of deleting device message will delete all messages saved by the protection
device, including disturbance records, supervision events, binary events, but not including
device logs. Furthermore, the message is irrecoverable after deletion, so the application of
the function shall be cautious.
8.4.10 Remote Control
Control operation method is introduced as below:
1.
Press the key “▲” to enter the main menu.
2.
Press the key “▲” or “▼” to move the cursor to the command menu “Local Cmd”, and
then press the key “ENT” to enter submenus. Press the key “▲” or “▼” to move the
cursor to the command menu “Control”, and then press the key “ENT” to enter and the
following display will be shown on LCD.
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Please Input Password:
___
Input a 3-bit password (“111”). If the password is incorrect, continue inputting it, and then press the
“ESC” to exit the password input interface and return to the displayed interface of the command
menu “Control”. If the password is correct, it will go to the following step.
3.
Press the key “▲” or “▼” to move the cursor to the control object and press the key
“ENT” to select control object.
Control
Step1: select Control Object
CSWI01
CSWI02
CSWI03
CSWI04
CSWI05
CSWI06
CSWI07
4.
Press the key “◄” or “►” to select control command press the key “ENT” to the next step.
Three control commands are optional:
1) Open (Step down): Remote open
2) Close (Step up): Remote close
3) Stop: Reserved
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CSWI01
Step2: select Control Command
Open(Lower)
NoCheck
Close(Raise)
(Stop)
SynchroCheck
InterLockChk
DeadCheck
InterLockNotChk
Execute
Select
Cancle
Result
5.
Press the key “◄” or “►” to select synchronism check mode and press the key “ENT” to
the next step.
Three synchronism check modes are optional:
1) NoCheck: Without any check
2) SynchroCheck: Synchronism-check mode
3) DeadCheck: Dead check mode
CSWI01
Step3: select Execution Condition
Open(Lower)
NoCheck
Close(Raise)
SynchroCheck
InterLockChk
Select
(Stop)
DeadCheck
InterLockNotChk
Execute
Cancle
Result
6.
Press the key “◄” or “►” to select interlock mode and press the key “ENT” to next step.
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CSWI01
Step4: select Interlock Condition
Open(Lower)
Close(Raise)
NoCheck
SynchroCheck
InterLockChk
(Stop)
DeadCheck
InterLockNotChk
Select
Execute
Cancle
Result
Two synchronism check modes are optional:
1) InterLockChk: Check interlocking criteria
2) InterLockNotChk: Not check interlocking criteria
7.
Press the key “◄” or “►” to select control type and press the key “ENT”.
As shown in the following figure, operation results will be shown after “Result” at the bottom of the
LCD.
CSWI01
Step5: select Control Type
Open(Lower)
NoCheck
Close(Raise)
SynchroCheck
InterLockChk
Select
(Stop)
DeadCheck
InterLockNotChk
Execute
Cancle
Result
Three synchronism control types are optional:
1) Select: Select control object
2) Execute: Execute control operation
3) Cancle: Cancle control operation
PCS-902 Line Distance Relay
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Date: 2012-03-08
8 Human Machine Interface
Note!
“Exectue” operation must be operated after “Select” operation.
8.4.11 Modify Device Clock
The operation is as follows:
1.
Press the “▲” to enter the main menu;
2.
Press the “▲” or “▼” to move the cursor to the “Clock” menu, and then press the “ENT”
to enter clock display
3.
Press the “▲” or “▼” to move the cursor to the date or time to be modified;
4.
Press the “+” or “-” to modify value, and then press the “ENT” to save the modification
and return to the main menu;
5.
Press the “ESC” to cancel the modification and return to the main menu.
Clock
Year
2008
Month
11
Day
28
Hour
20
Minute
59
Second
14
8.4.12 View Module Information
The operation is as follows:
1.
Press the “▲” to enter the main menu;
2.
Press the “▲” or “▼” to move the cursor to the “Information” menu, and then press the
“ENT” or “►” to enter the menu;
3.
Press the “▲” or “▼” to move the cursor to the command menu “Board Info”, and then
press the “ENT” to enter the menu;
4.
Press the “▲” or “▼” to move the scroll bar;
5.
Press the “ENT” or “ESC” to exit this menu (returning to the “Information” menu).
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PCS-902 Line Distance Relay
Date: 2012-03-08
8 Human Machine Interface
8.4.13 Check Software Version
The operation is as follows:
1.
Press the “▲” to enter the main menu.
2.
Press the “▲” or “▼” to move the cursor to the “Information” menu, and then press the
“ENT” to enter the submenu.
3.
Press the key “▲” or “▼” to move the cursor to the command menu “Version Info”, and
then press the key “ENT” to display the software version.
4.
Press the “ESC” to return to the main menu.
8.4.14 Communication Test
The operation is as follows:
1.
Press the key “▲” to enter the main menu.
2.
Press the key “▲” or “▼” to move the cursor to the “Test” menu, and then press the key
“ENT” or “►” to enter the menu.
3.
Press the key “▲” or “▼” to move the cursor to the submenu “Device Test”, and then
press the key “ENT” to enter the submenu,to select test item. If “Prot Elements” “Superv
Events” or “IO Events” is selected, two options “All Test” and “Select Test” are
provided.
Prot Element
All Test
Select Test
4.
Press the key “▲” or “▼” to move the cursor to select the corresponding command menu
“All Test” or “Select Test”. If selecting the “All Test”, press the “ENT”, and the device will
successively carry out all operation element message test one by one.
5.
If “Select Test” is selected, press the key “ENT”. Press the “＋” or “－” to page up/down,
and then press the key “▲” or “▼” to move the scroll bar. Move the cursor to select the
corresponding protection element. Press the key “ENT” to execute the communication
test of this protection element, the substation automatic system (SAS) will receive the
PCS-902 Line Distance Relay
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Date: 2012-03-08
8 Human Machine Interface
corresponding message.
Note!
If no input operation is carried out within 60s, exit the communication transmission and
return to the “Test” menu, at this moment, the LCD will display “Communication Test
Timeout and Exiting...”.
Press the key “ESC” to exit this menu (returning to the menu “Test”, at this moment, the LCD will
display “Communication Test Exiting…”.
8.4.15 Select Language
The operation is as follows:
1.
Press the key “▲” to enter the main menu.
2.
Press the key “▲” or “▼” to move the cursor to the command menu “Language”, and
then press the key “ENT” to enter the menu and the following display will be shown on
LCD.
Please Select Language:
3.
1
中文
2
English
Press the key “▲” or “▼” to move the cursor to the language user preferred and press
the key “ENT” to execute language switching. After language switching is finished, LCD
will return to the menu “Language”, and the display language is changed. Otherwise,
press the key “ESC” to cancel language switching and return to the menu “Language”.
Note!
LCD interface provided in this chapter is only a reference and available for explaining
specific definition of LCD. The displayed interface of the actual device may be some
different from it, so you shall be subject to the actual protection device.
8-38
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9 Configurable Function
9 Configurable Function
Table of Contents
9 Configurable Function..................................................................... 9-a
9.1 Overview .......................................................................................................... 9-1
9.2 Introduction on PCS-Explorer software ........................................................ 9-1
9.3 Signal List ........................................................................................................ 9-2
9.3.1 Input Signal ........................................................................................................................ 9-2
9.3.2 Output Signal ................................................................................................................... 9-10
List of Tables
Table 9.3-1 Input signals ...........................................................................................................9-2
Table 9.3-2 Output signals ......................................................................................................9-10
PCS-902 Line Distance Relay
9-a
Date: 2012-08-14
9 Configurable Function
9-b
PCS-902 Line Distance Relay
Date: 2012-08-14
9 Configurable Function
9.1 Overview
By adoption of PCS-Explorer software, it is able to make device configuration, function
configuration, LCD configuration, binary input and binary output configuration, LED indicator
configuration and programming logic for PCS-902.
9.2 Introduction on PCS-Explorer software
PCS-Explorer software is developed in order to meet customer’s demand on functions of UAPC
platform device such as device configuration and programmable design. It selects substation as
the core of data management and the device as fundamental unit, supporting one substation to
govern many devices. The software provides on-line and off-line functions: on-line mode: Ethernet
connected with the device supporting IEC60870-5-103 and capable of uploading and downloading
configuration files through Ethernet net; off-line mode: off-line setting configuration. In addition, it
also supports programmable logic to meet customer’s demand.
After function configuration is finished, disabled protection function will be hidden in the device and
in setting configuration list of PCS-Explorer Software. The user can select to show or hide some
setting by this way, and modify the setting vale.
Please refer to the instruction manual “PCS-Explorer Auxiliary Software” for details.
Overall functions:











Programmable logic (off-line function)
Device configuration (off-line function)
Function configuration (off-line function)
LCD configuration (off-line function)
LED indicators configuration (off-line function)
Binary signals configuration (off-line function)
Setting configuration (off-line & on-line function)
Real-time display of analogue and digital quantity of device (on-line function)
Display of sequence of report (SOE) (on-line function)
Analysis of waveform (off-line & on-line function)
File downloading/uploading (on-line function)
PCS-902 Line Distance Relay
9-1
Date: 2012-08-14
9 Configurable Function
9.3 Signal List
9.3.1 Input Signal
All input signal for this device are listed in the following table.
For the specific project, some signals relevant to synchrocheck module, auto-reclosing module
and breaker failure protection module are with the suffix of “_CB1” and “_CB2” for circuit breaker 1
and circuit breaker 2 respectively.
Table 9.3-1 Input signals
No.
Item
Description
Circuit breaker position supervision
1
52b_PhA
Normally closed auxiliary contact of phase A of corresponding circuit breaker
2
52b_PhB
Normally closed auxiliary contact of phase B of corresponding circuit breaker
3
52b_PhC
Normally closed auxiliary contact of phase C of corresponding circuit breaker
4
52b
Normally closed contact of three-phase of circuit breaker
5
52a
Normally open contact of three-phase of circuit breaker
Control circuit failure (normally closed contact and normally open contact of
6
TCCS.Input
three-phase circuit breaker are all de-energized due to DC power loss of control
circuit)
Auxiliary element
7
AuxE.OCD.En
8
AuxE.OCD.Blk
9
AuxE.ROC1.En
10
AuxE.ROC1.Blk
11
AuxE.ROC2.En
12
AuxE.ROC2.Blk
13
AuxE.ROC3.En
14
AuxE.ROC3.Blk
15
AuxE.OC1.En
16
AuxE.OC1.Blk
17
AuxE.OC2.En
Current change auxiliary element enabling input, it is triggered from binary input
or programmable logic etc.
Current change auxiliary element blocking input, it is triggered from binary input
or programmable logic etc.
Stage 1 of residual current auxiliary element enabling input, it is triggered from
binary input or programmable logic etc.
Stage 1 of residual current auxiliary element blocking input, it is triggered from
binary input or programmable logic etc.
Stage 2 of residual current auxiliary element enabling input, it is triggered from
binary input or programmable logic etc.
Stage 2 of residual current auxiliary element blocking input, it is triggered from
binary input or programmable logic etc.
Stage 3 of residual current auxiliary element enabling input, it is triggered from
binary input or programmable logic etc.
Stage 3 of residual current auxiliary element blocking input, it is triggered from
binary input or programmable logic etc.
Stage 1 of phase current auxiliary element enabling input, it is triggered from
binary input or programmable logic etc.
Stage 1 of phase current auxiliary element blocking input, it is triggered from
binary input or programmable logic etc.
Stage 2 of phase current auxiliary element enabling input, it is triggered from
binary input or programmable logic etc.
9-2
PCS-902 Line Distance Relay
Date: 2012-08-14
9 Configurable Function
No.
Item
18
AuxE.OC2.Blk
19
AuxE.OC3.En
20
AuxE.OC3.Blk
21
AuxE.UVD.En
22
AuxE.UVD.Blk
23
AuxE.UVG.En
24
AuxE.UVG.Blk
25
AuxE.UVS.En
26
AuxE.UVS.Blk
27
AuxE.ROV.En
28
AuxE.ROV.Blk
Description
Stage 2 of phase current auxiliary element blocking input, it is triggered from
binary input or programmable logic etc.
Stage 3 of phase current auxiliary element enabling input, it is triggered from
binary input or programmable logic etc.
Stage 3 of phase current auxiliary element blocking input, it is triggered from
binary input or programmable logic etc.
Voltage change auxiliary element enabling input, it is triggered from binary input
or programmable logic etc.
Voltage change auxiliary element blocking input, it is triggered from binary input
or programmable logic etc.
Phase-to-ground under voltage auxiliary element enabling input, it is triggered
from binary input or programmable logic etc.
Phase-to-ground under voltage auxiliary element blocking input, it is triggered
from binary input or programmable logic etc.
Phase-to-phase under voltage auxiliary element enabling input, it is triggered
from binary input or programmable logic etc.
Phase-to-phase under voltage auxiliary element blocking input, it is triggered
from binary input or programmable logic etc.
Residual voltage auxiliary element enabling input, it is triggered from binary
input or programmable logic etc.
Residual voltage auxiliary element blocking input, it is triggered from binary
input or programmable logic etc.
Distance protection
29
21D.En_DPFC
30
21D.Blk_DPFC
31
LoadEnch.En
32
LoadEnch.Blk
33
21M.En
34
21M.Blk
35
21M.ZGx.En
36
21M.ZGx.Blk
37
21M.ZPx.En
38
21M.ZPx.Blk
DPFC distance protection enabling input, it is triggered from binary input or
programmable logic etc.
DPFC distance protection blocking input, it is triggered from binary input or
programmable logic etc.
Load trapezoid characteristic enabling input, it is triggered from binary input or
programmable logic etc.
Load trapezoid characteristic blocking input, it is triggered from binary input or
programmable logic etc.
Distance protection enabling input, it is triggered from binary input or
programmable logic etc.
Distance protection blocking input, it is triggered from binary input or
programmable logic etc.
Zone x of phase-to-ground distance protection enabling input, default value is
“1” (x=1, 2, 3, 4, 5)
Zone x of phase-to-ground distance protection blocking input, default value is
“0” (x=1, 2, 3, 4, 5)
Zone x of phase-to-phase distance protection enabling input, default value is
“1” (x=1, 2, 3, 4, 5)
Zone x of phase-to-phase distance protection blocking input, default value is “0”
PCS-902 Line Distance Relay
9-3
Date: 2012-08-14
9 Configurable Function
No.
Item
Description
(x=1, 2, 3, 4, 5)
39
21M.Zx.En_ShortDly
Enable accelerating zone 2 of distance protection (x=2, 3)
40
21M.Zx.Blk_ShortDly
Accelerating zone 2 of distance protection is disabled (x=2, 3)
41
21M.Z1.En_Instant
Enable zone 1 of distance protection operates without time delay
42
21Q.En
43
21Q.Blk
44
21Q.ZGx.En
45
21Q.ZGx.Blk
46
21Q.ZPx.En
47
21Q.ZPx.Blk
48
21Q.Zx.En_ShortDly
Enable accelerating zone 2 of distance protection (x=2, 3)
49
21Q.Zx.Blk_ShortDly
Accelerating zone 2 of distance protection is disabled (x=2, 3)
50
21Q.Z1.En_Instant
Enable zone 1 of distance protection operates without time delay
51
68.En
52
68.Blk
53
21M.En_PSBR
Enabling power swing blocking releasing (Mho characteristic)
54
21Q.En_PSBR
Enabling power swing blocking releasing (Quad characteristic)
55
21M.Blk_PSBR
Blocking power swing blocking releasing (Mho characteristic)
56
21Q.Blk_PSBR
Blocking power swing blocking releasing (Quad characteristic)
57
21SOTF.En
58
21SOTF.Blk
Distance protection enabling input, it is triggered from binary input or
programmable logic etc.
Distance protection blocking input, it is triggered from binary input or
programmable logic etc.
Zone x of phase-to-ground distance protection enabling input, default value is
“1” (x=1, 2, 3, 4， 5)
Zone x of phase-to-ground distance protection blocking input, default value is
“0” (x=1, 2, 3, 4, 5)
Zone x of phase-to-phase distance protection enabling input, default value is
“1” (x=1, 2, 3, 4, 5)
Zone x of phase-to-phase distance protection blocking input, default value is “0”
(x=1, 2, 3, 4, 5)
Power swing detection enabling input, it is triggered from binary input or
programmable logic etc.
Power swing detection blocking input, it is triggered from binary input or
programmable logic etc.
Distance SOTF protection enabling input, it is triggered from binary input or
programmable logic etc.
Distance SOTF protection blocking input, it is triggered from binary input or
programmable logic etc.
Optical pilot channel
59
FOx.Send1
Sending signal 1 of channel x
60
FOx.Send2
Sending signal 2 of channel x
61
FOx.Send3
Sending signal 3 of channel x
62
FOx.Send4
Sending signal 4 of channel x
63
FOx.Send5
Sending signal 5 of channel x
64
FOx.Send6
Sending signal 6 of channel x
65
FOx.Send7
Sending signal 7 of channel x
66
FOx.Send8
Sending signal 8 of channel x
67
FOx.Send9
Sending signal 9 of channel x (it is configured fixedly as sending permissive
signal 1 or sending A-phase permissive signal (only for phase-segregated
9-4
PCS-902 Line Distance Relay
Date: 2012-08-14
9 Configurable Function
No.
Item
Description
command scheme))
68
FOx.Send10
69
FOx.Send11
Sending signal 10 of channel x (it is configured fixedly as sending B-phase
permissive signal (only for phase-segregated command scheme))
Sending signal 11 of channel x (it is configured fixedly as sending C-phase
permissive signal (only for phase-segregated command scheme))
Sending signal 12 of channel x (it is configured fixedly as sending permissive
70
FOx.Send12
signal 1 when pilot directional earth-fault protection sharing pilot channel 1 with
pilot distance protection, or sending permissive signal 2 only for pilot directional
earth-fault protection adopting independent pilot channel 2)
Pilot distance protection and pilot directional earth-fault protection
Pilot distance protection enabling input 1, it is triggered from binary input or
71
85.Z.En1
72
85.Z.En2
73
85.Z.Blk
74
85.Abnor_Ch1
Input signal of indicating that pilot channel 1 is abnormal
75
85.Abnor_Ch2
Input signal of indicating that pilot channel 2 is abnormal
programmable logic etc.
Pilot distance protection enabling input 2, it is triggered from binary input or
programmable logic etc.
Pilot distance protection blocking input, it is triggered from binary input or
programmable logic etc.
Input signal of receiving permissive signal via channel No.1, or input signal of
76
85.Recv1
receiving permissive signal of A-phase via channel No.1 (only for
phase-segregated command scheme)
77
85.Recv2
Input signal of receiving permissive signal via channel 2
78
85.RecvB
79
85.RecvC
80
85.ExTrp
Input signal of initiating sending permissive signal from external tripping signal
81
85.Unblocking1
Unblocking signal 1
82
85.Unblocking2
Unblocking signal 2
83
85.ZX.En1
84
85.ZX.En2
85
85.ZX.Blk1
86
85.ZX.Blk2
87
85.DEF.En1
88
85.DEF.En2
89
85.DEF.Blk
Input signal of receiving permissive signal of B-phase via channel No.1 (only for
phase-segregated command scheme)
Input signal of receiving permissive signal of C-phase via channel No.1 (only for
phase-segregated command scheme)
Zone Extension enabling input 1, it is triggered from binary input or
programmable logic etc.
Zone Extension enabling input 2, it is triggered from binary input or
programmable logic etc.
Zone Extension blocking input 1, it is triggered from binary input or
programmable logic etc.
Zone Extension blocking input 2, it is triggered from binary input or
programmable logic etc.
Pilot directional earth-fault protection enabling input 1, it is triggered from binary
input or programmable logic etc.
Pilot directional earth-fault protection enabling input 2, it is triggered from binary
input or programmable logic etc.
Pilot directional earth-fault protection blocking input, it is triggered from binary
PCS-902 Line Distance Relay
9-5
Date: 2012-08-14
9 Configurable Function
No.
Item
Description
input or programmable logic etc.
Phase overcurrent protection
90
50/51Px.En1
91
50/51Px.En2
92
50/51Px.Blk
Stage x of phase overcurrent protection enabling input 1, it is triggered from
binary input or programmable logic etc.
Stage x of phase overcurrent protection enabling input 2, it is triggered from
binary input or programmable logic etc.
Stage x of phase overcurrent protection blocking input, it is triggered from
binary input or programmable logic etc.
Earth fault protection
93
50/51Gx.En1
94
50/51Gx.En2
95
50/51Gx.Blk
Stage x of earth fault protection enabling input 1, it is triggered from binary input
or programmable logic etc.
Stage x of earth fault protection enabling input 2, it is triggered from binary input
or programmable logic etc.
Stage x of earth fault protection blocking input, it is triggered from binary input
or programmable logic etc.
Overcurrent protection for VT circuit failure
96
51PVT.En1
97
51PVT.En2
98
51PVT.Blk
99
51GVT.En1
100
51GVT.En2
101
51GVT.Blk
Phase overcurrent protection for VT circuit failure enabling input 1, it is
triggered from binary input or programmable logic etc.
Phase overcurrent protection for VT circuit failure enabling input 2, it is
triggered from binary input or programmable logic etc.
Phase overcurrent protection for VT circuit failure blocking input, it is triggered
from binary input or programmable logic etc.
Ground overcurrent protection for VT circuit failure enabling input 1, it is
triggered from binary input or programmable logic etc.
Ground overcurrent protection for VT circuit failure enabling input 2, it is
triggered from binary input or programmable logic etc.
Ground overcurrent protection for VT circuit failure blocking input, it is triggered
from binary input or programmable logic etc.
Residual SOTF protection
102
50GSOTF.En1
103
50GSOTF.En2
104
50GSOTF.Blk
Residual current SOTF protection enabling input 1, it is triggered from binary
input or programmable logic etc.
Residual current SOTF protection enabling input 2, it is triggered from binary
input or programmable logic etc.
Residual current SOTF protection blocking input, it is triggered from binary
input or programmable logic etc.
Voltage protection
105
59Px.En1
106
59Px.En2
107
59Px.Blk
Stage x of overvoltage protection enabling input 1, it is triggered from binary
input or programmable logic etc.
Stage x of overvoltage protection enabling input 2, it is triggered from binary
input or programmable logic etc.
Stage x of overvoltage protection blocking input, it is triggered from binary input
or programmable logic etc.
9-6
PCS-902 Line Distance Relay
Date: 2012-08-14
9 Configurable Function
No.
Item
108
27Px.En1
109
27Px.En2
110
27Px.Blk
Description
Stage x of undervoltage protection enabling input 1, it is triggered from binary
input or programmable logic etc.
Stage x of undervoltage protection enabling input 2, it is triggered from binary
input or programmable logic etc.
Stage x of undervoltage protection blocking input, it is triggered from binary
input or programmable logic etc.
Frequency protection
111
81U.En1
112
81U.En2
113
81U.Blk
114
81O.En1
115
81O.En2
116
81O.Blk
Underfrequency protection enabling input 1, it is triggered from binary input or
programmable logic etc.
Underfrequency protection enabling input 2, it is triggered from binary input or
programmable logic etc.
Underfrequency protection blocking input, it is triggered from binary input or
programmable logic etc.
Overfrequency protection enabling input 1, it is triggered from binary input or
programmable logic etc.
Overfrequency protection enabling input 2, it is triggered from binary input or
programmable logic etc.
Overfrequency protection blocking input, it is triggered from binary input or
programmable logic etc.
Breaker failure protection
117
50BF.ExTrp3P_L
Input signal of three-phase tripping contact from line protection
118
50BF.ExTrp3P_GT
119
50BF.ExTrpA
Input signal of phase-A tripping contact from external device
120
50BF.ExTrpB
Input signal of phase-B tripping contact from external device
121
50BF.ExTrpC
Input signal of phase-C tripping contact from external device
Input signal of three-phase tripping contact from generator or transformer
protection
Input signal of three-phase tripping contact from external device. Once it is
122
50BF.ExTrp_WOI
energized, normally closed auxiliary contact of circuit breaker is chosen in
addition to breaker failure current check to trigger breaker failure timers.
123
50BF.En
124
50BF.Blk
Input signal of enabling breaker failure protection
Breaker failure protection blocking input, such as function blocking binary input.
When the input is 1, breaker failure protection is reset and time delay is cleared.
Thermal overload protection
125
49.Clr_Cmd
126
49.En
127
49.Blk
Input signal of clear thermal accumulation value
Thermal overload protection enabling input, it is triggered from binary input or
programmable logic etc.
Thermal overload protection blocking input, it is triggered from binary input or
programmable logic etc.
Stub overcurrent protection
128
50STB.En1
129
50STB.En2
Stub overcurrent protection enabling input 1, it is triggered from binary input or
programmable logic etc.
Stub overcurrent protection enabling input 2, it is triggered from binary input or
PCS-902 Line Distance Relay
9-7
Date: 2012-08-14
9 Configurable Function
No.
Item
Description
programmable logic etc.
130
50STB.Blk
131
50STB.89b_DS
Stub overcurrent protection blocking input, it is triggered from binary input or
programmable logic etc.
Normally closed auxiliary contact of line disconnector
Dead zone protection
132
50DZ.En1
Dead zone protection enabling input 1, it can be binary inputs or logic link.
133
50DZ.En2
Dead zone protection enabling input 2, it can be binary inputs or logic link.
134
50DZ.Blk
135
50DZ.ExStart
Dead zone protection blocking input, such as function blocking binary input.
When the input is 1, dead zone protection is reset and time delay is cleared.
Initiation signal input of the dead zone protection.
Pole discrepancy protection
136
62PD.En1
137
62PD.En2
138
62PD.Blk
139
62PD.In_PD
Pole discrepancy protection enabling input 1, it is triggered from binary input or
programmable logic etc.
Pole discrepancy protection enabling input 2, it is triggered from binary input or
programmable logic etc.
Pole discrepancy protection blocking input, it is triggered from binary input or
programmable logic etc.
Pole discrepancy binary input
Broken conductor protection
140
46BC.En1
141
46BC.En2
142
46BC.Blk
Enable broken conductor protection input 1, it is triggered from binary input or
programmable logic etc.
Enable broken conductor protection input 2, it is triggered from binary input or
programmable logic etc.
Broken conductor protection blocking input, it is triggered from binary input or
programmable logic etc.
Synchrocheck function
143
25.Blk_Chk
Input signal of blocking synchrocheck function for AR.
144
25.Blk_SynChk
145
25.Blk_DdChk
146
25.Start_Chk
147
25.Blk_VTS_UB
VT circuit supervision (UB) is blocked
148
25.Blk_VTS_UL
VT circuit supervision (UL) is blocked
149
25.MCB_VT_UB
Binary input for VT MCB auxiliary contact (UB)
150
25.MCB_VT_UL
Binary input for VT MCB auxiliary contact (UL)
Input signal of blocking synchronism check for AR. If the value is “1”, the output
of synchronism check is “0”.
Input signal of blocking dead charge check for AR.
Input signal of starting synchronism check, usually it was starting signal of AR
from auto-reclosing module.
Auto-reclosing
151
79.En
152
79.Blk
153
79.Sel_1PAR
Binary input for enabling AR. If the logic setting [79.En_ExtCtrl]=1, enabling AR
will be controlled by the external signal via binary input
Binary input for disabling AR. If the logic setting [79.En_ExtCtrl]=1, disabling AR
will be controlled by the external input
Input signal for selecting 1-pole AR mode of corresponding circuit breaker
9-8
PCS-902 Line Distance Relay
Date: 2012-08-14
9 Configurable Function
No.
Item
Description
154
79.Sel_3PAR
Input signal for selecting 3-pole AR mode of corresponding circuit breaker
155
79.Sel_1P/3PAR
Input signal for selecting 1/3-pole AR mode of corresponding circuit breaker
156
79.Trp
Input signal of single-phase tripping from line protection to initiate AR
157
79.Trp3P
Input signal of three-phase tripping from line protection to initiate AR
158
79.TrpA
Input signal of A-phase tripping from line protection to initiate AR
159
79.TrpB
Input signal of B-phase tripping from line protection to initiate AR
160
79.TrpC
Input signal of C-phase tripping from line protection to initiate AR
161
79.Lockout
Input signal of blocking reclosing, usually it is connected with the operating
signals of definite-time protection, transformer protection and busbar differential
protection, etc.
162
79.PLC_Lost
Input signal of indicating the alarm signal that signal channel is lost
163
79.WaitMaster
164
79.CB_Healthy
165
79.Clr_Counter
Clear the reclosing counter
166
79.Ok_Chk
Synchrocheck condition of AR is met
Input signal of waiting for reclosing permissive signal from master AR (when
reclosing multiple circuit breakers)
The input for indicating whether circuit breaker has enough energy to perform
the close function
Transfer trip
167
TT.Init
168
TT.En
169
TT.Blk
Input signal of initiating transfer trip after receiving transfer trip
Transfer trip enabling input, it is triggered from binary input or programmable
logic etc.
Transfer trip blocking input, it is triggered from binary input or programmable
logic etc.
VT circuit supervision
170
VTS.En
171
VTS.Blk
172
VTNS.En
173
VTNS.Blk
174
VTS.MCB_VT
VT supervision enabling input, it is triggered from binary input or programmable
logic etc.
VT supervision blocking input, it is triggered from binary input or programmable
logic etc.
VT neutral point supervision enabling input, it is triggered from binary input or
programmable logic etc.
VT neutral point supervision blocking input, it is triggered from binary input or
programmable logic etc.
Binary input for VT MCB auxiliary contact
CT circuit supervision
175
CTS.En
176
CTS.Blk
CT circuit supervision enabling input, it is triggered from binary input or
programmable logic etc.
CT circuit supervision blocking input, it is triggered from binary input or
programmable logic etc.
Control and Synchrocheck for Manual Closing
177
Sig_En_CtrlOpnxx
It is the interlock status of No.xx open output of BO module (xx=01~10)
178
Sig_En_CtrlClsxx
It is the interlock status of No.xx closing output of BO module (xx=01~10)
179
Sig_Ok_Chk
From receiving a closing command, this device will continuously check whether
PCS-902 Line Distance Relay
9-9
Date: 2012-08-14
9 Configurable Function
No.
Item
Description
the 2 voltages (Incoming voltage and reference voltage) involved in
synchronism check(or dead check) can meet the criteria.
Within the duration of [MCBrd.25.t_Wait_Chk], if the synchronism check(or
dead check) criteria are not met, [Sig_Ok_Chk] will be set as “0”; if the
synchronism check(or dead check) criteria are met, [Sig_Ok_Chk] will be set as
“1”.
Access the menu “Local Cmd→Manual Control” to issue control command
locally.
180
Cmd_LocCtrl
If the binary input [BI_Rmt/Loc] is energized as “1”, local control will be
disabled. If the binary input [BI_Rmt/Loc] is de-energized as “0”, local control
will be enabled.
If the binary input [BI_Rmt/Loc] is energized as “1”, remote control from
SCADA/CC will be enabled. If the binary input [BI_Rmt/Loc] is de-energized as
181
Cmd_RmtCtrl
“0”, remote control from SCADA/CC will be disabled.
Remote control commands from SCADA/CC can be transmitted via
IEC60870-5-103 protocol or IEC61850 protocol.
182
It is used to select the remote control or the local control.
BI_Rmt/Loc
9.3.2 Output Signal
All output signal for this device have been listed in the following table.
Table 9.3-2 Output signals
No.
Signal
Description
Circuit breaker position supervision
1
Alm_52b
CB position is abnormal
2
TCCS.Alm
Control circuit of circuit breaker is abnormal
Fault detector
3
FD.Pkp
The device picks up
4
FD.DPFC.Pkp
DPFC current fault detector element operates.
5
FD.ROC.Pkp
Residual current fault detector element operates.
Auxiliary element
6
AuxE.St
Any auxiliary element of the device operates
7
AuxE.OCD.St
Current change auxiliary element operates.
8
AuxE.OCD.St_Ext
Current change auxiliary element operates (7s delayed drop off).
9
AuxE.OCD.On
Current change auxiliary element is enabled
10
AuxE.ROC1.St
Stage 1 of residual current auxiliary element operates.
11
AuxE.ROC1.On
Stage 1 of residual current auxiliary element is enabled
12
AuxE.ROC2.St
Stage 2 of residual current auxiliary element operates.
13
AuxE.ROC2.On
Stage 2 of residual current auxiliary element is enabled
14
AuxE.ROC3.St
Stage 3 of residual current auxiliary element operates.
15
AuxE.ROC3.On
Stage 3 of residual current auxiliary element is enabled
16
AuxE.OC1.St
Stage 1 of phase current auxiliary element operates.
9-10
PCS-902 Line Distance Relay
Date: 2012-08-14
9 Configurable Function
No.
Signal
Description
17
AuxE.OC1.On
Stage 1 of phase current auxiliary element is enabled
18
AuxE.OC2.St
Stage 2 of phase current auxiliary element operates.
19
AuxE.OC2.On
Stage 2 of phase current auxiliary element is enabled
20
AuxE.OC3.St
Stage 3 of phase current auxiliary element operates.
21
AuxE.OC3.On
Stage 3 of phase current auxiliary element is enabled
22
AuxE.UVD.St
Voltage change auxiliary element operates.
23
AuxE.UVD.St_Ext
Voltage change auxiliary element operates (7s delayed drop off).
24
AuxE.UVD.On
Voltage change auxiliary element is enabled
25
AuxE.UVG.St
Phase-to-ground under voltage auxiliary element operates.
26
AuxE.UVG.On
Phase-to-ground under voltage auxiliary element is enabled
27
AuxE.UVS.St
Phase-to-phase under voltage auxiliary element operates.
28
AuxE.UVS.On
Phase-to-phase under voltage auxiliary element is enabled
29
AuxE.ROV.St
Residual voltage auxiliary element operates.
30
AuxE.ROV.On
Residual voltage auxiliary element is enabled
Distance protection
31
21D.Op_DPFC
DPFC distance protection operates.
32
LoadEnch.St
Measured impedance into the load area
33
21M.Z1.On
Zone 1 of distance protection is enabled
34
21M.Z2.On
Zone 2 of distance protection is enabled
35
21M.Z3.On
Zone 3 of distance protection is enabled
36
21M.Z4.On
zone 4 of distance protection is enabled
37
21M.Z5.On
zone 5 of distance protection is enabled
38
21M.Z1.Op
Zone 1 of distance protection operates
39
21M.Z2.Op
Zone 2 of distance protection operates
40
21M.Z3.Op
Zone 3 of distance protection operates
41
21M.Z4.Op
zone 4 of distance protection operates
42
21M.Z5.Op
zone 5 of distance protection operates
43
21Q.Z1.On
Zone 1 of distance protection is enabled
44
21Q.Z2.On
Zone 2 of distance protection is enabled
45
21Q.Z3.On
Zone 3 of distance protection is enabled
46
21Q.Z4.On
zone 4 of distance protection is enabled
47
21Q.Z5.On
zone 5 of distance protection is enabled
48
21Q.Z1.Op
Zone 1 of distance protection operates
49
21Q.Z2.Op
Zone 2 of distance protection operates
50
21Q.Z3.Op
Zone 3 of distance protection operates
51
21Q.Z4.Op
zone 4 of distance protection operates
52
21Q.Z5.Op
zone 5 of distance protection operates
53
68.St
Power swing detection takes into effect.
54
21M.Z1.Rls_PSBR
PSBR operates to release zone 1 (Mho characteristic)
55
21Q.Z1.Rls_PSBR
PSBR operates to release zone 1 (Quad characteristic)
56
21M.Z2.Rls_PSBR
PSBR operates to release zone 2 (Mho characteristic)
57
21Q.Z2.Rls_PSBR
PSBR operates to release zone 2 (Quad characteristic)
PCS-902 Line Distance Relay
9-11
Date: 2012-08-14
9 Configurable Function
No.
Signal
Description
58
21M.Z3.Rls_PSBR
PSBR operates to release zone 3 (Mho characteristic)
59
21Q.Z3.Rls_PSBR
PSBR operates to release zone 3 (Quad characteristic)
60
21M.Z5.Rls_PSBR
PSBR operates to release zone 5 (Mho characteristic)
61
21Q.Z5.Rls_PSBR
PSBR operates to release zone 5 (Quad characteristic)
62
21M.Pilot.Rls_PSBR
63
21Q.Pilot.Rls_PSBR
64
21SOTF.Op
65
21SOTF.Op_PDF
PSBR
operates
to
release
pilot
distance
protection
(Mho
characteristic)
PSBR operates to release pilot distance protection (Quad
characteristic)
Accelerate distance protection to trip when manual closing or
auto-reclosing to fault
Accelerate distance protection to trip when another fault happening
under pole discrepancy conditions
Optical pilot channel
66
FOx.Recv1
Receiving signal 1 of channel x
67
FOx.Recv2
Receiving signal 2 of channel x
68
FOx.Recv3
Receiving signal 3 of channel x
69
FOx.Recv4
Receiving signal 4 of channel x
70
FOx.Recv5
Receiving signal 5 of channel x
71
FOx.Recv6
Receiving signal 6 of channel x
72
FOx.Recv7
Receiving signal 7 of channel x
73
FOx.Recv8
Receiving signal 8 of channel x
Receiving signal 9 of channel x (it is configured fixedly as receiving
74
FOx.Recv9
permissive signal via channel No.1, or receiving permissive signal of
A-phase via channel No.1 (only for phase-segregated command
scheme))
Receiving signal 10 of channel x (it is configured fixedly as receiving
75
FOx.Recv10
permissive
signal
of
B-phase
via
channel
No.1
(only
for
phase-segregated command scheme))
Receiving signal 11 of channel x (it is configured fixedly as receiving
76
FOx.Recv11
permissive
signal
of
C-phase
via
channel
No.1
(only for
phase-segregated command scheme))
Receiving signal 12 of channel x (it is configured fixedly as receiving
permissive signal 1 when pilot directional earth-fault protection
77
FOx.Recv12
sharing pilot channel 1 with pilot distance protection, or receiving
permissive signal 2 only for pilot directional earth-fault protection
adopting independent pilot channel 2)
78
FOx.Alm_CH
79
FOx.Alm_ID
80
FO.RmtID
81
FOx.t_ChDly
Channel x is abnormal
Received ID from the remote end is not as same as the setting
[FO.RmtID] of the device in local end
ID information received from the remote end by the device at local
end now
Calculated propagation delay of communication channel of the
9-12
PCS-902 Line Distance Relay
Date: 2012-08-14
9 Configurable Function
No.
Signal
Description
device at local end now
82
FOx.N_CRCFail
Total number of error frame of channel x
83
FOx.N_FramErr
Total number of abnormal messages of channel x
84
FOx.N_FramLoss
Total number of lost frames of channel x
85
FOx.N_RmtAbnor
86
FOx.t_CRCFailSec
Seconds of serious error frames of channel x
87
FOx.Alm_Connect
Optical fibre of channel x is connected wrongly
88
85.Op_Z
89
85.Send1
90
85.Send2
91
85.SendB
92
85.SendC
93
85.Op_ZX
Zone extension protection operates.
94
85.Op_ZX_St
Zone extension protection starts
95
85.Op_DEF
Pilot directional earth-fault protection operates.
Total number of abnormal messages from the remote end of channel
x
Pilot distance protection and pilot directional earth-fault protection
Pilot distance protection operates.
Output signal of sending permissive signal 1 or sending A-phase
permissive signal (only for phase-segregated command scheme)
Output signal of sending permissive signal 2 only for pilot directional
earth-fault protection adopting independent pilot channel 2
Output signal of sending B-phase permissive signal (only for
phase-segregated command scheme)
Output signal of sending C-phase permissive signal (only for
phase-segregated command scheme)
Current direction
96
FWD_ROC
The forward direction of zero-sequence power
97
REV_ROC
The reverse direction of zero-sequence power
98
FWD_NegOC
The forward direction of negative-sequence power
99
REV_NegOC
The reverse direction of negative-sequence power
100
Forward_DIR_A, B, C
The forward direction of phase current
101
Rev_DIR_A, B, C
The reverse direction of phase current
102
Forward_DIR_AB, BC, CA
The forward direction of phase-to-phase current
103
Rev_DIR_AB, BC, CA
The reverse direction of phase-to-phase current
Phase overcurrent protection
104
50/51Px.Op
Stage x of phase overcurrent protection operates.
105
50/51Px.St
Stage x of phase overcurrent protection starts.
106
50/51Px.StA
Stage x of phase overcurrent protection starts (A-Phase).
107
50/51Px.StB
Stage x of phase overcurrent protection starts (B-Phase).
108
50/51Px.StC
Stage x of phase overcurrent protection starts (C-Phase).
Earth fault protection
109
50/51Gx.Op
Stage x of earth fault protection operates.
110
50/51Gx.St
Stage x of earth fault protection starts.
Overcurrent protection for VT circuit failure
111
51PVT.Op
Phase overcurrent protection for VT circuit failure operates.
112
51PVT.St
Phase overcurrent protection for VT circuit failure starts.
PCS-902 Line Distance Relay
9-13
Date: 2012-08-14
9 Configurable Function
No.
Signal
Description
113
51PVT.StA
Phase overcurrent protection for VT circuit failure starts (A-Phase).
114
51PVT.StB
Phase overcurrent protection for VT circuit failure starts (B-Phase).
115
51PVT.StC
Phase overcurrent protection for VT circuit failure starts (C-Phase).
116
51GVT.Op
Ground overcurrent protection for VT circuit failure operates.
117
51GVT.St
Ground overcurrent protection for VT circuit failure starts.
Residual SOTF protection
118
50GSOTF.Op
Residual current SOTF protection operates.
119
50GSOTF.St
Residual current SOTF protection starts.
Voltage protection
120
59Px.Op
Stage x of overvoltage protection operates.
121
59Px.St
Stage x of overvoltage protection starts.
122
59Px.St1
Stage x of overvoltage protection starts (A or AB).
123
59Px.St2
Stage x of overvoltage protection starts (B or BC).
124
59Px.St3
Stage x of overvoltage protection starts (C or CA).
125
59Px.Op_InitTT
Stage x of overvoltage protection operates to initiate transfer trip.
126
59Px.Alm
Stage x of overvoltage protection alarms.
127
27Px.Op
Stage x of undervoltage protection operates.
128
27Px.Alm
Stage x of undervoltage protection alarms.
129
27Px.St
Stage x of undervoltage protection starts.
130
27Px.St1
Stage x of undervoltage protection starts (A or AB).
131
27Px.St2
Stage x of undervoltage protection starts (B or BC).
132
27Px.St3
Stage x of undervoltage protection starts (C or CA).
Frequency protection
133
81U.UFx.Op
Stage x of underfrequency protection operates (x=1, 2, 3 or 4).
134
81U.St
Underfrequency protection starts.
135
81O.OFx.Op
Stage x of overfrequency protection operates (x=1, 2, 3 or 4).
136
81O.St
Overfrequency protection starts.
Breaker failure protection
137
50BF.Op_ReTrpA
Breaker failure protection operates to re-trip phase-A circuit breaker
138
50BF.Op_ReTrpB
Breaker failure protection operates to re-trip phase-B circuit breaker
139
50BF.Op_ReTrpC
Breaker failure protection operates to re-trip phase-C circuit breaker
140
50BF.Op_ReTrp3P
141
50BF.Op_t1
Stage 1 breaker failure protection operates
142
50BF.Op_t2
Stage 2 breaker failure protection operates
Breaker failure protection operates to re-trip three-phase circuit
breaker
Thermal overload protection
143
49.St
Thermal overload protection starts.
144
49-1.Op
Stage 1 of thermal overload protection operates to trip.
145
49-2.Op
Stage 2 of thermal overload protection operates to trip.
146
49-1.Alm
Stage 1 of thermal overload protection operates to alarm.
147
49-2.Alm
Stage 2 of thermal overload protection operates to alarm.
Stub overcurrent protection
9-14
PCS-902 Line Distance Relay
Date: 2012-08-14
9 Configurable Function
No.
Signal
Description
148
50STB.St
Stub overcurrent protection starts.
149
50STB.Op
Stub overcurrent protection operates.
Dead zone protection
150
50DZ.St
Dead zone protection starts.
151
50DZ.Op
Dead zone protection operates.
Pole discrepancy protection
152
62PD.Op
Pole discrepancy protection operates to trip
153
62PD.St
Pole discrepancy protection starts
Broken conductor protection
154
46BC.St
Broken-conductor protection starts
155
46BC.Op
Broken-conductor protection operates.
Synchrocheck function
156
UL1_Sel
To select voltage of Line 1
157
UL2_Sel
To select voltage of Line 2
158
UB1_Sel
To select voltage of Bus 1
159
UB2_Sel
To select voltage of Bus 2
160
Invalid_Sel
Voltage selection is invalid.
To indicate that frequency difference condition for synchronism
161
25.Ok_fDiff
check of AR is met, frequency difference between UB and UL is
smaller than [25.f_Diff].
To indicate that voltage difference condition for synchronism check of
162
25.Ok_UDiff
AR is met, voltage difference between UB and UL is smaller than
[25.U_Diff]
To indicate phase difference condition for synchronism check of AR
163
25.Ok_phiDiff
is met, phase difference between UB and UL is smaller than
[25.phi_Diff].
164
25.Ok_DdL_DdB
Dead line and dead bus condition is met
165
25.Ok_DdL_LvB
Dead line and live bus condition is met
166
25.Ok_LvL_DdB
Live line and dead bus condition is met
167
25.Chk_LvL
Line voltage is greater than the voltage setting [25.U_Lv]
168
25.Chk_DdL
Line voltage is smaller than the voltage setting [25.U_Dd]
169
25.Chk_LvB
Bus voltage is greater than the voltage setting [25.U_Lv]
170
25.Chk_DdB
Bus voltage is smaller than the voltage setting [25.U_Dd]
171
25.Ok_DdChk
To indicate that dead charge check condition of AR is met
172
25.Ok_SynChk
To indicate that synchronism check condition of AR is met
173
25.Ok_Chk
To indicate that synchrocheck condition of AR is met
174
25.Alm_VTS_UB
Synchronism voltage circuit is abnormal (UB)
175
25.Alm_VTS_UL
Synchronism voltage circuit is abnormal (UL)
Auto-reclosing
176
79.On
Automatic reclosure is enabled
177
79.Off
Automatic reclosure is disabled
178
79.Close
Output of auto-reclosing signal
PCS-902 Line Distance Relay
9-15
Date: 2012-08-14
9 Configurable Function
No.
Signal
Description
179
79.Ready
Automatic reclosure have been ready for reclosing cycle
180
79.AR_Blkd
Automatic reclosure is blocked
181
79.Active
Automatic reclosing logic is actived
182
79.Inprog
Automatic reclosing cycle is in progress
183
79.Inprog_1P
The first 1-pole AR cycle is in progress
184
79.Inprog_3P
3-pole AR cycle is in progress
185
79.Inprog_3PS1
First 3-pole AR cycle is in progress
186
79.Inprog_3PS2
Second 3-pole AR cycle is in progress
187
79.Inprog_3PS3
Third 3-pole AR cycle is in progress
188
79.Inprog_3PS4
Fourth 3-pole AR cycle is in progress
189
79.WaitToSlave
190
79.Prem_Trp1P
191
79.Prem_Trp3P
192
79.Fail_Rcls
Auto-reclosing fails
193
79.Succ_Rcls
Auto-reclosing is successful
194
79.Fail_Chk
Synchrocheck for AR fails
195
79.Mode_1PAR
Output of 1-pole AR mode
196
79.Mode_3PAR
Output of 3-pole AR mode
197
79.Mode_1/3PAR
Output of 1/3-pole AR mode
Waiting signal of automatic reclosing which will be sent to slave
(when reclosing multiple circuit breakers)
Single-phase circuit breaker will be tripped once protection device
operates
Three-phase circuit breaker will be tripped once protection device
operates
Transfer trip
198
TT.Alm
Input signal of receiving transfer trip is abnormal
199
TT.Op
Transfer trip operates
200
TT.On
Transfer trip is enabled
Trip logic
201
TrpA
Tripping A-phase circuit breaker
202
TrpB
Tripping B-phase circuit breaker
203
TrpC
Tripping C-phase circuit breaker
204
Trp
Tripping any phase circuit breaker
205
3PTrp
Tripping three-phase circuit breaker
206
BFI_A
207
BFI_B
208
BFI_C
209
BFI
210
Trp3P_PSFail
Initiating three-phase tripping due to failure in fault phase selection
211
BlockAR
Blocking auto-reclosing
Protection tripping signal of A-phase configured to initiate BFP, BFI
signal shall be reset immediately after tripping signal drops off.
Protection tripping signal of B-phase configured to initiate BFP, BFI
signal shall be reset immediately after tripping signal drops off.
Protection tripping signal of C-phase configured to initiate BFP, BFI
signal shall be reset immediately after tripping signal drops off.
Protection tripping signal configured to initiate BFP, BFI signal shall
be reset immediately after tripping signal drops off.
9-16
PCS-902 Line Distance Relay
Date: 2012-08-14
9 Configurable Function
No.
Signal
Description
VT circuit supervision
212
VTS.Alm
Alarm signal to indicate VT circuit fails
213
VTNS.Alm
Alarm signal to indicate VT neutral point fails
CT circuit supervision
214
CTS.Alm
Alarm signal to indicate CT circuit fails
Control and Synchrocheck for Manual Closing
215
Op_Opnxx
No.xx command output for open.
216
Op_Clsxx
No.xx command output for closing.
Faulty phase selection
217
PhSA
Phase-A is selected as faulty phase
218
PhSB
Phase-B is selected as faulty phase
219
PhSC
Phase-C is selected as faulty phase
220
Neut
Earth fault
PCS-902 Line Distance Relay
9-17
Date: 2012-08-14
9 Configurable Function
9-18
PCS-902 Line Distance Relay
Date: 2012-08-14
10 Communication
10 Communication
Table of Contents
10 Communication ............................................................................ 10-a
10.1 Overview ...................................................................................................... 10-1
10.2 Rear Communication Port Information ..................................................... 10-1
10.2.1 RS-485 Interface ............................................................................................................ 10-1
10.2.2 Ethernet Interface .......................................................................................................... 10-3
10.2.3 IEC60870-5-103 Communication ................................................................................... 10-4
10.3 IEC60870-5-103 Interface over Serial Port ................................................ 10-4
10.3.1 Physical Connection and Link Layer .............................................................................. 10-5
10.3.2 Initialization .................................................................................................................... 10-5
10.3.3 Time Synchronization ..................................................................................................... 10-5
10.3.4 Spontaneous Events ...................................................................................................... 10-5
10.3.5 General Interrogation ..................................................................................................... 10-5
10.3.6 General Service ............................................................................................................. 10-6
10.3.7 Disturbance Records ..................................................................................................... 10-6
10.4 Messages Description for IEC61850 Protocol .......................................... 10-6
10.4.1 Overview ........................................................................................................................ 10-6
10.4.2 Communication profiles ................................................................................................. 10-7
10.4.3 Server data organization ................................................................................................ 10-8
10.4.4 Server features and configuration ................................................................................ 10-10
10.4.5 ACSI Conformance ...................................................................................................... 10-12
10.4.6 Logical Nodes .............................................................................................................. 10-16
10.5 DNP3.0 Interface ....................................................................................... 10-18
10.5.1 Overview ...................................................................................................................... 10-18
10.5.2 Link Layer Functions .................................................................................................... 10-19
10.5.3 Transport Functions ..................................................................................................... 10-19
PCS-902 Line Distance Relay
10-a
Date: 2011-07-06
10 Communication
10.5.4 Application Layer Functions ......................................................................................... 10-19
List of Figures
Figure 10.2-1 EIA RS-485 bus connection arrangements.....................................................10-2
Figure 10.2-2 Ethernet communication cable .......................................................................10-3
Figure 10.2-3 Ethernet communication structure .................................................................10-4
10-b
PCS-902 Line Distance Relay
Date: 2011-07-06
10 Communication
10.1 Overview
This section outlines the remote communications interfaces of NR Relays. The protective device
supports a choice of three protocols via the rear communication interface (RS-485 or Ethernet),
selected via the model number by setting. The protocol provided by the protective device is
indicated in the menu “Settings→Device Setup→Comm Settings”.
The rear EIA RS-485 interface is isolated and is suitable for permanent connection of whichever
protocol is selected. The advantage of this type of connection is that up to 32 protective devices
can be “daisy chained” together using a simple twisted pair electrical connection.
It should be noted that the descriptions contained within this section do not aim to fully detail the
protocol itself. The relevant documentation for the protocol should be referred to for this
information. This section serves to describe the specific implementation of the protocol in the relay.
10.2 Rear Communication Port Information
10.2.1 RS-485 Interface
This protective device provides two rear RS-485 communication ports, and each port has three
terminals in the 12-terminal screw connector located on the back of the relay and each port has a
ground terminal for the earth shield of the communication cable. The rear ports provide RS-485
serial data communication and are intended for use with a permanently wired connection to a
remote control center.
10.2.1.1 EIA RS-485 Standardized Bus
The EIA RS-485 two-wire connection provides a half-duplex fully isolated serial connection to the
product. The connection is polarized and whilst the product’s connection diagrams indicate the
polarization of the connection terminals it should be borne in mind that there is no agreed
definition of which terminal is which. If the master is unable to communicate with the product, and
the communication parameters match, then it is possible that the two-wire connection is reversed.
10.2.1.2 Bus Termination
The EIA RS-485 bus must have 120Ω (Ohm) ½ Watt terminating resistors fitted at either end
across the signal wires (refer to Figure 10.2-1). Some devices may be able to provide the bus
terminating resistors by different connection or configuration arrangements, in which case
separate external components will not be required. However, this product does not provide such a
facility, so if it is located at the bus terminus then an external termination resistor will be required.
PCS-902 Line Distance Relay
10-1
Date: 2011-07-06
Master
EIA RS-485
10 Communication
120 Ohm
120 Ohm
Slave
Slave
Slave
Figure 10.2-1 EIA RS-485 bus connection arrangements
10.2.1.3 Bus Connections & Topologies
The EIA RS-485 standard requires that each device is directly connected to the physical cable that
is the communications bus. Stubs and tees are expressly forbidden, such as star topologies. Loop
bus topologies are not part of the EIA RS-485 standard and are forbidden by it also.
Two-core screened cable is recommended. The specification of the cable will be dependent on the
application, although a multi-strand 0.5mm2 per core is normally adequate. Total cable length must
not exceed 500m. The screen must be continuous and connected to ground at one end, normally
at the master connection point; it is important to avoid circulating currents, especially when the
cable runs between buildings, for both safety and noise reasons.
This product does not provide a signal ground connection. If a signal ground connection is present
in the bus cable then it must be ignored, although it must have continuity for the benefit of other
devices connected to the bus. At no stage must the signal ground be connected to the cables
screen or to the product’s chassis. This is for both safety and noise reasons.
10.2.1.4 Biasing
It may also be necessary to bias the signal wires to prevent jabber. Jabber occurs when the signal
level has an indeterminate state because the bus is not being actively driven. This can occur when
all the slaves are in receive mode and the master is slow to turn from receive mode to transmit
mode. This may be because the master purposefully waits in receive mode, or even in a high
impedance state, until it has something to transmit. Jabber causes the receiving device(s) to miss
the first bits of the first character in the packet, which results in the slave rejecting the message
and consequentially not responding. Symptoms of these are poor response times (due to retries),
increasing message error counters, erratic communications, and even a complete failure to
communicate.
Biasing requires that the signal lines be weakly pulled to a defined voltage level of about 1V. There
should only be one bias point on the bus, which is best situated at the master connection point.
The DC source used for the bias must be clean; otherwise noise will be injected. Note that some
devices may (optionally) be able to provide the bus bias, in which case external components will
not be required.
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10 Communication
Note!
It is extremely important that the 120Ω termination resistors are fitted. Failure to do so will
result in an excessive bias voltage that may damage the devices connected to the bus.
As the field voltage is much higher than that required, NR cannot assume responsibility for
any damage that may occur to a device connected to the network as a result of incorrect
application of this voltage.
Ensure that the field voltage is not being used for other purposes (i.e. powering logic inputs)
as this may cause noise to be passed to the communication network.
10.2.2 Ethernet Interface
This protective device can provide four rear Ethernet interfaces (optional) and they are unattached
each other. Parameters of each Ethernet port can be configured in the menu “Settings→Device
Setup→Comm Settings”.
10.2.2.1 Ethernet Standardized Communication Cable
It is recommended to use twisted screened eight-core cable as the communication cable. A picture
is shown bellow.
Figure 10.2-2 Ethernet communication cable
10.2.2.2 Connections and Topologies
Each equipment is connected with an exchanger via communication cable, and thereby it forms a
star structure network. Dual-network is recommended in order to increase reliability. SCADA is
also connected to the exchanger and will play a role of master station, so the every equipment
which has been connected to the exchanger will play a role of slave unit.
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10 Communication
SCADA
Switch: Net A
Switch: Net B
……
Figure 10.2-3 Ethernet communication structure
10.2.3 IEC60870-5-103 Communication
The IEC specification IEC60870-5-103: Telecontrol Equipment and Systems, Part 5: Transmission
Protocols Section 103 defines the use of standards IEC60870-5-1 to IEC60870-5-5 to perform
communication with protective device. The standard configuration for the IEC60870-5-103
protocol is to use a twisted pair EIA RS-485 connection over distances up to 500m. It also supports
to use an Ethernet connection. The relay operates as a slave in the system, responding to
commands from a master station.
To use the rear port with IEC60870-5-103 communication, the relevant settings to the protective
device must be configured.
10.3 IEC60870-5-103 Interface over Serial Port
The IEC60870-5-103 interface over serial port (RS-485) is a master/slave interface with the
protective device as the slave device. It is properly developed by NR.
The protective device conforms to compatibility level 3.
The following IEC60870-5-103 facilities are supported by this interface:

Initialization (reset)

Time synchronization

Event record extraction

General interrogation

General commands

Disturbance records
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10.3.1 Physical Connection and Link Layer
Two EIA RS-485 standardized ports are available for IEC60870-5-103 in this protective device.
The transmission speed is optional: 4800 bit/s, 9600 bit/s, 19200 bit/s or 38400 bit/s.
The link layer strictly abides by the rules defined in the IEC60870-5-103.
10.3.2 Initialization
Whenever the protective device has been powered up, or if the communication parameters have
been changed, a reset command is required to initialize the communications. The protective
device will respond to either of the two reset commands (Reset CU or Reset FCB), the difference
is that the Reset CU will clear any unsent messages in the transmit buffer.
The protective device will respond to the reset command with an identification message ASDU 5,
the COT (Cause Of Transmission) of this response will be either Reset CU or Reset FCB
depending on the nature of the reset command.
10.3.3 Time Synchronization
The protective device time and date can be set using the time synchronization feature of the
IEC60870-5-103 protocol. The protective device will correct for the transmission delay as specified
in IEC60870-5-103. If the time synchronization message is sent as a send/confirm message then
the protective device will respond with a confirmation. Whether the time-synchronization message
is sent as a send confirmation or a broadcast (send/no reply) message, a time synchronization
class 1 event will be generated/produced.
If the protective device clock is synchronized using the IRIG-B input then it will not be possible to
set the protective device time using the IEC60870-5-103 interface. An attempt to set the time via
the interface will cause the protective device to create an event with the current date and time
taken from the IRIG-B synchronized internal clock.
10.3.4 Spontaneous Events
Events are categorized using the following information:

Type identification (TYP)

Function type (FUN)

Information number (INF)
Messages sent to substation automation system are grouped according to IEC60870-5-103
protocol. Operating elements are sent by ASDU2 (time-tagged message with relative time), and
status of binary signal and alarm element are sent by ASDU1 (time-tagged message). The cause
of transmission (COT) of these responses is 1.
All spontaneous events can be gained by printing, implementing submenu “IEC103 Info” in the
menu “Print”.
10.3.5 General Interrogation
The GI can be used to read the status of the relay, the function numbers, and information numbers
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10 Communication
that will be returned during the GI cycle. The GI cycle strictly abides by the rules defined in the
IEC60870-5-103.
Refer the IEC60870-5-103 standard can get the enough details about general interrogation.
10.3.6 General Service
The generic functions can be used to read the setting and protection measurement of the
protective device, and modify the setting. Two supported type identifications are ASDU 21 and
ASDU 10. For more details about generic functions, see the IEC60870-5-103 standard.
All general classification service group numbers can be gained by printing, implementing submenu
“IEC103 Info” in the menu “Print”.
10.3.7 Disturbance Records
This protective device can store up to eight disturbance records in its memory. A pickup of the fault
detector or an operation of the relay can make the protective device store the disturbance records.
The disturbance records are stored in uncompressed format and can be extracted using the
standard mechanisms described in IEC60870-5-103.
All channel numbers (ACC) of disturbance data can be gained by printing, implementing submenu
“IEC103 Info” in the menu “Print”.
10.4 Messages Description for IEC61850 Protocol
10.4.1 Overview
The IEC 61850 standard is the result of years of work by electric utilities and vendors of electronic
equipment to produce standardized communications systems. IEC 61850 is a series of standards
describing client/server and peer-to-peer communications, substation design and configuration,
testing, environmental and project standards. The complete set includes:

IEC 61850-1: Introduction and overview

IEC 61850-2: Glossary

IEC 61850-3: General requirements

IEC 61850-4: System and project management

IEC 61850-5: Communications and requirements for functions and device models



IEC 61850-6: Configuration description language for communication in electrical substations
related to IEDs
IEC 61850-7-1: Basic communication structure for substation and feeder equipment–
Principles and models
IEC 61850-7-2: Basic communication structure for substation and feeder equipment - Abstract
communication service interface (ACSI)
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10 Communication


IEC 61850-7-3: Basic communication structure for substation and feeder equipment–
Common data classes
IEC 61850-7-4: Basic communication structure for substation and feeder equipment–
Compatible logical node classes and data classes

IEC 61850-8-1: Specific Communication Service Mapping (SCSM) – Mappings to MMS (ISO
9506-1 and ISO 9506-2) and to ISO/IEC 8802-3

IEC 61850-9-1: Specific Communication Service Mapping (SCSM) – Sampled values over
serial unidirectional multidrop point to point link

IEC 61850-9-2: Specific Communication Service Mapping (SCSM) – Sampled values over
ISO/IEC 8802-3

IEC 61850-10: Conformance testing
These documents can be obtained from the IEC (http://www.iec.ch). It is strongly recommended
that all those involved with any IEC 61850 implementation obtain this document set.
10.4.2 Communication profiles
The PCS-900 series relay supports IEC 61850 server services over TCP/IP communication
protocol stacks. The TCP/IP profile requires the PCS-900 series to have an IP address to establish
communications. These addresses are located in the menu “Settings→Device Setup→Comm
Settings”.
1.
MMS protocol
IEC 61850 specifies the use of the Manufacturing Message Specification (MMS) at the upper
(application) layer for transfer of real-time data. This protocol has been in existence for a number
of years and provides a set of services suitable for the transfer of data within a substation LAN
environment. Actual IEC 61850-7-2 abstract services and objects are mapped to MMS protocol
services in IEC61850-8-1.
2.
Client/server
This is a connection-oriented type of communication. The connection is initiated by the client, and
communication activity is controlled by the client. IEC61850 clients are often substation computers
running HMI programs or SOE logging software. Servers are usually substation equipment such
as protection relays, meters, RTUs, transformer, tap changers, or bay controllers.
3.
Peer-to-peer
This is a non-connection-oriented, high speed type of communication usually between substation
equipment, such as protection relays, intelligent terminal. GOOSE is the method of peer-to-peer
communication.
4.
Substation configuration language (SCL)
A substation configuration language is a number of files used to describe IED and communication
system realized according to IEC 61850-5 and IEC 61850-7. Each configured device has an IED
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Capability Description (ICD) file and a Configured IED Description (CID) file. The substation single
line information is stored in a System Specification Description (SSD) file. The entire substation
configuration is stored in a Substation Configuration Description (SCD) file. The SCD file is the
combination of the individual ICD files and the SSD file, moreover, add communication system
parameters (MMS, GOOSE, control block, SV control block) and the connection relationship of
GOOSE and SV to SCD file.
10.4.3 Server data organization
IEC61850 defines an object-oriented approach to data and services. An IEC61850 physical device
can contain one or more logical device(s) (for proxy). Each logical device can contain many logical
nodes. Each logical node can contain many data objects. Each data object is composed of data
attributes and data attribute components. Services are available at each level for performing
various functions, such as reading, writing, control commands, and reporting.
Each IED represents one IEC61850 physical device. The physical device contains one or more
logical device(s), and the logical device contains many logical nodes. The logical node LPHD
contains information about the IED physical device. The logical node LLN0 contains information
about the IED logical device.
10.4.3.1 Digital status values
The GGIO logical node is available in the PCS-900 series relays to provide access to digital status
points (including general I/O inputs and warnings) and associated timestamps and quality flags.
The data content must be configured before the data can be used. GGIO provides digital status
points for access by clients. It is intended that clients use GGIO in order to access digital status
values from the PCS-900 series relays. Clients can utilize the IEC61850 buffered reporting
features available from GGIO in order to build sequence of events (SOE) logs and HMI display
screens. Buffered reporting should generally be used for SOE logs since the buffering capability
reduces the chances of missing data state changes. All needed status data objects are transmitted
to HMI clients via buffered reporting, and the corresponding buffered reporting control block
(BRCB) is defined in LLN0.
10.4.3.2 Analog values
Most of analog measured values are available through the MMXU logical nodes, and metering
values in MMTR, the else in MMXN, MSQI and so on. Each MMXU logical node provides data
from a IED current/voltage “source”. There is one MMXU available for each configurable source.
MMXU1 provides data from CT/VT source 1(usually for protection purpose), and MMXU2 provides
data from CT/VT source 2 (usually for monitor and display purpose). All these analog data objects
are transmitted to HMI clients via unbuffered reporting periodically, and the corresponding
unbuffered reporting control block (URCB) is defined in LLN0. MMXUx logical nodes provide the
following data for each source:

MMXU.MX.Hz: frequency

MMXU.MX.PPV.phsAB: phase AB voltage magnitude and angle

MMXU.MX.PPV.phsBC: phase BC voltage magnitude and angle
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
MMXU.MX.PPV.phsCA: Phase CA voltage magnitude and angle

MMXU.MX.PhV.phsA: phase AG voltage magnitude and angle

MMXU.MX.PhV.phsB: phase BG voltage magnitude and angle

MMXU.MX.PhV.phsC: phase CG voltage magnitude and angle

MMXU.MX.A.phsA: phase A current magnitude and angle

MMXU.MX.A.phsB: phase B current magnitude and angle

MMXU.MX.A.phsC: phase C current magnitude and angle
10.4.3.3 Protection logical nodes
The following list describes the protection elements for PCS-902 series relays. The specified relay
will contain a subset of protection elements from this list.

PDIS: Phase-to-phase distance, phase-to-ground distance and SOTF distance

PTUC: Undercurrent

PTOC: Phase overcurrent, zero-sequence overcurrent and overcurrent when VT circuit failure

PTTR: Thermal overload

PTUV: Undervoltage

PTOV: Overvoltage and auxiliary overvoltage

PTOF: Overfrequency

PTUF: Underfrequency

PSCH: Protection scheme

RBRF:Breaker failure

RPSB: Power swing detection/blocking

RREC: Automatic reclosing

RSYN: Synchronism-check

RFLO: Fault location
The protection elements listed above contain start (pickup) and operate flags, instead of any
element has its own start (pickup) flag separately, all the elements share a common start (pickup)
flags “PTRC.ST.Str.general”. The operate flag for PTOC1 is “PTOC1.ST.Op.general”. For
PCS-902 series relays protection elements, these flags take their values from related module for
the corresponding element. Similar to digital status values, the protection trip information is
reported via BRCB, and BRCB also locates in LLN0.
10.4.3.4 LLN0 and other logical nodes
Logical node LLN0 is essential for an IEC61850 based IED. This LN shall be used to address
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common issues for Logical Devices. Most of the public services, the common settings, control
values and some device oriented data objects are available here. The public services may be
BRCB, URCB and GSE control blocks and similar global defines for the whole device; the
common settings include all the setting items of communication settings. System settings and
some of the protection setting items, which can be configured to two or more protection elements
(logical nodes). In LLN0, the item Loc is a device control object, this Do item indicates the local
operation for complete logical device, when it is true, all the remote control commands to the IED
will be blocked and those commands make effective until the item Loc is changed to false. In
PCS-900 series relays, besides the logical nodes we describe above, there are some other logical
nodes below in the IEDs:




MMXU: This LN shall be used to acquire values from CTs and VTs and calculate measurands
such as r.m.s. values for current and voltage or power flows out of the acquired voltage and
current samples. These values are normally used for operational purposes such as power
flow supervision and management, screen displays, state estimation, etc. The requested
accuracy for these functions has to be provided.
LPHD: Physical device information, the logical node to model common issues for physical
device.
PTRC: Protection trip conditioning, it shall be used to connect the “operate” outputs of one or
more protection functions to a common “trip” to be transmitted to XCBR. In addition or
alternatively, any combination of “operate” outputs of protection functions may be combined to
a new “operate” of PTRC.
RDRE: Disturbance recorder function. It triggers the fault wave recorder and its output refers
to the “IEEE Standard Format for Transient Data Exchange (COMTRADE) for Power System”
(IEC 60255-24). All enabled channels are included in the recording, independently of the
trigger mode.
10.4.4 Server features and configuration
10.4.4.1 Buffered/unbuffered reporting
IEC61850 buffered and unbuffered reporting control blocks locate in LLN0, they can be configured
to transmit information of protection trip information (in the Protection logical nodes), binary status
values (in GGIO) and analog measured/calculated values (in MMXU, MMTR and MSQI). The
reporting control blocks can be configured in CID files, and then be sent to the IED via an
IEC61850 client. The following items can be configured.

TrgOps: Trigger options.
The following bits are supported by the PCS-900 series relays:
－ Bit 1: Data-change
－ Bit 4: Integrity
－ Bit 5: General interrogation

OptFlds: Option Fields.
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The following bits are supported by the PCS-900 series relays:
－ Bit 1: Sequence-number
－ Bit 2: Report-time-stamp
－ Bit 3: Reason-for-inclusion
－ Bit 4: Data-set-name
－ Bit 5: Data-reference
－ Bit 7: EntryID (for buffered reports only)
－ Bit 8: Conf-revision
－ Bit 9: Segmentation

IntgPd: Integrity period.
10.4.4.2 File transfer
MMS file services are supported to allow transfer of oscillography, event record or other files from
a PCS-900 series relay.
10.4.4.3 Timestamps
The Universal Time Coordinated(UTC for short) timestamp associated with all IEC61850 data
items represents the lastest change time of either the value or quality flags of the data item.
10.4.4.4 Logical node name prefixes
IEC61850 specifies that each logical node can have a name with a total length of 11 characters.
The name is composed of:

A five or six-character name prefix.

A four-character standard name (for example, MMXU, GGIO, PIOC, etc.).

A one or two-character instantiation index.
Complete names are of the form xxxxxxPTOC1, where the xxxxxx character string is configurable.
Details regarding the logical node naming rules are given in IEC61850 parts 6 and 7-2. It is
recommended that a consistent naming convention be used for an entire substation project.
10.4.4.5 GOOSE services
IEC61850 specifies the type of broadcast data transfer services: Generic Object Oriented
Substation Events (GOOSE). IEC61850 GOOSE services provide virtual LAN (VLAN) support,
Ethernet priority tagging, and Ether-type Application ID configuration. The support for VLANs and
priority tagging allows for the optimization of Ethernet network traffic. GOOSE messages can be
given a higher priority than standard Ethernet traffic, and they can be separated onto specific
VLANs. Devices that transmit GOOSE messages also function as servers. Each GOOSE
publisher contains a “GOOSE control block” to configure and control the transmission.
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The GOOSE transmission (including subscribing and publishing) is controlled by GOOSE link
settings in device.
The PCS-900 series relays support IEC61850 Generic Object Oriented Substation Event (GOOSE)
communication. All GOOSE messages contain IEC61850 data collected into a dataset. It is this
dataset that is transferred using GOOSE message services. The GOOSE related dataset is
configured in the CID file and it is recommended that the fixed GOOSE be used for
implementations that require GOOSE data transfer between PCS-900 series relays.
IEC61850 GOOSE messaging contains a number of configurable parameters, all of which must be
correct to achieve the successful transfer of data. It is critical that the configured datasets at the
transmission and reception devices are an exact match in terms of data structure, and that the
GOOSE addresses and name strings match exactly.
The general steps required for transmission configuration are:
1.
Configure the data.
2.
Configure the transmission dataset.
3.
Configure the GOOSE service settings.
The general steps required for reception configuration are:
1.
Configure the data.
2.
Configure the GOOSE service settings
3.
Configure the reception data
10.4.5 ACSI Conformance
10.4.5.1 ACSI basic conformance statement
Services
Client
Server
PCS-900 Series
B11
Server side (of Two-party Application-Association)
－
C1
Y
B12
Client side (of Two-party Application-Association)
C1
－
N
Client-Server Roles
SCSMS Supported
B21
SCSM: IEC 61850-8-1 used
Y
Y
Y
B22
SCSM: IEC 61850-9-1 used
N
N
N
B23
SCSM: IEC 61850-9-2 used
Y
N
Y
B24
SCSM: other
N
N
N
Generic Substation Event Model (GSE)
B31
Publisher side
－
O
Y
B32
Subscriber side
O
－
Y
Transmission Of Sampled Value Model (SVC)
B41
Publisher side
－
O
N
B42
Subscriber side
O
－
N
Where:
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C1: Shall be "M" if support for LOGICAL-DEVICE model has been declared
O: Optional
M: Mandatory
Y:
Supported by PCS-900 series relays
N:
Currently not supported by PCS-900 series relays
10.4.5.2 ACSI models conformance statement
Services
Client
Server
PCS-900 Series
M1
Logical device
C2
C2
Y
M2
Logical node
C3
C3
Y
M3
Data
C4
C4
Y
M4
Data set
C5
C5
Y
M5
Substitution
O
O
Y
M6
Setting group control
O
O
Y
M7
Buffered report control
O
O
Y
M7-1
sequence-number
Y
Y
Y
M7-2
report-time-stamp
Y
Y
Y
M7-3
reason-for-inclusion
Y
Y
Y
M7-4
data-set-name
Y
Y
Y
M7-5
data-reference
Y
Y
Y
M7-6
buffer-overflow
Y
Y
N
M7-7
entryID
Y
Y
Y
M7-8
BufTm
N
N
N
M7-9
IntgPd
Y
Y
Y
M7-10
GI
Y
Y
Y
M8
Unbuffered report control
M
M
Y
M8-1
sequence-number
Y
Y
Y
M8-2
report-time-stamp
Y
Y
Y
M8-3
reason-for-inclusion
Y
Y
Y
M8-4
data-set-name
Y
Y
Y
M8-5
data-reference
Y
Y
Y
M8-6
BufTm
N
N
N
M8-7
IntgPd
N
Y
Y
M9
Log control
O
O
N
M9-1
IntgPd
N
N
N
M10
Log
O
O
N
M12
GOOSE
O
O
Y
M13
GSSE
O
O
N
Reporting
Logging
GSE
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10 Communication
M14
Multicast SVC
O
O
N
M15
Unicast SVC
O
O
N
M16
Time
M
M
Y
M17
File transfer
O
O
Y
Where:
C2: Shall be "M" if support for LOGICAL-NODE model has been declared
C3: Shall be "M" if support for DATA model has been declared
C4: Shall be "M" if support for DATA-SET, Substitution, Report, Log Control, or Time models has
been declared
C5: Shall be "M" if support for Report, GSE, or SMV models has been declared
M: Mandatory
Y:
Supported by PCS-900 series relays
N:
Currently not supported by PCS-900 series relays
10.4.5.3 ACSI Services conformance statement
Services
Server/Publisher
PCS-902
M
Y
Server
S1
ServerDirectory
Application association
S2
Associate
M
Y
S3
Abort
M
Y
S4
Release
M
Y
M
Y
Logical device
S5
LogicalDeviceDirectory
Logical node
S6
LogicalNodeDirectory
M
Y
S7
GetAllDataValues
M
Y
S8
GetDataValues
M
Y
S9
SetDataValues
M
Y
S10
GetDataDirectory
M
Y
S11
GetDataDefinition
M
Y
S12
GetDataSetValues
M
Y
S13
SetDataSetValues
O
Y
S14
CreateDataSet
O
N
S15
DeleteDataSet
O
N
S16
GetDataSetDirectory
M
Y
Data
Data set
Substitution
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S17
SetDataValues
M
Y
Setting group control
S18
SelectActiveSG
M/O
Y
S19
SelectEditSG
M/O
Y
S20
SetSGValuess
M/O
Y
S21
ConfirmEditSGValues
M/O
Y
S22
GetSGValues
M/O
Y
S23
GetSGCBValues
M/O
Y
Reporting
Buffered report control block
S24
Report
M
Y
S24-1
data-change
M
Y
S24-2
qchg-change
M
N
S24-3
data-update
M
N
S25
GetBRCBValues
M
Y
S26
SetBRCBValues
M
Y
Unbuffered report control block
S27
Report
M
Y
S27-1
data-change
M
Y
S27-2
qchg-change
M
N
S27-3
data-update
M
N
S28
GetURCBValues
M
Y
S29
SetURCBValues
M
Y
Logging
Log control block
S30
GetLCBValues
O
N
S31
SetLCBValues
O
N
S32
QueryLogByTime
O
N
S33
QueryLogAfter
O
N
S34
GetLogStatusValues
O
N
Log
Generic substation event model (GSE)
GOOSE control block
S35
SendGOOSEMessage
M
Y
S36
GetGoReference
O
Y
S37
GetGOOSEElementNumber
O
N
S38
GetGoCBValues
M
Y
S39
SetGoCBValuess
M
N
S51
Select
O
N
S52
SelectWithValue
M
Y
S53
Cancel
M
Y
Control
PCS-902 Line Distance Relay
10-15
Date: 2011-07-06
10 Communication
S54
Operate
M
Y
S55
Command-Termination
O
Y
S56
TimeActivated-Operate
O
N
File transfer
S57
GetFile
M/O
Y
S58
SetFile
O
N
S59
DeleteFile
O
N
S60
GetFileAttributeValues
M/O
Y
M
Y
Time
SNTP
10.4.6 Logical Nodes
10.4.6.1 Logical Nodes Table
The PCS-902 series relays support IEC61850 logical nodes as indicated in the following table.
Note that the actual instantiation of each logical node is determined by the product order code.
Nodes
PCS-902 Series
L: System Logical Nodes
LPHD: Physical device information
YES
LLN0: Logical node zero
YES
P: Logical Nodes For Protection Functions
PDIF: Differential
－
PDIR: Direction comparison
－
PDIS: Distance
YES
PDOP: Directional overpower
－
PDUP: Directional underpower
－
PFRC: Rate of change of frequency
－
PHAR: Harmonic restraint
－
PHIZ: Ground detector
－
PIOC: Instantaneous overcurrent
－
PMRI: Motor restart inhibition
－
PMSS: Motor starting time supervision
－
POPF: Over power factor
－
PPAM: Phase angle measuring
－
PSCH: Protection scheme
YES
PSDE: Sensitive directional earth fault
－
PTEF: Transient earth fault
－
PTOC: Time overcurrent
YES
PTOF: Overfrequency
YES
PTOV: Overvoltage
YES
PTRC: Protection trip conditioning
YES
PTTR: Thermal overload
YES
10-16
PCS-902 Line Distance Relay
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10 Communication
PTUC: Undercurrent
－
PTUV: Undervoltage
YES
PUPF: Underpower factor
－
PTUF: Underfrequency
YES
PVOC: Voltage controlled time overcurrent
－
PVPH: Volts per Hz
－
PZSU: Zero speed or underspeed
－
R: Logical Nodes For Protection Related Functions
RDRE: Disturbance recorder function
YES
RADR: Disturbance recorder channel analogue
－
RBDR: Disturbance recorder channel binary
－
RDRS: Disturbance record handling
－
RBRF: Breaker failure
YES
RDIR: Directional element
－
RFLO: Fault locator
YES
RPSB: Power swing detection/blocking
YES
RREC: Autoreclosing
YES
RSYN: Synchronism-check or synchronizing
YES
C: Logical Nodes For Control
CALH: Alarm handling
－
CCGR: Cooling group control
－
CILO: Interlocking
－
CPOW: Point-on-wave switching
－
CSWI: Switch controller
－
G: Logical Nodes For Generic References
GAPC: Generic automatic process control
YES
GGIO: Generic process I/O
YES
GSAL: Generic security application
－
I: Logical Nodes For Interfacing And Archiving
IARC: Archiving
－
IHMI: Human machine interface
－
ITCI: Telecontrol interface
－
ITMI: Telemonitoring interface
－
A: Logical Nodes For Automatic Control
ANCR: Neutral current regulator
－
ARCO: Reactive power control
－
ATCC: Automatic tap changer controller
－
AVCO: Voltage control
－
M: Logical Nodes For Metering And Measurement
MDIF: Differential measurements
－
MHAI: Harmonics or interharmonics
－
MHAN: Non phase related harmonics or interharmonic
－
PCS-902 Line Distance Relay
10-17
Date: 2011-07-06
10 Communication
MMTR: Metering
－
MMXN: Non phase related measurement
－
MMXU: Measurement
YES
MSQI: Sequence and imbalance
－
MSTA: Metering statistics
－
S: Logical Nodes For Sensors And Monitoring
SARC: Monitoring and diagnostics for arcs
－
SIMG: Insulation medium supervision (gas)
－
SIML: Insulation medium supervision (liquid)
－
SPDC: Monitoring and diagnostics for partial discharges
－
X: Logical Nodes For Switchgear
TCTR: Current transformer
YES
TVTR: Voltage transformer
YES
Y: Logical Nodes For Power Transformers
YEFN: Earth fault neutralizer (Peterson coil)
－
YLTC: Tap changer
－
YPSH: Power shunt
－
YPTR: Power transformer
－
Z: Logical Nodes For Further Power System Equipment
ZAXN: Auxiliary network
－
ZBAT: Battery
－
ZBSH: Bushing
－
ZCAB: Power cable
－
ZCAP: Capacitor bank
－
ZCON: Converter
－
ZGEN: Generator
－
ZGIL: Gas insulated line
－
ZLIN: Power overhead line
－
ZMOT: Motor
－
ZREA: Reactor
－
ZRRC: Rotating reactive component
－
ZSAR: Surge arrestor
－
ZTCF: Thyristor controlled frequency converter
－
ZTRC: Thyristor controlled reactive component
－
10.5 DNP3.0 Interface
10.5.1 Overview
The descriptions given here are intended to accompany this relay. The DNP3.0 protocol is not
described here; please refer to the DNP3.0 protocol standard for the details about the DNP3.0
implementation. This manual only specifies which objects, variations and qualifiers are supported
in this relay, and also specifies what data is available from this relay via DNP3.0.
10-18
PCS-902 Line Distance Relay
Date: 2011-07-06
10 Communication
The relay operates as a DNP3.0 slave and supports subset level 2 of the protocol, plus some of
the features from level 3. The DNP3.0 communication uses the Ethernet ports at the rear side of
this relay. The Ethernet ports are optional: electrical or optical.
10.5.2 Link Layer Functions
Please see the DNP3.0 protocol standard for the details about the linker layer functions.
10.5.3 Transport Functions
Please see the DNP3.0 protocol standard for the details about the transport functions.
10.5.4 Application Layer Functions
10.5.4.1 Time Synchronization
1.
2.
3.
Time delay measurement
Master/Slave
Function Code
Object
Variation
Qualifier
Master
0x17
-
-
-
Slave
0x81
0x34
0x02
0x07
Master/Slave
Function Code
Object
Variation
Qualifier
Master
0x01
0x34
0x00, 0x01
0x07-
Slave
0x81
0x32
0x01
0x07
Read time of device
Write time of device
Master/Slave
Function Code
Object
Variation
Qualifier
Master
0x02
0x32
0x01
0x00, 0x01, 0x07, 0x08
Slave
0x81
-
-
-
10.5.4.2 Supported Writing Functions
1.
Write time of device
See Section 10.5.4.1 for the details.
2.
Reset the CU (Reset IIN bit7)
Master/Slave
Function Code
Object
Variation
Qualifier
Master
0x02
0x50
0x01
0x00, 0x01
Slave
0x81
-
-
-
10.5.4.3 Supported Reading Functions
1.
2.
Supported qualifiers
Master Qualifier
0x00
0x01
0x06
0x07
0x08
Slave Qualifier
0x00
0x01
0x01
0x07
0x08
Supported objects and variations
PCS-902 Line Distance Relay
10-19
Date: 2011-07-06
10 Communication

Object 1, Binary inputs
Master Variation
0x00
0x01
0x02
Slave Variation
0x02
0x01
0x02
The protection operation signals, alarm signals and binary input state change signals are
transported respectively according to the variation sequence in above table.

Object 2, SOE
Master Variation
0x00
0x01
0x02
0x03
Slave Variation
0x02
0x01
0x02
0x03
If the master qualifier is “0x07”, the slave responsive qualifier is “0x27”; and if the master
qualifier is “0x01”, “0x06” or “0x08”, the slave responsive qualifier is “0x28”.

Object 30, Analog inputs
Master Variation
0x00
0x01
0x02
0x03
0x04
Slave Variation
0x01
0x01
0x02
0x03
0x04
The measurement values are transported firstly, and then the measurement values are
transported.

Object 40, Analog outputs
Master Variation
0x00
0x01
0x02
Slave Variation
0x01
0x01
0x02
The protection settings are transported in this object.

Object 50, Time Synchronization
See Section 10.5.4.1 for the details.
3.
Class 0 data request
The master adopts the “Object 60” for the Class 0 data request and the variation is “0x01”.
The slave responds with the above mentioned “Object 1”, “Object 30” and “Object 40” (see
“Supported objects and variations” in Section 10.5.4.3).
4.
Class 1 data request
The master adopts the “Object 60” for the Class 1 data request and the variation is “0x02”.
The slave responds with the above mentioned “Object 2” (see “Supported objects and
variations” in Section 10.5.4.3).
5.
Multiple object request
The master adopts the “Object 60” for the multiple object request and the variation is “0x01”,
“0x02”, “0x03” and “0x04”.
The slave responds with the above mentioned “Object 1”, “Object 2”, “Object 30” and “Object
10-20
PCS-902 Line Distance Relay
Date: 2011-07-06
10 Communication
40” (see “Supported objects and variations” in Section 10.5.4.3).
10.5.4.4 Remote Control Functions
The function code 0x03 and 0x04 are supported in this relay. The function code 0x03 is for the
remote control with selection; and the function code 0x04 is for the remote control with execution.
The selection operation must be executed before the execution operation, and the single point
control object can be supported to this relay.
Master Qualifier
0x17
0x27
0x18
0x28
Slave Qualifier
0x17
0x27
0x18
0x28
The “Object 12” is for the remote control functions.
Master Variation
0x01
Slave Variation
0x01
Control Code
0x01: closing
0x10: tripping
PCS-902 Line Distance Relay
10-21
Date: 2011-07-06
10 Communication
10-22
PCS-902 Line Distance Relay
Date: 2011-07-06
11 Installation
11 Installation
Table of Contents
11 Installation .................................................................................... 11-a
11.1 Overview ....................................................................................................... 11-1
11.2 Safety Information ........................................................................................ 11-1
11.3 Checking Shipment ...................................................................................... 11-2
11.4 Material and Tools Required........................................................................ 11-2
11.5 Device Location and Ambient Conditions.................................................. 11-2
11.6 Mechanical Installation ................................................................................ 11-3
11.7 Electrical Installation and Wiring ................................................................ 11-4
11.7.1 Grounding Guidelines .................................................................................................... 11-4
11.7.2 Cubicle Grounding ......................................................................................................... 11-5
11.7.3 Ground Connection on the Device ................................................................................. 11-6
11.7.4 Grounding Strips and their Installation............................................................................ 11-6
11.7.5 Guidelines for Wiring ...................................................................................................... 11-7
11.7.6 Wiring for Electrical Cables ............................................................................................ 11-7
List of Figures
Figure 11.6-1 Dimensions of PCS-902 ................................................................................... 11-3
Figure 11.6-2 panel cut-out of PCS-902 ................................................................................. 11-4
Figure 11.6-3 Demonstration of plugging a board into its corresponding slot .................. 11-4
Figure 11.7-1 Cubicle grounding system ............................................................................... 11-6
Figure 11.7-2 Ground terminal of this relay ........................................................................... 11-6
Figure 11.7-3 Ground strip and termination .......................................................................... 11-7
Figure 11.7-4 Glancing demo about the wiring for electrical cables ................................... 11-7
PCS-902 Line Distance Relay
11-a
Date: 2011-02-28
11 Installation
11-b
PCS-902 Line Distance Relay
Date: 2011-02-28
11 Installation
11.1 Overview
The device must be shipped, stored and installed with the greatest care.
Choose the place of installation such that the communication interface and the controls on the
front of the device are easily accessible.
Air must circulate freely around the equipment. Observe all the requirements regarding place of
installation and ambient conditions given in this instruction manual.
Take care that the external wiring is properly brought into the equipment and terminated correctly
and pay special attention to grounding. Strictly observe the corresponding guidelines contained in
this section.
11.2 Safety Information
Modules and units may only be replaced by correspondingly trained personnel. Always observe
the basic precautions to avoid damage due to electrostatic discharge when handling the
equipment.
In certain cases, the settings have to be configured according to the demands of the engineering
configuration after replacement. It is therefore assumed that the personnel who replace modules
and units are familiar with the use of the operator program on the service PC.
DANGER!
Only insert or withdraw the PWR module while the power supply is switched off. To this end,
disconnect the power supply cable that connects with the PWR module.
WARNING!
Only insert or withdraw other modules while the power supply is switched off.
WARNING!
The modules may only be inserted in the slots designated in Section 6.2. Components can
be damaged or destroyed by inserting boards in the wrong slots.
DANGER!
Improper handling of the equipment can cause damage or an incorrect response of the
equipment itself or the primary plant.
WARNING!
Industry packs and ribbon cables may only be replaced or the positions of jumpers be
changed on a workbench appropriately designed for working on electronic equipment. The
PCS-902 Line Distance Relay
11-1
Date: 2011-02-28
11 Installation
modules, bus backplanes are sensitive to electrostatic discharge when not in the unit's
housing.
The basic precautions to guard against electrostatic discharge are as follows:




Should boards have to be removed from this relay installed in a grounded cubicle in an HV
switchgear installation, please discharge yourself by touching station ground (the cubicle)
beforehand.
Only hold electronic boards at the edges, taking care not to touch the components.
Only works on boards that have been removed from the cubicle on a workbench designed for
electronic equipment and wear a grounded wristband. Do not wear a grounded wristband,
however, while inserting or withdrawing units.
Always store and ship the electronic boards in their original packing. Place electronic parts in
electrostatic screened packing materials.
11.3 Checking Shipment
Check that the consignment is complete immediately upon receipt. Notify the nearest NR
Company or agent, should departures from the delivery note, the shipping papers or the order be
found.
Visually inspect all the material when unpacking it. When there is evidence of transport damage,
lodge a claim immediately in writing with the last carrier and notify the nearest NR Company or
agent.
If the equipment is not going to be installed immediately, store all the parts in their original packing
in a clean dry place at a moderate temperature. The humidity at a maximum temperature and the
permissible storage temperature range in dry air are listed in Chapter “Technical Data”.
11.4 Material and Tools Required
The necessary mounting kits will be provided, including screws, pincers and assembly
instructions.
A suitable drill and spanners are required to secure the cubicles to the floor using the plugs
provided (if this relay is mounted in cubicles).
11.5 Device Location and Ambient Conditions
The place of installation should permit easy access especially to front of the device, i.e. to the
human machine interface of the equipment.
There should also be free access at the rear of the equipment for additions and replacement of
electronic boards.
Since every piece of technical equipment can be damaged or destroyed by inadmissible ambient
conditions, such as:
11-2
PCS-902 Line Distance Relay
Date: 2011-02-28
11 Installation
1.
The location should not be exposed to excessive air pollution (dust, aggressive substances).
2.
Severe vibration, extreme changes of temperature, surge voltages of high amplitude and
short rise time, high levels of humidity and strong induced magnetic fields should be avoided
as far as possible.
3.
Air must not be allowed to circulate freely around the equipment.
The equipment can in principle be mounted in any attitude, but it is normally mounted vertically
(visibility of markings).
WARNING!
Excessively high temperature can appreciably reduce the operating life of this relay.
11.6 Mechanical Installation
The device adopts IEC standard chassis and is rack with modular structure. It uses an integral
faceplate and plug terminal block on backboard for external connections. PCS-902 series is IEC
4U high and 19” wide. Figure 11.6-1 shows its dimensions and Figure 11.6-2 shows the panel
cut-out.
482.6
465.0
101.6
177.0
2 91
Figure 11.6-1 Dimensions of PCS-902
PCS-902 Line Distance Relay
11-3
Date: 2011-02-28
11 Installation
179.0
101.6
465.0
4-Ф6.8
450.0
Figure 11.6-2 panel cut-out of PCS-902
Note!
It is necessary to leave enough space top and bottom of the cut-out in the cubicle for heat
emission of this relay.
The safety instructions must be abided by when installing the boards, please see Section 11.2 for
the details.
Following figure shows the installation way of a module being plugged into a corresponding slot.
Figure 11.6-3 Demonstration of plugging a board into its corresponding slot
In the case of equipment supplied in cubicles, place the cubicles on the foundations that have
been prepared. Take care while doing so not to jam or otherwise damage any of the cables that
have already been installed. Secure the cubicles to the foundations.
11.7 Electrical Installation and Wiring
11.7.1 Grounding Guidelines
Switching operations in HV installations generate transient over voltages on control signal cables.
There is also a background of electromagnetic RF fields in electrical installations that can induce
11-4
PCS-902 Line Distance Relay
Date: 2011-02-28
11 Installation
spurious currents in the devices themselves or the leads connected to them.
All these influences can influence the operation of electronic apparatus.
On the other hand, electronic apparatus can transmit interference that can disrupt the operation of
other apparatus.
In order to minimize these influences as far as possible, certain standards have to be observed
with respect to grounding, wiring and screening.
Note!
All these precautions can only be effective if the station ground is of good quality.
11.7.2 Cubicle Grounding
The cubicle must be designed and fitted out such that the impedance for RF interference of the
ground path from the electronic device to the cubicle ground terminal is as low as possible.
Metal accessories such as side plates, blanking plates etc., must be effectively connected
surface-to-surface to the grounded frame to ensure a low-impedance path to ground for RF
interference. The contact surfaces must not only conduct well, they must also be non-corroding.
Note!
If the above conditions are not fulfilled, there is a possibility of the cubicle or parts of it
forming a resonant circuit at certain frequencies that would amplify the transmission of
interference by the devices installed and also reduce their immunity to induced interference.
Movable parts of the cubicle such as doors (front and back) or hinged equipment frames must be
effectively grounded to the frame by three braided copper strips (see Figure 11.7-1).
The metal parts of the cubicle housing and the ground rail are interconnected electrically
conducting and corrosion proof. The contact surfaces shall be as large as possible.
Note!
For metallic connections please observe the voltage difference of both materials according
to the electrochemical code.
The cubicle ground rail must be effectively connected to the station ground rail by a grounding strip
(braided copper).
PCS-902 Line Distance Relay
11-5
Date: 2011-02-28
11 Installation
Door or hinged
equipment frame
Cubicle ground
rail close to floor
Braided
copper strip
Station
ground
Conducting
connection
Figure 11.7-1 Cubicle grounding system
11.7.3 Ground Connection on the Device
There is a ground terminal on the rear panel, and the ground braided copper strip can be
connected with it. Take care that the grounding strip is always as short as possible. The main thing
is that the device is only grounded at one point. Grounding loops from unit to unit are not allowed.
There are some ground terminals on some connectors of this relay, and the sign is “GND”. All the
ground terminals are connected in the cabinet of this relay. So, the ground terminal on the rear
panel (see Figure 11.7-2) is the only ground terminal of this device.
Figure 11.7-2 Ground terminal of this relay
11.7.4 Grounding Strips and their Installation
High frequency currents are produced by interference in the ground connections and because of
skin effect at these frequencies, only the surface region of the grounding strips is of consequence.
The grounding strips must therefore be of (preferably tinned) braided copper and not round copper
conductors, as the cross-section of round copper would have to be too large.
Proper terminations must be fitted to both ends (press/pinch fit and tinned) with a hole for bolting
them firmly to the items to be connected.
The surfaces to which the grounding strips are bolted must be electrically conducting and
non-corroding.
11-6
PCS-902 Line Distance Relay
Date: 2011-02-28
11 Installation
The following figure shows the ground strip and termination.
Press/pinch fit
cable terminal
Braided
copper strip
Terminal bolt
Contact surface
Figure 11.7-3 Ground strip and termination
11.7.5 Guidelines for Wiring
There are several types of cables that are used in the connection of this relay: braided copper
cable, serial communication cable etc. Recommendation of each cable:






Grounding: braided copper cable, 2.5mm2 ~ 6.0mm2
Power supply, binary inputs & outputs: brained copper cable, 1.0mm2 ~ 2.5mm2
AC voltage inputs: brained copper cable, 1.0mm2 ~ 2.5mm2
AC current inputs: brained copper cable, 1.5mm2 ~ 4.0mm2
Serial communication: 4-core shielded braided cable
Ethernet communication: 4-pair screened twisted category 5E cable
11.7.6 Wiring for Electrical Cables
A female connector is used for connecting the wires with it, and then a female connector plugs into
a corresponding male connector that is in the front of one board. See Chapter “Hardware” for
further details about the pin defines of these connectors.
The following figure shows the glancing demo about the wiring for the electrical cables.
Tighten
01
02
03
04
05
06
07
08
09
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
01
Figure 11.7-4 Glancing demo about the wiring for electrical cables
PCS-902 Line Distance Relay
11-7
Date: 2011-02-28
11 Installation
DANGER!
Never allow the current transformer (CT) secondary circuit connected to this equipment to
be opened while the primary system is live. Opening the CT circuit will produce a
dangerously high voltage.
11-8
PCS-902 Line Distance Relay
Date: 2011-02-28
12 Commissioning
12 Commissioning
Table of Contents
12 Commissioning ............................................................................ 12-a
12.1 Overview ...................................................................................................... 12-1
12.2 Safety Instructions ...................................................................................... 12-1
12.3 Commission Tools ...................................................................................... 12-2
12.4 Setting Familiarization ................................................................................ 12-2
12.5 Product Checks ........................................................................................... 12-3
12.5.1 With the Relay De-energized ......................................................................................... 12-3
12.5.2 With the Relay Energized............................................................................................... 12-5
12.5.3 Print Fault Report ........................................................................................................... 12-8
12.5.4 On-load Checks ............................................................................................................. 12-8
12.6 Final Checks ................................................................................................ 12-9
PCS-902 Line Distance Relay
12-a
Date: 2011-02-28
12 Commissioning
12-b
PCS-902 Line Distance Relay
Date: 2011-02-28
12 Commissioning
12.1 Overview
This relay is fully numerical in their design, implementing all protection and non-protection
functions in software. The relay employs a high degree of self-checking and in the unlikely event of
a failure, will give an alarm. As a result of this, the commissioning test does not need to be as
extensive as with non-numeric electronic or electro-mechanical relays.
To commission numerical relays, it is only necessary to verify that the hardware is functioning
correctly and the application-specific software settings have been applied to the relay.
Blank commissioning test and setting records are provided at the end of this manual for
completion as required.
Before carrying out any work on the equipment, the user should be familiar with the contents of the
safety and technical data sections and the ratings on the equipment’s rating label.
12.2 Safety Instructions
WARNING!
Hazardous voltages are present in this electrical equipment during operation.
Non-observance of the safety rules can result in severe personal injury or property damage.
WARNING!
Only the qualified personnel shall work on and around this equipment after becoming
thoroughly familiar with all warnings and safety notices of this manual as well as with the
applicable safety regulations.
Particular attention must be drawn to the following:





The earthing screw of the device must be connected solidly to the protective earth conductor
before any other electrical connection is made.
Hazardous voltages can be present on all circuits and components connected to the supply
voltage or to the measuring and test quantities.
Hazardous voltages can be present in the device even after disconnection of the supply
voltage (storage capacitors!)
The limit values stated in the Chapter “Technical Data” must not be exceeded at all, not even
during testing and commissioning.
When testing the device with secondary test equipment, make sure that no other
measurement quantities are connected. Take also into consideration that the trip circuits and
maybe also close commands to the circuit breakers and other primary switches are
disconnected from the device unless expressly stated.
PCS-902 Line Distance Relay
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Date: 2011-02-28
12 Commissioning
DANGER!
Current transformer secondary circuits must have been short-circuited before the current
leads to the device are disconnected.
WARNING!
Primary test may only be carried out by qualified personnel, who are familiar with the
commissioning of protection system, the operation of the plant and safety rules and
regulations (switching, earthing, etc.).
12.3 Commission Tools
Minimum equipment required:





Multifunctional dynamic current and voltage injection test set with interval timer.
Multimeter with suitable AC current range and AC/DC voltage ranges of 0~440V and 0~250V
respectively.
Continuity tester (if not included in the multimeter).
Phase angle meter.
Phase rotation meter.
Note!
Modern test set may contain many of the above features in one unit.
Optional equipment:




An electronic or brushless insulation tester with a DC output not exceeding 500V (for
insulation resistance test when required).
A portable PC, with appropriate software (this enables the rear communications port to be
tested, if this is to be used, and will also save considerable time during commissioning).
EIA RS-485 to EIA RS-232 converter (if EIA RS-485 IEC60870-5-103 port is being tested).
PCS-900 serials dedicated protection tester HELP-2000.
12.4 Setting Familiarization
When commissioning this device for the first time, sufficient time should be allowed to become
familiar with the method by which the settings are applied. A detailed description of the menu
structure of this relay is contained in Chapter “Operation Theory” and Chapter “Settings”.
With the front cover in place all keys are accessible. All menu cells can be read. The LED
indicators and alarms can be reset. Protection or configuration settings can be changed, or fault
12-2
PCS-902 Line Distance Relay
Date: 2011-02-28
12 Commissioning
and event records cleared. However, menu cells will require the appropriate password to be
entered before changes can be made.
Alternatively, if a portable PC is available together with suitable setting software (such as
PCS-9700 SAS software), the menu can be viewed one page at a time to display a full column of
data and text. This PC software also allows settings to be entered more easily, saved to a file on
disk for future reference or printed to produce a setting record. Refer to the PC software user
manual for details. If the software is being used for the first time, allow sufficient time to become
familiar with its operation.
12.5 Product Checks
These product checks cover all aspects of the relay which should be checked to ensure that it has
not been physically damaged prior to commissioning, is functioning correctly and all input quantity
measurements are within the stated tolerances.
If the application-specific settings have been applied to the relay prior to commissioning, it is
advisable to make a copy of the settings so as to allow them restoration later. This could be done
by extracting the settings from the relay itself via printer or manually creating a setting record.
12.5.1 With the Relay De-energized
This relay is fully numerical and the hardware is continuously monitored. Commissioning tests can
be kept to a minimum and need only include hardware tests and conjunctive tests. The function
tests are carried out according to user’s correlative regulations.
The following tests are necessary to ensure the normal operation of the equipment before it is first
put into service.

Hardware tests
These tests are performed for the following hardware to ensure that there is no hardware
defect. Defects of hardware circuits other than the following can be detected by
self-monitoring when the DC power is supplied.




User interfaces test
Binary input circuits and output circuits test
AC input circuits test
Function tests
These tests are performed for the following functions that are fully software-based. Tests of
the protection schemes and fault locator require a dynamic test set.



Measuring elements test
Timers test
Measurement and recording test
PCS-902 Line Distance Relay
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Date: 2011-02-28
12 Commissioning

Conjunctive tests
The tests are performed after the relay is connected with the primary equipment and other
external equipment.


On load test.
Phase sequence check and polarity check.
12.5.1.1 Visual Inspection
After unpacking the product, check for any damage to the relay case. If there is any damage, the
internal module might also have been affected, contact the vendor. The following items listed is
necessary.

Protection panel
Carefully examine the protection panel, protection equipment inside and other parts inside to
see that no physical damage has occurred since installation.
The rated information of other auxiliary protections should be checked to ensure it is correct
for the particular installation.

Panel wiring
Check the conducting wire which is used in the panel to assure that their cross section
meeting the requirement.
Carefully examine the wiring to see that they are no connection failure exists.

Label
Check all the isolator binary inputs, terminal blocks, indicators, switches and push buttons to
make sure that their labels meet the requirements of this project.

Device plug-in modules
Check each plug-in module of the equipments on the panel to make sure that they are well
installed into the equipment without any screw loosened.

Earthing cable
Check whether the earthing cable from the panel terminal block is safely screwed to the panel
steel sheet.

Switch, keypad, isolator binary inputs and push button
Check whether all the switches, equipment keypad, isolator binary inputs and push buttons
work normally and smoothly.
12.5.1.2 Insulation Test (if required)
Insulation resistance tests are only necessary during commissioning if it is required for them to be
done and they have not been performed during installation.
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PCS-902 Line Distance Relay
Date: 2011-02-28
12 Commissioning
Isolate all wiring from the earth and test the isolation with an electronic or brushless insulation
tester at a DC voltage not exceeding 500V, The circuits need to be tested should include:






Voltage transformer circuits
Current transformer circuits
DC power supply
Optic-isolated control inputs
Output contacts
Communication ports
The insulation resistance should be greater than 100MΩ at 500V.
Test method:
To unplug all the terminals sockets of this relay, and do the Insulation resistance test for each
circuit above with an electronic or brushless insulation tester.
On completion of the insulation resistance tests, ensure all external wiring is correctly reconnected
to the protection.
12.5.1.3 External Wiring
Check that the external wiring is correct to the relevant relay diagram and scheme diagram.
Ensure as far as practical that phasing/phase rotation appears to be as expected.
Check the wiring against the schematic diagram for the installation to ensure compliance with the
customer’s normal practice.
12.5.1.4 Auxiliary Power Supply
The relay only can be operated under the auxiliary power supply depending on the relay’s nominal
power supply rating.
The incoming voltage must be within the operating range specified in Chapter “Technical Data”,
before energizing the relay, measure the auxiliary supply to ensure it within the operating range.
Other requirements to the auxiliary power supply are specified in Chapter “Technical Data”. See
this section for further details about the parameters of the power supply.
WARNING!
Energize this relay only if the power supply is within the specified operating ranges in
Chapter “Technical Data”.
12.5.2 With the Relay Energized
The following groups of checks verify that the relay hardware and software is functioning correctly
and should be carried out with the auxiliary supply applied to the relay.
PCS-902 Line Distance Relay
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Date: 2011-02-28
12 Commissioning
The current and voltage transformer connections must remain isolated from the relay for these
checks. The trip circuit should also remain isolated to prevent accidental operation of the
associated circuit breaker.
12.5.2.1 Front Panel LCD Display
Connect the relay to DC power supply correctly and turn the relay on. Check program version and
forming time displayed in command menu to ensure that are corresponding to what ordered.
12.5.2.2 Date and Time
If the time and date is not being maintained by substation automation system, the date and time
should be set manually.
Set the date and time to the correct local time and date using menu item “Clock”.
In the event of the auxiliary supply failing, with a battery fitted on CPU board, the time and date will
be maintained. Therefore when the auxiliary supply is restored the time and date will be correct
and not need to set again.
To test this, remove the auxiliary supply from the relay for approximately 30s. After being
re-energized, the time and date should be correct.
12.5.2.3 Light Emitting Diodes (LEDs)
On power up, the green LED “HEALTHY” should have illuminated and stayed on indicating that
the relay is healthy.
The relay has latched signal relays which remember the state of the trip, auto-reclose when the
relay was last energized from an auxiliary supply. Therefore these indicators may also illuminate
when the auxiliary supply is applied. If any of these LEDs are on then they should be reset before
proceeding with further testing. If the LED successfully reset, the LED goes out. There is no testing
required for that that LED because it is known to be operational.
It is likely that alarms related to voltage transformer supervision will not reset at this stage.
12.5.2.4 Testing HEALTHY and ALARM LEDs
Apply the rated DC power supply and check that the “HEALTHY” LED is lighting in green. We
need to emphasize that the “HEALTHY” LED is always lighting in operation course except that the
equipment find serious errors in it.
Produce one of the abnormal conditions listed in Chapter “Supervision”, the “ALARM” LED will
light in yellow. When abnormal condition reset, the “ALARM” LED extinguishes.
12.5.2.5 Testing AC Current Inputs
This test verified that the accuracy of current measurement is within the acceptable tolerances.
Apply rated current to each current transformer input in turn; checking its magnitude using a
multimeter/test set readout. The corresponding reading can then be checked in the relays menu.
The measurement accuracy of the protection is 2.5% or 0.02In. However, an additional allowance
12-6
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Date: 2011-02-28
12 Commissioning
must be made for the accuracy of the test equipment being used.
Note!
The closing circuit should remain isolated during these checks to prevent accidental
operation of the associated circuit breaker.
Group No.
Item
Input Value
Input Angle
Display Value
Display Angle
Ia
Three-phase current 1
Ib
Ic
Ia
Three-phase current 2
Ib
Ic
Ia
Three-phase current 3
Ib
Ic
Ia
Three-phase current ……
Ib
Ic
12.5.2.6 Testing AC Voltage Inputs
This test verified that the accuracy of voltage measurement is within the acceptable tolerances.
Apply rated voltage to each voltage transformer input in turn; checking its magnitude using a
multimeter/test set readout. The corresponding reading can then be checked in the relays menu.
The measurement accuracy of the relay is 2.5% or 0.1V. However an additional allowance must be
made for the accuracy of the test equipment being used.
Note!
The closing circuit should remain isolated during these checks to prevent accidental
operation of the associated circuit breaker.
Group No.
Item
Input Value
Input Angle
Display Value
Display Angle
Ua
Three-phase voltage 1
Ub
Uc
Ua
Three-phase voltage 2
Ub
Uc
Three-phase voltage 3
Ua
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Date: 2011-02-28
12 Commissioning
Group No.
Item
Input Value
Input Angle
Display Value
Display Angle
Ub
Uc
Ua
Three-phase voltage……
Ub
Uc
12.5.2.7 Testing Binary Inputs
This test checks that all the binary inputs on the equipment are functioning correctly.
The binary inputs should be energized one at a time, see external connection diagrams for
terminal numbers.
Ensure that the voltage applied on the binary input must be within the operating range.
The status of each binary input can be viewed using relay menu. Sign “1” denotes an energized
input and sign “0” denotes a de-energized input.
Terminal No.
Signal Name
BI Status on LCD
Correct?
12.5.3 Print Fault Report
In order to acquire the details of protection operation, it is convenient to print the fault report of
protection device. The printing work can be easily finished when operator presses the print button
on panel of protection device to energize binary input [BI_Print] or operate control menu. What
should be noticed is that only the latest fault report can be printed if operator presses the print
button. A complete fault report includes the content shown as follows.
1) Trip event report
2) Binary input when protection devices start
3) Self-check and the transition of binary input in the process of devices start
4) Fault wave forms compatible with COMTRADE
5) The setting value when the protection device trips
12.5.4 On-load Checks
The objectives of the on-load checks are:



Confirm the external wiring to the current and voltage inputs is correct.
Measure the magnitude of on-load current and voltage (if applicable).
Check the polarity of each current transformer.
12-8
PCS-902 Line Distance Relay
Date: 2011-02-28
12 Commissioning
However, these checks can only be carried out if there are no restrictions preventing the
tenderization of the plant being protected.
Remove all test leads, temporary shorting leads, etc. and replace any external wiring that has
been removed to allow testing.
If it has been necessary to disconnect any of the external wiring from the protection in order to
perform any of the foregoing tests, it should be ensured that all connections are replaced in
accordance with the relevant external connection or scheme diagram. Confirm current and voltage
transformer wiring.
12.6 Final Checks
After the above tests are completed, remove all test or temporary shorting leads, etc. If it has been
necessary to disconnect any of the external wiring from the protection in order to perform the
wiring verification tests, it should be ensured that all connections are replaced in accordance with
the relevant external connection or scheme diagram.
Ensure that the protection has been restored to service.
If the protection is in a new installation or the circuit breaker has just been maintained, the circuit
breaker maintenance and current counters should be zero. If a test block is installed, remove the
test plug and replace the cover so that the protection is put into service.
Ensure that all event records, fault records, disturbance records and alarms have been cleared
and LED’s has been reset before leaving the protection.
PCS-902 Line Distance Relay
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Date: 2011-02-28
12 Commissioning
12-10
PCS-902 Line Distance Relay
Date: 2011-02-28
13 Maintenance
13 Maintenance
Table of Contents
13 Maintenance ................................................................................. 13-a
13.1 Appearance Check ...................................................................................... 13-1
13.2 Failure Tracing And Repair ......................................................................... 13-1
13.3 Replace Failed Modules ............................................................................. 13-1
13.4 Cleaning ....................................................................................................... 13-3
13.5 Storage ......................................................................................................... 13-3
PCS-902 Line Distance Relay
13-a
Date: 2011-02-28
13 Maintenance
13-b
PCS-902 Line Distance Relay
Date: 2011-02-28
13 Maintenance
NR numerical relay PCS-902 is designed to require no special maintenance. All measurement and
signal processing circuit are fully solid state. All input modules are also fully solid state. The output
relays are hermetically sealed.
Since the device is almost completely self-monitored, from the measuring inputs to the output
relays, hardware and software defects are automatically detected and reported. The
self-monitoring ensures the high availability of the device and generally allows for a corrective
rather than preventive maintenance strategy. Therefore, maintenance checks in short intervals are
not required.
Operation of the device is automatically blocked when a hardware failure is detected. If a problem
is detected in the external measuring circuits, the device normally only provides alarm messages.
13.1 Appearance Check
1. The relay case should be clean without any dust stratification. Case cover should be sealed
well. No component has any mechanical damage and distortion, and they should be firmly fixed in
the case. Relay terminals should be in good condition. The keys on the front panel with very good
feeling can be operated flexibly.
2. It is only allowed to plug or withdraw relay board when the supply is reliably switched off.
Never allow the CT secondary circuit connected to this equipment to be opened while the primary
system is live when withdrawing an AC module. Never try to insert or withdraw the relay board
when it is unnecessary.
3. Check weld spots on PCB whether they are well soldered without any rosin joint. All dual
inline components must be well plugged.
13.2 Failure Tracing And Repair
Failures will be detected by automatic supervision or regular testing.
When a failure is detected by supervision, a remote alarm is issued and the failure is indicated on
the front panel with LED indicators and LCD display. It is also recorded in the event record.
Failures detected by supervision are traced by checking the “Superv Events” screen on the LCD.
When a failure is detected during regular testing, confirm the following:

Test circuit connections are correct

Modules are securely inserted in position

Correct DC power voltage is applied

Correct AC inputs are applied

Test procedures comply with those stated in the manual
13.3 Replace Failed Modules
If the failure is identified to be in the relay module and the user has spare modules, the user can
PCS-902 Line Distance Relay
13-1
Date: 2011-02-28
13 Maintenance
recover the protection by replacing the failed modules.
Repair at the site should be limited to module replacement. Maintenance at the component level is
not recommended.
Check that the replacement module has an identical module name (AI, PWR, CPU, SIG, BI, BO,
etc.) and hardware type-form as the removed module. Furthermore, the CPU module replaced
should have the same software version. In addition, the AI and PWR module replaced should have
the same ratings.
The module name is indicated on the top front of the module. The software version is indicated in
LCD menu “Version Info”.
Caution!
When handling a module, take anti-static measures such as wearing an earthed wrist band
and placing modules on an earthed conductive mat. Otherwise, many of the electronic
components could suffer damage. After replacing the CPU module, check the settings.
1)
Replacing a module

Switch off the DC power supply

Disconnect the trip outputs

Short circuit all AC current inputs and disconnect all AC voltage inputs

Unscrew the module.
Warning!
Hazardous voltage can be present in the DC circuit just after switching off the DC power
supply. It takes approximately 30 seconds for the voltage to discharge.
2)
Replacing the Human Machine Interface Module (front panel)

Open the relay front panel

Unplug the ribbon cable on the front panel by pushing the catch outside.

Detach the HMI module from the relay

Attach the replacement module in the reverse procedure.
3)
Replacing the AI, PWR, CPU, BI or BO module

Unscrew the module connector

Unplug the connector from the target module.

Unscrew the module.

Pull out the module
13-2
PCS-902 Line Distance Relay
Date: 2011-02-28
13 Maintenance

Inset the replacement module in the reverser procedure.

After replacing the CPU module, input the application-specific setting values again.
Warning!
Units and modules may only be replaced while the supply is switched off and only by
appropriately trained and qualified personnel. Strictly observe the basic precautions to
guard against electrostatic discharge.
Warning!
When handling a module, take anti-static measures such as wearing an earthed wrist band
and placing modules on an earthed conductive mat. Otherwise, many of the electronic
components could suffer damage. After replacing the CPU module, check the settings.
Danger!
After replacing modules, be sure to check that the same configuration is set as before the
replacement. If this is not the case, there is a danger of the unintended operation of
switchgear taking place or of protections not functioning correctly. Persons may also be
put in danger.
13.4 Cleaning
Before cleaning the relay, ensure that all AC/DC supplies, current transformer connections are
isolated to prevent any chance of an electric shock whilst cleaning. Use a smooth cloth to clean
the front panel. Do not use abrasive material or detergent chemicals.
13.5 Storage
The spare relay or module should be stored in a dry and clean room. Based on IEC standard
60255-1 the storage temperature should be from -40oC to +70oC, but the temperature of from 0oC
to +40oC is recommended for long-term storage.
PCS-902 Line Distance Relay
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Date: 2011-02-28
13 Maintenance
13-4
PCS-902 Line Distance Relay
Date: 2011-02-28
14 Decommissioning and Disposal
14 Decommissioning and Disposal
Table of Contents
14 Decommissioning and Disposal................................................. 14-a
14.1 Decommissioning ....................................................................................... 14-1
14.2 Disposal ....................................................................................................... 14-1
PCS-902 Line Distance Relay
14-a
Date: 2011-02-28
14 Decommissioning and Disposal
14-b
PCS-902 Line Distance Relay
Date: 2011-02-28
14 Decommissioning and Disposal
14.1 Decommissioning
1.
Switching off
To switch off the PCS-902, switch off the external miniature circuit breaker of the power supply.
2.
Disconnecting Cables
Disconnect the cables in accordance with the rules and recommendations made by relational
department.
Danger!
Before disconnecting the power supply cables that connected with the PWR module of the
PCS-902, make sure that the external miniature circuit breaker of the power supply is
switched off.
Danger!
Before disconnecting the cables that are used to connect analog input module with the
primary CTs and VTs, make sure that the circuit breaker for the primary CTs and VTs is
switched off.
3.
Dismantling
The PCS-902 rack may now be removed from the system cubicle, after which the cubicles may
also be removed.
Danger!
When the station is in operation, make sure that there is an adequate safety distance to
live parts, especially as dismantling is often performed by unskilled personnel.
14.2 Disposal
In every country there are companies specialized in the proper disposal of electronic waste.
Note!
Strictly observe all local and national regulations when disposing of the device.
PCS-902 Line Distance Relay
14-1
Date: 2011-02-28
14 Decommissioning and Disposal
14-2
PCS-902 Line Distance Relay
Date: 2011-02-28
15 Manual Version History
15 Manual Version History
In the latest version of the instruction manual, several descriptions on existing features have been
modified.
Manual version and modification history records
Manual Version
Source
R1.00
Software
Date
New
Version
R1.00
R1.00
2011-07-06
R1.01
R1.00
2011-08-18
Description of change
Form the original manual.
Add frequency protection
Add stub overcurrent protection
Add the description about C37.94
Rewrite datas of ambient temperature and humidity range
and binary input
Amend fault detector (FD)
Add load encroachment element
R1.01
R1.02
R1.10
2011-12-23
Delete blinder element
Add broken conductor protection
Amend descriptions of supervision alarms
Add remote control function
Add explanations about that external CT circuit is closed
itself
Rewrite configurable function based on PCS-Explorer
R1.02
R1.03
R1.10
2012-03-15
R1.03
R1.04
R1.10
2012-05-09
R1.04
R1.05
R2.00
Modify remote control function
Add GOOSE alarm signals
Modify setting range of underfrequency protection
Add blocking AR logic
2012-07-02
Add dead zone protection
2012-07-07
Modify logic of power swing blocking releasing
2012-07-07
Modify logic of reclosing failure and success
2012-08-14
Add zone 5 of distance protection
PCS-902 Line Distance Relay
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Date: 2012-08-14
15 Manual Version History
15-2
PCS-902 Line Distance Relay
Date: 2012-08-14