Common-Mode Voltage Reduction for Regenerative AC Drives
Rangarajan M. Tallam#, Carlos D. Rodríguez Valdez*, Russel J. Kerkman#, Gary L. Skibinski# and Richard A. Lukaszewski#
#
Rockwell Automation, Drives Business, 6400 W. Enterprise Drive, Mequon WI 53092
Ph: 262-512-8314, Fax: 262-512-8300, Email: rmtallam@ra.rockwell.com
*
Radyne, 211 W. Boden Street, Milwaukee WI 53207
Ph: 414-481-8360, Fax: 414-481-8303, Email: crodriguez@radyne.com
Abstract— When the conventional space vector PWM
(SVPWM) schemes are applied to regenerative AC drives,
very high neutral to ground voltages are generated at the
motor. This can result in premature failure of the motor
bearings and stator winding insulation to ground. The DC bus
to ground voltage may also be elevated to very high levels,
resulting in failure of various components within the drive.
Popular methods to mitigate these issues include
synchronization of the carrier wave between the rectifier and
inverter and filters at the output of the drive. While
synchronization cannot be achieved in all applications and
presents significant design trade-offs, filters are bulky,
expensive and may not address all issues.
In this paper, common-mode voltage (CMV) and commonmode current (CMC) reduction PWM schemes are
investigated for their application to regenerative AC drives. It
is shown that the CMV can be significantly reduced without
PWM carrier synchronization, and without affecting the
performance of the drive.
the DC bus to ground voltages may be very high and can
cause insulation failure of various components within the
drive, such as insulation of transformers in switched-mode
power supplies and printed circuit boards.
A common solution to mitigate common-mode, reflected
wave and associated issues is to add filters at the output of the
drive. There are several types of filters used – L-R filters, sinewave filters, and common-mode filters with output neutral
connected to the mid-point of the DC link [2-5]. Snubbers may
be added to reduce the peak DC bus to ground voltage. Filters
are bulky, large in size and generally not used unless the
motor cables are very long.
In this paper, CMV and CMC reduction PWM schemes [610] are investigated for their application to fully regenerative
AC drives. It is shown that the CMV can be significantly
reduced without affecting the performance of the drive, and
without the need for PWM synchronization. These results are
demonstrated with experimental tests.
Keywords— PWM, regenerative AC drives, common-mode voltage,
common-mode current, carrier synchronization
I. INTRODUCTION
The schematic of a fully regenerative PWM AC drive is
shown in Fig. 1. Both rectifier and inverter devices are
switched using conventional SVPWM methods. The CMV
generated by various combinations of rectifier and inverter
switching states is shown in Table I. The peak CMV at the
motor terminals equals the DC bus voltage and occurs when
the rectifier and inverter are in complimentary zero states.
This is twice the CMV generated by a non-regenerative drive
and causes significant stress on the stator winding insulation to
ground and the motor bearings.
With PWM synchronization between the rectifier and
inverter [1], the peak CMV drops to 67% of the DC bus
voltage. To reduce the size of the AC line filter, the rectifier
must be switched at high PWM frequency. It is preferred to
switch the inverter at low PWM frequency to avoid de-rating
at low modulation index. Hence, the need for synchronization
presents a design trade-off between size and drive rating. In
applications where several inverters are fed from a common
DC bus, synchronization of PWM may not be possible to
implement.
In a non-regenerative AC drive, capacitors are added from
DC bus to ground for compliance to electro-magnetic
compatibility (EMC) standards, which also help to prevent
oscillations in the DC bus to ground voltage. On regenerative
drives, these capacitors cannot be installed as it causes a large
ground current on an AC feed with grounded neutral. Hence,
978-1-4673-0803-8/12/$31.00 ©2012 IEEE
Fig. 1. Schematic of a regenerative AC motor drive.
Table I. CMV generated by a regenerative AC drive, normalized to
DC bus voltage.
1,3,5
2,4,6
7
8
1,3,5
0
-0.33
-0.67
0.33
2,4,6
0.33
0
-0.33
0.67
7
0.67
0.33
0
1
8
-0.33
-0.67
-1
0
II. COMMON-MODE VOLTAGE AND COMMON-MODE CURRENT
REDUCTION PWM SCHEMES
Of the eight switching states of a two-level converter shown
in Fig. 2, the six active states generate CMV equal to 16% of
the DC bus voltage, while the zero states generate CMV equal
to 50% of the DC bus voltage. In conventional SVPWM, the
commanded voltage vector is synthesized using two active
vectors and the zero vectors.
In CMV reduction PWM schemes [6-8], the zero vectors are
not used. Thus, the peak CMV is limited to 16% of the DC bus
voltage. In the CMV reduction continuous PWM scheme
(CMVR CPWM) [6, 8], two oppositely directed active vectors
are used to generate the zero vector. At low modulation index,
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this scheme results in increased high frequency ripple in the
motor currents and the DC link capacitor current. Moreover, to
prevent the double pulsing phenomenon that would result in
high peak transient overvoltage at the motor terminals, the
pulse pattern must be compensated, particularly at low
modulation index, which further increases the line-line voltage
distortion at sub-harmonics of the carrier frequency [8]. The
logic to generate the switching signals for one implementation
of the method, which uses a single carrier wave, is shown in
Fig. 3 [8]. Here, active high (AH) refers to the switching logic
in which the upper switch in a phase leg is turned on when the
modulating wave is greater in amplitude than the carrier wave.
3
010
2
110
7
111
4
011
1
100
000
8
001
5
A. Implementation of CMVR DPWM
The implementation of CMVR DPWM reported by Un [7]
used two triangular carrier waves to generate the switching
signals. By using the AH and AL switching logic, CMVR
DPWM can be implemented using a single carrier wave. The
switching logic is shown in Fig. 4 for one arbitrary sector in
which the duty cycle of phase u is clamped to 1.
In every sector, one of the phase duty cycles is clamped
alternately to the maximum value of 1 or the minimum value
of 0, similar to conventional DPWM. The switching signals
for the phases with the two highest duty cycles are not
modified from conventional DPWM. The modulating wave
with minimum duty cycle is modified (w in Fig. 4 is modified
to create 1-w) and AL switching logic is applied to that phase.
101
6
Fig. 2. Switching states of a 2-level converter.
In the CMV reduction discontinuous PWM scheme (CMVR
DPWM) [7], three adjacent active vectors are used to
synthesize the commanded voltage vector. The minimum
modulation index for this method is 0.61 (modulation index of
1 corresponds to square wave mode). When applied to
inverters, this scheme is suitable for operation at high
modulation index, where the traditional DPWM schemes [11]
that use the zero vectors would otherwise be used.
Fig. 4. Generation of switching signals for CMVR DPWM
scheme using a single triangular carrier wave.
When the modulation index is below 0.61, the switching
signals become identical to conventional DPWM.
It is also important to note that the use of AL switching logic
requires a modification to the dead time compensation
scheme. Typically dead time compensation is implemented on
a pulse by pulse basis; based on AL or AH switching logic, the
polarity of the compensating term must be adjusted as follows,
where Td is the dead time, TPWM is the PWM carrier period,
and x = u, v or w represents the modulating wave.
x ' = x − sgn(ix )
Td
TPWM
T
x = x + sgn(ix ) d
TPWM
'
Fig. 3. Generation of switching signals for CMVR CPWM
scheme [8] (AH = active high, AL = active low).
AL switching
(1)
AH switching
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The adjustment for volt-second error due to the dead time
effect is shown in Fig. 5.
Fig. 5. Single-edge dead-time compensation with active low (AL)
switching logic.
B. Common-mode current reduction PWM scheme
The CMC reduction PWM scheme (CMCR CPWM) [9] is
a modification to the conventional SVPWM scheme at low
modulation index to prevent near simultaneous switching on
all three phases, as shown in Fig. 6. This is achieved by
enforcing a certain minimum dwell time on the active states
in each PWM period, and the resulting duty cycle error is
compensated in subsequent PWM periods. With the
switching instants spaced out, the CMC pulses are not
reinforced, thus reducing the peak CMC and associated
issues, such as peak DC link to ground voltage and pump-up
of DC bus voltage at very low modulation index [9].
However, the peak CMV is the same as conventional
SVPWM and equal to 50% of the DC bus voltage.
Carrier
max
mid
min
Modulating
Signals
VCM_Inv
CM dwell time
Fig. 6. CMCR PWM scheme with minimum dwell time enforced [9].
C. PWM schemes for regenerative AC drives
In a regenerative AC drive, both the rectifier and inverter
are typically switched using conventional SVPWM. As shown
in Table I, this can generate CMV equal to twice the value of a
non-regenerative drive, which can cause premature failure of
motor bearings and stator insulation to ground. A commonly
used technique to lower CMV is to synchronize the rectifier
and inverter PWM. This prevents the switching of opposite
zero vectors in the rectifier and inverter, thus reducing the
peak CMV to 67% of DC bus voltage. In a modified method
presented by Lee [14], certain switching instants in the
rectifier and inverter are also aligned to further reduce CMV
and the number of switching transitions; however, spikes in
the CMV will occur at switching transitions considering dead
time effects.
It is beneficial to switch the rectifier at high PWM carrier
frequency, to reduce the size of the AC line filter. The line
filters are required for the AC drive to be in compliance with
harmonics standards such as IEEE 519-1992 [12]. DPWM is
recommended to reduce the switching power losses of the
rectifier. Typically, the rectifier operates from a fixed voltage
source; hence, the modulation index is high and nearly
constant. Therefore, the CMVR DPWM scheme can be used
for the rectifier.
On the other hand, it is desirable to run the inverter at low
PWM carrier frequency, particularly at low modulation index
[13]. This helps to reduce the peak inverter power device
temperature. Operation at high PWM carrier frequency and
low modulation index not only requires a reduction in the
rating of the drive but also reduces the life time of the power
modules due to significant power cycling.
Hence, if the PWM carrier waves of the rectifier and
inverter are synchronized, it presents a design trade-off
between rating and size of the AC drive.
If the rectifier is switched using CMVR DPWM and the
inverter is switched using conventional SVPWM, the total
CMV is reduced to 67% of the DC bus voltage, even without
PWM synchronization. If CMVR PWM is applied to the
inverter as well, then the total CMV can be reduced to 33% of
DC bus voltage, which is even lower than the CMV of a nonregenerative drive.
At very low modulation index, the CMVR CPWM scheme
cannot be applied to the inverter due to the distortion created
in the line-line voltages and line currents. However, the
CMCR PWM scheme can be used to reduce peak CMC in this
region. At higher modulation index (less than 0.61), CMVR
CPWM scheme can be applied, and then, for modulation index
exceeding 0.61, the CMVR DPWM scheme can be applied.
This would be the recommended PWM scheme for the
regenerative AC drive to optimize drive cost, size and
performance.
A summary of the CMV generated by the combination of
the various PWM schemes, and their advantages and
limitations is provided in Table II below.
In the following sections, simulation and experimental
results are presented to demonstrate the advantages of CMV
reduction methods for regenerative AC drives, while also
showing that there is no deterioration in drive performance.
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Table II. Peak CMV generated by a regenerative AC drive.
60
40
Inverter PWM
Non-regenerative
6-pulse
SVPWM
CMV reduction
SVPWM
SVPWM
CMV reduction
CMV reduction
SVPWM
CMV reduction
Regenerative
20
CMC (A)
Rectifier PWM
0
-20
-40
-60
0.1
0.105
0.11
0.115
0.12
0.125
0.13
0.135
0.14
0.145
0.15
0.105
0.11
0.115
0.12
0.125
0.13
0.135
0.14
0.145
0.15
0.105
0.11
0.115
0.12
0.125
0.13
0.135
0.14
0.145
0.15
60
40
20
CMC (A)
Drive
Peak CMV at motor
normalized to DC bus
0.5
0.16
1 (without sync)
0.67 (with sync)
0.67
0.33
0
-20
-40
III. SIMULATION RESULTS
-60
0.1
40
CMC (A)
20
0
-20
-40
-60
0.1
Time (s)
Fig. 8. Simulation results: CMC at the drive output for very low
inverter modulation index.
(Top: SVPWM for rectifier and inverter, Middle: CMVR DPWM for
rectifier, CMCR CPWM for inverter, Bottom: CMVR DPWM for rectifier and
CMVR CPWM for inverter)
Waveforms of the rectifier line current are shown in Fig. 9
for the SVPWM and CMVR DPWM schemes. A typical LCL
type line filter was used in the simulations. Both waveforms
have nearly identical harmonic content and THD.
200
100
Line current (A)
A simulation model of a 480V, 100 hp regenerative AC
drive was constructed to demonstrate the CMV reduction
PWM schemes. Models for the different PWM schemes were
developed and include reflected wave compensation, deadtime compensation and duty cycle error compensation for the
CMV reduction methods. A high-frequency motor model was
developed from the measured DM and CM impedance of a
460V, 100hp motor [15]. A transmission line model was used
for the cable (1AWG, 200 feet, shielded cable). The rectifier
and inverter PWM carrier frequencies were set to 4kHz and
2kHz respectively.
The following combinations of PWM schemes were
simulated – (a) SVPWM without synchronization for both
rectifier and inverter, (b) CMVR DPWM for rectifier and
CMCR CPWM for inverter, and (c) CMVR DPWM for
rectifier and CMVR CPWM for inverter.
The CMV at the motor terminals is shown in Fig. 7 for the 3
combinations of PWM schemes. The reduction in CMV with
the CMVR PWM schemes is evident.
The CMC at the drive output is shown in Fig. 8 for very low
inverter modulation index. Again, the reduction in peak CMC
is obvious for the CMVR PWM schemes because of the
inherent spacing between switching transitions, required to
control transient motor overvoltage due to reflected waves [8],
which prevents reinforcement of the CMC pulses. This is also
the case for CMCR CPWM, where the switching transitions
are spaced [9].
60
0
-100
-200
0.2
0.205
0.21
0.215
0.22
0.205
0.21
0.215
0.22
0.225
0.23
0.235
0.24
0.245
0.25
0.225
0.23
0.235
0.24
0.245
0.25
200
Line current (A)
100
Motor CMV (V)
2000
1000
0
0
-100
-1000
-2000
0.1
0.105
0.11
0.115
0.12
0.125
0.13
0.135
0.14
0.145
-200
0.2
0.1 5
Time (s)
Motor CMV (V)
2000
1000
Fig. 9. Simulation results: Drive input line current at rated output
power.
0
-1000
-2000
0.1
0.105
0.11
0.115
0.12
0.125
0.13
0.135
0.14
0.145
(Top: SVPWM for rectifier and inverter, Bottom: CMVR DPWM for rectifier
and CMVR CPWM for inverter)
0.1 5
Motor CMV (V)
2000
1000
0
-1000
-2000
0.1
0.105
0.11
0.115
0.12
0.125
0.13
0.135
0.14
0.145
0.1 5
The DC bus to ground voltage for the different
combinations of PWM schemes, at very low modulation index
for the inverter, is shown in Fig. 10. A significant reduction is
achieved by the use of CMVR and CMCR PWM schemes.
Time (s)
Fig. 7. Simulation results: CMV at the motor terminals.
(Top: SVPWM for rectifier and inverter, Middle: CMVR DPWM for rectifier,
CMCR CPWM for inverter, Bottom: CMVR DPWM for rectifier and CMVR
CPWM for inverter)
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DC bus to GND voltage (V)
DC bus to GND voltage (V)
DC bus to GND voltage (V)
with lesser damping than the one used for the tests, the
differences will be significant.
1000
500
0
-500
0.1
0.105
0.11
0.115
0.12
0.125
0.13
0.135
0.14
0.145
0.15
0.105
0.11
0.115
0.12
0.125
0.13
0.135
0.14
0.145
0.15
0.105
0.11
0.115
0.12
0.125
0.13
0.135
0.14
0.145
0.15
1000
500
0
-500
0.1
1000
500
0
-500
0.1
Time (s)
Fig. 10. Simulation results: DC bus to ground voltage at very low
inverter modulation index.
(Top: SVPWM for rectifier and inverter, Middle: CMVR DPWM for rectifier,
CMCR CPWM for inverter, Bottom: CMVR DPWM for rectifier and CMVR
CPWM for inverter)
IV. EXPERIMENTAL RESULTS
Experimental tests were conducted on a 480VAC, 5.5kW,
10A regenerative AC drive running a 5.5kW motor with 100
feet of 10AWG shielded cable. Only an inductor was used for
the AC line filter. The DC bus voltage is regulated by the
active rectifier to be 715VDC.
The following combinations of PWM schemes were tested –
(a) SVPWM without synchronization for both rectifier and
inverter, (b) CMVR DPWM for rectifier and SVPWM for
inverter, (c) CMVR DPWM for rectifier and CMCR CPWM
for inverter, and (d) CMVR DPWM for rectifier and CMVR
CPWM for inverter. In all instances, the rectifier and inverter
PWM carrier frequencies were set to be 4kHz and 2kHz
respectively.
The total CMV generated by the AC drive was measured
between two virtual neutral points – one at the output of the
inverter bridge and the other at the input to the rectifier bridge
– created using resistor networks. The waveforms for the
CMV of the four different schemes above are shown in Fig.
11. Clearly, method (d) has 33% of the CMV of method (a),
while method (b) has the same CMV as SVPWM with carrier
synchronization.
The PWM line-line voltage at the rectifier input terminals is
shown in Fig. 12 for SVPWM and CMVR DPWM. The
increased distortion in the line-line voltage is evident.
However, the distortion is at high frequency and related to the
PWM carrier frequency. It does not create low frequency
distortion and does not affect the quality of the rectifier line
currents or rectifier performance.
Waveforms of CMC at the drive output with the different
PWM schemes are shown in Fig. 13, for the inverter running
at 0Hz. The peak and RMS values of CMC are listed in Table
III. The reduction in CMC with the CMVR and CMCR PWM
schemes is appreciable. For larger drive systems and cables
Fig. 11. Experimental results: CMV generated by regenerative drive
(350V/div, 10ms/div)
(From the top: (a) SVPWM for rectifier and inverter, (b) CMVR DPWM for
rectifier, SVPWM for inverter, (c) CMVR DPWM for rectifier, CMCR
CPWM for inverter, (d) CMVR DPWM for rectifier and CMVR CPWM for
inverter)
Fig. 12. Experimental results: Rectifier line-line voltage waveforms.
(350V/div, 10ms/div)
(Top: SVPWM, Bottom: CMVR DPWM)
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tests. This is not a characteristic of the CMVR PWM scheme,
as is clear from the simulation results of Fig. 9.
However, there is a slight increase in line current distortion
at PWM carrier frequency with CMVR PWM. For a typical
regenerative drive, the high frequency components would be
filtered by a LCL type filter and would not be observed on the
AC line. The design of the line filter should take into account
any increase in distortion at high frequency caused by the
CMVR PWM scheme.
Fig. 13. Experimental Results: CMC waveforms measured at the
output of the inverter (5A/div, 10ms/div).
(Top: (a) SVPWM for rectifier and inverter, Middle: (b) CMVR DPWM
for rectifier, CMCR CPWM for inverter, Bottom: (c) CMVR DPWM for
rectifier and CMVR CPWM for inverter)
Table III. Peak and RMS values of drive output CMC at 0Hz inverter
output frequency.
Rectifier PWM
Inverter PWM
SVPWM
CMVR DPWM
CMVR DPWM
CMVR DPWM
SVPWM
SVPWM
CMCR CPWM
CMVR CPWM
Common-Mode Current (A)
Peak
RMS
9.4
1.75
6.9
1.45
7.2
1.16
6.1
1.27
The DC bus to ground voltage for the different PWM
schemes is shown in Fig. 14. These waveforms were obtained
for 0Hz inverter output frequency, as this represents the worst
case [9]. It can be seen that a very significant reduction is
possible with the recommended PWM scheme i.e. CMVR
DPWM for the rectifier and CMCR CPWM for the inverter.
The rectifier line current waveforms for SVPWM and
CMVR DPWM schemes are shown in Fig. 15. Their
frequency spectra are shown in Fig. 16. The inverter PWM
scheme has negligible influence on the line current waveform.
It can be observed that the CMVR PWM scheme does not
cause any low frequency distortion that would affect the
performance of the regenerative AC drive.
It must be noted that the distortion seen in the line current
waveform of Fig. 15 with CMVR PWM is due only to the
limitations in the implementation of AH and AL switching
logic, in the PWM waveform generation hardware used for the
Fig. 14. Experimental Results: DC bus to ground voltage at 0Hz
inverter output frequency (500V/div, 10ms/div).
(From the top: (a) SVPWM for rectifier and inverter, (b) CMVR DPWM for
rectifier, SVPWM for inverter, (c) CMVR DPWM for rectifier, CMCR
CPWM for inverter, (d) CMVR DPWM for rectifier and CMVR CPWM for
inverter)
It has been thoroughly established in previous work [8] that
the CMVR CPWM scheme does not affect the quality of
motor control in the mid-to-high modulation index range. At
very low modulation index, CMCR CPWM [9] can be applied,
with very little distortion in the output line-line voltages and
line currents.
In the simulation and experimental results presented here, it
has been shown that the CMVR DPWM scheme can be
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applied to the rectifier with negligible impact on the quality of
the line currents and performance of the rectifier.
Thus, the CMVR and CMCR PWM schemes can be applied
to a regenerative AC drive, without the need for PWM
synchronization, and with significant reduction of total CMV,
drive output CMC and DC bus to ground voltage.
15
10
5
0
-5
-10
-15
0
0.005
0.01
0.015
0.02
0.025
0.03
0.035
0.04
0.045
0.05
0
0.005
0.01
0.015
0.02
0.025
Ti
( )
0.03
0.035
0.04
0.045
0.05
15
10
5
0
-5
-10
-15
Fig. 15. Experimental Results: Drive input line current at rated output
power (5A/div, 5ms/div).
(Top: SVPWM for rectifier and inverter, Bottom: CMVR DPWM for rectifier
and CMVR CPWM for inverter)
A commonly used method to reduce CMV is
synchronization of the carrier frequencies between the rectifier
and inverter; however, this presents design trade-offs between
drive size, cost and rating. Moreover, when several drives are
fed from a common DC bus supply created by a regenerative
rectifier, synchronization may not be possible. Drive output
filters to mitigate these issues are generally bulky, expensive
and may not adequately mitigate all issues.
In this paper, the applicability of CMVR and CMCR PWM
schemes to regenerative AC drives has been investigated. It
has been shown through simulation analysis and experimental
testing that the CMV of regenerative AC drives can be
reduced without PWM synchronization. In addition, peak
CMC and DC bus to ground voltage can be significantly
reduced as well. Furthermore, there is negligible impact on the
quality of motor control and on the AC line current
waveforms.
The recommended PWM scheme for the rectifier is CMVR
DPWM, so that a high carrier frequency can be used to reduce
the size of the line filter while also minimizing switching
losses. For the inverter, the CMCR CPWM scheme is
preferred at very low modulation index to minimize output
voltage and current distortion. At mid-to-high modulation
index, CMVR CPWM scheme should be used, while the
CMVR DPWM scheme may be used at high modulation index
to lower switching losses.
REFERENCES
Fig. 16. Experimental Results: Frequency spectrum of drive input
line current at rated output power.
(Top: SVPWM for rectifier and inverter, Bottom: CMVR DPWM for
rectifier and CMVR CPWM for inverter)
V. CONCLUSIONS
With conventional SVPWM schemes, regenerative AC
drives can generate very high CMV and line-ground voltage at
the motor terminals, which can result in premature failure of
winding insulation and bearings. Besides, high DC bus
voltages to ground are generated within the drive, which can
cause failure of several components.
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